From 48585ff50b5d76e702c0b58b6b0c14f68871aed9 Mon Sep 17 00:00:00 2001 From: benihi <88561480+benihi@users.noreply.github.com> Date: Fri, 12 Aug 2022 22:16:33 -0400 Subject: [PATCH 1/6] rtl8821cu: update to 2022-04-09 (#9929) * rtl8821cu: update to 2022-04-09 * rtl8821cu: patches: Buildfix for Linux 5.18 Co-authored-by: Butterfly --- package/kernel/rtl8821cu/Makefile | 6 +-- .../rtl8821cu/patches/040-wireless-5.8.patch | 4 +- .../patches/050-Buildfix-for-Linux-5.18.patch | 44 +++++++++++++++++++ 3 files changed, 49 insertions(+), 5 deletions(-) create mode 100644 package/kernel/rtl8821cu/patches/050-Buildfix-for-Linux-5.18.patch diff --git a/package/kernel/rtl8821cu/Makefile b/package/kernel/rtl8821cu/Makefile index f1e7d14d58ff47..d74f8564b8dfc8 100644 --- a/package/kernel/rtl8821cu/Makefile +++ b/package/kernel/rtl8821cu/Makefile @@ -13,9 +13,9 @@ PKG_RELEASE:=1 PKG_SOURCE_URL:=https://github.com/brektrou/rtl8821CU.git PKG_SOURCE_PROTO:=git -PKG_SOURCE_DATE:=2021-11-14 -PKG_SOURCE_VERSION:=ef3ff12118a75ea9ca1db8f4806bb0861e4fffef -PKG_MIRROR_HASH:=2b43a454960dd9f69eb0b3648a73438148e38036bb9cd5e3c57ae5697110c18e +PKG_SOURCE_DATE:=2022-04-09 +PKG_SOURCE_VERSION:=8c2226a74ae718439d56248bd2e44ccf717086d5 +PKG_MIRROR_HASH:=3353a3bc4c73652eceaab95809aab27c3ae8bbf7e915b73488361a061ba91b84 PKG_LICENSE:=GPL-2.0 PKG_LICENSE_FILES:=LICENSE diff --git a/package/kernel/rtl8821cu/patches/040-wireless-5.8.patch b/package/kernel/rtl8821cu/patches/040-wireless-5.8.patch index 2453c61ff08960..8ed4115a2c7f54 100644 --- a/package/kernel/rtl8821cu/patches/040-wireless-5.8.patch +++ b/package/kernel/rtl8821cu/patches/040-wireless-5.8.patch @@ -33,7 +33,7 @@ diff --git a/os_dep/linux/os_intfs.c b/os_dep/linux/os_intfs.c index 257c581..f97fa24 100755 --- a/os_dep/linux/os_intfs.c +++ b/os_dep/linux/os_intfs.c -@@ -1302,6 +1302,14 @@ unsigned int rtw_classify8021d(struct sk_buff *skb) +@@ -1306,6 +1306,14 @@ unsigned int rtw_classify8021d(struct sk_buff *skb) } @@ -48,7 +48,7 @@ index 257c581..f97fa24 100755 static u16 rtw_select_queue(struct net_device *dev, struct sk_buff *skb #if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 13, 0) , void *accel_priv -@@ -1310,6 +1318,7 @@ static u16 rtw_select_queue(struct net_device *dev, struct sk_buff *skb +@@ -1314,6 +1322,7 @@ static u16 rtw_select_queue(struct net_device *dev, struct sk_buff *skb #endif #endif ) diff --git a/package/kernel/rtl8821cu/patches/050-Buildfix-for-Linux-5.18.patch b/package/kernel/rtl8821cu/patches/050-Buildfix-for-Linux-5.18.patch new file mode 100644 index 00000000000000..98f8b422bb9b63 --- /dev/null +++ b/package/kernel/rtl8821cu/patches/050-Buildfix-for-Linux-5.18.patch @@ -0,0 +1,44 @@ +From af27791efdde55cdec3b4400c9d1a806c0040e38 Mon Sep 17 00:00:00 2001 +From: Butterfly +Date: Tue, 12 Apr 2022 00:31:54 +0300 +Subject: [PATCH] Buildfix for Linux 5.18 + +Buildfix for Linux 5.18 +Link: https://github.com/brektrou/rtl8821CU/pull/168 +--- + include/ieee80211.h | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +--- a/include/ieee80211.h ++++ b/include/ieee80211.h +@@ -1529,18 +1529,30 @@ enum ieee80211_state { + (((Addr[2]) & 0xff) == 0xff) && (((Addr[3]) & 0xff) == 0xff) && (((Addr[4]) & 0xff) == 0xff) && \ + (((Addr[5]) & 0xff) == 0xff)) + #else ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 18, 0)) ++static inline int is_multicast_mac_addr(const u8 *addr) ++#else + extern __inline int is_multicast_mac_addr(const u8 *addr) ++#endif + { + return (addr[0] != 0xff) && (0x01 & addr[0]); + } + ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 18, 0)) ++static inline int is_broadcast_mac_addr(const u8 *addr) ++#else + extern __inline int is_broadcast_mac_addr(const u8 *addr) ++#endif + { + return ((addr[0] == 0xff) && (addr[1] == 0xff) && (addr[2] == 0xff) && \ + (addr[3] == 0xff) && (addr[4] == 0xff) && (addr[5] == 0xff)); + } + ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 18, 0)) ++static inline int is_zero_mac_addr(const u8 *addr) ++#else + extern __inline int is_zero_mac_addr(const u8 *addr) ++#endif + { + return ((addr[0] == 0x00) && (addr[1] == 0x00) && (addr[2] == 0x00) && \ + (addr[3] == 0x00) && (addr[4] == 0x00) && (addr[5] == 0x00)); From 2672ddeec5092c1f350f3e6f2445819af18de23c Mon Sep 17 00:00:00 2001 From: lean Date: Sat, 13 Aug 2022 10:45:02 +0800 Subject: [PATCH 2/6] rtl8821cu: fix _rtw_memcpy for kernel 5.19 --- .../patches/051-fix-rtw_memcpy-5.18.patch | 53 +++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 package/kernel/rtl8821cu/patches/051-fix-rtw_memcpy-5.18.patch diff --git a/package/kernel/rtl8821cu/patches/051-fix-rtw_memcpy-5.18.patch b/package/kernel/rtl8821cu/patches/051-fix-rtw_memcpy-5.18.patch new file mode 100644 index 00000000000000..c56fdc1581145a --- /dev/null +++ b/package/kernel/rtl8821cu/patches/051-fix-rtw_memcpy-5.18.patch @@ -0,0 +1,53 @@ +From 7e24201ebdcdbe2d34f5cdfe4065928b381b8d04 Mon Sep 17 00:00:00 2001 +From: Butterfly +Date: Tue, 12 Apr 2022 00:05:41 +0300 +Subject: [PATCH 1/2] osdep_service.c: fix warning _rtw_memcpy + +osdep_service.c: fix warning _rtw_memcpy +--- + os_dep/osdep_service.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/os_dep/osdep_service.c b/os_dep/osdep_service.c +index d4a01c8..6a2d3ac 100644 +--- a/os_dep/osdep_service.c ++++ b/os_dep/osdep_service.c +@@ -2491,7 +2491,11 @@ int rtw_change_ifname(_adapter *padapter, const char *ifname) + + rtw_init_netdev_name(pnetdev, ifname); + ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 17, 0) + _rtw_memcpy(pnetdev->dev_addr, adapter_mac_addr(padapter), ETH_ALEN); ++#else ++ dev_addr_set(pnetdev, adapter_mac_addr(padapter)); ++#endif + + if (rtnl_lock_needed) + ret = register_netdev(pnetdev); + +From 924f57d1cce2843aa28d557b74baf00a6482caa8 Mon Sep 17 00:00:00 2001 +From: Butterfly +Date: Tue, 12 Apr 2022 00:08:52 +0300 +Subject: [PATCH 2/2] ioctl_linux.c: fix warning _rtw_memcpy + +ioctl_linux.c: fix warning _rtw_memcpy +--- + os_dep/linux/ioctl_linux.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/os_dep/linux/ioctl_linux.c b/os_dep/linux/ioctl_linux.c +index 20dd583..a0d32ee 100644 +--- a/os_dep/linux/ioctl_linux.c ++++ b/os_dep/linux/ioctl_linux.c +@@ -9778,7 +9778,11 @@ static int rtw_mp_efuse_set(struct net_device *dev, + rtw_hal_read_chip_info(padapter); + /* set mac addr*/ + rtw_macaddr_cfg(adapter_mac_addr(padapter), get_hal_mac_addr(padapter)); ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 17, 0) + _rtw_memcpy(padapter->pnetdev->dev_addr, get_hal_mac_addr(padapter), ETH_ALEN); /* set mac addr to net_device */ ++#else ++ dev_addr_set(padapter->pnetdev, get_hal_mac_addr(padapter)); /* set mac addr to net_device */ ++#endif + + #ifdef CONFIG_P2P + rtw_init_wifidirect_addrs(padapter, adapter_mac_addr(padapter), adapter_mac_addr(padapter)); From 21b5bb211ebf0a0b30b81def6cefdd34fdc6af45 Mon Sep 17 00:00:00 2001 From: coolsnowwolf Date: Sat, 13 Aug 2022 08:35:47 +0000 Subject: [PATCH 3/6] x86: revert kmod-igb-intel to kmod-igb --- target/linux/rockchip/image/armv8.mk | 2 +- target/linux/x86/Makefile | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/target/linux/rockchip/image/armv8.mk b/target/linux/rockchip/image/armv8.mk index 61326040148270..43c4f1d7b5cbf9 100644 --- a/target/linux/rockchip/image/armv8.mk +++ b/target/linux/rockchip/image/armv8.mk @@ -134,7 +134,7 @@ TARGET_DEVICES += xunlong_orangepi-r1-plus-lts define Device/firefly_station-p2 DEVICE_VENDOR := Firefly - DEVICE_MODEL := Station_P2 + DEVICE_MODEL := Station P2 SOC := rk3568 UBOOT_DEVICE_NAME := station-p2-rk3568 IMAGE/sysupgrade.img.gz := boot-common | boot-script nanopi-r5s | pine64-img | gzip | append-metadata diff --git a/target/linux/x86/Makefile b/target/linux/x86/Makefile index 29e2ae4d5d2ec6..44a864b01965b6 100644 --- a/target/linux/x86/Makefile +++ b/target/linux/x86/Makefile @@ -18,7 +18,7 @@ KERNELNAME:=bzImage include $(INCLUDE_DIR)/target.mk DEFAULT_PACKAGES += partx-utils mkf2fs e2fsprogs kmod-button-hotplug kmod-usb-hid kmod-mmc kmod-sdhci usbutils pciutils \ -kmod-alx kmod-e1000e kmod-igb-intel kmod-igc kmod-igbvf kmod-iavf kmod-bnx2x kmod-pcnet32 kmod-tulip kmod-via-velocity kmod-vmxnet3 kmod-i40e kmod-i40evf kmod-r8125 kmod-8139cp kmod-8139too kmod-fs-f2fs cfdisk \ +kmod-alx kmod-e1000e kmod-igb kmod-igc kmod-igbvf kmod-iavf kmod-bnx2x kmod-pcnet32 kmod-tulip kmod-via-velocity kmod-vmxnet3 kmod-i40e kmod-i40evf kmod-r8125 kmod-8139cp kmod-8139too kmod-fs-f2fs cfdisk \ htop lm-sensors autocore-x86 automount autosamba luci-app-adbyby-plus luci-app-ipsec-vpnd luci-proto-bonding \ luci-app-unblockmusic luci-app-zerotier luci-app-xlnetacc ddns-scripts_aliyun ddns-scripts_dnspod ca-bundle luci-app-wireguard luci-app-ttyd \ kmod-sound-hda-core kmod-sound-hda-codec-realtek kmod-sound-hda-codec-via kmod-sound-via82xx kmod-sound-hda-intel kmod-sound-hda-codec-hdmi kmod-sound-i8x0 kmod-usb-audio \ From ae6810abe1360b06136a027f85310970e8691dab Mon Sep 17 00:00:00 2001 From: coolsnowwolf Date: Sat, 13 Aug 2022 08:58:04 +0000 Subject: [PATCH 4/6] mac80211: fix brcm patch 5.15 support --- .../brcm/999-backport-to-linux-5.18.patch | 7 +++++-- target/linux/rockchip/image/armv8.mk | 20 +++++++++---------- 2 files changed, 15 insertions(+), 12 deletions(-) diff --git a/package/kernel/mac80211/patches/brcm/999-backport-to-linux-5.18.patch b/package/kernel/mac80211/patches/brcm/999-backport-to-linux-5.18.patch index d71c5c902536d9..f4ecec01b473b8 100644 --- a/package/kernel/mac80211/patches/brcm/999-backport-to-linux-5.18.patch +++ b/package/kernel/mac80211/patches/brcm/999-backport-to-linux-5.18.patch @@ -82,12 +82,15 @@ diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c b/drivers/n index 8effeb7..04362e2 100644 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c -@@ -4165,7 +4165,7 @@ static int brcmf_sdio_bus_reset(struct device *dev) +@@ -4164,7 +4164,11 @@ /* reset the adapter */ sdio_claim_host(sdiodev->func1); -- mmc_hw_reset(sdiodev->func1->card->host); ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5,18,0) + mmc_hw_reset(sdiodev->func1->card->host); ++#else + mmc_hw_reset(sdiodev->func1->card); ++#endif sdio_release_host(sdiodev->func1); brcmf_bus_change_state(sdiodev->bus_if, BRCMF_BUS_DOWN); diff --git a/target/linux/rockchip/image/armv8.mk b/target/linux/rockchip/image/armv8.mk index 43c4f1d7b5cbf9..f7567dea3f4851 100644 --- a/target/linux/rockchip/image/armv8.mk +++ b/target/linux/rockchip/image/armv8.mk @@ -32,6 +32,16 @@ define Device/fastrhino_r66s endef TARGET_DEVICES += fastrhino_r66s +define Device/firefly_station-p2 + DEVICE_VENDOR := Firefly + DEVICE_MODEL := Station P2 + SOC := rk3568 + UBOOT_DEVICE_NAME := station-p2-rk3568 + IMAGE/sysupgrade.img.gz := boot-common | boot-script nanopi-r5s | pine64-img | gzip | append-metadata + DEVICE_PACKAGES := kmod-brcmfmac kmod-ikconfig ata-ahci-platform station-p2-firmware wpad +endef +TARGET_DEVICES += firefly_station-p2 + define Device/friendlyarm_nanopi-neo3 DEVICE_VENDOR := FriendlyARM DEVICE_MODEL := NanoPi NEO3 @@ -131,13 +141,3 @@ define Device/xunlong_orangepi-r1-plus-lts DEVICE_PACKAGES := kmod-usb-net-rtl8152 endef TARGET_DEVICES += xunlong_orangepi-r1-plus-lts - -define Device/firefly_station-p2 - DEVICE_VENDOR := Firefly - DEVICE_MODEL := Station P2 - SOC := rk3568 - UBOOT_DEVICE_NAME := station-p2-rk3568 - IMAGE/sysupgrade.img.gz := boot-common | boot-script nanopi-r5s | pine64-img | gzip | append-metadata - DEVICE_PACKAGES := kmod-brcmfmac kmod-ikconfig ata-ahci-platform station-p2-firmware wpad -endef -TARGET_DEVICES += firefly_station-p2 From e1a16f2718d2926a71b86abfa3d2b0e6db3736db Mon Sep 17 00:00:00 2001 From: coolsnowwolf Date: Sat, 13 Aug 2022 09:43:30 +0000 Subject: [PATCH 5/6] rockchip: add dummy dts for build --- .../arm64/boot/dts/rockchip/rk3568-r66s.dts | 530 ++++++++++++ .../boot/dts/rockchip/rk3568-station-p2.dts | 787 ++++++++++++++++++ .../arm64/boot/dts/rockchip/rk3568-r66s.dts | 523 +----------- .../boot/dts/rockchip/rk3568-station-p2.dts | 778 ----------------- ...-support-for-FriendlyARM-NanoPi-Neo3.patch | 4 +- ...-support-for-FriendlyARM-NanoPi-Neo3.patch | 4 +- ...-support-for-FriendlyARM-NanoPi-Neo3.patch | 4 +- 7 files changed, 1327 insertions(+), 1303 deletions(-) create mode 100644 target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-r66s.dts create mode 100644 target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-station-p2.dts diff --git a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-r66s.dts b/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-r66s.dts new file mode 100644 index 00000000000000..64ec33a30bcb8d --- /dev/null +++ b/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-r66s.dts @@ -0,0 +1,530 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +/dts-v1/; +#include +#include +#include +#include +#include "rk3568.dtsi" + +/ { + model = "FastRhino R66S"; + compatible = "fastrhino,r66s", "rockchip,rk3568"; + + aliases { + ethernet0 = &rtl8125_1; + ethernet1 = &rtl8125_2; + led-boot = &power_led; + led-failsafe = &power_led; + led-running = &power_led; + led-upgrade = &power_led; + mmc0 = &sdmmc0; + }; + + chosen: chosen { + stdout-path = "serial2:1500000n8"; + }; + + gpio-leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&power_led_pin>; + + power_led: led-power { + label = "green:power"; + gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&reset_button_pin>; + + reset { + debounce-interval = <50>; + gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>; + label = "reset"; + linux,code = ; + }; + }; + + dc_12v: dc-12v { + compatible = "regulator-fixed"; + regulator-name = "dc_12v"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + vcc3v3_pcie: gpio-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_pcie"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc5v0_sys>; + }; + + vcc3v3_sys: vcc3v3-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&dc_12v>; + }; + + vcc5v0_sys: vcc5v0-sys { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-name = "vcc5v0_sys"; + vin-supply = <&dc_12v>; + }; + + vcc5v0_usb_host: vcc5v0-usb-host { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_usb_host"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + vcc5v0_usb_otg: vcc5v0-usb-otg { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_usb_otg_en>; + regulator-name = "vcc5v0_usb_otg"; + regulator-always-on; + regulator-boot-on; + }; +}; + +&combphy0 { + status = "okay"; +}; + +&combphy1 { + status = "okay"; +}; + +&cpu0 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu1 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu2 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu3 { + cpu-supply = <&vdd_cpu>; +}; + +&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + vdd_cpu: regulator@1c { + compatible = "tcs,tcs4525"; + reg = <0x1c>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1150000>; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + rk809: pmic@20 { + compatible = "rockchip,rk809"; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = ; + #clock-cells = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int>; + rockchip,system-power-controller; + vcc1-supply = <&vcc3v3_sys>; + vcc2-supply = <&vcc3v3_sys>; + vcc3-supply = <&vcc3v3_sys>; + vcc4-supply = <&vcc3v3_sys>; + vcc5-supply = <&vcc3v3_sys>; + vcc6-supply = <&vcc3v3_sys>; + vcc7-supply = <&vcc3v3_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc3v3_sys>; + wakeup-source; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-name = "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-init-microvolt = <900000>; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-name = "vdd_gpu"; + regulator-always-on; + regulator-init-microvolt = <900000>; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vdd_npu: DCDC_REG4 { + regulator-name = "vdd_npu"; + regulator-init-microvolt = <900000>; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG5 { + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_image: LDO_REG1 { + regulator-name = "vdda0v9_image"; + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <950000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v9: LDO_REG2 { + regulator-name = "vdda_0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-name = "vdda0v9_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-name = "vccio_acodec"; + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-name = "vccio_sd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-name = "vcc3v3_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcca_1v8: LDO_REG7 { + regulator-name = "vcca_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pmu: LDO_REG8 { + regulator-name = "vcca1v8_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcca1v8_image: LDO_REG9 { + regulator-name = "vcca1v8_image"; + regulator-init-microvolt = <950000>; + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <950000>; + }; + }; + + vcc_3v3: SWITCH_REG1 { + regulator-name = "vcc_3v3"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_sd: SWITCH_REG2 { + regulator-name = "vcc3v3_sd"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + + }; +}; + +&pcie30phy { + data-lanes = <1 2>; + status = "okay"; +}; + +&pcie3x1 { + num-lanes = <1>; + reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc3v3_pcie>; + status = "okay"; + + pcie@10 { + reg = <0x00100000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + + rtl8125_1: pcie-eth@10,0 { + compatible = "pci10ec,8125"; + reg = <0x000000 0 0 0 0>; + + realtek,led-data = <0x4078>; + }; + }; +}; + +&pcie3x2 { + num-lanes = <1>; + reset-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc3v3_pcie>; + status = "okay"; + + pcie@20 { + reg = <0x00200000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + + rtl8125_2: pcie-eth@20,0 { + compatible = "pci10ec,8125"; + reg = <0x000000 0 0 0 0>; + + realtek,led-data = <0x4078>; + }; + }; +}; + +&pinctrl { + gpio-leds { + power_led_pin: power-led-pin { + rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int: pmic_int { + rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + rockchip-key { + reset_button_pin: reset-button-pin { + rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + usb { + vcc5v0_usb_otg_en: vcc5v0_usb_otg_en { + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pmu_io_domains { + pmuio1-supply = <&vcc3v3_pmu>; + pmuio2-supply = <&vcc3v3_pmu>; + vccio1-supply = <&vccio_acodec>; + vccio3-supply = <&vccio_sd>; + vccio4-supply = <&vcc_1v8>; + vccio5-supply = <&vcc_3v3>; + vccio6-supply = <&vcc_1v8>; + vccio7-supply = <&vcc_3v3>; + status = "okay"; +}; + +&rng { + status = "okay"; +}; + +&saradc { + vref-supply = <&vcca_1v8>; + status = "okay"; +}; + +&sdmmc0 { + max-frequency = <150000000>; + no-sdio; + no-mmc; + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + vmmc-supply = <&vcc3v3_sd>; + vqmmc-supply = <&vccio_sd>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; + status = "okay"; +}; + +&tsadc { + rockchip,hw-tshut-mode = <1>; + rockchip,hw-tshut-polarity = <0>; + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host0_xhci { + extcon = <&usb2phy0>; + dr_mode = "host"; + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +&usb_host1_xhci { + status = "okay"; +}; + +&usb2phy0 { + status = "okay"; +}; + +&usb2phy0_host { + phy-supply = <&vcc5v0_usb_host>; + status = "okay"; +}; + +&usb2phy0_otg { + phy-supply = <&vcc5v0_usb_otg>; + status = "okay"; +}; diff --git a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-station-p2.dts b/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-station-p2.dts new file mode 100644 index 00000000000000..3883c1827be67b --- /dev/null +++ b/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-station-p2.dts @@ -0,0 +1,787 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2021 Rockchip Electronics Co., Ltd. + * + */ + +/dts-v1/; + +#include +#include +#include +#include "rk3568.dtsi" + +/ { + model = "Firefly Station P2"; + compatible = "firefly,rk3568-roc-pc", "rockchip,rk3568"; + + aliases { + ethernet0 = &gmac0; + ethernet1 = &gmac1; + mmc0 = &sdmmc0; + mmc1 = &sdhci; + }; + + chosen: chosen { + stdout-path = "serial2:1500000n8"; + }; + + gmac0_clkin: external-gmac0-clock { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "gmac0_clkin"; + #clock-cells = <0>; + }; + + gmac1_clkin: external-gmac1-clock { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "gmac1_clkin"; + #clock-cells = <0>; + }; + + leds { + compatible = "gpio-leds"; + + power_led: power { + label = "firefly:blue:power"; + linux,default-trigger = "ir-power-click"; + default-state = "on"; + gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&led_power>; + }; + + user_led: user { + label = "firefly:yellow:user"; + linux,default-trigger = "ir-user-click"; + default-state = "off"; + gpios = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&led_user>; + }; + }; + + hdmi-con { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + status = "okay"; + compatible = "mmc-pwrseq-simple"; + clocks = <&rk809 1>; + clock-names = "ext_clock"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable_h>; + reset-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>; + post-power-on-delay-ms = <100>; + }; + + dc_12v: dc-12v { + compatible = "regulator-fixed"; + regulator-name = "dc_12v"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + vcc3v3_sys: vcc3v3-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&dc_12v>; + }; + + vcc5v0_sys: vcc5v0-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&dc_12v>; + }; + + vcc5v0_usb: vcc5v0-usb { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_usb"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&dc_12v>; + }; + + pcie30_avdd0v9: pcie30-avdd0v9 { + compatible = "regulator-fixed"; + regulator-name = "pcie30_avdd0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + vin-supply = <&vcc3v3_sys>; + }; + + pcie30_avdd1v8: pcie30-avdd1v8 { + compatible = "regulator-fixed"; + regulator-name = "pcie30_avdd1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc3v3_sys>; + }; + + vcc3v3_pcie: vcc3v3_pi6c: vcc3v3-pcie { + compatible = "regulator-fixed"; + regulator-always-on; + enable-active-high; + gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_enable_h>; + regulator-name = "vcc3v3_pcie"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc5v0_sys>; + }; + + vcc5v0_host: vcc5v0-host { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_host"; + enable-active-high; + gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_host_en>; + regulator-always-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc5v0_usb>; + }; + + vcc5v0_otg: vcc5v0-otg { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_otg"; + enable-active-high; + gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_otg_en>; + vin-supply = <&vcc5v0_usb>; + }; + + vcc_hub_reset: vcc-hub-reset { + compatible = "regulator-fixed"; + regulator-name = "vcc_hub_reset"; + enable-active-high; + gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc_hub_reset_en>; + regulator-always-on; + }; + + pcie_pi6c_oe: pcie-pi6c-oe { + compatible = "regulator-fixed"; + regulator-name = "pcie_pi6c_oe_en"; + gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_pi6c_oe_en>; + regulator-always-on; + }; + + vcc3v3_lcd0_n: vcc3v3-lcd0-n { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_lcd0_n"; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_lcd1_n: vcc3v3-lcd1-n { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_lcd1_n"; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&gmac0 { + phy-mode = "rgmii"; + clock_in_out = "input"; + + snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + /* Reset time is 20ms, 100ms for rtl8211f */ + snps,reset-delays-us = <0 20000 100000>; + + assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; + assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&gmac0_clkin>; + + pinctrl-names = "default"; + pinctrl-0 = <&gmac0_miim + &gmac0_tx_bus2 + &gmac0_rx_bus2 + &gmac0_rgmii_clk + &gmac0_rgmii_bus + &gmac0_clkinout>; + + tx_delay = <0x3c>; + rx_delay = <0x2f>; + + phy-handle = <&rgmii_phy0>; + status = "okay"; +}; + +&gmac1 { + phy-mode = "rgmii"; + clock_in_out = "input"; + + snps,reset-gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + /* Reset time is 20ms, 100ms for rtl8211f */ + snps,reset-delays-us = <0 20000 100000>; + + assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; + assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>; + + pinctrl-names = "default"; + pinctrl-0 = <&gmac1m1_miim + &gmac1m1_tx_bus2 + &gmac1m1_rx_bus2 + &gmac1m1_rgmii_clk + &gmac1m1_rgmii_bus + &gmac1m1_clkinout>; + + tx_delay = <0x4f>; + rx_delay = <0x26>; + + phy-handle = <&rgmii_phy1>; + status = "okay"; +}; + +&hdmi { + status = "okay"; + avdd-0v9-supply = <&vdda0v9_image>; + avdd-1v8-supply = <&vcca1v8_image>; +}; + +&i2c0 { + status = "okay"; + + vdd_cpu: regulator@1c { + compatible = "tcs,tcs4525"; + reg = <0x1c>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1150000>; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + rk809: pmic@20 { + compatible = "rockchip,rk809"; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = ; + assigned-clocks = <&cru I2S1_MCLKOUT_TX>; + assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; + #clock-cells = <1>; + clock-names = "mclk"; + clocks = <&cru I2S1_MCLKOUT_TX>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int>; + rockchip,system-power-controller; + #sound-dai-cells = <0>; + vcc1-supply = <&vcc3v3_sys>; + vcc2-supply = <&vcc3v3_sys>; + vcc3-supply = <&vcc3v3_sys>; + vcc4-supply = <&vcc3v3_sys>; + vcc5-supply = <&vcc3v3_sys>; + vcc6-supply = <&vcc3v3_sys>; + vcc7-supply = <&vcc3v3_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc3v3_sys>; + wakeup-source; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-name = "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-init-microvolt = <900000>; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-name = "vdd_gpu"; + regulator-always-on; + regulator-init-microvolt = <900000>; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vdd_npu: DCDC_REG4 { + regulator-name = "vdd_npu"; + regulator-init-microvolt = <900000>; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG5 { + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_image: LDO_REG1 { + regulator-name = "vdda0v9_image"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v9: LDO_REG2 { + regulator-name = "vdda_0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-name = "vdda0v9_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-name = "vccio_acodec"; + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-name = "vccio_sd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-name = "vcc3v3_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcca_1v8: LDO_REG7 { + regulator-name = "vcca_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pmu: LDO_REG8 { + regulator-name = "vcca1v8_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcca1v8_image: LDO_REG9 { + regulator-name = "vcca1v8_image"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3: SWITCH_REG1 { + regulator-name = "vcc_3v3"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_sd: SWITCH_REG2 { + regulator-name = "vcc3v3_sd"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + +&mdio0 { + rgmii_phy0: phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x0>; + }; +}; + +&mdio1 { + rgmii_phy1: phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x0>; + }; +}; + +&pinctrl { + leds { + led_power: led-power { + rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + led_user: led-user { + rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb { + vcc5v0_host_en: vcc5v0-host-en { + rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + vcc5v0_otg_en: vcc5v0-otg-en { + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + vcc_hub_reset_en: vcc-hub-reset-en { + rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + fusb0_int { + fusb0_int: fusb0-int { + rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + + pcie { + pcie_enable_h: pcie-enable-h { + rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + pcie_reset_h: pcie-reset-h { + rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + pcie_pi6c_oe_en: pcie-pi6c-oe-en { + rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int: pmic_int { + rockchip,pins = + <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +}; + +&i2s0_8ch { + status = "okay"; +}; + +&pmu_io_domains { + pmuio1-supply = <&vcc3v3_pmu>; + pmuio2-supply = <&vcc3v3_pmu>; + vccio1-supply = <&vccio_acodec>; + vccio2-supply = <&vcc_1v8>; + vccio3-supply = <&vccio_sd>; + vccio4-supply = <&vcc_1v8>; + vccio5-supply = <&vcc_3v3>; + vccio6-supply = <&vcc_1v8>; + vccio7-supply = <&vcc_3v3>; + status = "okay"; +}; + +&saradc { + vref-supply = <&vcca_1v8>; + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + max-frequency = <200000000>; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; + status = "okay"; +}; + +&sdmmc0 { + bus-width = <4>; + cap-sd-highspeed; + cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; + disable-wp; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; + sd-uhs-sdr104; + vmmc-supply = <&vcc3v3_sd>; + vqmmc-supply = <&vccio_sd>; + status = "okay"; +}; + +&sdmmc2 { + max-frequency = <150000000>; + supports-sdio; + bus-width = <4>; + disable-wp; + cap-sd-highspeed; + cap-sdio-irq; + keep-power-in-suspend; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>; + sd-uhs-sdr104; + mmc-pwrseq = <&sdio_pwrseq>; + non-removable; + status = "okay"; +}; + +&tsadc { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&vop { + status = "okay"; + assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; + assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; +}; + +&vop_mmu { + status = "okay"; +}; + +&hdmi_in { + hdmi_in_vp0: endpoint@0 { + reg = <0>; + remote-endpoint = <&vp0_out_hdmi>; + }; +}; + +&vp0 { + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg = ; + remote-endpoint = <&hdmi_in_vp0>; + }; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + +&hdmi_sound { + status = "okay"; +}; + +&cpu0 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu1 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu2 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu3 { + cpu-supply = <&vdd_cpu>; +}; + +&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + +&combphy0 { + status = "okay"; +}; + +&combphy1 { + status = "okay"; +}; + +&combphy2 { + status = "okay"; +}; + +&sata2 { + status = "okay"; +}; + +&pcie30phy { + status = "okay"; +}; + +&pcie3x2{ + pinctrl-names = "default"; + pinctrl-0 = <&pcie_reset_h>; + reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc3v3_pcie>; + status = "okay"; +}; + +&usb2phy0_host { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + +&usb2phy1_host { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + +&usb2phy1_otg { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + +&usb2phy0 { + status = "okay"; +}; + +&usb2phy1 { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host0_xhci { + extcon = <&usb2phy0>; + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +&usb_host1_xhci { + status = "okay"; +}; diff --git a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-r66s.dts b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-r66s.dts index 64ec33a30bcb8d..1f7dde4825e9db 100644 --- a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-r66s.dts +++ b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-r66s.dts @@ -1,530 +1,9 @@ -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /dts-v1/; -#include -#include -#include -#include -#include "rk3568.dtsi" / { model = "FastRhino R66S"; compatible = "fastrhino,r66s", "rockchip,rk3568"; - - aliases { - ethernet0 = &rtl8125_1; - ethernet1 = &rtl8125_2; - led-boot = &power_led; - led-failsafe = &power_led; - led-running = &power_led; - led-upgrade = &power_led; - mmc0 = &sdmmc0; - }; - - chosen: chosen { - stdout-path = "serial2:1500000n8"; - }; - - gpio-leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&power_led_pin>; - - power_led: led-power { - label = "green:power"; - gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - pinctrl-names = "default"; - pinctrl-0 = <&reset_button_pin>; - - reset { - debounce-interval = <50>; - gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>; - label = "reset"; - linux,code = ; - }; - }; - - dc_12v: dc-12v { - compatible = "regulator-fixed"; - regulator-name = "dc_12v"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - vcc3v3_pcie: gpio-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_pcie"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc3v3_sys: vcc3v3-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&dc_12v>; - }; - - vcc5v0_sys: vcc5v0-sys { - compatible = "regulator-fixed"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-name = "vcc5v0_sys"; - vin-supply = <&dc_12v>; - }; - - vcc5v0_usb_host: vcc5v0-usb-host { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usb_host"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - vcc5v0_usb_otg: vcc5v0-usb-otg { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_usb_otg_en>; - regulator-name = "vcc5v0_usb_otg"; - regulator-always-on; - regulator-boot-on; - }; -}; - -&combphy0 { - status = "okay"; -}; - -&combphy1 { - status = "okay"; -}; - -&cpu0 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu1 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu2 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu3 { - cpu-supply = <&vdd_cpu>; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - vdd_cpu: regulator@1c { - compatible = "tcs,tcs4525"; - reg = <0x1c>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1150000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - rk809: pmic@20 { - compatible = "rockchip,rk809"; - reg = <0x20>; - interrupt-parent = <&gpio0>; - interrupts = ; - #clock-cells = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int>; - rockchip,system-power-controller; - vcc1-supply = <&vcc3v3_sys>; - vcc2-supply = <&vcc3v3_sys>; - vcc3-supply = <&vcc3v3_sys>; - vcc4-supply = <&vcc3v3_sys>; - vcc5-supply = <&vcc3v3_sys>; - vcc6-supply = <&vcc3v3_sys>; - vcc7-supply = <&vcc3v3_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc3v3_sys>; - wakeup-source; - - regulators { - vdd_logic: DCDC_REG1 { - regulator-name = "vdd_logic"; - regulator-always-on; - regulator-boot-on; - regulator-init-microvolt = <900000>; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: DCDC_REG2 { - regulator-name = "vdd_gpu"; - regulator-always-on; - regulator-init-microvolt = <900000>; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vdd_npu: DCDC_REG4 { - regulator-name = "vdd_npu"; - regulator-init-microvolt = <900000>; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG5 { - regulator-name = "vcc_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_image: LDO_REG1 { - regulator-name = "vdda0v9_image"; - regulator-min-microvolt = <950000>; - regulator-max-microvolt = <950000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda_0v9: LDO_REG2 { - regulator-name = "vdda_0v9"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_pmu: LDO_REG3 { - regulator-name = "vdda0v9_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vccio_acodec: LDO_REG4 { - regulator-name = "vccio_acodec"; - regulator-always-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd: LDO_REG5 { - regulator-name = "vccio_sd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_pmu: LDO_REG6 { - regulator-name = "vcc3v3_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcca_1v8: LDO_REG7 { - regulator-name = "vcca_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcca1v8_pmu: LDO_REG8 { - regulator-name = "vcca1v8_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcca1v8_image: LDO_REG9 { - regulator-name = "vcca1v8_image"; - regulator-init-microvolt = <950000>; - regulator-min-microvolt = <950000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <950000>; - }; - }; - - vcc_3v3: SWITCH_REG1 { - regulator-name = "vcc_3v3"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_sd: SWITCH_REG2 { - regulator-name = "vcc3v3_sd"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - - }; -}; - -&pcie30phy { - data-lanes = <1 2>; - status = "okay"; -}; - -&pcie3x1 { - num-lanes = <1>; - reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie>; - status = "okay"; - - pcie@10 { - reg = <0x00100000 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - - rtl8125_1: pcie-eth@10,0 { - compatible = "pci10ec,8125"; - reg = <0x000000 0 0 0 0>; - - realtek,led-data = <0x4078>; - }; - }; -}; - -&pcie3x2 { - num-lanes = <1>; - reset-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie>; - status = "okay"; - - pcie@20 { - reg = <0x00200000 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - - rtl8125_2: pcie-eth@20,0 { - compatible = "pci10ec,8125"; - reg = <0x000000 0 0 0 0>; - - realtek,led-data = <0x4078>; - }; - }; -}; - -&pinctrl { - gpio-leds { - power_led_pin: power-led-pin { - rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int: pmic_int { - rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - rockchip-key { - reset_button_pin: reset-button-pin { - rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - usb { - vcc5v0_usb_otg_en: vcc5v0_usb_otg_en { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pmu_io_domains { - pmuio1-supply = <&vcc3v3_pmu>; - pmuio2-supply = <&vcc3v3_pmu>; - vccio1-supply = <&vccio_acodec>; - vccio3-supply = <&vccio_sd>; - vccio4-supply = <&vcc_1v8>; - vccio5-supply = <&vcc_3v3>; - vccio6-supply = <&vcc_1v8>; - vccio7-supply = <&vcc_3v3>; - status = "okay"; }; -&rng { - status = "okay"; -}; - -&saradc { - vref-supply = <&vcca_1v8>; - status = "okay"; -}; - -&sdmmc0 { - max-frequency = <150000000>; - no-sdio; - no-mmc; - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - disable-wp; - vmmc-supply = <&vcc3v3_sd>; - vqmmc-supply = <&vccio_sd>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; - status = "okay"; -}; - -&tsadc { - rockchip,hw-tshut-mode = <1>; - rockchip,hw-tshut-polarity = <0>; - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host0_xhci { - extcon = <&usb2phy0>; - dr_mode = "host"; - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usb_host1_xhci { - status = "okay"; -}; - -&usb2phy0 { - status = "okay"; -}; - -&usb2phy0_host { - phy-supply = <&vcc5v0_usb_host>; - status = "okay"; -}; - -&usb2phy0_otg { - phy-supply = <&vcc5v0_usb_otg>; - status = "okay"; -}; diff --git a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-station-p2.dts b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-station-p2.dts index 3883c1827be67b..e24846eff3c62d 100644 --- a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-station-p2.dts +++ b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-station-p2.dts @@ -1,787 +1,9 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2021 Rockchip Electronics Co., Ltd. - * - */ /dts-v1/; -#include -#include -#include -#include "rk3568.dtsi" - / { model = "Firefly Station P2"; compatible = "firefly,rk3568-roc-pc", "rockchip,rk3568"; - - aliases { - ethernet0 = &gmac0; - ethernet1 = &gmac1; - mmc0 = &sdmmc0; - mmc1 = &sdhci; - }; - - chosen: chosen { - stdout-path = "serial2:1500000n8"; - }; - - gmac0_clkin: external-gmac0-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "gmac0_clkin"; - #clock-cells = <0>; - }; - - gmac1_clkin: external-gmac1-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "gmac1_clkin"; - #clock-cells = <0>; - }; - - leds { - compatible = "gpio-leds"; - - power_led: power { - label = "firefly:blue:power"; - linux,default-trigger = "ir-power-click"; - default-state = "on"; - gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&led_power>; - }; - - user_led: user { - label = "firefly:yellow:user"; - linux,default-trigger = "ir-user-click"; - default-state = "off"; - gpios = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&led_user>; - }; - }; - - hdmi-con { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con_in: endpoint { - remote-endpoint = <&hdmi_out_con>; - }; - }; - }; - - sdio_pwrseq: sdio-pwrseq { - status = "okay"; - compatible = "mmc-pwrseq-simple"; - clocks = <&rk809 1>; - clock-names = "ext_clock"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_enable_h>; - reset-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>; - post-power-on-delay-ms = <100>; - }; - - dc_12v: dc-12v { - compatible = "regulator-fixed"; - regulator-name = "dc_12v"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - vcc3v3_sys: vcc3v3-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&dc_12v>; - }; - - vcc5v0_sys: vcc5v0-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&dc_12v>; - }; - - vcc5v0_usb: vcc5v0-usb { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usb"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&dc_12v>; - }; - - pcie30_avdd0v9: pcie30-avdd0v9 { - compatible = "regulator-fixed"; - regulator-name = "pcie30_avdd0v9"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - vin-supply = <&vcc3v3_sys>; - }; - - pcie30_avdd1v8: pcie30-avdd1v8 { - compatible = "regulator-fixed"; - regulator-name = "pcie30_avdd1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&vcc3v3_sys>; - }; - - vcc3v3_pcie: vcc3v3_pi6c: vcc3v3-pcie { - compatible = "regulator-fixed"; - regulator-always-on; - enable-active-high; - gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie_enable_h>; - regulator-name = "vcc3v3_pcie"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc5v0_host: vcc5v0-host { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_host"; - enable-active-high; - gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_host_en>; - regulator-always-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_usb>; - }; - - vcc5v0_otg: vcc5v0-otg { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_otg"; - enable-active-high; - gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_otg_en>; - vin-supply = <&vcc5v0_usb>; - }; - - vcc_hub_reset: vcc-hub-reset { - compatible = "regulator-fixed"; - regulator-name = "vcc_hub_reset"; - enable-active-high; - gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc_hub_reset_en>; - regulator-always-on; - }; - - pcie_pi6c_oe: pcie-pi6c-oe { - compatible = "regulator-fixed"; - regulator-name = "pcie_pi6c_oe_en"; - gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie_pi6c_oe_en>; - regulator-always-on; - }; - - vcc3v3_lcd0_n: vcc3v3-lcd0-n { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_lcd0_n"; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_lcd1_n: vcc3v3-lcd1-n { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_lcd1_n"; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&gmac0 { - phy-mode = "rgmii"; - clock_in_out = "input"; - - snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - /* Reset time is 20ms, 100ms for rtl8211f */ - snps,reset-delays-us = <0 20000 100000>; - - assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; - assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&gmac0_clkin>; - - pinctrl-names = "default"; - pinctrl-0 = <&gmac0_miim - &gmac0_tx_bus2 - &gmac0_rx_bus2 - &gmac0_rgmii_clk - &gmac0_rgmii_bus - &gmac0_clkinout>; - - tx_delay = <0x3c>; - rx_delay = <0x2f>; - - phy-handle = <&rgmii_phy0>; - status = "okay"; -}; - -&gmac1 { - phy-mode = "rgmii"; - clock_in_out = "input"; - - snps,reset-gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - /* Reset time is 20ms, 100ms for rtl8211f */ - snps,reset-delays-us = <0 20000 100000>; - - assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; - assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>; - - pinctrl-names = "default"; - pinctrl-0 = <&gmac1m1_miim - &gmac1m1_tx_bus2 - &gmac1m1_rx_bus2 - &gmac1m1_rgmii_clk - &gmac1m1_rgmii_bus - &gmac1m1_clkinout>; - - tx_delay = <0x4f>; - rx_delay = <0x26>; - - phy-handle = <&rgmii_phy1>; - status = "okay"; -}; - -&hdmi { - status = "okay"; - avdd-0v9-supply = <&vdda0v9_image>; - avdd-1v8-supply = <&vcca1v8_image>; -}; - -&i2c0 { - status = "okay"; - - vdd_cpu: regulator@1c { - compatible = "tcs,tcs4525"; - reg = <0x1c>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1150000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - rk809: pmic@20 { - compatible = "rockchip,rk809"; - reg = <0x20>; - interrupt-parent = <&gpio0>; - interrupts = ; - assigned-clocks = <&cru I2S1_MCLKOUT_TX>; - assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; - #clock-cells = <1>; - clock-names = "mclk"; - clocks = <&cru I2S1_MCLKOUT_TX>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int>; - rockchip,system-power-controller; - #sound-dai-cells = <0>; - vcc1-supply = <&vcc3v3_sys>; - vcc2-supply = <&vcc3v3_sys>; - vcc3-supply = <&vcc3v3_sys>; - vcc4-supply = <&vcc3v3_sys>; - vcc5-supply = <&vcc3v3_sys>; - vcc6-supply = <&vcc3v3_sys>; - vcc7-supply = <&vcc3v3_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc3v3_sys>; - wakeup-source; - - regulators { - vdd_logic: DCDC_REG1 { - regulator-name = "vdd_logic"; - regulator-always-on; - regulator-boot-on; - regulator-init-microvolt = <900000>; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: DCDC_REG2 { - regulator-name = "vdd_gpu"; - regulator-always-on; - regulator-init-microvolt = <900000>; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vdd_npu: DCDC_REG4 { - regulator-name = "vdd_npu"; - regulator-init-microvolt = <900000>; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG5 { - regulator-name = "vcc_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_image: LDO_REG1 { - regulator-name = "vdda0v9_image"; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda_0v9: LDO_REG2 { - regulator-name = "vdda_0v9"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_pmu: LDO_REG3 { - regulator-name = "vdda0v9_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vccio_acodec: LDO_REG4 { - regulator-name = "vccio_acodec"; - regulator-always-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd: LDO_REG5 { - regulator-name = "vccio_sd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_pmu: LDO_REG6 { - regulator-name = "vcc3v3_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcca_1v8: LDO_REG7 { - regulator-name = "vcca_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcca1v8_pmu: LDO_REG8 { - regulator-name = "vcca1v8_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcca1v8_image: LDO_REG9 { - regulator-name = "vcca1v8_image"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v3: SWITCH_REG1 { - regulator-name = "vcc_3v3"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_sd: SWITCH_REG2 { - regulator-name = "vcc3v3_sd"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; -}; - -&mdio0 { - rgmii_phy0: phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x0>; - }; -}; - -&mdio1 { - rgmii_phy1: phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x0>; - }; }; -&pinctrl { - leds { - led_power: led-power { - rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - led_user: led-user { - rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - sdio-pwrseq { - wifi_enable_h: wifi-enable-h { - rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb { - vcc5v0_host_en: vcc5v0-host-en { - rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - vcc5v0_otg_en: vcc5v0-otg-en { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - vcc_hub_reset_en: vcc-hub-reset-en { - rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - fusb0_int { - fusb0_int: fusb0-int { - rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - - pcie { - pcie_enable_h: pcie-enable-h { - rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - pcie_reset_h: pcie-reset-h { - rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - pcie_pi6c_oe_en: pcie-pi6c-oe-en { - rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int: pmic_int { - rockchip,pins = - <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; -}; - -&i2s0_8ch { - status = "okay"; -}; - -&pmu_io_domains { - pmuio1-supply = <&vcc3v3_pmu>; - pmuio2-supply = <&vcc3v3_pmu>; - vccio1-supply = <&vccio_acodec>; - vccio2-supply = <&vcc_1v8>; - vccio3-supply = <&vccio_sd>; - vccio4-supply = <&vcc_1v8>; - vccio5-supply = <&vcc_3v3>; - vccio6-supply = <&vcc_1v8>; - vccio7-supply = <&vcc_3v3>; - status = "okay"; -}; - -&saradc { - vref-supply = <&vcca_1v8>; - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - max-frequency = <200000000>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; - status = "okay"; -}; - -&sdmmc0 { - bus-width = <4>; - cap-sd-highspeed; - cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; - disable-wp; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; - sd-uhs-sdr104; - vmmc-supply = <&vcc3v3_sd>; - vqmmc-supply = <&vccio_sd>; - status = "okay"; -}; - -&sdmmc2 { - max-frequency = <150000000>; - supports-sdio; - bus-width = <4>; - disable-wp; - cap-sd-highspeed; - cap-sdio-irq; - keep-power-in-suspend; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>; - sd-uhs-sdr104; - mmc-pwrseq = <&sdio_pwrseq>; - non-removable; - status = "okay"; -}; - -&tsadc { - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&vop { - status = "okay"; - assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; - assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; -}; - -&vop_mmu { - status = "okay"; -}; - -&hdmi_in { - hdmi_in_vp0: endpoint@0 { - reg = <0>; - remote-endpoint = <&vp0_out_hdmi>; - }; -}; - -&vp0 { - vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { - reg = ; - remote-endpoint = <&hdmi_in_vp0>; - }; -}; - -&hdmi_out { - hdmi_out_con: endpoint { - remote-endpoint = <&hdmi_con_in>; - }; -}; - -&hdmi_sound { - status = "okay"; -}; - -&cpu0 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu1 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu2 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu3 { - cpu-supply = <&vdd_cpu>; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&combphy0 { - status = "okay"; -}; - -&combphy1 { - status = "okay"; -}; - -&combphy2 { - status = "okay"; -}; - -&sata2 { - status = "okay"; -}; - -&pcie30phy { - status = "okay"; -}; - -&pcie3x2{ - pinctrl-names = "default"; - pinctrl-0 = <&pcie_reset_h>; - reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie>; - status = "okay"; -}; - -&usb2phy0_host { - phy-supply = <&vcc5v0_host>; - status = "okay"; -}; - -&usb2phy1_host { - phy-supply = <&vcc5v0_host>; - status = "okay"; -}; - -&usb2phy1_otg { - phy-supply = <&vcc5v0_host>; - status = "okay"; -}; - -&usb2phy0 { - status = "okay"; -}; - -&usb2phy1 { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host0_xhci { - extcon = <&usb2phy0>; - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usb_host1_xhci { - status = "okay"; -}; diff --git a/target/linux/rockchip/patches-5.10/207-rockchip-rk3328-add-support-for-FriendlyARM-NanoPi-Neo3.patch b/target/linux/rockchip/patches-5.10/207-rockchip-rk3328-add-support-for-FriendlyARM-NanoPi-Neo3.patch index c2ae58d4276a30..b5cb9a1216613d 100644 --- a/target/linux/rockchip/patches-5.10/207-rockchip-rk3328-add-support-for-FriendlyARM-NanoPi-Neo3.patch +++ b/target/linux/rockchip/patches-5.10/207-rockchip-rk3328-add-support-for-FriendlyARM-NanoPi-Neo3.patch @@ -37,12 +37,14 @@ diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchi index 479906f3a..5f6ffb496 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile -@@ -3,6 +3,8 @@ +@@ -3,6 +3,10 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-doornet1.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-neo3.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-r4se.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-r66s.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-station-p2.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-roc-cc.dtb diff --git a/target/linux/rockchip/patches-5.15/207-rockchip-rk3328-add-support-for-FriendlyARM-NanoPi-Neo3.patch b/target/linux/rockchip/patches-5.15/207-rockchip-rk3328-add-support-for-FriendlyARM-NanoPi-Neo3.patch index c09cbdbd1ef709..be2eacbe515736 100644 --- a/target/linux/rockchip/patches-5.15/207-rockchip-rk3328-add-support-for-FriendlyARM-NanoPi-Neo3.patch +++ b/target/linux/rockchip/patches-5.15/207-rockchip-rk3328-add-support-for-FriendlyARM-NanoPi-Neo3.patch @@ -35,12 +35,14 @@ to status_led in accordance with the board schematics. --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile -@@ -10,6 +10,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-od +@@ -10,6 +10,10 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-od dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-doornet1.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-neo3.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-r4se.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-r66s.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-station-p2.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb diff --git a/target/linux/rockchip/patches-5.4/207-rockchip-rk3328-add-support-for-FriendlyARM-NanoPi-Neo3.patch b/target/linux/rockchip/patches-5.4/207-rockchip-rk3328-add-support-for-FriendlyARM-NanoPi-Neo3.patch index dd2c424b1e924e..6d5493536dee61 100644 --- a/target/linux/rockchip/patches-5.4/207-rockchip-rk3328-add-support-for-FriendlyARM-NanoPi-Neo3.patch +++ b/target/linux/rockchip/patches-5.4/207-rockchip-rk3328-add-support-for-FriendlyARM-NanoPi-Neo3.patch @@ -35,12 +35,14 @@ to status_led in accordance with the board schematics. --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile -@@ -4,6 +4,8 @@ +@@ -4,6 +4,10 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-neo3.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-r4se.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-r66s.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-station-p2.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus-lts.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb From 5ca4955cff5f6743fdf8242d1b5b42d599f5a1d9 Mon Sep 17 00:00:00 2001 From: coolsnowwolf Date: Sat, 13 Aug 2022 09:48:21 +0000 Subject: [PATCH 6/6] kernel: remove linux 5.18 support --- include/kernel-5.18 | 2 - .../011-kbuild-export-SUBARCH.patch | 21 - ...ow_offload-handle-netdevice-events-f.patch | 106 - target/linux/generic/config-5.18 | 7445 ----------------- .../generic/hack-5.18/204-module_strip.patch | 196 - .../generic/hack-5.18/205-kconfig-exit.patch | 11 - .../210-darwin_scripts_include.patch | 3053 ------- .../211-darwin-uuid-typedef-clash.patch | 22 - .../hack-5.18/212-tools_portability.patch | 110 - .../hack-5.18/214-spidev_h_portability.patch | 24 - .../hack-5.18/220-arm-gc_sections.patch | 123 - .../hack-5.18/221-module_exports.patch | 102 - .../hack-5.18/230-openwrt_lzma_options.patch | 34 - .../hack-5.18/249-udp-tunnel-selection.patch | 11 - .../hack-5.18/250-netfilter_depends.patch | 27 - .../linux/generic/hack-5.18/251-kconfig.patch | 199 - .../generic/hack-5.18/252-SATA_PMP.patch | 23 - .../generic/hack-5.18/253-ksmbd-config.patch | 22 - .../hack-5.18/259-regmap_dynamic.patch | 144 - .../260-crypto_test_dependencies.patch | 52 - .../hack-5.18/261-lib-arc4-unhide.patch | 15 - .../generic/hack-5.18/280-rfkill-stubs.patch | 84 - ...cache-use-more-efficient-cache-blast.patch | 64 - .../301-mips_image_cmdline_hack.patch | 38 - .../321-powerpc_crtsavres_prereq.patch | 38 - .../410-block-fit-partition-parser.patch | 196 - .../420-mtd-set-rootfs-to-be-root-dev.patch | 39 - ...ers-add-nvmem-support-to-cmdlinepart.patch | 120 - .../hack-5.18/430-mtk-bmt-support.patch | 23 - .../generic/hack-5.18/531-debloat_lzma.patch | 1040 --- .../640-bridge-only-accept-EAP-locally.patch | 41 - ...lter-connmark-introduce-set-dscpmark.patch | 212 - ...-netfilter-add-xt_FLOWOFFLOAD-target.patch | 776 -- .../hack-5.18/651-wireless_mesh_header.patch | 24 - .../hack-5.18/660-fq_codel_defaults.patch | 27 - .../661-use_fq_codel_by_default.patch | 100 - .../700-swconfig_switch_drivers.patch | 129 - ...-r8152-add-LED-configuration-from-OF.patch | 74 - ...et-add-RTL8152-binding-documentation.patch | 54 - .../hack-5.18/773-bgmac-add-srab-switch.patch | 98 - .../780-usb-net-MeigLink_modem_support.patch | 33 - .../800-GPIO-add-named-gpio-exports.patch | 162 - ...com-Make-QMI-Helpers-user-selectable.patch | 28 - .../generic/hack-5.18/902-debloat_proc.patch | 408 - .../hack-5.18/904-debloat_dma_buf.patch | 93 - .../hack-5.18/910-kobject_uevent.patch | 32 - .../911-kobject_add_broadcast_uevent.patch | 76 - .../hack-5.18/920-device_tree_cmdline.patch | 12 - ...k-events-support-multiple-registrant.patch | 339 - ...-linux-kernel-to-support-shortcut-fe.patch | 204 - .../hack-5.18/992-add-ndo-do-ioctl.patch | 12 - ...include-asm-rwonce.h-for-kernel-code.patch | 29 - ...-Use-stddefs.h-instead-of-compiler.h.patch | 11 - ...s-negative-stack-offsets-on-stack-tr.patch | 57 - ...e_mem_map-with-ARCH_PFN_OFFSET-calcu.patch | 82 - ...0-add-linux-spidev-compatible-si3210.patch | 18 - ...ame2-and-add-RENAME_WHITEOUT-support.patch | 81 - ...41-jffs2-add-RENAME_EXCHANGE-support.patch | 73 - .../142-jffs2-add-splice-ops.patch | 20 - ...ge_allow_receiption_on_disabled_port.patch | 45 - ...-rs5c372-support_alarms_up_to_1_week.patch | 94 - ...he_alarm_to_be_used_as_wakeup_source.patch | 70 - .../pending-5.18/201-extra_optimization.patch | 31 - .../203-kallsyms_uncompressed.patch | 119 - .../205-backtrace_module_info.patch | 41 - ...e-filenames-from-deps_initramfs-list.patch | 30 - ...able_wilink_platform_without_drivers.patch | 20 - .../270-platform-mikrotik-build-bits.patch | 35 - .../300-mips_expose_boot_raw.patch | 40 - .../302-mips_no_branch_likely.patch | 22 - .../pending-5.18/305-mips_module_reloc.patch | 370 - .../307-mips_highmem_offset.patch | 19 - .../pending-5.18/308-mips32r2_tune.patch | 22 - .../310-arm_module_unresolved_weak_sym.patch | 22 - ...t-command-line-parameters-from-users.patch | 284 - .../332-arc-add-OWRTDTB-section.patch | 84 - ...able-unaligned-access-in-kernel-mode.patch | 24 - ...ernel-XZ-compression-option-on-PPC_8.patch | 25 - .../400-mtd-mtdsplit-support.patch | 313 - ...support-for-minor-aligned-partitions.patch | 389 - ...t-add-of_match_table-with-DT-binding.patch | 22 - .../pending-5.18/420-mtd-redboot_space.patch | 41 - ...30-mtd-add-myloader-partition-parser.patch | 229 - ...check-for-bad-blocks-when-calculatin.patch | 68 - ...bcm47xxpart-detect-T_Meter-partition.patch | 37 - ...mtd-add-routerbootpart-parser-config.patch | 38 - ...mtd-cfi_cmdset_0002-no-erase_suspend.patch | 25 - ...et_0002-add-buffer-write-cmd-timeout.patch | 17 - ...25p80-mx-disable-software-protection.patch | 18 - ...mtd-device-named-ubi-or-data-on-boot.patch | 97 - ...to-create-ubiblock-device-for-rootfs.patch | 69 - ...ting-ubi0-rootfs-in-init-do_mounts.c.patch | 52 - ...ROOT_DEV-to-ubiblock-rootfs-if-unset.patch | 34 - .../494-mtd-ubi-add-EOF-marker-support.patch | 60 - ...-mtd-core-add-get_mtd_device_by_node.patch | 75 - ...-add-bindings-for-mtd-concat-devices.patch | 52 - ...cat-add-dt-driver-for-concat-devices.patch | 216 - ...i-nor-disable-16-bit-sr-for-macronix.patch | 30 - .../500-fs_cdrom_dependencies.patch | 40 - .../530-jffs2_make_lzma_available.patch | 5180 ------------ .../pending-5.18/532-jffs2_eofdetect.patch | 65 - .../600-netfilter_conntrack_flush.patch | 88 - ...etfilter_match_bypass_default_checks.patch | 110 - ...netfilter_match_bypass_default_table.patch | 106 - ...netfilter_match_reduce_memory_access.patch | 22 - ...-netfilter_optional_tcp_window_check.patch | 83 - ...del-do-not-defer-queue-length-update.patch | 86 - .../pending-5.18/630-packet_socket_type.patch | 138 - .../pending-5.18/655-increase_skb_pad.patch | 20 - ...Add-support-for-MAP-E-FMRs-mesh-mode.patch | 511 -- ...ng-with-source-address-failed-policy.patch | 263 - ...nes-for-_POLICY_FAILED-until-all-cod.patch | 50 - ...T-skip-GRO-for-foreign-MAC-addresses.patch | 139 - ...et-add-mac-address-increment-support.patch | 90 - ...83-of_net-add-mac-address-to-of-tree.patch | 38 - ..._eth_soc-avoid-creating-duplicate-of.patch | 26 - ..._eth_soc-add-support-for-coherent-DM.patch | 327 - ...ek-mt7622-add-support-for-coherent-D.patch | 30 - ..._eth_soc-add-support-for-Wireless-Et.patch | 1679 ---- ..._eth_soc-implement-flow-offloading-t.patch | 269 - ...ek-mt7622-introduce-nodes-for-Wirele.patch | 62 - ..._eth_soc-add-ipv6-flow-offload-suppo.patch | 79 - ..._eth_soc-support-TC_SETUP_BLOCK-for-.patch | 29 - ..._eth_soc-allocate-struct-mtk_ppe-sep.patch | 159 - ..._eth_soc-rework-hardware-flow-table-.patch | 424 - ..._eth_soc-remove-bridge-flow-offload-.patch | 44 - ..._eth_soc-support-creating-mac-addres.patch | 553 -- ...net-mtk_eth_soc-enable-threaded-NAPI.patch | 41 - ...detach-callback-to-struct-phy_driver.patch | 38 - ...net-phy-at803x-fix-at8033-sgmii-mode.patch | 51 - ...760-net-dsa-mv88e6xxx-fix-vlan-setup.patch | 27 - ...-net-dsa-mt7530-Support-EEE-features.patch | 103 - ...equest-assisted-learning-on-CPU-port.patch | 27 - ...-missing-linux-if_ether.h-for-ETH_AL.patch | 61 - ...ice-struct-copy-its-DMA-params-to-th.patch | 73 - ...pio-cascade-add-generic-GPIO-cascade.patch | 222 - .../810-pci_disable_common_quirks.patch | 62 - .../811-pci_disable_usb_common_quirks.patch | 115 - ...problem-with-platfom-data-in-w1-gpio.patch | 26 - .../pending-5.18/834-ledtrig-libata.patch | 149 - ...40-hwrng-bcm2835-set-quality-to-1000.patch | 26 - .../pending-5.18/920-mangle_bootargs.patch | 71 - target/linux/rockchip/armv8/config-5.18 | 1906 ----- .../boot/dts/rockchip/rk3328-doornet1.dts | 495 -- .../boot/dts/rockchip/rk3328-nanopi-r2c.dts | 47 - .../rockchip/rk3328-orangepi-r1-plus-lts.dts | 70 - .../dts/rockchip/rk3328-orangepi-r1-plus.dts | 39 - .../boot/dts/rockchip/rk3399-doornet2.dts | 113 - .../boot/dts/rockchip/rk3399-doornet2.dtsi | 636 -- .../boot/dts/rockchip/rk3399-nanopi4-opp.dtsi | 152 - .../boot/dts/rockchip/rk3399-rock-pi-4.dts | 19 - ...kchip-add-EEPROM-node-for-NanoPi-R4S.patch | 31 - ...-rockchip-use-system-LED-for-OpenWrt.patch | 31 - ...dd-OF-node-for-USB-eth-on-NanoPi-R2S.patch | 24 - ...add-support-for-FriendlyARM-NanoPi-N.patch | 397 - ...12-rockchip-Add-sata-nodes-to-rk356x.patch | 78 - ...-rockchip-add-rk356x-dwc3-usb3-nodes.patch | 120 - ...4-rockchip-enable-dwc3-on-quartz64-a.patch | 78 - ...c-rockchip-set-dwc3-clock-for-rk3566.patch | 49 - ...ack-from-Rockchip-DesignWare-binding.patch | 46 - ...ockchip-Add-USB-nodes-for-BPI-R2-Pro.patch | 127 - ...ckchip-Add-SATAsupport-to-BPI-R2-Pro.patch | 39 - ...kchip-dwc-Reset-core-at-driver-probe.patch | 66 - ...hip-dwc-Add-legacy-interrupt-support.patch | 155 - ...ckchip-Add-rk3568-PCIe2x1-controller.patch | 69 - ...Enable-PCIe-controller-on-quartz64-a.patch | 75 - ...-dts-rockchip-add-rk356x-sfc-support.patch | 35 - ...ip-enable-otg-drd-operation-of-usb_h.patch | 27 - ...ts-rockchip-add-clocks-to-rk356x-cru.patch | 26 - ...ip-rename-Quartz64-A-bluetooth-gpios.patch | 29 - ...-rockchip-add-Quartz64-A-fan-pinctrl.patch | 39 - ...ip-enable-sdr-104-for-sdmmc-on-Quart.patch | 32 - ...ip-enable-sfc-controller-on-Quartz64.patch | 41 - ...ckchip-Refactor-IOMMU-initialisation.patch | 201 - ...-clk-rk3568-Mark-hclk_vo-as-critical.patch | 63 - ...ed-drm_encoder-into-rockchip_decoder.patch | 598 -- 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| 3619 -------- ...isplay-rockchip-Add-binding-for-VOP2.patch | 159 - ...lay-rockchip-dw-hdmi-fix-ports-descr.patch | 66 - ...rockchip-rk356x-Add-HDMI-audio-nodes.patch | 64 - ...chip-Enable-HDMI-audio-on-Quartz64-A.patch | 37 - .../251-missing-rk3568-cru-bindings.patch | 38 - ...asic-dts-for-the-radxa-rock3-model-a.patch | 531 -- ...3-support-to-the-radxa-rock3-model-a.patch | 92 - ...e-usb-hub-on-the-radxa-rock3-model-a.patch | 46 - .../255-rorck-3a-add-pcie-hdmi.patch | 211 - .../256-rk356x-pcie3-support.patch | 539 -- .../257-add-PCIe-3-to-ROCK3A.patch | 22 - ...add-driver-for-Motorcomm-YT85xx+PHYs.patch | 2243 ----- ...ip-add-hardware-random-number-genera.patch | 50 - ...ip-add-devfreq-driver-for-rk3328-dmc.patch | 44 - ...setting-ddr-clock-via-SIP-Version-2-.patch | 210 - ...eq-rockchip-dfi-add-more-soc-support.patch | 662 -- ...m64-dts-rockchip-rk3328-add-dfi-node.patch | 27 - ...anopi-r2s-add-rk3328-dmc-relate-node.patch | 126 - ...drv-net-phy-add-JLSemi-jl2xxx-driver.patch | 702 -- .../900-arm-boot-add-dts-files.patch | 34 - ...overclock-to-2.2-1.8-GHz-for-NanoPi4.patch | 21 - ...ip-add-more-cpu-operating-points-for.patch | 44 - ...o-rockchip-permit-to-pass-self-tests.patch | 2419 ------ target/linux/x86/64/config-5.18 | 541 -- target/linux/x86/config-5.18 | 471 -- .../100-fix_cs5535_clockevt.patch | 13 - ...x2x_warpcore_8727_2_5g_sgmii_txfault.patch | 216 - 222 files changed, 52249 deletions(-) delete mode 100644 include/kernel-5.18 delete mode 100644 target/linux/generic/backport-5.18/011-kbuild-export-SUBARCH.patch delete mode 100644 target/linux/generic/backport-5.18/343-netfilter-nft_flow_offload-handle-netdevice-events-f.patch delete mode 100644 target/linux/generic/config-5.18 delete mode 100644 target/linux/generic/hack-5.18/204-module_strip.patch delete mode 100644 target/linux/generic/hack-5.18/205-kconfig-exit.patch delete mode 100644 target/linux/generic/hack-5.18/210-darwin_scripts_include.patch delete mode 100644 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target/linux/x86/64/config-5.18 delete mode 100644 target/linux/x86/config-5.18 delete mode 100644 target/linux/x86/patches-5.18/100-fix_cs5535_clockevt.patch delete mode 100644 target/linux/x86/patches-5.18/993-bnx2x_warpcore_8727_2_5g_sgmii_txfault.patch diff --git a/include/kernel-5.18 b/include/kernel-5.18 deleted file mode 100644 index 532f60fb7bd95b..00000000000000 --- a/include/kernel-5.18 +++ /dev/null @@ -1,2 +0,0 @@ -LINUX_VERSION-5.18 = .16 -LINUX_KERNEL_HASH-5.18.16 = f1f586251e63de14c86e5f95b96beb15a0434f1e6e21df788d123564af0d11ce diff --git a/target/linux/generic/backport-5.18/011-kbuild-export-SUBARCH.patch b/target/linux/generic/backport-5.18/011-kbuild-export-SUBARCH.patch deleted file mode 100644 index 938b2461669444..00000000000000 --- a/target/linux/generic/backport-5.18/011-kbuild-export-SUBARCH.patch +++ /dev/null @@ -1,21 +0,0 @@ -From 173019b66dcc9d68ad9333aa744dad1e369b5aa8 Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Sun, 9 Jul 2017 00:26:53 +0200 -Subject: [PATCH 34/34] kernel: add compile fix for linux 4.9 on x86 - -Signed-off-by: Felix Fietkau ---- - Makefile | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - ---- a/Makefile -+++ b/Makefile -@@ -533,7 +533,7 @@ KBUILD_LDFLAGS_MODULE := - KBUILD_LDFLAGS := - CLANG_FLAGS := - --export ARCH SRCARCH CONFIG_SHELL BASH HOSTCC KBUILD_HOSTCFLAGS CROSS_COMPILE LD CC -+export ARCH SRCARCH SUBARCH CONFIG_SHELL BASH HOSTCC KBUILD_HOSTCFLAGS CROSS_COMPILE LD CC - export CPP AR NM STRIP OBJCOPY OBJDUMP READELF PAHOLE RESOLVE_BTFIDS LEX YACC AWK INSTALLKERNEL - export PERL PYTHON3 CHECK CHECKFLAGS MAKE UTS_MACHINE HOSTCXX - export KGZIP KBZIP2 KLZOP LZMA LZ4 XZ ZSTD diff --git a/target/linux/generic/backport-5.18/343-netfilter-nft_flow_offload-handle-netdevice-events-f.patch b/target/linux/generic/backport-5.18/343-netfilter-nft_flow_offload-handle-netdevice-events-f.patch deleted file mode 100644 index c0916657e4be66..00000000000000 --- a/target/linux/generic/backport-5.18/343-netfilter-nft_flow_offload-handle-netdevice-events-f.patch +++ /dev/null @@ -1,106 +0,0 @@ -From: Pablo Neira Ayuso -Date: Thu, 25 Jan 2018 12:58:55 +0100 -Subject: [PATCH] netfilter: nft_flow_offload: handle netdevice events from - nf_flow_table - -Move the code that deals with device events to the core. - -Signed-off-by: Pablo Neira Ayuso ---- - ---- a/net/netfilter/nf_flow_table_core.c -+++ b/net/netfilter/nf_flow_table_core.c -@@ -614,13 +614,41 @@ void nf_flow_table_free(struct nf_flowta - } - EXPORT_SYMBOL_GPL(nf_flow_table_free); - -+static int nf_flow_table_netdev_event(struct notifier_block *this, -+ unsigned long event, void *ptr) -+{ -+ struct net_device *dev = netdev_notifier_info_to_dev(ptr); -+ -+ if (event != NETDEV_DOWN) -+ return NOTIFY_DONE; -+ -+ nf_flow_table_cleanup(dev); -+ -+ return NOTIFY_DONE; -+} -+ -+static struct notifier_block flow_offload_netdev_notifier = { -+ .notifier_call = nf_flow_table_netdev_event, -+}; -+ - static int __init nf_flow_table_module_init(void) - { -- return nf_flow_table_offload_init(); -+ int ret; -+ -+ ret = nf_flow_table_offload_init(); -+ if (ret) -+ return ret; -+ -+ ret = register_netdevice_notifier(&flow_offload_netdev_notifier); -+ if (ret) -+ nf_flow_table_offload_exit(); -+ -+ return ret; - } - - static void __exit nf_flow_table_module_exit(void) - { -+ unregister_netdevice_notifier(&flow_offload_netdev_notifier); - nf_flow_table_offload_exit(); - } - ---- a/net/netfilter/nft_flow_offload.c -+++ b/net/netfilter/nft_flow_offload.c -@@ -458,47 +458,14 @@ static struct nft_expr_type nft_flow_off - .owner = THIS_MODULE, - }; - --static int flow_offload_netdev_event(struct notifier_block *this, -- unsigned long event, void *ptr) --{ -- struct net_device *dev = netdev_notifier_info_to_dev(ptr); -- -- if (event != NETDEV_DOWN) -- return NOTIFY_DONE; -- -- nf_flow_table_cleanup(dev); -- -- return NOTIFY_DONE; --} -- --static struct notifier_block flow_offload_netdev_notifier = { -- .notifier_call = flow_offload_netdev_event, --}; -- - static int __init nft_flow_offload_module_init(void) - { -- int err; -- -- err = register_netdevice_notifier(&flow_offload_netdev_notifier); -- if (err) -- goto err; -- -- err = nft_register_expr(&nft_flow_offload_type); -- if (err < 0) -- goto register_expr; -- -- return 0; -- --register_expr: -- unregister_netdevice_notifier(&flow_offload_netdev_notifier); --err: -- return err; -+ return nft_register_expr(&nft_flow_offload_type); - } - - static void __exit nft_flow_offload_module_exit(void) - { - nft_unregister_expr(&nft_flow_offload_type); -- unregister_netdevice_notifier(&flow_offload_netdev_notifier); - } - - module_init(nft_flow_offload_module_init); diff --git a/target/linux/generic/config-5.18 b/target/linux/generic/config-5.18 deleted file mode 100644 index cc7b501d318e79..00000000000000 --- a/target/linux/generic/config-5.18 +++ /dev/null @@ -1,7445 +0,0 @@ -# CONFIG_104_QUAD_8 is not set -CONFIG_32BIT=y -CONFIG_64BIT_TIME=y -# CONFIG_6LOWPAN is not set -# CONFIG_6LOWPAN_DEBUGFS is not set -# CONFIG_6PACK is not set -# CONFIG_8139CP is not set -# CONFIG_8139TOO is not set -# CONFIG_9P_FS is not set -# CONFIG_AB3100_CORE is not set -# CONFIG_AB8500_CORE is not set -# CONFIG_ABP060MG is not set -# CONFIG_ABX500_CORE is not set -# CONFIG_ACCESSIBILITY is not set -# CONFIG_ACENIC is not set -# CONFIG_ACERHDF is not set -# CONFIG_ACER_WIRELESS is not set -# CONFIG_ACORN_PARTITION is not set -# CONFIG_ACPI_ALS is not set -# CONFIG_ACPI_APEI is not set -# CONFIG_ACPI_BUTTON is not set -# CONFIG_ACPI_CONFIGFS is not set -# CONFIG_ACPI_CUSTOM_METHOD is not set -# CONFIG_ACPI_EXTLOG is not set -# CONFIG_ACPI_HED is not set -# CONFIG_ACPI_NFIT is not set -# CONFIG_ACPI_REDUCED_HARDWARE_ONLY is not set -# CONFIG_ACPI_TABLE_UPGRADE is not set -# CONFIG_ACPI_VIDEO is not set -# CONFIG_AD2S1200 is not set -# CONFIG_AD2S1210 is not set -# CONFIG_AD2S90 is not set -# CONFIG_AD5064 is not set -# CONFIG_AD525X_DPOT is not set -# CONFIG_AD5272 is not set -# CONFIG_AD5360 is not set -# CONFIG_AD5380 is not set -# CONFIG_AD5421 is not set -# CONFIG_AD5446 is not set -# CONFIG_AD5449 is not set -# CONFIG_AD5504 is not set -# CONFIG_AD5592R is not set -# CONFIG_AD5593R is not set -# CONFIG_AD5624R_SPI is not set -# CONFIG_AD5686 is not set -# CONFIG_AD5686_SPI is not set -# CONFIG_AD5696_I2C is not set -# CONFIG_AD5755 is not set -# CONFIG_AD5758 is not set -# CONFIG_AD5761 is not set -# CONFIG_AD5764 is not set -# CONFIG_AD5766 is not set -# CONFIG_AD5770R is not set -# CONFIG_AD5791 is not set -# CONFIG_AD5933 is not set -# CONFIG_AD7091R5 is not set -# CONFIG_AD7124 is not set -# CONFIG_AD7150 is not set -# CONFIG_AD7152 is not set -# CONFIG_AD7192 is not set -# CONFIG_AD7266 is not set -# CONFIG_AD7280 is not set -# CONFIG_AD7291 is not set -# CONFIG_AD7292 is not set -# CONFIG_AD7298 is not set -# CONFIG_AD7303 is not set -# CONFIG_AD7476 is not set -# CONFIG_AD7606 is not set -# CONFIG_AD7606_IFACE_PARALLEL is not set -# CONFIG_AD7606_IFACE_SPI is not set -# CONFIG_AD7746 is not set -# CONFIG_AD7766 is not set -# CONFIG_AD7768_1 is not set -# CONFIG_AD7780 is not set -# CONFIG_AD7791 is not set -# CONFIG_AD7793 is not set -# CONFIG_AD7816 is not set -# CONFIG_AD7887 is not set -# CONFIG_AD7923 is not set -# CONFIG_AD7949 is not set -# CONFIG_AD799X is not set -# CONFIG_AD8366 is not set -# CONFIG_AD8801 is not set -# CONFIG_AD9467 is not set -# CONFIG_AD9523 is not set -# CONFIG_AD9832 is not set -# CONFIG_AD9834 is not set -# CONFIG_ADAPTEC_STARFIRE is not set -# CONFIG_ADE7854 is not set -# CONFIG_ADF4350 is not set -# CONFIG_ADF4371 is not set -# CONFIG_ADFS_FS is not set -# CONFIG_ADIN_PHY is not set -# CONFIG_ADIS16080 is not set -# CONFIG_ADIS16130 is not set -# CONFIG_ADIS16136 is not set -# CONFIG_ADIS16201 is not set -# CONFIG_ADIS16203 is not set -# CONFIG_ADIS16209 is not set -# CONFIG_ADIS16240 is not set -# CONFIG_ADIS16260 is not set -# CONFIG_ADIS16400 is not set -# CONFIG_ADIS16460 is not set -# CONFIG_ADIS16475 is not set -# CONFIG_ADIS16480 is not set -# CONFIG_ADI_AXI_ADC is not set -# CONFIG_ADJD_S311 is not set -# CONFIG_ADM6996_PHY is not set -# CONFIG_ADM8211 is not set -# CONFIG_ADT7316 is not set -# CONFIG_ADUX1020 is not set -CONFIG_ADVISE_SYSCALLS=y -# CONFIG_ADV_SWBUTTON is not set -# CONFIG_ADXL345_I2C is not set -# CONFIG_ADXL345_SPI is not set -# CONFIG_ADXL372_I2C is not set -# CONFIG_ADXL372_SPI is not set -# CONFIG_ADXRS290 is not set -# CONFIG_ADXRS450 is not set -CONFIG_AEABI=y -# CONFIG_AFE4403 is not set -# CONFIG_AFE4404 is not set -# CONFIG_AFFS_FS is not set -# CONFIG_AFS_DEBUG_CURSOR is not set -# CONFIG_AFS_FS is not set -# CONFIG_AF_KCM is not set -# CONFIG_AF_RXRPC is not set -# CONFIG_AF_RXRPC_INJECT_LOSS is not set -# CONFIG_AF_RXRPC_IPV6 is not set -# CONFIG_AF_UNIX_OOB is not set -# CONFIG_AGP is not set -# CONFIG_AHCI_CEVA is not set -# CONFIG_AHCI_IMX is not set -# CONFIG_AHCI_MVEBU is not set -# CONFIG_AHCI_QORIQ is not set -CONFIG_AIO=y -# CONFIG_AIRO is not set -# CONFIG_AIRO_CS is not set -# CONFIG_AIX_PARTITION is not set -# CONFIG_AK09911 is not set -# CONFIG_AK8974 is not set -# CONFIG_AK8975 is not set -# CONFIG_AL3010 is not set -# CONFIG_AL3320A is not set -# CONFIG_ALIM7101_WDT is not set -CONFIG_ALLOW_DEV_COREDUMP=y -# CONFIG_ALTERA_MBOX is not set -# CONFIG_ALTERA_MSGDMA is not set -# CONFIG_ALTERA_STAPL is not set -# CONFIG_ALTERA_TSE is not set -# CONFIG_ALX is not set -# CONFIG_AL_FIC is not set -# CONFIG_AM2315 is not set -# CONFIG_AM335X_PHY_USB is not set -# CONFIG_AMBA_PL08X is not set -# CONFIG_AMD8111_ETH is not set -# CONFIG_AMD_MEM_ENCRYPT is not set -# CONFIG_AMD_PHY is not set -# CONFIG_AMD_XGBE is not set -# CONFIG_AMD_XGBE_HAVE_ECC is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_AMILO_RFKILL is not set -# CONFIG_AMT is not set -# CONFIG_ANDROID is not set -CONFIG_ANON_INODES=y -# CONFIG_ANON_VMA_NAME is not set -# CONFIG_APDS9300 is not set -# CONFIG_APDS9802ALS is not set -# CONFIG_APDS9960 is not set -# CONFIG_APM8018X is not set -# CONFIG_APM_EMULATION is not set -# CONFIG_APPLE_AIC is not set -# CONFIG_APPLE_GMUX is not set -# CONFIG_APPLE_MFI_FASTCHARGE is not set -# CONFIG_APPLE_PROPERTIES is not set -# CONFIG_APPLICOM is not set -# CONFIG_AQTION is not set -# CONFIG_AQUANTIA_PHY is not set -# CONFIG_AR5523 is not set -# CONFIG_AR7 is not set -# CONFIG_AR8216_PHY is not set -# CONFIG_AR8216_PHY_LEDS is not set -# CONFIG_ARCH_ACTIONS is not set -# CONFIG_ARCH_AGILEX is not set -# CONFIG_ARCH_ALPINE is not set -# CONFIG_ARCH_APPLE is not set -# CONFIG_ARCH_ARTPEC is not set -# CONFIG_ARCH_ASPEED is not set -# CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_AXXIA is not set -# CONFIG_ARCH_BCM is not set -# CONFIG_ARCH_BCM2835 is not set -# CONFIG_ARCH_BCM4908 is not set -# CONFIG_ARCH_BCM_21664 is not set -# CONFIG_ARCH_BCM_23550 is not set -# CONFIG_ARCH_BCM_281XX is not set -# CONFIG_ARCH_BCM_5301X is not set -# CONFIG_ARCH_BCM_53573 is not set -# CONFIG_ARCH_BCM_63XX is not set -# CONFIG_ARCH_BCM_CYGNUS is not set -# CONFIG_ARCH_BCM_IPROC is not set -# CONFIG_ARCH_BCM_NSP is not set -# CONFIG_ARCH_BERLIN is not set -CONFIG_ARCH_BINFMT_ELF_STATE=y -# CONFIG_ARCH_BITMAIN is not set -# CONFIG_ARCH_BRCMSTB is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_CNS3XXX is not set -# CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE is not set -# CONFIG_ARCH_DAVINCI is not set -# CONFIG_ARCH_DIGICOLOR is not set -# CONFIG_ARCH_DMA_ADDR_T_64BIT is not set -# CONFIG_ARCH_DOVE is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_EXYNOS is not set -CONFIG_ARCH_FLATMEM_ENABLE=y -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_GEMINI is not set -# CONFIG_ARCH_HI3xxx is not set -# CONFIG_ARCH_HIGHBANK is not set -# CONFIG_ARCH_HISI is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_INTEL_SOCFPGA is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_K3 is not set -# CONFIG_ARCH_KEEMBAY is not set -# CONFIG_ARCH_KEYSTONE is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_LAYERSCAPE is not set -# CONFIG_ARCH_LG1K is not set -# CONFIG_ARCH_LPC32XX is not set -# CONFIG_ARCH_MEDIATEK is not set -# CONFIG_ARCH_MESON is not set -# CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE is not set -# CONFIG_ARCH_MILBEAUT is not set -CONFIG_ARCH_MMAP_RND_BITS=8 -CONFIG_ARCH_MMAP_RND_BITS_MAX=16 -CONFIG_ARCH_MMAP_RND_BITS_MIN=8 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=8 -# CONFIG_ARCH_MMP is not set -# CONFIG_ARCH_MSTARV7 is not set -# CONFIG_ARCH_MULTIPLATFORM is not set -# CONFIG_ARCH_MULTI_V6 is not set -# CONFIG_ARCH_MULTI_V7 is not set -# CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_MVEBU is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_MXS is not set -# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_NOMADIK is not set -# CONFIG_ARCH_NPCM is not set -# CONFIG_ARCH_NSPIRE is not set -# CONFIG_ARCH_OMAP is not set -# CONFIG_ARCH_OMAP1 is not set -# CONFIG_ARCH_OMAP2 is not set -# CONFIG_ARCH_OMAP2PLUS is not set -# CONFIG_ARCH_OMAP3 is not set -# CONFIG_ARCH_OMAP4 is not set -# CONFIG_ARCH_ORION5X is not set -# CONFIG_ARCH_OXNAS is not set -# CONFIG_ARCH_PICOXCELL is not set -# CONFIG_ARCH_PRIMA2 is not set -# CONFIG_ARCH_PXA is not set -# CONFIG_ARCH_QCOM is not set -# CONFIG_ARCH_RANDOM is not set -# CONFIG_ARCH_RDA is not set -# CONFIG_ARCH_REALTEK is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_RENESAS is not set -# CONFIG_ARCH_ROCKCHIP is not set -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_S32 is not set -# CONFIG_ARCH_S3C24XX is not set -# CONFIG_ARCH_S3C64XX is not set -# CONFIG_ARCH_S5PV210 is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_SEATTLE is not set -# CONFIG_ARCH_SHMOBILE is not set -# CONFIG_ARCH_SIRF is not set -# CONFIG_ARCH_SOCFPGA is not set -# CONFIG_ARCH_SPARX5 is not set -# CONFIG_ARCH_SPRD is not set -# CONFIG_ARCH_STI is not set -# CONFIG_ARCH_STM32 is not set -# CONFIG_ARCH_STRATIX10 is not set -# CONFIG_ARCH_SUNXI is not set -# CONFIG_ARCH_SYNQUACER is not set -# CONFIG_ARCH_TANGO is not set -# CONFIG_ARCH_TEGRA is not set -# CONFIG_ARCH_THUNDER is not set -# CONFIG_ARCH_THUNDER2 is not set -# CONFIG_ARCH_U300 is not set -# CONFIG_ARCH_U8500 is not set -# CONFIG_ARCH_UNIPHIER is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_VEXPRESS is not set -# CONFIG_ARCH_VIRT is not set -# CONFIG_ARCH_VISCONTI is not set -# CONFIG_ARCH_VT8500 is not set -# CONFIG_ARCH_VULCAN is not set -# CONFIG_ARCH_W90X900 is not set -# CONFIG_ARCH_WANTS_NO_INSTR is not set -# CONFIG_ARCH_WANTS_THP_SWAP is not set -# CONFIG_ARCH_WM8505 is not set -# CONFIG_ARCH_WM8750 is not set -# CONFIG_ARCH_WM8850 is not set -# CONFIG_ARCH_XGENE is not set -# CONFIG_ARCH_ZX is not set -# CONFIG_ARCH_ZYNQ is not set -# CONFIG_ARCH_ZYNQMP is not set -# CONFIG_ARCNET is not set -# CONFIG_ARC_EMAC is not set -# CONFIG_ARC_IRQ_NO_AUTOSAVE is not set -# CONFIG_ARM64_16K_PAGES is not set -CONFIG_ARM64_4K_PAGES=y -# CONFIG_ARM64_64K_PAGES is not set -# CONFIG_ARM64_AMU_EXTN is not set -# CONFIG_ARM64_BTI is not set -# CONFIG_ARM64_CRYPTO is not set -# CONFIG_ARM64_E0PD is not set -# CONFIG_ARM64_EPAN is not set -# CONFIG_ARM64_ERRATUM_1024718 is not set -# CONFIG_ARM64_ERRATUM_1165522 is not set -# CONFIG_ARM64_ERRATUM_1286807 is not set -# CONFIG_ARM64_ERRATUM_1319367 is not set -# CONFIG_ARM64_ERRATUM_1418040 is not set -# CONFIG_ARM64_ERRATUM_1463225 is not set -# CONFIG_ARM64_ERRATUM_1508412 is not set -# CONFIG_ARM64_ERRATUM_1530923 is not set -# CONFIG_ARM64_ERRATUM_1542419 is not set -# CONFIG_ARM64_ERRATUM_2054223 is not set -# CONFIG_ARM64_ERRATUM_2067961 is not set -# CONFIG_ARM64_ERRATUM_819472 is not set -# CONFIG_ARM64_ERRATUM_824069 is not set -# CONFIG_ARM64_ERRATUM_826319 is not set -# CONFIG_ARM64_ERRATUM_827319 is not set -# CONFIG_ARM64_ERRATUM_832075 is not set -# CONFIG_ARM64_ERRATUM_834220 is not set -# CONFIG_ARM64_ERRATUM_843419 is not set -# CONFIG_ARM64_ERRATUM_845719 is not set -# CONFIG_ARM64_ERRATUM_858921 is not set -# CONFIG_ARM64_HW_AFDBM is not set -# CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419 is not set -# CONFIG_ARM64_LSE_ATOMICS is not set -# CONFIG_ARM64_MODULE_PLTS is not set -# CONFIG_ARM64_MTE is not set -# CONFIG_ARM64_PAN is not set -# CONFIG_ARM64_PMEM is not set -# CONFIG_ARM64_PSEUDO_NMI is not set -# CONFIG_ARM64_PTDUMP_DEBUGFS is not set -# CONFIG_ARM64_PTR_AUTH is not set -# CONFIG_ARM64_PTR_AUTH_KERNEL is not set -# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set -# CONFIG_ARM64_RAS_EXTN is not set -# CONFIG_ARM64_RELOC_TEST is not set -# CONFIG_ARM64_SVE is not set -CONFIG_ARM64_SW_TTBR0_PAN=y -# CONFIG_ARM64_TAGGED_ADDR_ABI is not set -# CONFIG_ARM64_TLB_RANGE is not set -# CONFIG_ARM64_UAO is not set -# CONFIG_ARM64_USE_LSE_ATOMICS is not set -CONFIG_ARM64_VA_BITS_39=y -# CONFIG_ARM64_VA_BITS_48 is not set -# CONFIG_ARM64_VHE is not set -# CONFIG_ARM_APPENDED_DTB is not set -# CONFIG_ARM_ARCH_TIMER is not set -# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set -# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND is not set -# CONFIG_ARM_BIG_LITTLE_CPUFREQ is not set -# CONFIG_ARM_CCI is not set -# CONFIG_ARM_CCI400_PMU is not set -# CONFIG_ARM_CCI5xx_PMU is not set -# CONFIG_ARM_CCI_PMU is not set -# CONFIG_ARM_CCN is not set -# CONFIG_ARM_CMN is not set -# CONFIG_ARM_CPUIDLE is not set -CONFIG_ARM_CPU_TOPOLOGY=y -# CONFIG_ARM_CRYPTO is not set -CONFIG_ARM_DMA_MEM_BUFFERABLE=y -# CONFIG_ARM_DSU_PMU is not set -# CONFIG_ARM_ERRATA_326103 is not set -# CONFIG_ARM_ERRATA_364296 is not set -# CONFIG_ARM_ERRATA_411920 is not set -# CONFIG_ARM_ERRATA_430973 is not set -# CONFIG_ARM_ERRATA_458693 is not set -# CONFIG_ARM_ERRATA_460075 is not set -# CONFIG_ARM_ERRATA_643719 is not set -# CONFIG_ARM_ERRATA_720789 is not set -# CONFIG_ARM_ERRATA_742230 is not set -# CONFIG_ARM_ERRATA_742231 is not set -# CONFIG_ARM_ERRATA_743622 is not set -# CONFIG_ARM_ERRATA_751472 is not set -# CONFIG_ARM_ERRATA_754322 is not set -# CONFIG_ARM_ERRATA_754327 is not set -# CONFIG_ARM_ERRATA_764369 is not set -# CONFIG_ARM_ERRATA_773022 is not set -# CONFIG_ARM_ERRATA_775420 is not set -# CONFIG_ARM_ERRATA_798181 is not set -# CONFIG_ARM_ERRATA_814220 is not set -# CONFIG_ARM_ERRATA_818325_852422 is not set -# CONFIG_ARM_ERRATA_821420 is not set -# CONFIG_ARM_ERRATA_825619 is not set -# CONFIG_ARM_ERRATA_852421 is not set -# CONFIG_ARM_ERRATA_852423 is not set -# CONFIG_ARM_ERRATA_857271 is not set -# CONFIG_ARM_ERRATA_857272 is not set -# CONFIG_ARM_FFA_TRANSPORT is not set -CONFIG_ARM_GIC_MAX_NR=1 -# CONFIG_ARM_GT_INITIAL_PRESCALER_VAL is not set -# CONFIG_ARM_KIRKWOOD_CPUFREQ is not set -# CONFIG_ARM_KPROBES_TEST is not set -# CONFIG_ARM_LPAE is not set -# CONFIG_ARM_MHU is not set -# CONFIG_ARM_MHU_V2 is not set -# CONFIG_ARM_MODULE_PLTS is not set -# CONFIG_ARM_PATCH_PHYS_VIRT is not set -# CONFIG_ARM_PSCI is not set -# CONFIG_ARM_PSCI_CHECKER is not set -# CONFIG_ARM_PSCI_CPUIDLE is not set -# CONFIG_ARM_PTDUMP_DEBUGFS is not set -# CONFIG_ARM_SBSA_WATCHDOG is not set -# CONFIG_ARM_SCMI_PROTOCOL is not set -# CONFIG_ARM_SCPI_PROTOCOL is not set -# CONFIG_ARM_SDE_INTERFACE is not set -# CONFIG_ARM_SMCCC_SOC_ID is not set -# CONFIG_ARM_SMC_WATCHDOG is not set -# CONFIG_ARM_SP805_WATCHDOG is not set -# CONFIG_ARM_SPE_PMU is not set -# CONFIG_ARM_THUMBEE is not set -# CONFIG_ARM_TIMER_SP804 is not set -# CONFIG_ARM_UNWIND is not set -# CONFIG_ARM_VIRT_EXT is not set -# CONFIG_AS3935 is not set -# CONFIG_AS73211 is not set -# CONFIG_ASM9260_TIMER is not set -# CONFIG_ASN1 is not set -# CONFIG_ASUS_LAPTOP is not set -# CONFIG_ASUS_WIRELESS is not set -# CONFIG_ASYMMETRIC_KEY_TYPE is not set -# CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE is not set -# CONFIG_ASYNC_RAID6_TEST is not set -# CONFIG_ASYNC_TX_DMA is not set -# CONFIG_AT76C50X_USB is not set -# CONFIG_AT803X_PHY is not set -# CONFIG_AT91_SAMA5D2_ADC is not set -# CONFIG_ATA is not set -# CONFIG_ATAGS is not set -CONFIG_ATAGS_PROC=y -# CONFIG_ATALK is not set -# CONFIG_ATARI_PARTITION is not set -# CONFIG_ATA_ACPI is not set -CONFIG_ATA_BMDMA=y -# CONFIG_ATA_FORCE is not set -# CONFIG_ATA_GENERIC is not set -# CONFIG_ATA_LEDS is not set -# CONFIG_ATA_NONSTANDARD is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_ATA_PIIX is not set -CONFIG_ATA_SFF=y -# CONFIG_ATA_VERBOSE_ERROR is not set -# CONFIG_ATH10K is not set -# CONFIG_ATH25 is not set -# CONFIG_ATH5K is not set -# CONFIG_ATH6KL is not set -# CONFIG_ATH79 is not set -# CONFIG_ATH9K is not set -# CONFIG_ATH9K_HTC is not set -# CONFIG_ATH_DEBUG is not set -# CONFIG_ATL1 is not set -# CONFIG_ATL1C is not set -# CONFIG_ATL1E is not set -# CONFIG_ATL2 is not set -# CONFIG_ATLAS_EZO_SENSOR is not set -# CONFIG_ATLAS_PH_SENSOR is not set -# CONFIG_ATM is not set -# CONFIG_ATMEL is not set -# CONFIG_ATMEL_PIT is not set -# CONFIG_ATMEL_SSC is not set -# CONFIG_ATM_AMBASSADOR is not set -# CONFIG_ATM_BR2684 is not set -CONFIG_ATM_BR2684_IPFILTER=y -# CONFIG_ATM_CLIP is not set -CONFIG_ATM_CLIP_NO_ICMP=y -# CONFIG_ATM_DRIVERS is not set -# CONFIG_ATM_DUMMY is not set -# CONFIG_ATM_ENI is not set -# CONFIG_ATM_FIRESTREAM is not set -# CONFIG_ATM_FORE200E is not set -# CONFIG_ATM_HE is not set -# CONFIG_ATM_HORIZON is not set -# CONFIG_ATM_IA is not set -# CONFIG_ATM_IDT77252 is not set -# CONFIG_ATM_LANAI is not set -# CONFIG_ATM_LANE is not set -# CONFIG_ATM_MPOA is not set -# CONFIG_ATM_NICSTAR is not set -# CONFIG_ATM_SOLOS is not set -# CONFIG_ATM_TCP is not set -# CONFIG_ATM_ZATM is not set -# CONFIG_ATOMIC64_SELFTEST is not set -# CONFIG_ATP is not set -# CONFIG_AUDIT is not set -# CONFIG_AUDIT_ARCH_COMPAT_GENERIC is not set -# CONFIG_AURORA_NB8800 is not set -# CONFIG_AUTOFS4_FS is not set -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTO_ZRELADDR is not set -# CONFIG_AUXDISPLAY is not set -# CONFIG_AX25 is not set -# CONFIG_AX25_DAMA_SLAVE is not set -# CONFIG_AX88796 is not set -# CONFIG_AX88796B_PHY is not set -# CONFIG_AXP20X_ADC is not set -# CONFIG_AXP20X_POWER is not set -# CONFIG_AXP288_ADC is not set -# CONFIG_AXP288_FUEL_GAUGE is not set -# CONFIG_B43 is not set -# CONFIG_B43LEGACY is not set -# CONFIG_B44 is not set -# CONFIG_B53 is not set -# CONFIG_BACKLIGHT_ADP8860 is not set -# CONFIG_BACKLIGHT_ADP8870 is not set -# CONFIG_BACKLIGHT_APPLE is not set -# CONFIG_BACKLIGHT_ARCXCNN is not set -# CONFIG_BACKLIGHT_BD6107 is not set -# CONFIG_BACKLIGHT_CLASS_DEVICE is not set -# CONFIG_BACKLIGHT_GENERIC is not set -# CONFIG_BACKLIGHT_GPIO is not set -# CONFIG_BACKLIGHT_KTD253 is not set -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set -# CONFIG_BACKLIGHT_LED is not set -# CONFIG_BACKLIGHT_LM3630A is not set -# CONFIG_BACKLIGHT_LM3639 is not set -# CONFIG_BACKLIGHT_LP855X is not set -# CONFIG_BACKLIGHT_LV5207LP is not set -# CONFIG_BACKLIGHT_PANDORA is not set -# CONFIG_BACKLIGHT_PM8941_WLED is not set -# CONFIG_BACKLIGHT_PWM is not set -# CONFIG_BACKLIGHT_QCOM_WLED is not set -# CONFIG_BACKLIGHT_RPI is not set -# CONFIG_BACKLIGHT_SAHARA is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_BAREUDP is not set -CONFIG_BASE_FULL=y -CONFIG_BASE_SMALL=0 -# CONFIG_BATMAN_ADV is not set -# CONFIG_BATTERY_BQ27XXX is not set -# CONFIG_BATTERY_BQ27XXX_HDQ is not set -# CONFIG_BATTERY_CW2015 is not set -# CONFIG_BATTERY_DS2760 is not set -# CONFIG_BATTERY_DS2780 is not set -# CONFIG_BATTERY_DS2781 is not set -# CONFIG_BATTERY_DS2782 is not set -# CONFIG_BATTERY_GAUGE_LTC2941 is not set -# CONFIG_BATTERY_GOLDFISH is not set -# CONFIG_BATTERY_LEGO_EV3 is not set -# CONFIG_BATTERY_MAX17040 is not set -# CONFIG_BATTERY_MAX17042 is not set -# CONFIG_BATTERY_MAX1721X is not set -# CONFIG_BATTERY_RT5033 is not set -# CONFIG_BATTERY_SAMSUNG_SDI is not set -# CONFIG_BATTERY_SBS is not set -# CONFIG_BATTERY_UG3105 is not set -# CONFIG_BAYCOM_EPP is not set -# CONFIG_BAYCOM_PAR is not set -# CONFIG_BAYCOM_SER_FDX is not set -# CONFIG_BAYCOM_SER_HDX is not set -# CONFIG_BCACHE is not set -# CONFIG_BCM47XX is not set -# CONFIG_BCM54140_PHY is not set -# CONFIG_BCM63XX is not set -# CONFIG_BCM63XX_PHY is not set -# CONFIG_BCM7038_WDT is not set -# CONFIG_BCM7XXX_PHY is not set -# CONFIG_BCM84881_PHY is not set -# CONFIG_BCM87XX_PHY is not set -# CONFIG_BCMA is not set -# CONFIG_BCMA_DRIVER_GPIO is not set -CONFIG_BCMA_POSSIBLE=y -# CONFIG_BCMGENET is not set -# CONFIG_BCM_IPROC_ADC is not set -# CONFIG_BCM_KONA_USB2_PHY is not set -# CONFIG_BCM_SBA_RAID is not set -# CONFIG_BCM_VK is not set -# CONFIG_BDI_SWITCH is not set -# CONFIG_BE2ISCSI is not set -# CONFIG_BE2NET is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_BGMAC is not set -# CONFIG_BH1750 is not set -# CONFIG_BH1780 is not set -# CONFIG_BIG_KEYS is not set -# CONFIG_BIG_LITTLE is not set -# CONFIG_BINARY_PRINTF is not set -# CONFIG_BINFMT_AOUT is not set -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_ELF_FDPIC is not set -# CONFIG_BINFMT_FLAT is not set -# CONFIG_BINFMT_MISC is not set -CONFIG_BINFMT_SCRIPT=y -CONFIG_BITREVERSE=y -# CONFIG_BLK_CGROUP_IOCOST is not set -# CONFIG_BLK_CGROUP_IOLATENCY is not set -# CONFIG_BLK_CGROUP_IOPRIO is not set -# CONFIG_BLK_CMDLINE_PARSER is not set -# CONFIG_BLK_DEBUG_FS is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_3W_XXXX_RAID is not set -# CONFIG_BLK_DEV_4DRIVES is not set -# CONFIG_BLK_DEV_AEC62XX is not set -# CONFIG_BLK_DEV_ALI14XX is not set -# CONFIG_BLK_DEV_ALI15X3 is not set -# CONFIG_BLK_DEV_AMD74XX is not set -# CONFIG_BLK_DEV_ATIIXP is not set -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_BLK_DEV_BSGLIB is not set -# CONFIG_BLK_DEV_BSG_COMMON is not set -# CONFIG_BLK_DEV_CMD640 is not set -# CONFIG_BLK_DEV_CMD64X is not set -# CONFIG_BLK_DEV_COW_COMMON is not set -# CONFIG_BLK_DEV_CRYPTOLOOP is not set -# CONFIG_BLK_DEV_CS5520 is not set -# CONFIG_BLK_DEV_CS5530 is not set -# CONFIG_BLK_DEV_CS5535 is not set -# CONFIG_BLK_DEV_CS5536 is not set -# CONFIG_BLK_DEV_CY82C693 is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_DELKIN is not set -# CONFIG_BLK_DEV_DRBD is not set -# CONFIG_BLK_DEV_DTC2278 is not set -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_DEV_GENERIC is not set -# CONFIG_BLK_DEV_HPT366 is not set -# CONFIG_BLK_DEV_HT6560B is not set -# CONFIG_BLK_DEV_IDEACPI is not set -# CONFIG_BLK_DEV_IDECD is not set -# CONFIG_BLK_DEV_IDECS is not set -# CONFIG_BLK_DEV_IDEPCI is not set -# CONFIG_BLK_DEV_IDEPNP is not set -# CONFIG_BLK_DEV_IDETAPE is not set -# CONFIG_BLK_DEV_IDE_AU1XXX is not set -# CONFIG_BLK_DEV_IDE_SATA is not set -CONFIG_BLK_DEV_INITRD=y -# CONFIG_BLK_DEV_INTEGRITY is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_BLK_DEV_IT8172 is not set -# CONFIG_BLK_DEV_IT8213 is not set -# CONFIG_BLK_DEV_IT821X is not set -# CONFIG_BLK_DEV_JMICRON is not set -# CONFIG_BLK_DEV_LOOP is not set -CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_NS87415 is not set -# CONFIG_BLK_DEV_NULL_BLK is not set -# CONFIG_BLK_DEV_NVME is not set -# CONFIG_BLK_DEV_OFFBOARD is not set -# CONFIG_BLK_DEV_OPTI621 is not set -# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set -# CONFIG_BLK_DEV_PDC202XX_NEW is not set -# CONFIG_BLK_DEV_PDC202XX_OLD is not set -# CONFIG_BLK_DEV_PIIX is not set -# CONFIG_BLK_DEV_PLATFORM is not set -# CONFIG_BLK_DEV_PMEM is not set -# CONFIG_BLK_DEV_QD65XX is not set -# CONFIG_BLK_DEV_RAM is not set -# CONFIG_BLK_DEV_RBD is not set -# CONFIG_BLK_DEV_RSXX is not set -# CONFIG_BLK_DEV_RZ1000 is not set -# CONFIG_BLK_DEV_SC1200 is not set -# CONFIG_BLK_DEV_SD is not set -# CONFIG_BLK_DEV_SIIMAGE is not set -# CONFIG_BLK_DEV_SIS5513 is not set -# CONFIG_BLK_DEV_SKD is not set -# CONFIG_BLK_DEV_SL82C105 is not set -# CONFIG_BLK_DEV_SLC90E66 is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_BLK_DEV_SVWKS is not set -# CONFIG_BLK_DEV_SX8 is not set -# CONFIG_BLK_DEV_TC86C001 is not set -# CONFIG_BLK_DEV_THROTTLING is not set -# CONFIG_BLK_DEV_TRIFLEX is not set -# CONFIG_BLK_DEV_TRM290 is not set -# CONFIG_BLK_DEV_UMC8672 is not set -# CONFIG_BLK_DEV_UMEM is not set -# CONFIG_BLK_DEV_VIA82CXXX is not set -# CONFIG_BLK_DEV_ZONED is not set -# CONFIG_BLK_INLINE_ENCRYPTION is not set -# CONFIG_BLK_SED_OPAL is not set -# CONFIG_BLK_WBT is not set -CONFIG_BLOCK=y -# CONFIG_BMA180 is not set -# CONFIG_BMA220 is not set -# CONFIG_BMA400 is not set -# CONFIG_BMC150_ACCEL is not set -# CONFIG_BMC150_MAGN is not set -# CONFIG_BMC150_MAGN_I2C is not set -# CONFIG_BMC150_MAGN_SPI is not set -# CONFIG_BME680 is not set -# CONFIG_BMG160 is not set -# CONFIG_BMI088_ACCEL is not set -# CONFIG_BMI160_I2C is not set -# CONFIG_BMI160_SPI is not set -# CONFIG_BMIPS_GENERIC is not set -# CONFIG_BMP280 is not set -# CONFIG_BNA is not set -# CONFIG_BNX2 is not set -# CONFIG_BNX2X is not set -# CONFIG_BNX2X_SRIOV is not set -# CONFIG_BNXT is not set -# CONFIG_BONDING is not set -# CONFIG_BOOKE_WDT is not set -CONFIG_BOOKE_WDT_DEFAULT_TIMEOUT=3 -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set -# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set -# CONFIG_BOOTTIME_TRACING is not set -# CONFIG_BOOT_CONFIG is not set -# CONFIG_BOOT_PRINTK_DELAY is not set -CONFIG_BOOT_RAW=y -# CONFIG_BOUNCE is not set -CONFIG_BPF=y -# CONFIG_BPFILTER is not set -CONFIG_BPF_JIT=y -# CONFIG_BPF_JIT_ALWAYS_ON is not set -CONFIG_BPF_JIT_DEFAULT_ON=y -# CONFIG_BPF_PRELOAD is not set -# CONFIG_BPF_STREAM_PARSER is not set -CONFIG_BPF_SYSCALL=y -CONFIG_BPF_UNPRIV_DEFAULT_OFF=y -# CONFIG_BPQETHER is not set -CONFIG_BQL=y -CONFIG_BRANCH_PROFILE_NONE=y -# CONFIG_BRCMFMAC is not set -# CONFIG_BRCMSMAC is not set -# CONFIG_BRCMSTB_GISB_ARB is not set -CONFIG_BRIDGE=y -# CONFIG_BRIDGE_CFM is not set -# CONFIG_BRIDGE_EBT_802_3 is not set -# CONFIG_BRIDGE_EBT_AMONG is not set -# CONFIG_BRIDGE_EBT_ARP is not set -# CONFIG_BRIDGE_EBT_ARPREPLY is not set -# CONFIG_BRIDGE_EBT_BROUTE is not set -# CONFIG_BRIDGE_EBT_DNAT is not set -# CONFIG_BRIDGE_EBT_IP is not set -# CONFIG_BRIDGE_EBT_IP6 is not set -# CONFIG_BRIDGE_EBT_LIMIT is not set -# CONFIG_BRIDGE_EBT_LOG is not set -# CONFIG_BRIDGE_EBT_MARK is not set -# CONFIG_BRIDGE_EBT_MARK_T is not set -# CONFIG_BRIDGE_EBT_NFLOG is not set -# CONFIG_BRIDGE_EBT_PKTTYPE is not set -# CONFIG_BRIDGE_EBT_REDIRECT is not set -# CONFIG_BRIDGE_EBT_SNAT is not set -# CONFIG_BRIDGE_EBT_STP is not set -# CONFIG_BRIDGE_EBT_T_FILTER is not set -# CONFIG_BRIDGE_EBT_T_NAT is not set -# CONFIG_BRIDGE_EBT_VLAN is not set -CONFIG_BRIDGE_IGMP_SNOOPING=y -# CONFIG_BRIDGE_MRP is not set -# CONFIG_BRIDGE_NETFILTER is not set -# CONFIG_BRIDGE_NF_EBTABLES is not set -CONFIG_BRIDGE_VLAN_FILTERING=y -# CONFIG_BROADCOM_PHY is not set -CONFIG_BROKEN_ON_SMP=y -# CONFIG_BSD_DISKLABEL is not set -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_BSD_PROCESS_ACCT_V3 is not set -# CONFIG_BT is not set -# CONFIG_BTRFS_ASSERT is not set -# CONFIG_BTRFS_DEBUG is not set -# CONFIG_BTRFS_FS is not set -# CONFIG_BTRFS_FS_POSIX_ACL is not set -# CONFIG_BTRFS_FS_REF_VERIFY is not set -# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set -# CONFIG_BT_AOSPEXT is not set -# CONFIG_BT_ATH3K is not set -# CONFIG_BT_BNEP is not set -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -# CONFIG_BT_BREDR is not set -# CONFIG_BT_CMTP is not set -# CONFIG_BT_FEATURE_DEBUG is not set -# CONFIG_BT_HCIBCM203X is not set -# CONFIG_BT_HCIBFUSB is not set -# CONFIG_BT_HCIBLUECARD is not set -# CONFIG_BT_HCIBPA10X is not set -# CONFIG_BT_HCIBT3C is not set -# CONFIG_BT_HCIBTSDIO is not set -# CONFIG_BT_HCIBTUSB is not set -# CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set -# CONFIG_BT_HCIBTUSB_MTK is not set -# CONFIG_BT_HCIBTUSB_RTL is not set -# CONFIG_BT_HCIDTL1 is not set -# CONFIG_BT_HCIUART is not set -# CONFIG_BT_HCIUART_3WIRE is not set -# CONFIG_BT_HCIUART_AG6XX is not set -# CONFIG_BT_HCIUART_ATH3K is not set -CONFIG_BT_HCIUART_BCSP=y -CONFIG_BT_HCIUART_H4=y -# CONFIG_BT_HCIUART_LL is not set -# CONFIG_BT_HCIUART_MRVL is not set -# CONFIG_BT_HCIUART_QCA is not set -# CONFIG_BT_HCIUART_RTL is not set -# CONFIG_BT_HCIVHCI is not set -# CONFIG_BT_HIDP is not set -# CONFIG_BT_HS is not set -# CONFIG_BT_LE is not set -# CONFIG_BT_LEDS is not set -# CONFIG_BT_MRVL is not set -# CONFIG_BT_MSFTEXT is not set -# CONFIG_BT_MTKSDIO is not set -# CONFIG_BT_MTKUART is not set -# CONFIG_BT_RFCOMM is not set -CONFIG_BT_RFCOMM_TTY=y -# CONFIG_BT_SELFTEST is not set -CONFIG_BUG=y -# CONFIG_BUG_ON_DATA_CORRUPTION is not set -CONFIG_BUILDTIME_EXTABLE_SORT=y -CONFIG_BUILDTIME_TABLE_SORT=y -# CONFIG_BUILD_BIN2C is not set -CONFIG_BUILD_SALT="" -# CONFIG_C2PORT is not set -CONFIG_CACHE_L2X0_PMU=y -# CONFIG_CADENCE_WATCHDOG is not set -# CONFIG_CAIF is not set -# CONFIG_CAN is not set -# CONFIG_CAN_BCM is not set -# CONFIG_CAN_DEBUG_DEVICES is not set -# CONFIG_CAN_DEV is not set -# CONFIG_CAN_ETAS_ES58X is not set -# CONFIG_CAN_GS_USB is not set -# CONFIG_CAN_GW is not set -# CONFIG_CAN_HI311X is not set -# CONFIG_CAN_IFI_CANFD is not set -# CONFIG_CAN_ISOTP is not set -# CONFIG_CAN_J1939 is not set -# CONFIG_CAN_KVASER_PCIEFD is not set -# CONFIG_CAN_MCBA_USB is not set -# CONFIG_CAN_MCP251XFD is not set -# CONFIG_CAN_M_CAN is not set -# CONFIG_CAN_PEAK_PCIEFD is not set -# CONFIG_CAN_RAW is not set -# CONFIG_CAN_RCAR is not set -# CONFIG_CAN_RCAR_CANFD is not set -# CONFIG_CAN_SLCAN is not set -# CONFIG_CAN_SUN4I is not set -# CONFIG_CAN_UCAN is not set -# CONFIG_CAN_VCAN is not set -# CONFIG_CAN_VXCAN is not set -# CONFIG_CAPI_AVM is not set -# CONFIG_CAPI_EICON is not set -# CONFIG_CAPI_TRACE is not set -CONFIG_CARDBUS=y -# CONFIG_CARDMAN_4000 is not set -# CONFIG_CARDMAN_4040 is not set -# CONFIG_CARL9170 is not set -# CONFIG_CASSINI is not set -# CONFIG_CAVIUM_CPT is not set -# CONFIG_CAVIUM_ERRATUM_22375 is not set -# CONFIG_CAVIUM_ERRATUM_23144 is not set -# CONFIG_CAVIUM_ERRATUM_23154 is not set -# CONFIG_CAVIUM_ERRATUM_27456 is not set -# CONFIG_CAVIUM_ERRATUM_30115 is not set -# CONFIG_CAVIUM_OCTEON_SOC is not set -# CONFIG_CAVIUM_PTP is not set -# CONFIG_CAVIUM_TX2_ERRATUM_219 is not set -# CONFIG_CB710_CORE is not set -# CONFIG_CC10001_ADC is not set -# CONFIG_CCS811 is not set -CONFIG_CC_CAN_LINK=y -CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_CEPH_FS is not set -# CONFIG_CEPH_LIB is not set -# CONFIG_CFG80211 is not set -# CONFIG_CFG80211_CERTIFICATION_ONUS is not set -# CONFIG_CGROUPS is not set -# CONFIG_CGROUP_MISC is not set -# CONFIG_CHARGER_ADP5061 is not set -# CONFIG_CHARGER_BD99954 is not set -# CONFIG_CHARGER_BQ2415X is not set -# CONFIG_CHARGER_BQ24190 is not set -# CONFIG_CHARGER_BQ24257 is not set -# CONFIG_CHARGER_BQ24735 is not set -# CONFIG_CHARGER_BQ2515X is not set -# CONFIG_CHARGER_BQ256XX is not set -# CONFIG_CHARGER_BQ25890 is not set -# CONFIG_CHARGER_BQ25980 is not set -# CONFIG_CHARGER_DETECTOR_MAX14656 is not set -# CONFIG_CHARGER_GPIO is not set -# CONFIG_CHARGER_ISP1704 is not set -# CONFIG_CHARGER_LP8727 is not set -# CONFIG_CHARGER_LT3651 is not set -# CONFIG_CHARGER_LTC3651 is not set -# CONFIG_CHARGER_LTC4162L is not set -# CONFIG_CHARGER_MANAGER is not set -# CONFIG_CHARGER_MAX77976 is not set -# CONFIG_CHARGER_MAX8903 is not set -# CONFIG_CHARGER_RT9455 is not set -# CONFIG_CHARGER_SBS is not set -# CONFIG_CHARGER_SMB347 is not set -# CONFIG_CHARGER_TWL4030 is not set -# CONFIG_CHARGER_UCS1002 is not set -# CONFIG_CHASH_SELFTEST is not set -# CONFIG_CHASH_STATS is not set -# CONFIG_CHECKPOINT_RESTORE is not set -# CONFIG_CHELSIO_T1 is not set -# CONFIG_CHELSIO_T3 is not set -# CONFIG_CHELSIO_T4 is not set -# CONFIG_CHELSIO_T4VF is not set -# CONFIG_CHROME_PLATFORMS is not set -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_CHR_DEV_SCH is not set -# CONFIG_CHR_DEV_SG is not set -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CICADA_PHY is not set -# CONFIG_CIFS is not set -# CONFIG_CIFS_ACL is not set -CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y -# CONFIG_CIFS_DEBUG is not set -# CONFIG_CIFS_DEBUG2 is not set -# CONFIG_CIFS_FSCACHE is not set -# CONFIG_CIFS_NFSD_EXPORT is not set -CONFIG_CIFS_POSIX=y -# CONFIG_CIFS_SMB2 is not set -# CONFIG_CIFS_STATS is not set -# CONFIG_CIFS_STATS2 is not set -# CONFIG_CIFS_SWN_UPCALL is not set -# CONFIG_CIFS_WEAK_PW_HASH is not set -CONFIG_CIFS_XATTR=y -# CONFIG_CIO_DAC is not set -# CONFIG_CLEANCACHE is not set -# CONFIG_CLKSRC_VERSATILE is not set -# CONFIG_CLK_HSDK is not set -# CONFIG_CLK_ICST is not set -# CONFIG_CLK_QORIQ is not set -# CONFIG_CLK_SP810 is not set -# CONFIG_CLOCK_THERMAL is not set -CONFIG_CLS_U32_MARK=y -# CONFIG_CLS_U32_PERF is not set -# CONFIG_CM32181 is not set -# CONFIG_CM3232 is not set -# CONFIG_CM3323 is not set -# CONFIG_CM3605 is not set -# CONFIG_CM36651 is not set -# CONFIG_CMA is not set -# CONFIG_CMA_SYSFS is not set -CONFIG_CMDLINE="" -# CONFIG_CMDLINE_BOOL is not set -# CONFIG_CMDLINE_EXTEND is not set -# CONFIG_CMDLINE_FORCE is not set -# CONFIG_CMDLINE_FROM_BOOTLOADER is not set -# CONFIG_CMDLINE_PARTITION is not set -# CONFIG_CNIC is not set -# CONFIG_CODA_FS is not set -# CONFIG_CODE_PATCHING_SELFTEST is not set -# CONFIG_COMEDI is not set -# CONFIG_COMMON_CLK_AXI_CLKGEN is not set -# CONFIG_COMMON_CLK_CDCE706 is not set -# CONFIG_COMMON_CLK_CDCE925 is not set -# CONFIG_COMMON_CLK_CS2000_CP is not set -# CONFIG_COMMON_CLK_FIXED_MMIO is not set -# CONFIG_COMMON_CLK_IPROC is not set -# CONFIG_COMMON_CLK_LAN966X is not set -# CONFIG_COMMON_CLK_MAX9485 is not set -# CONFIG_COMMON_CLK_MT6765 is not set -# CONFIG_COMMON_CLK_MT8167 is not set -# CONFIG_COMMON_CLK_MT8167_AUDSYS is not set -# CONFIG_COMMON_CLK_MT8167_IMGSYS is not set -# CONFIG_COMMON_CLK_MT8167_MFGCFG is not set -# CONFIG_COMMON_CLK_MT8167_MMSYS is not set -# CONFIG_COMMON_CLK_MT8167_VDECSYS is not set -# CONFIG_COMMON_CLK_NXP is not set -# CONFIG_COMMON_CLK_PIC32 is not set -# CONFIG_COMMON_CLK_PWM is not set -# CONFIG_COMMON_CLK_PXA is not set -# CONFIG_COMMON_CLK_QCOM is not set -# CONFIG_COMMON_CLK_RK808 is not set -# CONFIG_COMMON_CLK_ROCKCHIP is not set -# CONFIG_COMMON_CLK_SI514 is not set -# CONFIG_COMMON_CLK_SI5341 is not set -# CONFIG_COMMON_CLK_SI5351 is not set -# CONFIG_COMMON_CLK_SI544 is not set -# CONFIG_COMMON_CLK_SI570 is not set -# CONFIG_COMMON_CLK_VC5 is not set -# CONFIG_COMMON_CLK_XGENE is not set -# CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set -CONFIG_COMPACTION=y -# CONFIG_COMPAL_LAPTOP is not set -# CONFIG_COMPAT is not set -# CONFIG_COMPAT_32BIT_TIME is not set -# CONFIG_COMPAT_BRK is not set -# CONFIG_COMPILE_TEST is not set -# CONFIG_CONFIGFS_FS is not set -# CONFIG_CONFIG_KVM_AMD_SEV is not set -# CONFIG_CONNECTOR is not set -CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 -CONFIG_CONSOLE_LOGLEVEL_QUIET=4 -CONFIG_CONSTRUCTORS=y -# CONFIG_CONTEXT_SWITCH_TRACER is not set -# CONFIG_COPS is not set -# CONFIG_CORDIC is not set -# CONFIG_COREDUMP is not set -# CONFIG_CORESIGHT is not set -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -# CONFIG_CORTINA_PHY is not set -# CONFIG_COUNTER is not set -# CONFIG_CPA_DEBUG is not set -# CONFIG_CPU_BIG_ENDIAN is not set -# CONFIG_CPU_BPREDICT_DISABLE is not set -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_CPU_FREQ is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -# CONFIG_CPU_FREQ_GOV_SCHEDUTIL is not set -# CONFIG_CPU_FREQ_STAT_DETAILS is not set -# CONFIG_CPU_FREQ_THERMAL is not set -# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set -# CONFIG_CPU_ICACHE_DISABLE is not set -# CONFIG_CPU_ICACHE_MISMATCH_WORKAROUND is not set -# CONFIG_CPU_IDLE is not set -# CONFIG_CPU_IDLE_GOV_LADDER is not set -# CONFIG_CPU_IDLE_GOV_MENU is not set -# CONFIG_CPU_IDLE_GOV_TEO is not set -# CONFIG_CPU_IDLE_MULTIPLE_DRIVERS is not set -# CONFIG_CPU_ISOLATION is not set -CONFIG_CPU_LITTLE_ENDIAN=y -# CONFIG_CPU_NO_EFFICIENT_FFS is not set -CONFIG_CPU_SW_DOMAIN_PAN=y -# CONFIG_CPU_THERMAL is not set -# CONFIG_CRAMFS is not set -CONFIG_CRAMFS_BLOCKDEV=y -# CONFIG_CRAMFS_MTD is not set -CONFIG_CRASHLOG=y -# CONFIG_CRASH_DUMP is not set -# CONFIG_CRC16 is not set -CONFIG_CRC32=y -# CONFIG_CRC32_BIT is not set -CONFIG_CRC32_SARWATE=y -# CONFIG_CRC32_SELFTEST is not set -# CONFIG_CRC32_SLICEBY4 is not set -# CONFIG_CRC32_SLICEBY8 is not set -# CONFIG_CRC4 is not set -# CONFIG_CRC64 is not set -# CONFIG_CRC7 is not set -# CONFIG_CRC8 is not set -# CONFIG_CRC_CCITT is not set -# CONFIG_CRC_ITU_T is not set -# CONFIG_CRC_T10DIF is not set -CONFIG_CROSS_COMPILE="" -# CONFIG_CROSS_MEMORY_ATTACH is not set -CONFIG_CRYPTO=y -# CONFIG_CRYPTO_842 is not set -CONFIG_CRYPTO_ACOMP2=y -# CONFIG_CRYPTO_ADIANTUM is not set -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -# CONFIG_CRYPTO_AEGIS128 is not set -# CONFIG_CRYPTO_AEGIS128L is not set -# CONFIG_CRYPTO_AEGIS128L_AESNI_SSE2 is not set -# CONFIG_CRYPTO_AEGIS128_AESNI_SSE2 is not set -# CONFIG_CRYPTO_AEGIS256 is not set -# CONFIG_CRYPTO_AEGIS256_AESNI_SSE2 is not set -CONFIG_CRYPTO_AES=y -# CONFIG_CRYPTO_AES_586 is not set -# CONFIG_CRYPTO_AES_ARM is not set -# CONFIG_CRYPTO_AES_ARM64 is not set -# CONFIG_CRYPTO_AES_ARM64_BS is not set -# CONFIG_CRYPTO_AES_ARM64_CE is not set -# CONFIG_CRYPTO_AES_ARM64_CE_BLK is not set -# CONFIG_CRYPTO_AES_ARM64_CE_CCM is not set -# CONFIG_CRYPTO_AES_ARM64_NEON_BLK is not set -# CONFIG_CRYPTO_AES_ARM_BS is not set -# CONFIG_CRYPTO_AES_ARM_CE is not set -# CONFIG_CRYPTO_AES_NI_INTEL is not set -# CONFIG_CRYPTO_AES_TI is not set -CONFIG_CRYPTO_AKCIPHER=y -CONFIG_CRYPTO_AKCIPHER2=y -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_ALGAPI2=y -# CONFIG_CRYPTO_ANSI_CPRNG is not set -# CONFIG_CRYPTO_ANUBIS is not set -# CONFIG_CRYPTO_ARC4 is not set -# CONFIG_CRYPTO_ARCH_HAVE_LIB_BLAKE2S is not set -# CONFIG_CRYPTO_AUTHENC is not set -# CONFIG_CRYPTO_BLAKE2B is not set -CONFIG_CRYPTO_BLAKE2B_NEON=y -# CONFIG_CRYPTO_BLAKE2S is not set -CONFIG_CRYPTO_BLAKE2S_ARM=y -# CONFIG_CRYPTO_BLAKE2S_X86 is not set -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_CAMELLIA is not set -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -# CONFIG_CRYPTO_CBC is not set -CONFIG_CRYPTO_CCM=y -# CONFIG_CRYPTO_CFB is not set -# CONFIG_CRYPTO_CHACHA20 is not set -# CONFIG_CRYPTO_CHACHA20POLY1305 is not set -# CONFIG_CRYPTO_CHACHA20_NEON is not set -# CONFIG_CRYPTO_CHACHA20_X86_64 is not set -# CONFIG_CRYPTO_CHACHA_MIPS is not set -# CONFIG_CRYPTO_CMAC is not set -# CONFIG_CRYPTO_CRC32 is not set -# CONFIG_CRYPTO_CRC32C is not set -# CONFIG_CRYPTO_CRC32C_INTEL is not set -# CONFIG_CRYPTO_CRC32_ARM_CE is not set -# CONFIG_CRYPTO_CRCT10DIF is not set -# CONFIG_CRYPTO_CRCT10DIF_ARM64_CE is not set -# CONFIG_CRYPTO_CRYPTD is not set -CONFIG_CRYPTO_CTR=y -# CONFIG_CRYPTO_CTS is not set -# CONFIG_CRYPTO_CURVE25519 is not set -# CONFIG_CRYPTO_CURVE25519_NEON is not set -# CONFIG_CRYPTO_CURVE25519_X86 is not set -# CONFIG_CRYPTO_DEFLATE is not set -# CONFIG_CRYPTO_DES is not set -# CONFIG_CRYPTO_DEV_AMLOGIC_GXL is not set -# CONFIG_CRYPTO_DEV_ATMEL_AES is not set -# CONFIG_CRYPTO_DEV_ATMEL_AUTHENC is not set -# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set -# CONFIG_CRYPTO_DEV_ATMEL_SHA is not set -# CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set -# CONFIG_CRYPTO_DEV_ATMEL_TDES is not set -# CONFIG_CRYPTO_DEV_CAVIUM_ZIP is not set -# CONFIG_CRYPTO_DEV_CCP is not set -# CONFIG_CRYPTO_DEV_CCP_DEBUGFS is not set -# CONFIG_CRYPTO_DEV_CCREE is not set -# CONFIG_CRYPTO_DEV_FSL_CAAM is not set -# CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC is not set -# CONFIG_CRYPTO_DEV_HIFN_795X is not set -# CONFIG_CRYPTO_DEV_HISI_SEC is not set -# CONFIG_CRYPTO_DEV_HISI_ZIP is not set -# CONFIG_CRYPTO_DEV_IMGTEC_HASH is not set -# CONFIG_CRYPTO_DEV_MARVELL_CESA is not set -# CONFIG_CRYPTO_DEV_MV_CESA is not set -# CONFIG_CRYPTO_DEV_MXC_SCC is not set -# CONFIG_CRYPTO_DEV_MXS_DCP is not set -# CONFIG_CRYPTO_DEV_NITROX_CNN55XX is not set -# CONFIG_CRYPTO_DEV_QAT_4XXX is not set -# CONFIG_CRYPTO_DEV_QAT_C3XXX is not set -# CONFIG_CRYPTO_DEV_QAT_C3XXXVF is not set -# CONFIG_CRYPTO_DEV_QAT_C62X is not set -# CONFIG_CRYPTO_DEV_QAT_C62XVF is not set -# CONFIG_CRYPTO_DEV_QAT_DH895xCC is not set -# CONFIG_CRYPTO_DEV_QAT_DH895xCCVF is not set -# CONFIG_CRYPTO_DEV_QCE is not set -# CONFIG_CRYPTO_DEV_S5P is not set -# CONFIG_CRYPTO_DEV_SAFEXCEL is not set -# CONFIG_CRYPTO_DEV_SAHARA is not set -# CONFIG_CRYPTO_DEV_SP_PSP is not set -# CONFIG_CRYPTO_DEV_TALITOS is not set -# CONFIG_CRYPTO_DEV_VIRTIO is not set -# CONFIG_CRYPTO_DH is not set -# CONFIG_CRYPTO_DRBG_CTR is not set -# CONFIG_CRYPTO_DRBG_HASH is not set -# CONFIG_CRYPTO_DRBG_MENU is not set -# CONFIG_CRYPTO_ECB is not set -# CONFIG_CRYPTO_ECDH is not set -# CONFIG_CRYPTO_ECDSA is not set -# CONFIG_CRYPTO_ECHAINIV is not set -# CONFIG_CRYPTO_ECRDSA is not set -# CONFIG_CRYPTO_ESSIV is not set -# CONFIG_CRYPTO_FCRYPT is not set -# CONFIG_CRYPTO_FIPS is not set -CONFIG_CRYPTO_GCM=y -CONFIG_CRYPTO_GF128MUL=y -CONFIG_CRYPTO_GHASH=y -# CONFIG_CRYPTO_GHASH_ARM64_CE is not set -# CONFIG_CRYPTO_GHASH_ARM_CE is not set -# CONFIG_CRYPTO_GHASH_CLMUL_NI_INTEL is not set -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -# CONFIG_CRYPTO_HMAC is not set -# CONFIG_CRYPTO_HW is not set -# CONFIG_CRYPTO_JITTERENTROPY is not set -# CONFIG_CRYPTO_KEYWRAP is not set -# CONFIG_CRYPTO_KHAZAD is not set -CONFIG_CRYPTO_KPP=y -CONFIG_CRYPTO_KPP2=y -CONFIG_CRYPTO_LIB_AES=y -CONFIG_CRYPTO_LIB_ARC4=y -# CONFIG_CRYPTO_LIB_BLAKE2S is not set -# CONFIG_CRYPTO_LIB_CHACHA is not set -# CONFIG_CRYPTO_LIB_CHACHA20POLY1305 is not set -# CONFIG_CRYPTO_LIB_CURVE25519 is not set -# CONFIG_CRYPTO_LIB_POLY1305 is not set -CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9 -# CONFIG_CRYPTO_LIB_SHA256 is not set -# CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_LZ4 is not set -# CONFIG_CRYPTO_LZ4HC is not set -# CONFIG_CRYPTO_LZO is not set -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y -# CONFIG_CRYPTO_MCRYPTD is not set -# CONFIG_CRYPTO_MD4 is not set -# CONFIG_CRYPTO_MD5 is not set -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_MORUS1280 is not set -# CONFIG_CRYPTO_MORUS1280_AVX2 is not set -# CONFIG_CRYPTO_MORUS1280_SSE2 is not set -# CONFIG_CRYPTO_MORUS640 is not set -# CONFIG_CRYPTO_MORUS640_SSE2 is not set -# CONFIG_CRYPTO_NHPOLY1305_NEON is not set -CONFIG_CRYPTO_NULL=y -CONFIG_CRYPTO_NULL2=y -# CONFIG_CRYPTO_OFB is not set -# CONFIG_CRYPTO_PCBC is not set -# CONFIG_CRYPTO_PCOMP is not set -# CONFIG_CRYPTO_PCOMP2 is not set -CONFIG_CRYPTO_PCRYPT=y -# CONFIG_CRYPTO_POLY1305 is not set -# CONFIG_CRYPTO_POLY1305_ARM is not set -# CONFIG_CRYPTO_POLY1305_MIPS is not set -# CONFIG_CRYPTO_POLY1305_NEON is not set -# CONFIG_CRYPTO_POLY1305_X86_64 is not set -# CONFIG_CRYPTO_RMD128 is not set -# CONFIG_CRYPTO_RMD160 is not set -# CONFIG_CRYPTO_RMD256 is not set -# CONFIG_CRYPTO_RMD320 is not set -# CONFIG_CRYPTO_RNG is not set -# CONFIG_CRYPTO_RSA is not set -# CONFIG_CRYPTO_SALSA20 is not set -# CONFIG_CRYPTO_SALSA20_586 is not set -# CONFIG_CRYPTO_SEED is not set -# CONFIG_CRYPTO_SEQIV is not set -# CONFIG_CRYPTO_SERPENT is not set -# CONFIG_CRYPTO_SHA1 is not set -# CONFIG_CRYPTO_SHA1_ARM is not set -# CONFIG_CRYPTO_SHA1_ARM64_CE is not set -# CONFIG_CRYPTO_SHA1_ARM_CE is not set -# CONFIG_CRYPTO_SHA1_ARM_NEON is not set -CONFIG_CRYPTO_SHA256=y -# CONFIG_CRYPTO_SHA256_ARM is not set -# CONFIG_CRYPTO_SHA256_ARM64 is not set -# CONFIG_CRYPTO_SHA256_SSSE3 is not set -# CONFIG_CRYPTO_SHA2_ARM64_CE is not set -# CONFIG_CRYPTO_SHA2_ARM_CE is not set -# CONFIG_CRYPTO_SHA3 is not set -# CONFIG_CRYPTO_SHA3_ARM64 is not set -# CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_SHA512_ARM is not set -# CONFIG_CRYPTO_SHA512_ARM64 is not set -# CONFIG_CRYPTO_SHA512_ARM64_CE is not set -# CONFIG_CRYPTO_SIMD is not set -CONFIG_CRYPTO_SKCIPHER=y -CONFIG_CRYPTO_SKCIPHER2=y -# CONFIG_CRYPTO_SM2 is not set -# CONFIG_CRYPTO_SM3 is not set -# CONFIG_CRYPTO_SM3_ARM64_CE is not set -# CONFIG_CRYPTO_SM4 is not set -# CONFIG_CRYPTO_SM4_ARM64_CE is not set -# CONFIG_CRYPTO_SPECK is not set -# CONFIG_CRYPTO_STATS is not set -# CONFIG_CRYPTO_STREEBOG is not set -# CONFIG_CRYPTO_TEA is not set -# CONFIG_CRYPTO_TEST is not set -# CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_TWOFISH is not set -# CONFIG_CRYPTO_TWOFISH_586 is not set -# CONFIG_CRYPTO_TWOFISH_COMMON is not set -# CONFIG_CRYPTO_USER is not set -# CONFIG_CRYPTO_USER_API_AEAD is not set -# CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE is not set -# CONFIG_CRYPTO_USER_API_HASH is not set -# CONFIG_CRYPTO_USER_API_RNG is not set -# CONFIG_CRYPTO_USER_API_RNG_CAVP is not set -# CONFIG_CRYPTO_USER_API_SKCIPHER is not set -# CONFIG_CRYPTO_VMAC is not set -# CONFIG_CRYPTO_WP512 is not set -# CONFIG_CRYPTO_XCBC is not set -# CONFIG_CRYPTO_XTS is not set -# CONFIG_CRYPTO_XXHASH is not set -# CONFIG_CRYPTO_ZLIB is not set -# CONFIG_CRYPTO_ZSTD is not set -# CONFIG_CS5535_MFGPT is not set -# CONFIG_CS89x0 is not set -# CONFIG_CS89x0_PLATFORM is not set -# CONFIG_CSD_LOCK_WAIT_DEBUG is not set -# CONFIG_CURRENT_POINTER_IN_TPIDRURO is not set -# CONFIG_CUSE is not set -# CONFIG_CW1200 is not set -# CONFIG_CXD2880_SPI_DRV is not set -# CONFIG_CXL_AFU_DRIVER_OPS is not set -# CONFIG_CXL_BASE is not set -# CONFIG_CXL_BUS is not set -# CONFIG_CXL_EEH is not set -# CONFIG_CXL_KERNEL_API is not set -# CONFIG_CXL_LIB is not set -# CONFIG_CYPRESS_FIRMWARE is not set -# CONFIG_DA280 is not set -# CONFIG_DA311 is not set -# CONFIG_DAMON is not set -# CONFIG_DAVICOM_PHY is not set -# CONFIG_DAX is not set -# CONFIG_DCB is not set -# CONFIG_DDR is not set -# CONFIG_DEBUG_ALIGN_RODATA is not set -# CONFIG_DEBUG_ATOMIC_SLEEP is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -# CONFIG_DEBUG_BUGVERBOSE is not set -# CONFIG_DEBUG_CREDENTIALS is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_EFI is not set -# CONFIG_DEBUG_FORCE_FUNCTION_ALIGN_32B is not set -# CONFIG_DEBUG_FORCE_FUNCTION_ALIGN_64B is not set -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set -CONFIG_DEBUG_FS=y -CONFIG_DEBUG_FS_ALLOW_ALL=y -# CONFIG_DEBUG_FS_ALLOW_NONE is not set -# CONFIG_DEBUG_FS_DISALLOW_MOUNT is not set -# CONFIG_DEBUG_GPIO is not set -# CONFIG_DEBUG_HIGHMEM is not set -# CONFIG_DEBUG_ICEDCC is not set -# CONFIG_DEBUG_INFO is not set -# CONFIG_DEBUG_INFO_BTF is not set -# CONFIG_DEBUG_INFO_COMPRESSED is not set -# CONFIG_DEBUG_INFO_DWARF4 is not set -CONFIG_DEBUG_INFO_DWARF5=y -# CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT is not set -CONFIG_DEBUG_INFO_REDUCED=y -# CONFIG_DEBUG_INFO_SPLIT is not set -# CONFIG_DEBUG_IRQFLAGS is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_KMAP_LOCAL is not set -# CONFIG_DEBUG_KMEMLEAK is not set -# CONFIG_DEBUG_KOBJECT is not set -# CONFIG_DEBUG_KOBJECT_RELEASE is not set -# CONFIG_DEBUG_LIST is not set -# CONFIG_DEBUG_LL is not set -# CONFIG_DEBUG_LL_UART_8250 is not set -# CONFIG_DEBUG_LL_UART_PL01X is not set -# CONFIG_DEBUG_LOCKDEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_DEBUG_MEMORY_INIT is not set -# CONFIG_DEBUG_MISC is not set -# CONFIG_DEBUG_MUTEXES is not set -# CONFIG_DEBUG_NOTIFIERS is not set -# CONFIG_DEBUG_NX_TEST is not set -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_DEBUG_PAGEALLOC is not set -# CONFIG_DEBUG_PAGE_REF is not set -# CONFIG_DEBUG_PERF_USE_VMALLOC is not set -# CONFIG_DEBUG_PER_CPU_MAPS is not set -# CONFIG_DEBUG_PINCTRL is not set -# CONFIG_DEBUG_PI_LIST is not set -# CONFIG_DEBUG_PLIST is not set -# CONFIG_DEBUG_PREEMPT is not set -# CONFIG_DEBUG_RODATA_TEST is not set -# CONFIG_DEBUG_RSEQ is not set -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_DEBUG_RWSEMS is not set -# CONFIG_DEBUG_SECTION_MISMATCH is not set -# CONFIG_DEBUG_SEMIHOSTING is not set -# CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_SHIRQ is not set -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_DEBUG_STACKOVERFLOW is not set -# CONFIG_DEBUG_STACK_USAGE is not set -# CONFIG_DEBUG_STRICT_USER_COPY_CHECKS is not set -# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set -# CONFIG_DEBUG_TIMEKEEPING is not set -# CONFIG_DEBUG_UART_8250_PALMCHIP is not set -# CONFIG_DEBUG_UART_8250_WORD is not set -# CONFIG_DEBUG_UART_BCM63XX is not set -# CONFIG_DEBUG_UART_FLOW_CONTROL is not set -# CONFIG_DEBUG_USER is not set -# CONFIG_DEBUG_VIRTUAL is not set -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_VM_PGTABLE is not set -# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set -# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set -# CONFIG_DEBUG_WX is not set -# CONFIG_DEBUG_ZBOOT is not set -# CONFIG_DECNET is not set -CONFIG_DEFAULT_CUBIC=y -CONFIG_DEFAULT_DEADLINE=y -CONFIG_DEFAULT_HOSTNAME="(none)" -CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 -CONFIG_DEFAULT_INIT="" -CONFIG_DEFAULT_IOSCHED="deadline" -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -# CONFIG_DEFAULT_NOOP is not set -# CONFIG_DEFAULT_RENO is not set -CONFIG_DEFAULT_SECURITY="" -CONFIG_DEFAULT_SECURITY_DAC=y -# CONFIG_DEFAULT_SECURITY_SELINUX is not set -CONFIG_DEFAULT_TCP_CONG="cubic" -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set -# CONFIG_DELL_LAPTOP is not set -# CONFIG_DELL_RBTN is not set -# CONFIG_DELL_SMBIOS is not set -# CONFIG_DELL_SMO8800 is not set -# CONFIG_DEPRECATED_PARAM_STRUCT is not set -# CONFIG_DETECT_HUNG_TASK is not set -# CONFIG_DEVKMEM is not set -# CONFIG_DEVMEM is not set -CONFIG_DEVPORT=y -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set -# CONFIG_DEVTMPFS is not set -# CONFIG_DEVTMPFS_MOUNT is not set -# CONFIG_DEV_DAX is not set -# CONFIG_DGAP is not set -# CONFIG_DGNC is not set -# CONFIG_DHT11 is not set -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_DISPLAY_CONNECTOR_ANALOG_TV is not set -# CONFIG_DISPLAY_CONNECTOR_DVI is not set -# CONFIG_DISPLAY_CONNECTOR_HDMI is not set -# CONFIG_DISPLAY_ENCODER_TFP410 is not set -# CONFIG_DISPLAY_ENCODER_TPD12S015 is not set -# CONFIG_DISPLAY_PANEL_DPI is not set -# CONFIG_DISPLAY_PANEL_LGPHILIPS_LB035Q02 is not set -# CONFIG_DISPLAY_PANEL_TPO_TD028TTEC1 is not set -# CONFIG_DISPLAY_PANEL_TPO_TD043MTEA1 is not set -# CONFIG_DL2K is not set -# CONFIG_DLHL60D is not set -# CONFIG_DLM is not set -# CONFIG_DM9000 is not set -# CONFIG_DMABUF_DEBUG is not set -# CONFIG_DMABUF_HEAPS is not set -# CONFIG_DMABUF_MOVE_NOTIFY is not set -# CONFIG_DMABUF_SELFTESTS is not set -# CONFIG_DMABUF_SYSFS_STATS is not set -# CONFIG_DMADEVICES is not set -# CONFIG_DMADEVICES_DEBUG is not set -# CONFIG_DMARD06 is not set -# CONFIG_DMARD09 is not set -# CONFIG_DMARD10 is not set -# CONFIG_DMASCC is not set -# CONFIG_DMATEST is not set -# CONFIG_DMA_API_DEBUG is not set -CONFIG_DMA_COHERENT_POOL=y -CONFIG_DMA_DECLARE_COHERENT=y -# CONFIG_DMA_ENGINE is not set -# CONFIG_DMA_FENCE_TRACE is not set -# CONFIG_DMA_JZ4780 is not set -# CONFIG_DMA_MAP_BENCHMARK is not set -CONFIG_DMA_NONCOHERENT_MMAP=y -# CONFIG_DMA_NOOP_OPS is not set -# CONFIG_DMA_PERNUMA_CMA is not set -# CONFIG_DMA_RESTRICTED_POOL is not set -# CONFIG_DMA_SHARED_BUFFER is not set -# CONFIG_DMA_VIRT_OPS is not set -# CONFIG_DM_CACHE is not set -# CONFIG_DM_CLONE is not set -# CONFIG_DM_DEBUG is not set -# CONFIG_DM_DELAY is not set -# CONFIG_DM_DUST is not set -# CONFIG_DM_EBS is not set -# CONFIG_DM_ERA is not set -# CONFIG_DM_FLAKEY is not set -# CONFIG_DM_INTEGRITY is not set -# CONFIG_DM_LOG_USERSPACE is not set -# CONFIG_DM_LOG_WRITES is not set -# CONFIG_DM_MQ_DEFAULT is not set -# CONFIG_DM_MULTIPATH is not set -# CONFIG_DM_RAID is not set -# CONFIG_DM_SWITCH is not set -# CONFIG_DM_THIN_PROVISIONING is not set -# CONFIG_DM_UEVENT is not set -# CONFIG_DM_UNSTRIPED is not set -# CONFIG_DM_VERITY is not set -# CONFIG_DM_WRITECACHE is not set -# CONFIG_DM_ZERO is not set -# CONFIG_DNET is not set -# CONFIG_DNOTIFY is not set -# CONFIG_DNS_RESOLVER is not set -CONFIG_DOUBLEFAULT=y -# CONFIG_DP83822_PHY is not set -# CONFIG_DP83848_PHY is not set -# CONFIG_DP83867_PHY is not set -# CONFIG_DP83869_PHY is not set -# CONFIG_DP83TC811_PHY is not set -# CONFIG_DPOT_DAC is not set -# CONFIG_DPS310 is not set -CONFIG_DQL=y -# CONFIG_DRAGONRISE_FF is not set -# CONFIG_DRM is not set -# CONFIG_DRM_AMDGPU is not set -# CONFIG_DRM_AMDGPU_CIK is not set -# CONFIG_DRM_AMDGPU_GART_DEBUGFS is not set -# CONFIG_DRM_AMDGPU_SI is not set -# CONFIG_DRM_AMDGPU_USERPTR is not set -# CONFIG_DRM_AMD_ACP is not set -# CONFIG_DRM_AMD_DC_DCN2_0 is not set -# CONFIG_DRM_AMD_DC_DCN3_0 is not set -# CONFIG_DRM_AMD_DC_HDCP is not set -# CONFIG_DRM_AMD_DC_SI is not set -# CONFIG_DRM_ANALOGIX_ANX6345 is not set -# CONFIG_DRM_ANALOGIX_ANX78XX is not set -# CONFIG_DRM_ARCPGU is not set -# CONFIG_DRM_ARMADA is not set -# CONFIG_DRM_AST is not set -# CONFIG_DRM_BOCHS is not set -# CONFIG_DRM_CDNS_DSI is not set -# CONFIG_DRM_CDNS_MHDP8546 is not set -# CONFIG_DRM_CHRONTEL_CH7033 is not set -# CONFIG_DRM_CIRRUS_QEMU is not set -# CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set -# CONFIG_DRM_DEBUG_MM is not set -# CONFIG_DRM_DEBUG_MODESET_LOCK is not set -# CONFIG_DRM_DEBUG_SELFTEST is not set -# CONFIG_DRM_DISPLAY_CONNECTOR is not set -# CONFIG_DRM_DP_AUX_CHARDEV is not set -# CONFIG_DRM_DP_CEC is not set -# CONFIG_DRM_DUMB_VGA_DAC is not set -# CONFIG_DRM_DW_HDMI_CEC is not set -# CONFIG_DRM_ETNAVIV is not set -# CONFIG_DRM_EXYNOS is not set -# CONFIG_DRM_FBDEV_EMULATION is not set -# CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set -# CONFIG_DRM_FSL_DCU is not set -# CONFIG_DRM_GM12U320 is not set -# CONFIG_DRM_GMA500 is not set -# CONFIG_DRM_GUD is not set -# CONFIG_DRM_HDLCD is not set -# CONFIG_DRM_HISI_HIBMC is not set -# CONFIG_DRM_HISI_KIRIN is not set -# CONFIG_DRM_I2C_ADV7511 is not set -# CONFIG_DRM_I2C_CH7006 is not set -# CONFIG_DRM_I2C_NXP_TDA9950 is not set -# CONFIG_DRM_I2C_NXP_TDA998X is not set -# CONFIG_DRM_I2C_SIL164 is not set -# CONFIG_DRM_I915 is not set -CONFIG_DRM_I915_REQUEST_TIMEOUT=20000 -# CONFIG_DRM_KOMEDA is not set -# CONFIG_DRM_LEGACY is not set -# CONFIG_DRM_LIB_RANDOM is not set -# CONFIG_DRM_LIMA is not set -# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set -# CONFIG_DRM_LONTIUM_LT9611 is not set -# CONFIG_DRM_LVDS_CODEC is not set -# CONFIG_DRM_LVDS_ENCODER is not set -# CONFIG_DRM_MALI_DISPLAY is not set -# CONFIG_DRM_MCDE is not set -# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set -# CONFIG_DRM_MGAG200 is not set -# CONFIG_DRM_MXSFB is not set -# CONFIG_DRM_NOUVEAU is not set -# CONFIG_DRM_NWL_MIPI_DSI is not set -# CONFIG_DRM_NXP_PTN3460 is not set -# CONFIG_DRM_OMAP is not set -# CONFIG_DRM_PANEL_ARM_VERSATILE is not set -# CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596 is not set -# CONFIG_DRM_PANEL_BOE_HIMAX8279D is not set -# CONFIG_DRM_PANEL_BOE_TV101WUM_NL6 is not set -# CONFIG_DRM_PANEL_ELIDA_KD35T133 is not set -# CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02 is not set -# CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D is not set -# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set -# CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set -# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set -# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set -# CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04 is not set -# CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W is not set -# CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829 is not set -# CONFIG_DRM_PANEL_LG_LB035Q02 is not set -# CONFIG_DRM_PANEL_LG_LG4573 is not set -# CONFIG_DRM_PANEL_LVDS is not set -# CONFIG_DRM_PANEL_MANTIX_MLAF057WE51 is not set -# CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set -# CONFIG_DRM_PANEL_NOVATEK_NT35510 is not set -# CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set -# CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set -# CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set -# CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS is not set -# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set -# CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set -# CONFIG_DRM_PANEL_RAYDIUM_RM67191 is not set -# CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set -# CONFIG_DRM_PANEL_ROCKTECH_JH057N00900 is not set -# CONFIG_DRM_PANEL_RONBO_RB070D30 is not set -# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set -# CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set -# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set -# CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set -# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set -# CONFIG_DRM_PANEL_SIMPLE is not set -# CONFIG_DRM_PANEL_SITRONIX_ST7701 is not set -# CONFIG_DRM_PANEL_SITRONIX_ST7703 is not set -# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set -# CONFIG_DRM_PANEL_SONY_ACX424AKP is not set -# CONFIG_DRM_PANEL_SONY_ACX565AKM is not set -# CONFIG_DRM_PANEL_TPO_TD028TTEC1 is not set -# CONFIG_DRM_PANEL_TPO_TD043MTEA1 is not set -# CONFIG_DRM_PANEL_TPO_TPG110 is not set -# CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set -# CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set -# CONFIG_DRM_PANEL_XINPENG_XPP055C272 is not set -# CONFIG_DRM_PANFROST is not set -# CONFIG_DRM_PARADE_PS8622 is not set -# CONFIG_DRM_PARADE_PS8640 is not set -# CONFIG_DRM_PL111 is not set -# CONFIG_DRM_QXL is not set -# CONFIG_DRM_RADEON is not set -# CONFIG_DRM_RADEON_USERPTR is not set -# CONFIG_DRM_RCAR_DW_HDMI is not set -# CONFIG_DRM_RCAR_LVDS is not set -# CONFIG_DRM_SII902X is not set -# CONFIG_DRM_SII9234 is not set -# CONFIG_DRM_SIL_SII8620 is not set -# CONFIG_DRM_SIMPLE_BRIDGE is not set -# CONFIG_DRM_STI is not set -# CONFIG_DRM_STM is not set -# CONFIG_DRM_SUN4I is not set -# CONFIG_DRM_THINE_THC63LVD1024 is not set -# CONFIG_DRM_TIDSS is not set -# CONFIG_DRM_TILCDC is not set -# CONFIG_DRM_TINYDRM is not set -# CONFIG_DRM_TI_SN65DSI86 is not set -# CONFIG_DRM_TI_TFP410 is not set -# CONFIG_DRM_TI_TPD12S015 is not set -# CONFIG_DRM_TOSHIBA_TC358762 is not set -# CONFIG_DRM_TOSHIBA_TC358764 is not set -# CONFIG_DRM_TOSHIBA_TC358767 is not set -# CONFIG_DRM_TOSHIBA_TC358768 is not set -# CONFIG_DRM_TOSHIBA_TC358775 is not set -# CONFIG_DRM_TVE200 is not set -# CONFIG_DRM_UDL is not set -# CONFIG_DRM_VBOXVIDEO is not set -# CONFIG_DRM_VC4_HDMI_CEC is not set -# CONFIG_DRM_VGEM is not set -# CONFIG_DRM_VIRTIO_GPU is not set -# CONFIG_DRM_VKMS is not set -# CONFIG_DRM_VMWGFX is not set -# CONFIG_DRM_XEN is not set -# CONFIG_DRM_XEN_FRONTEND is not set -# CONFIG_DS1682 is not set -# CONFIG_DS1803 is not set -# CONFIG_DS4424 is not set -# CONFIG_DST_CACHE is not set -# CONFIG_DTLK is not set -# CONFIG_DUMMY is not set -CONFIG_DUMMY_CONSOLE_COLUMNS=80 -CONFIG_DUMMY_CONSOLE_ROWS=25 -# CONFIG_DUMMY_IRQ is not set -# CONFIG_DVB_A8293 is not set -# CONFIG_DVB_AF9013 is not set -# CONFIG_DVB_AF9033 is not set -# CONFIG_DVB_AS102 is not set -# CONFIG_DVB_ASCOT2E is not set -# CONFIG_DVB_ATBM8830 is not set -# CONFIG_DVB_AU8522_DTV is not set -# CONFIG_DVB_AU8522_V4L is not set -# CONFIG_DVB_B2C2_FLEXCOP_USB is not set -# CONFIG_DVB_BCM3510 is not set -# CONFIG_DVB_CORE is not set -# CONFIG_DVB_CX22700 is not set -# CONFIG_DVB_CX22702 is not set -# CONFIG_DVB_CX24110 is not set -# CONFIG_DVB_CX24116 is not set -# CONFIG_DVB_CX24117 is not set -# CONFIG_DVB_CX24120 is not set -# CONFIG_DVB_CX24123 is not set -# CONFIG_DVB_CXD2099 is not set -# CONFIG_DVB_CXD2820R is not set -# CONFIG_DVB_CXD2841ER is not set -# CONFIG_DVB_CXD2880 is not set -# CONFIG_DVB_DEMUX_SECTION_LOSS_LOG is not set -# CONFIG_DVB_DIB3000MB is not set -# CONFIG_DVB_DIB3000MC is not set -# CONFIG_DVB_DIB7000M is not set -# CONFIG_DVB_DIB7000P is not set -# CONFIG_DVB_DIB8000 is not set -# CONFIG_DVB_DIB9000 is not set -# CONFIG_DVB_DRX39XYJ is not set -# CONFIG_DVB_DRXD is not set -# CONFIG_DVB_DRXK is not set -# CONFIG_DVB_DS3000 is not set -# CONFIG_DVB_DUMMY_FE is not set -# CONFIG_DVB_DYNAMIC_MINORS is not set -# CONFIG_DVB_EC100 is not set -# CONFIG_DVB_FIREDTV is not set -# CONFIG_DVB_HELENE is not set -# CONFIG_DVB_HORUS3A is not set -# CONFIG_DVB_ISL6405 is not set -# CONFIG_DVB_ISL6421 is not set -# CONFIG_DVB_ISL6423 is not set -# CONFIG_DVB_IX2505V is not set -# CONFIG_DVB_L64781 is not set -# CONFIG_DVB_LG2160 is not set -# CONFIG_DVB_LGDT3305 is not set -# CONFIG_DVB_LGDT3306A is not set -# CONFIG_DVB_LGDT330X is not set -# CONFIG_DVB_LGS8GL5 is not set -# CONFIG_DVB_LGS8GXX is not set -# CONFIG_DVB_LNBH25 is not set -# CONFIG_DVB_LNBH29 is not set -# CONFIG_DVB_LNBP21 is not set -# CONFIG_DVB_LNBP22 is not set -# CONFIG_DVB_M88DS3103 is not set -# CONFIG_DVB_M88RS2000 is not set -CONFIG_DVB_MAX_ADAPTERS=16 -# CONFIG_DVB_MB86A16 is not set -# CONFIG_DVB_MB86A20S is not set -# CONFIG_DVB_MMAP is not set -# CONFIG_DVB_MN88443X is not set -# CONFIG_DVB_MN88472 is not set -# CONFIG_DVB_MN88473 is not set -# CONFIG_DVB_MT312 is not set -# CONFIG_DVB_MT352 is not set -# CONFIG_DVB_MXL5XX is not set -# CONFIG_DVB_MXL692 is not set -# CONFIG_DVB_NET is not set -# CONFIG_DVB_NXT200X is not set -# CONFIG_DVB_NXT6000 is not set -# CONFIG_DVB_OR51132 is not set -# CONFIG_DVB_OR51211 is not set -# CONFIG_DVB_PLATFORM_DRIVERS is not set -# CONFIG_DVB_PLL is not set -# CONFIG_DVB_RTL2830 is not set -# CONFIG_DVB_RTL2832 is not set -# CONFIG_DVB_RTL2832_SDR is not set -# CONFIG_DVB_S5H1409 is not set -# CONFIG_DVB_S5H1411 is not set -# CONFIG_DVB_S5H1420 is not set -# CONFIG_DVB_S5H1432 is not set -# CONFIG_DVB_S921 is not set -# CONFIG_DVB_SI2165 is not set -# CONFIG_DVB_SI2168 is not set -# CONFIG_DVB_SI21XX is not set -# CONFIG_DVB_SP2 is not set -# CONFIG_DVB_SP8870 is not set -# CONFIG_DVB_SP887X is not set -# CONFIG_DVB_STB0899 is not set -# CONFIG_DVB_STB6000 is not set -# CONFIG_DVB_STB6100 is not set -# CONFIG_DVB_STV0288 is not set -# CONFIG_DVB_STV0297 is not set -# CONFIG_DVB_STV0299 is not set -# CONFIG_DVB_STV0367 is not set -# CONFIG_DVB_STV0900 is not set -# CONFIG_DVB_STV090x is not set -# CONFIG_DVB_STV0910 is not set -# CONFIG_DVB_STV6110 is not set -# CONFIG_DVB_STV6110x is not set -# CONFIG_DVB_STV6111 is not set -# CONFIG_DVB_TC90522 is not set -# CONFIG_DVB_TDA10021 is not set -# CONFIG_DVB_TDA10023 is not set -# CONFIG_DVB_TDA10048 is not set -# CONFIG_DVB_TDA1004X is not set -# CONFIG_DVB_TDA10071 is not set -# CONFIG_DVB_TDA10086 is not set -# CONFIG_DVB_TDA18271C2DD is not set -# CONFIG_DVB_TDA665x is not set -# CONFIG_DVB_TDA8083 is not set -# CONFIG_DVB_TDA8261 is not set -# CONFIG_DVB_TDA826X is not set -# CONFIG_DVB_TEST_DRIVERS is not set -# CONFIG_DVB_TS2020 is not set -# CONFIG_DVB_TTUSB_BUDGET is not set -# CONFIG_DVB_TTUSB_DEC is not set -# CONFIG_DVB_TUA6100 is not set -# CONFIG_DVB_TUNER_CX24113 is not set -# CONFIG_DVB_TUNER_DIB0070 is not set -# CONFIG_DVB_TUNER_DIB0090 is not set -# CONFIG_DVB_TUNER_ITD1000 is not set -# CONFIG_DVB_ULE_DEBUG is not set -# CONFIG_DVB_USB_V2 is not set -# CONFIG_DVB_VES1820 is not set -# CONFIG_DVB_VES1X93 is not set -# CONFIG_DVB_ZD1301_DEMOD is not set -# CONFIG_DVB_ZL10036 is not set -# CONFIG_DVB_ZL10039 is not set -# CONFIG_DVB_ZL10353 is not set -# CONFIG_DWC_XLGMAC is not set -# CONFIG_DWMAC_DWC_QOS_ETH is not set -# CONFIG_DWMAC_INTEL_PLAT is not set -# CONFIG_DWMAC_IPQ806X is not set -# CONFIG_DWMAC_LOONGSON is not set -# CONFIG_DWMAC_LPC18XX is not set -# CONFIG_DWMAC_MESON is not set -# CONFIG_DWMAC_ROCKCHIP is not set -# CONFIG_DWMAC_SOCFPGA is not set -# CONFIG_DWMAC_STI is not set -# CONFIG_DW_AXI_DMAC is not set -# CONFIG_DW_DMAC is not set -# CONFIG_DW_DMAC_PCI is not set -# CONFIG_DW_EDMA is not set -# CONFIG_DW_EDMA_PCIE is not set -# CONFIG_DW_WATCHDOG is not set -# CONFIG_DW_XDATA_PCIE is not set -# CONFIG_DYNAMIC_DEBUG is not set -CONFIG_DYNAMIC_DEBUG_CORE=y -# CONFIG_E100 is not set -# CONFIG_E1000 is not set -# CONFIG_E1000E is not set -# CONFIG_E1000E_HWTS is not set -# CONFIG_EARLY_PRINTK_8250 is not set -# CONFIG_EARLY_PRINTK_USB_XDBC is not set -# CONFIG_EBC_C384_WDT is not set -# CONFIG_ECHO is not set -# CONFIG_ECRYPT_FS is not set -# CONFIG_EDAC is not set -# CONFIG_EEEPC_LAPTOP is not set -# CONFIG_EEPROM_93CX6 is not set -# CONFIG_EEPROM_93XX46 is not set -# CONFIG_EEPROM_AT24 is not set -# CONFIG_EEPROM_AT25 is not set -# CONFIG_EEPROM_DIGSY_MTC_CFG is not set -# CONFIG_EEPROM_EE1004 is not set -# CONFIG_EEPROM_IDT_89HPESX is not set -# CONFIG_EEPROM_LEGACY is not set -# CONFIG_EEPROM_MAX6875 is not set -# CONFIG_EFI is not set -CONFIG_EFI_PARTITION=y -# CONFIG_EFS_FS is not set -CONFIG_ELFCORE=y -# CONFIG_ELF_CORE is not set -# CONFIG_EMAC_ROCKCHIP is not set -CONFIG_EMBEDDED=y -# CONFIG_EM_TIMER_STI is not set -# CONFIG_ENABLE_MUST_CHECK is not set -CONFIG_ENABLE_WARN_DEPRECATED=y -# CONFIG_ENA_ETHERNET is not set -# CONFIG_ENC28J60 is not set -# CONFIG_ENCLOSURE_SERVICES is not set -# CONFIG_ENCRYPTED_KEYS is not set -# CONFIG_ENCX24J600 is not set -# CONFIG_ENERGY_MODEL is not set -# CONFIG_ENIC is not set -# CONFIG_ENVELOPE_DETECTOR is not set -# CONFIG_EPAPR_PARAVIRT is not set -# CONFIG_EPIC100 is not set -CONFIG_EPOLL=y -# CONFIG_EQUALIZER is not set -# CONFIG_EROFS_FS is not set -# CONFIG_ET131X is not set -CONFIG_ETHERNET=y -# CONFIG_ETHOC is not set -CONFIG_ETHTOOL_NETLINK=y -CONFIG_EVENTFD=y -# CONFIG_EVM is not set -# CONFIG_EXCLUSIVE_SYSTEM_RAM is not set -# CONFIG_EXFAT_FS is not set -CONFIG_EXPERT=y -CONFIG_EXPORTFS=y -# CONFIG_EXPORTFS_BLOCK_OPS is not set -# CONFIG_EXT2_FS is not set -CONFIG_EXT2_FS_XATTR=y -# CONFIG_EXT3_FS is not set -# CONFIG_EXT4_DEBUG is not set -# CONFIG_EXT4_ENCRYPTION is not set -# CONFIG_EXT4_FS is not set -# CONFIG_EXT4_FS_POSIX_ACL is not set -# CONFIG_EXT4_FS_SECURITY is not set -CONFIG_EXT4_USE_FOR_EXT2=y -# CONFIG_EXTCON is not set -# CONFIG_EXTCON_ADC_JACK is not set -# CONFIG_EXTCON_ARIZONA is not set -# CONFIG_EXTCON_AXP288 is not set -# CONFIG_EXTCON_FSA9480 is not set -# CONFIG_EXTCON_GPIO is not set -# CONFIG_EXTCON_INTEL_INT3496 is not set -# CONFIG_EXTCON_MAX3355 is not set -# CONFIG_EXTCON_PTN5150 is not set -# CONFIG_EXTCON_QCOM_SPMI_MISC is not set -# CONFIG_EXTCON_RT8973A is not set -# CONFIG_EXTCON_SM5502 is not set -# CONFIG_EXTCON_USBC_TUSB320 is not set -# CONFIG_EXTCON_USB_GPIO is not set -CONFIG_EXTRA_FIRMWARE="" -CONFIG_EXTRA_TARGETS="" -# CONFIG_EXYNOS_ADC is not set -# CONFIG_EXYNOS_VIDEO is not set -# CONFIG_EZCHIP_NPS_MANAGEMENT_ENET is not set -# CONFIG_EZX_PCAP is not set -# CONFIG_F2FS_CHECK_FS is not set -# CONFIG_F2FS_FAULT_INJECTION is not set -# CONFIG_F2FS_FS is not set -# CONFIG_F2FS_FS_COMPRESSION is not set -# CONFIG_F2FS_FS_ENCRYPTION is not set -# CONFIG_F2FS_FS_POSIX_ACL is not set -# CONFIG_F2FS_FS_SECURITY is not set -CONFIG_F2FS_FS_XATTR=y -# CONFIG_F2FS_IOSTAT is not set -# CONFIG_F2FS_IO_TRACE is not set -CONFIG_F2FS_STAT_FS=y -# CONFIG_F2FS_UNFAIR_RWSEM is not set -# CONFIG_FAILOVER is not set -# CONFIG_FAIR_GROUP_SCHED is not set -# CONFIG_FANOTIFY is not set -# CONFIG_FANOTIFY_ACCESS_PERMISSIONS is not set -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_FAT_DEFAULT_UTF8 is not set -# CONFIG_FAT_FS is not set -# CONFIG_FAULT_INJECTION is not set -# CONFIG_FB is not set -# CONFIG_FB_3DFX is not set -# CONFIG_FB_ARC is not set -# CONFIG_FB_ARK is not set -# CONFIG_FB_ARMCLCD is not set -# CONFIG_FB_ASILIANT is not set -# CONFIG_FB_ATY is not set -# CONFIG_FB_ATY128 is not set -# CONFIG_FB_AUO_K190X is not set -# CONFIG_FB_BACKLIGHT is not set -# CONFIG_FB_BIG_ENDIAN is not set -# CONFIG_FB_BOOT_VESA_SUPPORT is not set -# CONFIG_FB_BOTH_ENDIAN is not set -# CONFIG_FB_BROADSHEET is not set -# CONFIG_FB_CARMINE is not set -# CONFIG_FB_CFB_COPYAREA is not set -# CONFIG_FB_CFB_FILLRECT is not set -# CONFIG_FB_CFB_IMAGEBLIT is not set -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -# CONFIG_FB_CIRRUS is not set -# CONFIG_FB_CYBER2000 is not set -# CONFIG_FB_DA8XX is not set -# CONFIG_FB_DDC is not set -# CONFIG_FB_FLEX is not set -# CONFIG_FB_FOREIGN_ENDIAN is not set -# CONFIG_FB_GEODE is not set -# CONFIG_FB_GOLDFISH is not set -# CONFIG_FB_HGA is not set -# CONFIG_FB_I740 is not set -# CONFIG_FB_IBM_GXT4500 is not set -# CONFIG_FB_IMSTT is not set -# CONFIG_FB_IMX is not set -# CONFIG_FB_KYRO is not set -# CONFIG_FB_LE80578 is not set -# CONFIG_FB_LITTLE_ENDIAN is not set -# CONFIG_FB_MACMODES is not set -# CONFIG_FB_MATROX is not set -# CONFIG_FB_MB862XX is not set -# CONFIG_FB_METRONOME is not set -# CONFIG_FB_MODE_HELPERS is not set -# CONFIG_FB_MXS is not set -# CONFIG_FB_N411 is not set -# CONFIG_FB_NEOMAGIC is not set -CONFIG_FB_NOTIFY=y -# CONFIG_FB_NVIDIA is not set -# CONFIG_FB_OF is not set -# CONFIG_FB_OMAP2 is not set -# CONFIG_FB_OPENCORES is not set -# CONFIG_FB_PM2 is not set -# CONFIG_FB_PM3 is not set -# CONFIG_FB_PS3 is not set -# CONFIG_FB_PXA is not set -# CONFIG_FB_RADEON is not set -# CONFIG_FB_RIVA is not set -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_S3 is not set -# CONFIG_FB_SAVAGE is not set -# CONFIG_FB_SIMPLE is not set -# CONFIG_FB_SIS is not set -# CONFIG_FB_SM712 is not set -# CONFIG_FB_SM750 is not set -# CONFIG_FB_SMSCUFX is not set -# CONFIG_FB_SSD1307 is not set -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_SYS_COPYAREA is not set -# CONFIG_FB_SYS_FILLRECT is not set -# CONFIG_FB_SYS_FOPS is not set -# CONFIG_FB_SYS_IMAGEBLIT is not set -# CONFIG_FB_TFT is not set -# CONFIG_FB_TFT_AGM1264K_FL is not set -# CONFIG_FB_TFT_BD663474 is not set -# CONFIG_FB_TFT_FBTFT_DEVICE is not set -# CONFIG_FB_TFT_HX8340BN is not set -# CONFIG_FB_TFT_HX8347D is not set -# CONFIG_FB_TFT_HX8353D is not set -# CONFIG_FB_TFT_HX8357D is not set -# CONFIG_FB_TFT_ILI9163 is not set -# CONFIG_FB_TFT_ILI9320 is not set -# CONFIG_FB_TFT_ILI9325 is not set -# CONFIG_FB_TFT_ILI9340 is not set -# CONFIG_FB_TFT_ILI9341 is not set -# CONFIG_FB_TFT_ILI9481 is not set -# CONFIG_FB_TFT_ILI9486 is not set -# CONFIG_FB_TFT_PCD8544 is not set -# CONFIG_FB_TFT_RA8875 is not set -# CONFIG_FB_TFT_S6D02A1 is not set -# CONFIG_FB_TFT_S6D1121 is not set -# CONFIG_FB_TFT_SEPS525 is not set -# CONFIG_FB_TFT_SH1106 is not set -# CONFIG_FB_TFT_SSD1289 is not set -# CONFIG_FB_TFT_SSD1305 is not set -# CONFIG_FB_TFT_SSD1306 is not set -# CONFIG_FB_TFT_SSD1325 is not set -# CONFIG_FB_TFT_SSD1331 is not set -# CONFIG_FB_TFT_SSD1351 is not set -# CONFIG_FB_TFT_ST7735R is not set -# CONFIG_FB_TFT_ST7789V is not set -# CONFIG_FB_TFT_TINYLCD is not set -# CONFIG_FB_TFT_TLS8204 is not set -# CONFIG_FB_TFT_UC1611 is not set -# CONFIG_FB_TFT_UC1701 is not set -# CONFIG_FB_TFT_UPD161704 is not set -# CONFIG_FB_TFT_WATTEROTT is not set -# CONFIG_FB_TILEBLITTING is not set -# CONFIG_FB_TMIO is not set -# CONFIG_FB_TRIDENT is not set -# CONFIG_FB_UDL is not set -# CONFIG_FB_UVESA is not set -# CONFIG_FB_VGA16 is not set -# CONFIG_FB_VIA is not set -# CONFIG_FB_VIRTUAL is not set -# CONFIG_FB_VOODOO1 is not set -# CONFIG_FB_VT8623 is not set -# CONFIG_FB_XGI is not set -# CONFIG_FCOE is not set -# CONFIG_FCOE_FNIC is not set -# CONFIG_FDDI is not set -# CONFIG_FEALNX is not set -# CONFIG_FENCE_TRACE is not set -# CONFIG_FHANDLE is not set -CONFIG_FIB_RULES=y -# CONFIG_FIELDBUS_DEV is not set -CONFIG_FILE_LOCKING=y -# CONFIG_FIND_BIT_BENCHMARK is not set -# CONFIG_FIREWIRE is not set -# CONFIG_FIREWIRE_NOSY is not set -# CONFIG_FIREWIRE_SERIAL is not set -# CONFIG_FIRMWARE_EDID is not set -# CONFIG_FIRMWARE_IN_KERNEL is not set -# CONFIG_FIRMWARE_MEMMAP is not set -# CONFIG_FIT_PARTITION is not set -# CONFIG_FIXED_PHY is not set -CONFIG_FLATMEM=y -CONFIG_FLATMEM_MANUAL=y -CONFIG_FLAT_NODE_MEM_MAP=y -# CONFIG_FM10K is not set -# CONFIG_FMC is not set -# CONFIG_FONTS is not set -# CONFIG_FONT_6x8 is not set -# CONFIG_FONT_TER16x32 is not set -# CONFIG_FORCEDETH is not set -CONFIG_FORCE_MAX_ZONEORDER=11 -CONFIG_FORTIFY_SOURCE=y -# CONFIG_FPGA is not set -# CONFIG_FRAMEBUFFER_CONSOLE is not set -# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set -# CONFIG_FRAME_POINTER is not set -CONFIG_FRAME_WARN=1024 -# CONFIG_FREEZER is not set -# CONFIG_FRONTSWAP is not set -# CONFIG_FSCACHE is not set -# CONFIG_FSI is not set -# CONFIG_FSL_EDMA is not set -# CONFIG_FSL_ERRATUM_A008585 is not set -# CONFIG_FSL_MC_BUS is not set -# CONFIG_FSL_PQ_MDIO is not set -# CONFIG_FSL_QDMA is not set -# CONFIG_FSL_RCPM is not set -# CONFIG_FSL_XGMAC_MDIO is not set -CONFIG_FSNOTIFY=y -# CONFIG_FS_DAX is not set -# CONFIG_FS_ENCRYPTION is not set -# CONFIG_FS_POSIX_ACL is not set -# CONFIG_FS_VERITY is not set -# CONFIG_FTGMAC100 is not set -# CONFIG_FTL is not set -# CONFIG_FTMAC100 is not set -# CONFIG_FTRACE is not set -# CONFIG_FTRACE_STARTUP_TEST is not set -# CONFIG_FTR_FIXUP_SELFTEST is not set -# CONFIG_FTWDT010_WATCHDOG is not set -# CONFIG_FUJITSU_ERRATUM_010001 is not set -# CONFIG_FUJITSU_ES is not set -# CONFIG_FUJITSU_LAPTOP is not set -# CONFIG_FUJITSU_TABLET is not set -# CONFIG_FUNCTION_TRACER is not set -# CONFIG_FUSE_FS is not set -# CONFIG_FUSION is not set -# CONFIG_FUSION_FC is not set -# CONFIG_FUSION_SAS is not set -# CONFIG_FUSION_SPI is not set -CONFIG_FUTEX=y -CONFIG_FUTEX_PI=y -# CONFIG_FWNODE_MDIO is not set -# CONFIG_FW_CFG_SYSFS is not set -CONFIG_FW_LOADER=y -# CONFIG_FW_LOADER_COMPRESS is not set -CONFIG_FW_LOADER_USER_HELPER=y -CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y -# CONFIG_FXAS21002C is not set -# CONFIG_FXLS8962AF_I2C is not set -# CONFIG_FXLS8962AF_SPI is not set -# CONFIG_FXOS8700_I2C is not set -# CONFIG_FXOS8700_SPI is not set -CONFIG_GACT_PROB=y -# CONFIG_GADGET_UAC1 is not set -# CONFIG_GAMEPORT is not set -# CONFIG_GATEWORKS_GW16083 is not set -# CONFIG_GCC_PLUGINS is not set -# CONFIG_GCOV is not set -# CONFIG_GCOV_KERNEL is not set -# CONFIG_GDB_SCRIPTS is not set -# CONFIG_GEMINI_ETHERNET is not set -# CONFIG_GENERIC_ADC_BATTERY is not set -# CONFIG_GENERIC_ADC_THERMAL is not set -CONFIG_GENERIC_CALIBRATE_DELAY=y -# CONFIG_GENERIC_CPU_DEVICES is not set -# CONFIG_GENERIC_FIND_FIRST_BIT is not set -CONFIG_GENERIC_HWEIGHT=y -# CONFIG_GENERIC_IRQ_DEBUGFS is not set -CONFIG_GENERIC_IRQ_IPI=y -CONFIG_GENERIC_IRQ_PROBE=y -# CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED is not set -CONFIG_GENERIC_NET_UTILS=y -# CONFIG_GENERIC_PHY is not set -# CONFIG_GENERIC_PINCONF is not set -# CONFIG_GENERIC_PINCTRL_GROUPS is not set -# CONFIG_GENERIC_PINMUX_FUNCTIONS is not set -CONFIG_GENERIC_PTDUMP=y -CONFIG_GENERIC_VDSO_TIME_NS=y -# CONFIG_GENEVE is not set -# CONFIG_GENWQE is not set -# CONFIG_GFS2_FS is not set -# CONFIG_GIGASET_CAPI is not set -# CONFIG_GIGASET_DEBUG is not set -# CONFIG_GIGASET_DUMMYLL is not set -# CONFIG_GLOB_SELFTEST is not set -# CONFIG_GNSS is not set -# CONFIG_GOLDFISH is not set -# CONFIG_GOOGLE_FIRMWARE is not set -# CONFIG_GP2AP002 is not set -# CONFIG_GP2AP020A00F is not set -# CONFIG_GPD_POCKET_FAN is not set -# CONFIG_GPIOLIB is not set -CONFIG_GPIOLIB_FASTPATH_LIMIT=512 -# CONFIG_GPIO_104_DIO_48E is not set -# CONFIG_GPIO_104_IDIO_16 is not set -# CONFIG_GPIO_104_IDI_48 is not set -# CONFIG_GPIO_74X164 is not set -# CONFIG_GPIO_74XX_MMIO is not set -# CONFIG_GPIO_ADNP is not set -# CONFIG_GPIO_ADP5588 is not set -# CONFIG_GPIO_AGGREGATOR is not set -# CONFIG_GPIO_ALTERA is not set -# CONFIG_GPIO_AMD8111 is not set -# CONFIG_GPIO_AMDPT is not set -# CONFIG_GPIO_AMD_FCH is not set -# CONFIG_GPIO_BCM_KONA is not set -# CONFIG_GPIO_BT8XX is not set -# CONFIG_GPIO_CADENCE is not set -# CONFIG_GPIO_CDEV is not set -# CONFIG_GPIO_CDEV_V1 is not set -# CONFIG_GPIO_CS5535 is not set -# CONFIG_GPIO_DWAPB is not set -# CONFIG_GPIO_EM is not set -# CONFIG_GPIO_EXAR is not set -# CONFIG_GPIO_F7188X is not set -# CONFIG_GPIO_FTGPIO010 is not set -# CONFIG_GPIO_GENERIC_PLATFORM is not set -# CONFIG_GPIO_GPIO_MM is not set -# CONFIG_GPIO_GRGPIO is not set -# CONFIG_GPIO_GW_PLD is not set -# CONFIG_GPIO_HLWD is not set -# CONFIG_GPIO_ICH is not set -# CONFIG_GPIO_IT87 is not set -# CONFIG_GPIO_LOGICVC is not set -# CONFIG_GPIO_LYNXPOINT is not set -# CONFIG_GPIO_MAX3191X is not set -# CONFIG_GPIO_MAX7300 is not set -# CONFIG_GPIO_MAX7301 is not set -# CONFIG_GPIO_MAX732X is not set -# CONFIG_GPIO_MB86S7X is not set -# CONFIG_GPIO_MC33880 is not set -# CONFIG_GPIO_MCP23S08 is not set -# CONFIG_GPIO_ML_IOH is not set -# CONFIG_GPIO_MOCKUP is not set -# CONFIG_GPIO_MPC8XXX is not set -# CONFIG_GPIO_PCA953X is not set -# CONFIG_GPIO_PCA953X_IRQ is not set -# CONFIG_GPIO_PCA9570 is not set -# CONFIG_GPIO_PCF857X is not set -# CONFIG_GPIO_PCH is not set -# CONFIG_GPIO_PCIE_IDIO_24 is not set -# CONFIG_GPIO_PCI_IDIO_16 is not set -# CONFIG_GPIO_PISOSR is not set -# CONFIG_GPIO_PL061 is not set -# CONFIG_GPIO_RCAR is not set -# CONFIG_GPIO_RDC321X is not set -# CONFIG_GPIO_ROCKCHIP is not set -# CONFIG_GPIO_SAMA5D2_PIOBU is not set -# CONFIG_GPIO_SCH is not set -# CONFIG_GPIO_SCH311X is not set -# CONFIG_GPIO_SIFIVE is not set -# CONFIG_GPIO_SX150X is not set -# CONFIG_GPIO_SYSCON is not set -CONFIG_GPIO_SYSFS=y -# CONFIG_GPIO_TPIC2810 is not set -# CONFIG_GPIO_TS4900 is not set -# CONFIG_GPIO_TS5500 is not set -# CONFIG_GPIO_VX855 is not set -# CONFIG_GPIO_WATCHDOG is not set -# CONFIG_GPIO_WINBOND is not set -# CONFIG_GPIO_WS16C48 is not set -# CONFIG_GPIO_XGENE is not set -# CONFIG_GPIO_XILINX is not set -# CONFIG_GPIO_XRA1403 is not set -# CONFIG_GPIO_ZEVIO is not set -# CONFIG_GPIO_ZX is not set -# CONFIG_GREENASIA_FF is not set -# CONFIG_GREYBUS is not set -# CONFIG_GS_FPGABOOT is not set -# CONFIG_GTP is not set -# CONFIG_GUP_BENCHMARK is not set -# CONFIG_GUP_TEST is not set -# CONFIG_GVE is not set -# CONFIG_HABANA_AI is not set -# CONFIG_HAMACHI is not set -# CONFIG_HAMRADIO is not set -# CONFIG_HAPPYMEAL is not set -CONFIG_HARDENED_USERCOPY=y -# CONFIG_HARDENED_USERCOPY_FALLBACK is not set -# CONFIG_HARDENED_USERCOPY_PAGESPAN is not set -CONFIG_HARDEN_EL2_VECTORS=y -# CONFIG_HARDLOCKUP_DETECTOR is not set -# CONFIG_HAVE_ARM_ARCH_TIMER is not set -# CONFIG_HCALL_STATS is not set -# CONFIG_HDC100X is not set -# CONFIG_HDC2010 is not set -# CONFIG_HDLC is not set -# CONFIG_HDLC_CISCO is not set -# CONFIG_HDLC_FR is not set -# CONFIG_HDLC_PPP is not set -# CONFIG_HDLC_RAW is not set -# CONFIG_HDLC_RAW_ETH is not set -# CONFIG_HDMI_LPE_AUDIO is not set -# CONFIG_HDQ_MASTER_OMAP is not set -# CONFIG_HEADERS_CHECK is not set -# CONFIG_HEADERS_INSTALL is not set -# CONFIG_HEADER_TEST is not set -# CONFIG_HERMES is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_HFSPLUS_FS_POSIX_ACL is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFS_FS_POSIX_ACL is not set -# CONFIG_HI8435 is not set -# CONFIG_HIBERNATION is not set -# CONFIG_HID is not set -# CONFIG_HIDRAW is not set -# CONFIG_HID_A4TECH is not set -# CONFIG_HID_ACCUTOUCH is not set -# CONFIG_HID_ACRUX is not set -# CONFIG_HID_ACRUX_FF is not set -# CONFIG_HID_ALPS is not set -# CONFIG_HID_APPLE is not set -# CONFIG_HID_APPLEIR is not set -# CONFIG_HID_ASUS is not set -# CONFIG_HID_AUREAL is not set -# CONFIG_HID_BATTERY_STRENGTH is not set -# CONFIG_HID_BELKIN is not set -# CONFIG_HID_BETOP_FF is not set -# CONFIG_HID_BIGBEN_FF is not set -# CONFIG_HID_CHERRY is not set -# CONFIG_HID_CHICONY is not set -# CONFIG_HID_CMEDIA is not set -# CONFIG_HID_CORSAIR is not set -# CONFIG_HID_COUGAR is not set -# CONFIG_HID_CP2112 is not set -# CONFIG_HID_CREATIVE_SB0540 is not set -# CONFIG_HID_CYPRESS is not set -# CONFIG_HID_DRAGONRISE is not set -# CONFIG_HID_ELAN is not set -# CONFIG_HID_ELECOM is not set -# CONFIG_HID_ELO is not set -# CONFIG_HID_EMS_FF is not set -# CONFIG_HID_EZKEY is not set -# CONFIG_HID_FT260 is not set -# CONFIG_HID_GEMBIRD is not set -# CONFIG_HID_GENERIC is not set -# CONFIG_HID_GFRM is not set -# CONFIG_HID_GLORIOUS is not set -# CONFIG_HID_GOOGLE_HAMMER is not set -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_GT683R is not set -# CONFIG_HID_GYRATION is not set -# CONFIG_HID_HOLTEK is not set -# CONFIG_HID_ICADE is not set -# CONFIG_HID_ITE is not set -# CONFIG_HID_JABRA is not set -# CONFIG_HID_KENSINGTON is not set -# CONFIG_HID_KEYTOUCH is not set -# CONFIG_HID_KYE is not set -# CONFIG_HID_LCPOWER is not set -# CONFIG_HID_LED is not set -# CONFIG_HID_LENOVO is not set -# CONFIG_HID_LETSKETCH is not set -# CONFIG_HID_LOGITECH is not set -# CONFIG_HID_LOGITECH_DJ is not set -# CONFIG_HID_LOGITECH_HIDPP is not set -# CONFIG_HID_MACALLY is not set -# CONFIG_HID_MAGICMOUSE is not set -# CONFIG_HID_MALTRON is not set -# CONFIG_HID_MAYFLASH is not set -# CONFIG_HID_MCP2221 is not set -# CONFIG_HID_MICROSOFT is not set -# CONFIG_HID_MONTEREY is not set -# CONFIG_HID_MULTITOUCH is not set -# CONFIG_HID_NINTENDO is not set -# CONFIG_HID_NTI is not set -# CONFIG_HID_NTRIG is not set -# CONFIG_HID_ORTEK is not set -# CONFIG_HID_PANTHERLORD is not set -# CONFIG_HID_PENMOUNT is not set -# CONFIG_HID_PETALYNX is not set -# CONFIG_HID_PICOLCD is not set -# CONFIG_HID_PID is not set -# CONFIG_HID_PLANTRONICS is not set -# CONFIG_HID_PLAYSTATION is not set -# CONFIG_HID_PRIMAX is not set -# CONFIG_HID_PRODIKEYS is not set -# CONFIG_HID_RAZER is not set -# CONFIG_HID_REDRAGON is not set -# CONFIG_HID_RETRODE is not set -# CONFIG_HID_RMI is not set -# CONFIG_HID_ROCCAT is not set -# CONFIG_HID_SAITEK is not set -# CONFIG_HID_SAMSUNG is not set -# CONFIG_HID_SEMITEK is not set -# CONFIG_HID_SENSOR_HUB is not set -# CONFIG_HID_SIGMAMICRO is not set -# CONFIG_HID_SMARTJOYPLUS is not set -# CONFIG_HID_SONY is not set -# CONFIG_HID_SPEEDLINK is not set -# CONFIG_HID_STEAM is not set -# CONFIG_HID_STEELSERIES is not set -# CONFIG_HID_SUNPLUS is not set -# CONFIG_HID_THINGM is not set -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_TIVO is not set -# CONFIG_HID_TOPSEED is not set -# CONFIG_HID_TWINHAN is not set -# CONFIG_HID_U2FZERO is not set -# CONFIG_HID_UCLOGIC is not set -# CONFIG_HID_UDRAW_PS3 is not set -# CONFIG_HID_VIEWSONIC is not set -# CONFIG_HID_VIVALDI is not set -# CONFIG_HID_WACOM is not set -# CONFIG_HID_WALTOP is not set -# CONFIG_HID_WIIMOTE is not set -# CONFIG_HID_XIAOM is not set -# CONFIG_HID_XIAOMI is not set -# CONFIG_HID_XINMO is not set -# CONFIG_HID_ZEROPLUS is not set -# CONFIG_HID_ZYDACRON is not set -# CONFIG_HIGHMEM is not set -CONFIG_HIGH_RES_TIMERS=y -# CONFIG_HINIC is not set -# CONFIG_HIP04_ETH is not set -# CONFIG_HIPPI is not set -# CONFIG_HISILICON_ERRATUM_161010101 is not set -# CONFIG_HISILICON_ERRATUM_161600802 is not set -# CONFIG_HISI_DMA is not set -# CONFIG_HISI_FEMAC is not set -# CONFIG_HISI_HIKEY_USB is not set -# CONFIG_HIX5HD2_GMAC is not set -# CONFIG_HMC425 is not set -# CONFIG_HMC6352 is not set -# CONFIG_HNS is not set -# CONFIG_HNS3 is not set -# CONFIG_HNS_DSAF is not set -# CONFIG_HNS_ENET is not set -# CONFIG_HOSTAP is not set -# CONFIG_HOSTAP_CS is not set -# CONFIG_HOSTAP_PCI is not set -# CONFIG_HOSTAP_PLX is not set -# CONFIG_HOTPLUG_CPU is not set -# CONFIG_HOTPLUG_PCI is not set -# CONFIG_HOTPLUG_PCI_SHPC is not set -# CONFIG_HP03 is not set -# CONFIG_HP100 is not set -# CONFIG_HP206C is not set -CONFIG_HPET_MMAP_DEFAULT=y -# CONFIG_HPFS_FS is not set -# CONFIG_HP_ILO is not set -# CONFIG_HP_WIRELESS is not set -# CONFIG_HSA_AMD is not set -# CONFIG_HSI is not set -# CONFIG_HSR is not set -# CONFIG_HTC_EGPIO is not set -# CONFIG_HTC_I2CPLD is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_HTS221 is not set -# CONFIG_HTU21 is not set -# CONFIG_HUGETLBFS is not set -# CONFIG_HUGETLB_PAGE is not set -# CONFIG_HVC_DCC is not set -# CONFIG_HVC_UDBG is not set -# CONFIG_HWLAT_TRACER is not set -# CONFIG_HWMON is not set -# CONFIG_HWMON_DEBUG_CHIP is not set -# CONFIG_HWMON_VID is not set -# CONFIG_HWSPINLOCK is not set -# CONFIG_HWSPINLOCK_OMAP is not set -CONFIG_HW_PERF_EVENTS=y -# CONFIG_HW_RANDOM is not set -# CONFIG_HW_RANDOM_AMD is not set -# CONFIG_HW_RANDOM_ATMEL is not set -# CONFIG_HW_RANDOM_BA431 is not set -# CONFIG_HW_RANDOM_CAVIUM is not set -# CONFIG_HW_RANDOM_CCTRNG is not set -# CONFIG_HW_RANDOM_EXYNOS is not set -# CONFIG_HW_RANDOM_GEODE is not set -# CONFIG_HW_RANDOM_INTEL is not set -# CONFIG_HW_RANDOM_IPROC_RNG200 is not set -# CONFIG_HW_RANDOM_MTK is not set -# CONFIG_HW_RANDOM_OMAP is not set -# CONFIG_HW_RANDOM_OMAP3_ROM is not set -# CONFIG_HW_RANDOM_PPC4XX is not set -# CONFIG_HW_RANDOM_TIMERIOMEM is not set -CONFIG_HW_RANDOM_TPM=y -# CONFIG_HW_RANDOM_VIA is not set -# CONFIG_HW_RANDOM_VIRTIO is not set -# CONFIG_HW_RANDOM_XIPHERA is not set -# CONFIG_HX711 is not set -# CONFIG_HYPERV is not set -# CONFIG_HYPERV_TSCPAGE is not set -# CONFIG_HYSDN is not set -CONFIG_HZ=100 -CONFIG_HZ_100=y -# CONFIG_HZ_1000 is not set -# CONFIG_HZ_1024 is not set -# CONFIG_HZ_128 is not set -# CONFIG_HZ_200 is not set -# CONFIG_HZ_24 is not set -# CONFIG_HZ_250 is not set -# CONFIG_HZ_256 is not set -# CONFIG_HZ_300 is not set -# CONFIG_HZ_48 is not set -# CONFIG_HZ_500 is not set -# CONFIG_HZ_PERIODIC is not set -# CONFIG_I2C is not set -# CONFIG_I2C_ALGOBIT is not set -# CONFIG_I2C_ALGOPCA is not set -# CONFIG_I2C_ALGOPCF is not set -# CONFIG_I2C_ALI1535 is not set -# CONFIG_I2C_ALI1563 is not set -# CONFIG_I2C_ALI15X3 is not set -# CONFIG_I2C_AMD756 is not set -# CONFIG_I2C_AMD8111 is not set -# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set -# CONFIG_I2C_AU1550 is not set -# CONFIG_I2C_BCM2835 is not set -# CONFIG_I2C_BCM_IPROC is not set -# CONFIG_I2C_CADENCE is not set -# CONFIG_I2C_CBUS_GPIO is not set -# CONFIG_I2C_CHARDEV is not set -# CONFIG_I2C_COMPAT is not set -# CONFIG_I2C_CP2615 is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEMUX_PINCTRL is not set -# CONFIG_I2C_DESIGNWARE_PCI is not set -# CONFIG_I2C_DESIGNWARE_PLATFORM is not set -# CONFIG_I2C_DESIGNWARE_SLAVE is not set -# CONFIG_I2C_DIOLAN_U2C is not set -# CONFIG_I2C_EG20T is not set -# CONFIG_I2C_ELEKTOR is not set -# CONFIG_I2C_EMEV2 is not set -# CONFIG_I2C_GPIO is not set -# CONFIG_I2C_GPIO_FAULT_INJECTOR is not set -# CONFIG_I2C_HELPER_AUTO is not set -# CONFIG_I2C_HID is not set -# CONFIG_I2C_HID_OF is not set -# CONFIG_I2C_HID_OF_GOODIX is not set -# CONFIG_I2C_HISI is not set -# CONFIG_I2C_I801 is not set -# CONFIG_I2C_IBM_IIC is not set -# CONFIG_I2C_IMG is not set -# CONFIG_I2C_ISCH is not set -# CONFIG_I2C_ISMT is not set -# CONFIG_I2C_JZ4780 is not set -# CONFIG_I2C_MLXCPLD is not set -# CONFIG_I2C_MPC is not set -# CONFIG_I2C_MT65XX is not set -# CONFIG_I2C_MUX is not set -# CONFIG_I2C_MUX_GPIO is not set -# CONFIG_I2C_MUX_GPMUX is not set -# CONFIG_I2C_MUX_LTC4306 is not set -# CONFIG_I2C_MUX_MLXCPLD is not set -# CONFIG_I2C_MUX_PCA9541 is not set -# CONFIG_I2C_MUX_PCA954x is not set -# CONFIG_I2C_MUX_PINCTRL is not set -# CONFIG_I2C_MUX_REG is not set -# CONFIG_I2C_MV64XXX is not set -# CONFIG_I2C_NFORCE2 is not set -# CONFIG_I2C_NOMADIK is not set -# CONFIG_I2C_NVIDIA_GPU is not set -# CONFIG_I2C_OCORES is not set -# CONFIG_I2C_OCTEON is not set -# CONFIG_I2C_PARPORT is not set -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_PCA_ISA is not set -# CONFIG_I2C_PCA_PLATFORM is not set -# CONFIG_I2C_PIIX4 is not set -# CONFIG_I2C_PXA_PCI is not set -# CONFIG_I2C_PXA_SLAVE is not set -# CONFIG_I2C_RCAR is not set -# CONFIG_I2C_RK3X is not set -# CONFIG_I2C_ROBOTFUZZ_OSIF is not set -# CONFIG_I2C_S3C2410 is not set -# CONFIG_I2C_SCMI is not set -# CONFIG_I2C_SH_MOBILE is not set -# CONFIG_I2C_SIMTEC is not set -# CONFIG_I2C_SIS5595 is not set -# CONFIG_I2C_SIS630 is not set -# CONFIG_I2C_SIS96X is not set -# CONFIG_I2C_SLAVE is not set -# CONFIG_I2C_SLAVE_EEPROM is not set -# CONFIG_I2C_SMBUS is not set -# CONFIG_I2C_STUB is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_THUNDERX is not set -# CONFIG_I2C_TINY_USB is not set -# CONFIG_I2C_VERSATILE is not set -# CONFIG_I2C_VIA is not set -# CONFIG_I2C_VIAPRO is not set -# CONFIG_I2C_VIRTIO is not set -# CONFIG_I2C_XILINX is not set -# CONFIG_I3C is not set -# CONFIG_I40E is not set -# CONFIG_I40EVF is not set -# CONFIG_I6300ESB_WDT is not set -# CONFIG_I82092 is not set -# CONFIG_I82365 is not set -# CONFIG_IAQCORE is not set -# CONFIG_IBM_ASM is not set -# CONFIG_IBM_EMAC_DEBUG is not set -# CONFIG_IBM_EMAC_EMAC4 is not set -# CONFIG_IBM_EMAC_MAL_CLR_ICINTSTAT is not set -# CONFIG_IBM_EMAC_MAL_COMMON_ERR is not set -# CONFIG_IBM_EMAC_NO_FLOW_CTRL is not set -# CONFIG_IBM_EMAC_RGMII is not set -# CONFIG_IBM_EMAC_TAH is not set -# CONFIG_IBM_EMAC_ZMII is not set -# CONFIG_ICE is not set -# CONFIG_ICP10100 is not set -# CONFIG_ICPLUS_PHY is not set -# CONFIG_ICS932S401 is not set -# CONFIG_ICST is not set -# CONFIG_IDE is not set -# CONFIG_IDEAPAD_LAPTOP is not set -# CONFIG_IDE_GD is not set -# CONFIG_IDE_PROC_FS is not set -# CONFIG_IDE_TASK_IOCTL is not set -# CONFIG_IDLE_PAGE_TRACKING is not set -# CONFIG_IEEE802154 is not set -# CONFIG_IEEE802154_ADF7242 is not set -# CONFIG_IEEE802154_ATUSB is not set -# CONFIG_IEEE802154_CA8210 is not set -# CONFIG_IEEE802154_HWSIM is not set -# CONFIG_IEEE802154_MCR20A is not set -# CONFIG_IFB is not set -# CONFIG_IGB is not set -# CONFIG_IGBVF is not set -# CONFIG_IGB_HWMON is not set -# CONFIG_IGC is not set -# CONFIG_IIO is not set -# CONFIG_IIO_BUFFER is not set -# CONFIG_IIO_BUFFER_CB is not set -# CONFIG_IIO_BUFFER_DMA is not set -# CONFIG_IIO_BUFFER_DMAENGINE is not set -# CONFIG_IIO_BUFFER_HDC2010 is not set -# CONFIG_IIO_BUFFER_HW_CONSUMER is not set -# CONFIG_IIO_CONFIGFS is not set -CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 -# CONFIG_IIO_CROS_EC_ACCEL_LEGACY is not set -# CONFIG_IIO_INTERRUPT_TRIGGER is not set -# CONFIG_IIO_MUX is not set -# CONFIG_IIO_PERIODIC_RTC_TRIGGER is not set -# CONFIG_IIO_RESCALE is not set -# CONFIG_IIO_SIMPLE_DUMMY is not set -# CONFIG_IIO_SSP_SENSORHUB is not set -# CONFIG_IIO_ST_ACCEL_3AXIS is not set -# CONFIG_IIO_ST_GYRO_3AXIS is not set -# CONFIG_IIO_ST_LSM6DSX is not set -# CONFIG_IIO_ST_LSM9DS0 is not set -# CONFIG_IIO_ST_MAGN_3AXIS is not set -# CONFIG_IIO_ST_PRESS is not set -# CONFIG_IIO_SW_DEVICE is not set -# CONFIG_IIO_SW_TRIGGER is not set -# CONFIG_IIO_SYSFS_TRIGGER is not set -# CONFIG_IIO_TRIGGER is not set -# CONFIG_IIO_TRIGGERED_EVENT is not set -# CONFIG_IKCONFIG is not set -# CONFIG_IKCONFIG_PROC is not set -# CONFIG_IKHEADERS is not set -# CONFIG_IMA is not set -# CONFIG_IMAGE_CMDLINE_HACK is not set -# CONFIG_IMGPDC_WDT is not set -# CONFIG_IMG_MDC_DMA is not set -# CONFIG_IMX7D_ADC is not set -# CONFIG_IMX_IPUV3_CORE is not set -# CONFIG_IMX_THERMAL is not set -# CONFIG_INA2XX_ADC is not set -# CONFIG_INDIRECT_PIO is not set -CONFIG_INET=y -# CONFIG_INET6_AH is not set -# CONFIG_INET6_ESP is not set -# CONFIG_INET6_ESPINTCP is not set -# CONFIG_INET6_IPCOMP is not set -# CONFIG_INET6_TUNNEL is not set -# CONFIG_INET6_XFRM_MODE_BEET is not set -# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set -# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET6_XFRM_MODE_TUNNEL is not set -# CONFIG_INET6_XFRM_TUNNEL is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_DIAG is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_ESPINTCP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_LRO is not set -# CONFIG_INET_TCP_DIAG is not set -# CONFIG_INET_TUNNEL is not set -# CONFIG_INET_UDP_DIAG is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_TUNNEL is not set -# CONFIG_INFINIBAND is not set -# CONFIG_INFTL is not set -# CONFIG_INGENIC_ADC is not set -# CONFIG_INGENIC_CGU_JZ4725B is not set -# CONFIG_INGENIC_CGU_JZ4740 is not set -# CONFIG_INGENIC_CGU_JZ4770 is not set -# CONFIG_INGENIC_CGU_JZ4780 is not set -# CONFIG_INGENIC_CGU_X1000 is not set -# CONFIG_INGENIC_CGU_X1830 is not set -# CONFIG_INGENIC_OST is not set -# CONFIG_INGENIC_SYSOST is not set -# CONFIG_INGENIC_TCU_CLK is not set -# CONFIG_INGENIC_TCU_IRQ is not set -# CONFIG_INGENIC_TIMER is not set -CONFIG_INIT_ENV_ARG_LIMIT=32 -# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set -# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set -CONFIG_INIT_STACK_NONE=y -CONFIG_INOTIFY_USER=y -# CONFIG_INPUT is not set -# CONFIG_INPUT_AD714X is not set -# CONFIG_INPUT_ADXL34X is not set -# CONFIG_INPUT_APANEL is not set -# CONFIG_INPUT_ATI_REMOTE2 is not set -# CONFIG_INPUT_ATLAS_BTNS is not set -# CONFIG_INPUT_ATMEL_CAPTOUCH is not set -# CONFIG_INPUT_AXP20X_PEK is not set -# CONFIG_INPUT_BMA150 is not set -# CONFIG_INPUT_CM109 is not set -# CONFIG_INPUT_CMA3000 is not set -# CONFIG_INPUT_DA7280_HAPTICS is not set -# CONFIG_INPUT_DRV260X_HAPTICS is not set -# CONFIG_INPUT_DRV2665_HAPTICS is not set -# CONFIG_INPUT_DRV2667_HAPTICS is not set -# CONFIG_INPUT_E3X0_BUTTON is not set -# CONFIG_INPUT_EVBUG is not set -# CONFIG_INPUT_EVDEV is not set -# CONFIG_INPUT_FF_MEMLESS is not set -# CONFIG_INPUT_GP2A is not set -# CONFIG_INPUT_GPIO_BEEPER is not set -# CONFIG_INPUT_GPIO_DECODER is not set -# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set -# CONFIG_INPUT_GPIO_TILT_POLLED is not set -# CONFIG_INPUT_GPIO_VIBRA is not set -# CONFIG_INPUT_IDEAPAD_SLIDEBAR is not set -# CONFIG_INPUT_IMS_PCU is not set -# CONFIG_INPUT_IQS269A is not set -# CONFIG_INPUT_IQS626A is not set -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_KEYSPAN_REMOTE is not set -# CONFIG_INPUT_KXTJ9 is not set -# CONFIG_INPUT_LEDS is not set -# CONFIG_INPUT_MATRIXKMAP is not set -# CONFIG_INPUT_MAX8997_HAPTIC is not set -CONFIG_INPUT_MISC=y -# CONFIG_INPUT_MMA8450 is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_MPU3050 is not set -# CONFIG_INPUT_MSM_VIBRATOR is not set -# CONFIG_INPUT_PALMAS_PWRBUTTON is not set -# CONFIG_INPUT_PCF8574 is not set -# CONFIG_INPUT_PCSPKR is not set -# CONFIG_INPUT_POLLDEV is not set -# CONFIG_INPUT_POWERMATE is not set -# CONFIG_INPUT_PWM_BEEPER is not set -# CONFIG_INPUT_PWM_VIBRA is not set -# CONFIG_INPUT_REGULATOR_HAPTIC is not set -# CONFIG_INPUT_SOC_BUTTON_ARRAY is not set -# CONFIG_INPUT_SPARSEKMAP is not set -# CONFIG_INPUT_TABLET is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_TPS65218_PWRBUTTON is not set -# CONFIG_INPUT_TWL4030_PWRBUTTON is not set -# CONFIG_INPUT_TWL4030_VIBRA is not set -# CONFIG_INPUT_TWL6040_VIBRA is not set -# CONFIG_INPUT_UINPUT is not set -# CONFIG_INPUT_WISTRON_BTNS is not set -# CONFIG_INPUT_YEALINK is not set -# CONFIG_INT340X_THERMAL is not set -# CONFIG_INTEGRITY is not set -# CONFIG_INTEGRITY_AUDIT is not set -# CONFIG_INTEGRITY_SIGNATURE is not set -# CONFIG_INTEL_ATOMISP2_LED is not set -# CONFIG_INTEL_ATOMISP2_PM is not set -# CONFIG_INTEL_CHT_INT33FE is not set -# CONFIG_INTEL_HID_EVENT is not set -# CONFIG_INTEL_IDLE is not set -# CONFIG_INTEL_IDMA64 is not set -# CONFIG_INTEL_INT0002_VGPIO is not set -# CONFIG_INTEL_IOATDMA is not set -# CONFIG_INTEL_ISH_HID is not set -# CONFIG_INTEL_MEI is not set -# CONFIG_INTEL_MEI_ME is not set -# CONFIG_INTEL_MEI_TXE is not set -# CONFIG_INTEL_MIC_CARD is not set -# CONFIG_INTEL_MIC_HOST is not set -# CONFIG_INTEL_MID_PTI is not set -# CONFIG_INTEL_OAKTRAIL is not set -# CONFIG_INTEL_PMC_CORE is not set -# CONFIG_INTEL_PUNIT_IPC is not set -# CONFIG_INTEL_RST is not set -# CONFIG_INTEL_SMARTCONNECT is not set -# CONFIG_INTEL_SOC_PMIC is not set -# CONFIG_INTEL_SOC_PMIC_CHTDC_TI is not set -# CONFIG_INTEL_SOC_PMIC_CHTWC is not set -# CONFIG_INTEL_TCC_COOLING is not set -# CONFIG_INTEL_TH is not set -# CONFIG_INTEL_VBTN is not set -# CONFIG_INTEL_XWAY_PHY is not set -# CONFIG_INTERCONNECT is not set -# CONFIG_INTERVAL_TREE_TEST is not set -# CONFIG_INV_ICM42600_I2C is not set -# CONFIG_INV_ICM42600_SPI is not set -# CONFIG_INV_MPU6050_I2C is not set -# CONFIG_INV_MPU6050_IIO is not set -# CONFIG_INV_MPU6050_SPI is not set -# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set -# CONFIG_IOMMU_SUPPORT is not set -# CONFIG_IONIC is not set -# CONFIG_IOSCHED_BFQ is not set -# CONFIG_IOSCHED_CFQ is not set -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_NOOP=y -CONFIG_IO_STRICT_DEVMEM=y -# CONFIG_IO_URING is not set -CONFIG_IO_WQ=y -# CONFIG_IP17XX_PHY is not set -# CONFIG_IP5XXX_POWER is not set -# CONFIG_IP6_NF_FILTER is not set -# CONFIG_IP6_NF_IPTABLES is not set -# CONFIG_IP6_NF_MANGLE is not set -# CONFIG_IP6_NF_MATCH_AH is not set -# CONFIG_IP6_NF_MATCH_EUI64 is not set -# CONFIG_IP6_NF_MATCH_FRAG is not set -# CONFIG_IP6_NF_MATCH_HL is not set -# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set -# CONFIG_IP6_NF_MATCH_MH is not set -# CONFIG_IP6_NF_MATCH_OPTS is not set -# CONFIG_IP6_NF_MATCH_RPFILTER is not set -# CONFIG_IP6_NF_MATCH_RT is not set -# CONFIG_IP6_NF_MATCH_SRH is not set -# CONFIG_IP6_NF_NAT is not set -# CONFIG_IP6_NF_RAW is not set -# CONFIG_IP6_NF_SECURITY is not set -# CONFIG_IP6_NF_TARGET_HL is not set -# CONFIG_IP6_NF_TARGET_MASQUERADE is not set -# CONFIG_IP6_NF_TARGET_REJECT is not set -# CONFIG_IP6_NF_TARGET_SYNPROXY is not set -# CONFIG_IPACK_BUS is not set -# CONFIG_IPC_NS is not set -# CONFIG_IPMB_DEVICE_INTERFACE is not set -# CONFIG_IPMI_HANDLER is not set -# CONFIG_IPV6 is not set -# CONFIG_IPV6_FOU is not set -# CONFIG_IPV6_FOU_TUNNEL is not set -# CONFIG_IPV6_ILA is not set -# CONFIG_IPV6_IOAM6_LWTUNNEL is not set -# CONFIG_IPV6_MIP6 is not set -# CONFIG_IPV6_MROUTE is not set -# CONFIG_IPV6_MROUTE_MULTIPLE_TABLES is not set -# CONFIG_IPV6_MULTIPLE_TABLES is not set -CONFIG_IPV6_NDISC_NODETYPE=y -# CONFIG_IPV6_OPTIMISTIC_DAD is not set -# CONFIG_IPV6_ROUTER_PREF is not set -# CONFIG_IPV6_ROUTE_INFO is not set -# CONFIG_IPV6_RPL_LWTUNNEL is not set -# CONFIG_IPV6_SEG6_HMAC is not set -# CONFIG_IPV6_SEG6_LWTUNNEL is not set -# CONFIG_IPV6_SIT is not set -# CONFIG_IPV6_SIT_6RD is not set -# CONFIG_IPV6_TUNNEL is not set -# CONFIG_IPV6_VTI is not set -# CONFIG_IPVLAN is not set -# CONFIG_IPVTAP is not set -# CONFIG_IPW2100 is not set -# CONFIG_IPW2100_DEBUG is not set -CONFIG_IPW2100_MONITOR=y -# CONFIG_IPW2200 is not set -# CONFIG_IPW2200_DEBUG is not set -CONFIG_IPW2200_MONITOR=y -# CONFIG_IPW2200_PROMISCUOUS is not set -# CONFIG_IPW2200_QOS is not set -# CONFIG_IPW2200_RADIOTAP is not set -# CONFIG_IPWIRELESS is not set -# CONFIG_IPX is not set -CONFIG_IP_ADVANCED_ROUTER=y -# CONFIG_IP_DCCP is not set -# CONFIG_IP_FIB_TRIE_STATS is not set -# CONFIG_IP_MROUTE is not set -CONFIG_IP_MROUTE_MULTIPLE_TABLES=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_MULTIPLE_TABLES=y -# CONFIG_IP_NF_ARPFILTER is not set -# CONFIG_IP_NF_ARPTABLES is not set -# CONFIG_IP_NF_ARP_MANGLE is not set -# CONFIG_IP_NF_FILTER is not set -# CONFIG_IP_NF_IPTABLES is not set -# CONFIG_IP_NF_MANGLE is not set -# CONFIG_IP_NF_MATCH_AH is not set -# CONFIG_IP_NF_MATCH_ECN is not set -# CONFIG_IP_NF_MATCH_RPFILTER is not set -# CONFIG_IP_NF_MATCH_TTL is not set -# CONFIG_IP_NF_RAW is not set -# CONFIG_IP_NF_SECURITY is not set -# CONFIG_IP_NF_TARGET_CLUSTERIP is not set -# CONFIG_IP_NF_TARGET_ECN is not set -# CONFIG_IP_NF_TARGET_MASQUERADE is not set -# CONFIG_IP_NF_TARGET_NETMAP is not set -# CONFIG_IP_NF_TARGET_REDIRECT is not set -# CONFIG_IP_NF_TARGET_REJECT is not set -# CONFIG_IP_NF_TARGET_SYNPROXY is not set -# CONFIG_IP_NF_TARGET_TTL is not set -# CONFIG_IP_PIMSM_V1 is not set -# CONFIG_IP_PIMSM_V2 is not set -# CONFIG_IP_PNP is not set -CONFIG_IP_ROUTE_MULTIPATH=y -CONFIG_IP_ROUTE_VERBOSE=y -# CONFIG_IP_SCTP is not set -# CONFIG_IP_SET is not set -# CONFIG_IP_SET_HASH_IPMAC is not set -# CONFIG_IP_VS is not set -# CONFIG_IP_VS_MH is not set -CONFIG_IP_VS_MH_TAB_INDEX=10 -# CONFIG_IP_VS_TWOS is not set -# CONFIG_IRDA is not set -# CONFIG_IRQSOFF_TRACER is not set -# CONFIG_IRQ_ALL_CPUS is not set -# CONFIG_IRQ_DOMAIN_DEBUG is not set -# CONFIG_IRQ_POLL is not set -# CONFIG_IRQ_TIME_ACCOUNTING is not set -# CONFIG_IR_GPIO_CIR is not set -# CONFIG_IR_HIX5HD2 is not set -# CONFIG_IR_IGORPLUGUSB is not set -# CONFIG_IR_IGUANA is not set -# CONFIG_IR_IMG is not set -# CONFIG_IR_IMON is not set -# CONFIG_IR_JVC_DECODER is not set -# CONFIG_IR_LIRC_CODEC is not set -# CONFIG_IR_MCEUSB is not set -# CONFIG_IR_NEC_DECODER is not set -# CONFIG_IR_RC5_DECODER is not set -# CONFIG_IR_RC6_DECODER is not set -# CONFIG_IR_REDRAT3 is not set -# CONFIG_IR_SONY_DECODER is not set -# CONFIG_IR_STREAMZAP is not set -# CONFIG_IR_TTUSBIR is not set -# CONFIG_ISA_BUS is not set -# CONFIG_ISA_BUS_API is not set -# CONFIG_ISCSI_BOOT_SYSFS is not set -# CONFIG_ISCSI_TCP is not set -CONFIG_ISDN=y -# CONFIG_ISDN_AUDIO is not set -# CONFIG_ISDN_CAPI is not set -# CONFIG_ISDN_CAPI_CAPIDRV is not set -# CONFIG_ISDN_DIVERSION is not set -# CONFIG_ISDN_DRV_ACT2000 is not set -# CONFIG_ISDN_DRV_GIGASET is not set -# CONFIG_ISDN_DRV_HISAX is not set -# CONFIG_ISDN_DRV_ICN is not set -# CONFIG_ISDN_DRV_LOOP is not set -# CONFIG_ISDN_DRV_PCBIT is not set -# CONFIG_ISDN_DRV_SC is not set -# CONFIG_ISDN_I4L is not set -# CONFIG_ISL29003 is not set -# CONFIG_ISL29020 is not set -# CONFIG_ISL29125 is not set -# CONFIG_ISL29501 is not set -# CONFIG_ISO9660_FS is not set -# CONFIG_ISS4xx is not set -# CONFIG_ITG3200 is not set -# CONFIG_IWL3945 is not set -# CONFIG_IWLWIFI is not set -# CONFIG_IXGB is not set -# CONFIG_IXGBE is not set -# CONFIG_IXGBEVF is not set -# CONFIG_JAILHOUSE_GUEST is not set -# CONFIG_JBD2_DEBUG is not set -# CONFIG_JFFS2_CMODE_FAVOURLZO is not set -# CONFIG_JFFS2_CMODE_NONE is not set -CONFIG_JFFS2_CMODE_PRIORITY=y -# CONFIG_JFFS2_CMODE_SIZE is not set -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -# CONFIG_JFFS2_FS_POSIX_ACL is not set -# CONFIG_JFFS2_FS_SECURITY is not set -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -CONFIG_JFFS2_FS_WRITEBUFFER=y -CONFIG_JFFS2_FS_XATTR=y -CONFIG_JFFS2_LZMA=y -# CONFIG_JFFS2_LZO is not set -CONFIG_JFFS2_RTIME=y -# CONFIG_JFFS2_RUBIN is not set -CONFIG_JFFS2_SUMMARY=y -# CONFIG_JFFS2_ZLIB is not set -# CONFIG_JFS_DEBUG is not set -# CONFIG_JFS_FS is not set -# CONFIG_JFS_POSIX_ACL is not set -# CONFIG_JFS_SECURITY is not set -# CONFIG_JFS_STATISTICS is not set -# CONFIG_JME is not set -CONFIG_JOLIET=y -# CONFIG_JSA1212 is not set -# CONFIG_JUMP_LABEL is not set -# CONFIG_JZ4740_WDT is not set -# CONFIG_JZ4770_PHY is not set -# CONFIG_KALLSYMS is not set -# CONFIG_KALLSYMS_ABSOLUTE_PERCPU is not set -# CONFIG_KALLSYMS_ALL is not set -CONFIG_KALLSYMS_BASE_RELATIVE=y -# CONFIG_KALLSYMS_UNCOMPRESSED is not set -# CONFIG_KARMA_PARTITION is not set -# CONFIG_KASAN is not set -CONFIG_KASAN_STACK=y -# CONFIG_KCMP is not set -# CONFIG_KCOV is not set -# CONFIG_KCSAN is not set -# CONFIG_KERNEL_BZIP2 is not set -# CONFIG_KERNEL_CAT is not set -# CONFIG_KERNEL_GZIP is not set -# CONFIG_KERNEL_LZ4 is not set -# CONFIG_KERNEL_LZMA is not set -# CONFIG_KERNEL_LZO is not set -CONFIG_KERNEL_MODE_NEON=y -CONFIG_KERNEL_XZ=y -# CONFIG_KERNEL_ZSTD is not set -CONFIG_KERNFS=y -# CONFIG_KEXEC is not set -# CONFIG_KEXEC_FILE is not set -# CONFIG_KEYBOARD_ADC is not set -# CONFIG_KEYBOARD_ADP5588 is not set -# CONFIG_KEYBOARD_ADP5589 is not set -# CONFIG_KEYBOARD_APPLESPI is not set -# CONFIG_KEYBOARD_ATKBD is not set -# CONFIG_KEYBOARD_BCM is not set -# CONFIG_KEYBOARD_CAP11XX is not set -# CONFIG_KEYBOARD_CYPRESS_SF is not set -# CONFIG_KEYBOARD_DLINK_DIR685 is not set -# CONFIG_KEYBOARD_GPIO is not set -# CONFIG_KEYBOARD_GPIO_POLLED is not set -# CONFIG_KEYBOARD_LKKBD is not set -# CONFIG_KEYBOARD_LM8323 is not set -# CONFIG_KEYBOARD_LM8333 is not set -# CONFIG_KEYBOARD_MATRIX is not set -# CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_MCS is not set -# CONFIG_KEYBOARD_MPR121 is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_OMAP4 is not set -# CONFIG_KEYBOARD_OPENCORES is not set -# CONFIG_KEYBOARD_PXA27x is not set -# CONFIG_KEYBOARD_QT1050 is not set -# CONFIG_KEYBOARD_QT1070 is not set -# CONFIG_KEYBOARD_QT2160 is not set -# CONFIG_KEYBOARD_SAMSUNG is not set -# CONFIG_KEYBOARD_SH_KEYSC is not set -# CONFIG_KEYBOARD_SNVS_PWRKEY is not set -# CONFIG_KEYBOARD_STMPE is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_TCA6416 is not set -# CONFIG_KEYBOARD_TCA8418 is not set -# CONFIG_KEYBOARD_TEGRA is not set -# CONFIG_KEYBOARD_TM2_TOUCHKEY is not set -# CONFIG_KEYBOARD_TWL4030 is not set -# CONFIG_KEYBOARD_XTKBD is not set -# CONFIG_KEYS is not set -# CONFIG_KEYS_REQUEST_CACHE is not set -# CONFIG_KEY_DH_OPERATIONS is not set -# CONFIG_KFENCE is not set -# CONFIG_KGDB is not set -# CONFIG_KMAP_LOCAL is not set -# CONFIG_KMAP_LOCAL_NON_LINEAR_PTE_ARRAY is not set -# CONFIG_KMEMCHECK is not set -# CONFIG_KMX61 is not set -# CONFIG_KPC2000 is not set -# CONFIG_KPROBES is not set -# CONFIG_KPROBES_SANITY_TEST is not set -# CONFIG_KPROBE_EVENTS_ON_NOTRACE is not set -# CONFIG_KPROBE_EVENT_GEN_TEST is not set -# CONFIG_KS7010 is not set -# CONFIG_KS8842 is not set -# CONFIG_KS8851 is not set -# CONFIG_KS8851_MLL is not set -# CONFIG_KSM is not set -# CONFIG_KSZ884X_PCI is not set -# CONFIG_KUNIT is not set -CONFIG_KUSER_HELPERS=y -# CONFIG_KVM_AMD is not set -# CONFIG_KVM_AMD_SEV is not set -# CONFIG_KVM_GUEST is not set -# CONFIG_KVM_INTEL is not set -# CONFIG_KVM_WERROR is not set -# CONFIG_KXCJK1013 is not set -# CONFIG_KXSD9 is not set -# CONFIG_L2TP is not set -# CONFIG_L2TP_ETH is not set -# CONFIG_L2TP_IP is not set -# CONFIG_L2TP_V3 is not set -# CONFIG_LAN743X is not set -# CONFIG_LANMEDIA is not set -# CONFIG_LANTIQ is not set -# CONFIG_LAPB is not set -# CONFIG_LASAT is not set -# CONFIG_LATENCYTOP is not set -# CONFIG_LATTICE_ECP3_CONFIG is not set -CONFIG_LBDAF=y -# CONFIG_LCD_AMS369FG06 is not set -# CONFIG_LCD_CLASS_DEVICE is not set -# CONFIG_LCD_HX8357 is not set -# CONFIG_LCD_ILI922X is not set -# CONFIG_LCD_ILI9320 is not set -# CONFIG_LCD_L4F00242T03 is not set -# CONFIG_LCD_LD9040 is not set -# CONFIG_LCD_LMS283GF05 is not set -# CONFIG_LCD_LMS501KF03 is not set -# CONFIG_LCD_LTV350QV is not set -# CONFIG_LCD_OTM3225A is not set -# CONFIG_LCD_S6E63M0 is not set -# CONFIG_LCD_TDO24M is not set -# CONFIG_LCD_VGG2432A4 is not set -CONFIG_LDISC_AUTOLOAD=y -# CONFIG_LDM_PARTITION is not set -CONFIG_LD_DEAD_CODE_DATA_ELIMINATION=y -# CONFIG_LEDS_AN30259A is not set -# CONFIG_LEDS_APU is not set -# CONFIG_LEDS_AW2013 is not set -# CONFIG_LEDS_BCM6328 is not set -# CONFIG_LEDS_BCM6358 is not set -# CONFIG_LEDS_BD2802 is not set -# CONFIG_LEDS_BLINKM is not set -CONFIG_LEDS_BRIGHTNESS_HW_CHANGED=y -CONFIG_LEDS_CLASS=y -# CONFIG_LEDS_CLASS_FLASH is not set -CONFIG_LEDS_CLASS_MULTICOLOR=y -# CONFIG_LEDS_CR0014114 is not set -# CONFIG_LEDS_DAC124S085 is not set -# CONFIG_LEDS_EL15203000 is not set -# CONFIG_LEDS_GPIO is not set -# CONFIG_LEDS_INTEL_SS4200 is not set -# CONFIG_LEDS_IS31FL319X is not set -# CONFIG_LEDS_IS31FL32XX is not set -# CONFIG_LEDS_LM3530 is not set -# CONFIG_LEDS_LM3532 is not set -# CONFIG_LEDS_LM355x is not set -# CONFIG_LEDS_LM3642 is not set -# CONFIG_LEDS_LM3692X is not set -# CONFIG_LEDS_LP3944 is not set -# CONFIG_LEDS_LP3952 is not set -# CONFIG_LEDS_LP50XX is not set -# CONFIG_LEDS_LP5521 is not set -# CONFIG_LEDS_LP5523 is not set -# CONFIG_LEDS_LP5562 is not set -# CONFIG_LEDS_LP55XX_COMMON is not set -# CONFIG_LEDS_LP8501 is not set -# CONFIG_LEDS_LP8860 is not set -# CONFIG_LEDS_LT3593 is not set -# CONFIG_LEDS_MLXCPLD is not set -# CONFIG_LEDS_MLXREG is not set -# CONFIG_LEDS_NIC78BX is not set -# CONFIG_LEDS_NS2 is not set -# CONFIG_LEDS_OT200 is not set -# CONFIG_LEDS_PCA9532 is not set -# CONFIG_LEDS_PCA955X is not set -# CONFIG_LEDS_PCA963X is not set -# CONFIG_LEDS_PWM is not set -# CONFIG_LEDS_REGULATOR is not set -# CONFIG_LEDS_SPI_BYTE is not set -# CONFIG_LEDS_SYSCON is not set -# CONFIG_LEDS_TCA6507 is not set -# CONFIG_LEDS_TI_LMU_COMMON is not set -# CONFIG_LEDS_TLC591XX is not set -CONFIG_LEDS_TRIGGERS=y -# CONFIG_LEDS_TRIGGER_ACTIVITY is not set -# CONFIG_LEDS_TRIGGER_AUDIO is not set -# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set -# CONFIG_LEDS_TRIGGER_CAMERA is not set -# CONFIG_LEDS_TRIGGER_CPU is not set -CONFIG_LEDS_TRIGGER_DEFAULT_ON=y -# CONFIG_LEDS_TRIGGER_DISK is not set -# CONFIG_LEDS_TRIGGER_GPIO is not set -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -# CONFIG_LEDS_TRIGGER_MTD is not set -CONFIG_LEDS_TRIGGER_NETDEV=y -# CONFIG_LEDS_TRIGGER_ONESHOT is not set -# CONFIG_LEDS_TRIGGER_PANIC is not set -# CONFIG_LEDS_TRIGGER_PATTERN is not set -CONFIG_LEDS_TRIGGER_TIMER=y -# CONFIG_LEDS_TRIGGER_TRANSIENT is not set -# CONFIG_LEDS_TRIGGER_TTY is not set -# CONFIG_LEDS_TURRIS_OMNIA is not set -# CONFIG_LEDS_USER is not set -# CONFIG_LED_TRIGGER_PHY is not set -# CONFIG_LEGACY_PTYS is not set -# CONFIG_LGUEST is not set -# CONFIG_LIB80211 is not set -# CONFIG_LIB80211_CRYPT_CCMP is not set -# CONFIG_LIB80211_CRYPT_TKIP is not set -# CONFIG_LIB80211_CRYPT_WEP is not set -# CONFIG_LIB80211_DEBUG is not set -# CONFIG_LIBCRC32C is not set -# CONFIG_LIBERTAS is not set -# CONFIG_LIBERTAS_THINFIRM is not set -# CONFIG_LIBERTAS_USB is not set -# CONFIG_LIBFC is not set -# CONFIG_LIBFCOE is not set -# CONFIG_LIBIPW_DEBUG is not set -# CONFIG_LIBNVDIMM is not set -# CONFIG_LIDAR_LITE_V2 is not set -CONFIG_LINEAR_RANGES=y -# CONFIG_LIQUIDIO is not set -# CONFIG_LIQUIDIO_VF is not set -# CONFIG_LIS3L02DQ is not set -# CONFIG_LITEX_SOC_CONTROLLER is not set -# CONFIG_LKDTM is not set -CONFIG_LLC=y -# CONFIG_LLC2 is not set -# CONFIG_LMK04832 is not set -# CONFIG_LMP91000 is not set -# CONFIG_LNET is not set -CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set -# CONFIG_LOCKD is not set -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_LOCKD_V4=y -# CONFIG_LOCKUP_DETECTOR is not set -# CONFIG_LOCK_EVENT_COUNTS is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_LOCK_TORTURE_TEST is not set -# CONFIG_LOGFS is not set -# CONFIG_LOGIG940_FF is not set -# CONFIG_LOGIRUMBLEPAD2_FF is not set -# CONFIG_LOGITECH_FF is not set -# CONFIG_LOGIWHEELS_FF is not set -# CONFIG_LOGO is not set -CONFIG_LOG_BUF_SHIFT=17 -CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 -# CONFIG_LOONGSON_MC146818 is not set -# CONFIG_LPC_ICH is not set -# CONFIG_LPC_SCH is not set -# CONFIG_LP_CONSOLE is not set -# CONFIG_LSI_ET1011C_PHY is not set -CONFIG_LSM="lockdown,yama,loadpin,safesetid,integrity" -CONFIG_LSM_MMAP_MIN_ADDR=65536 -# CONFIG_LTC1660 is not set -# CONFIG_LTC2471 is not set -# CONFIG_LTC2485 is not set -# CONFIG_LTC2496 is not set -# CONFIG_LTC2497 is not set -# CONFIG_LTC2632 is not set -# CONFIG_LTC2983 is not set -# CONFIG_LTE_GDM724X is not set -# CONFIG_LTO_NONE is not set -# CONFIG_LTPC is not set -# CONFIG_LTR501 is not set -# CONFIG_LUSTRE_FS is not set -# CONFIG_LV0104CS is not set -# CONFIG_LWTUNNEL is not set -# CONFIG_LXT_PHY is not set -# CONFIG_LZ4HC_COMPRESS is not set -# CONFIG_LZ4_COMPRESS is not set -# CONFIG_LZ4_DECOMPRESS is not set -CONFIG_LZMA_COMPRESS=y -CONFIG_LZMA_DECOMPRESS=y -# CONFIG_LZO_COMPRESS is not set -# CONFIG_LZO_DECOMPRESS is not set -# CONFIG_M62332 is not set -# CONFIG_MAC80211 is not set -# CONFIG_MAC80211_MESSAGE_TRACING is not set -CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 -# CONFIG_MACB is not set -# CONFIG_MACH_ASM9260 is not set -# CONFIG_MACH_DECSTATION is not set -# CONFIG_MACH_INGENIC is not set -# CONFIG_MACH_INGENIC_SOC is not set -# CONFIG_MACH_JAZZ is not set -# CONFIG_MACH_JZ4740 is not set -# CONFIG_MACH_LOONGSON2EF is not set -# CONFIG_MACH_LOONGSON32 is not set -# CONFIG_MACH_LOONGSON64 is not set -# CONFIG_MACH_PIC32 is not set -# CONFIG_MACH_PISTACHIO is not set -# CONFIG_MACH_TX39XX is not set -# CONFIG_MACH_TX49XX is not set -# CONFIG_MACH_VR41XX is not set -# CONFIG_MACH_XILFPGA is not set -# CONFIG_MACINTOSH_DRIVERS is not set -# CONFIG_MACSEC is not set -# CONFIG_MACVLAN is not set -# CONFIG_MACVTAP is not set -# CONFIG_MAC_EMUMOUSEBTN is not set -# CONFIG_MAC_PARTITION is not set -# CONFIG_MAG3110 is not set -# CONFIG_MAGIC_SYSRQ is not set -CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 -# CONFIG_MAGIC_SYSRQ_SERIAL is not set -CONFIG_MAGIC_SYSRQ_SERIAL_SEQUENCE="" -# CONFIG_MAILBOX is not set -# CONFIG_MANAGER_SBS is not set -# CONFIG_MANDATORY_FILE_LOCKING is not set -# CONFIG_MANGLE_BOOTARGS is not set -# CONFIG_MARVELL_10G_PHY is not set -# CONFIG_MARVELL_88X2222_PHY is not set -# CONFIG_MARVELL_PHY is not set -# CONFIG_MAX1027 is not set -# CONFIG_MAX11100 is not set -# CONFIG_MAX1118 is not set -# CONFIG_MAX1241 is not set -# CONFIG_MAX1363 is not set -# CONFIG_MAX30100 is not set -# CONFIG_MAX30102 is not set -# CONFIG_MAX31856 is not set -# CONFIG_MAX44000 is not set -# CONFIG_MAX44009 is not set -# CONFIG_MAX517 is not set -# CONFIG_MAX5432 is not set -# CONFIG_MAX5481 is not set -# CONFIG_MAX5487 is not set -# CONFIG_MAX5821 is not set -# CONFIG_MAX63XX_WATCHDOG is not set -# CONFIG_MAX9611 is not set -# CONFIG_MAXIM_THERMOCOUPLE is not set -# CONFIG_MAXLINEAR_GPHY is not set -CONFIG_MAY_USE_DEVLINK=y -# CONFIG_MB1232 is not set -# CONFIG_MC3230 is not set -# CONFIG_MCB is not set -# CONFIG_MCP320X is not set -# CONFIG_MCP3422 is not set -# CONFIG_MCP3911 is not set -# CONFIG_MCP4018 is not set -# CONFIG_MCP41010 is not set -# CONFIG_MCP4131 is not set -# CONFIG_MCP4531 is not set -# CONFIG_MCP4725 is not set -# CONFIG_MCP4922 is not set -# CONFIG_MCPM is not set -# CONFIG_MCTP is not set -# CONFIG_MD is not set -# CONFIG_MDIO_BCM_UNIMAC is not set -# CONFIG_MDIO_BITBANG is not set -# CONFIG_MDIO_BUS_MUX_GPIO is not set -# CONFIG_MDIO_BUS_MUX_MMIOREG is not set -# CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set -# CONFIG_MDIO_DEVICE is not set -# CONFIG_MDIO_DEVRES is not set -# CONFIG_MDIO_HISI_FEMAC is not set -# CONFIG_MDIO_IPQ4019 is not set -# CONFIG_MDIO_IPQ8064 is not set -# CONFIG_MDIO_MSCC_MIIM is not set -# CONFIG_MDIO_MVUSB is not set -# CONFIG_MDIO_OCTEON is not set -# CONFIG_MDIO_THUNDER is not set -# CONFIG_MDIO_XPCS is not set -# CONFIG_MD_FAULTY is not set -# CONFIG_MEDIATEK_GE_PHY is not set -# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set -# CONFIG_MEDIA_ATTACH is not set -# CONFIG_MEDIA_CAMERA_SUPPORT is not set -# CONFIG_MEDIA_CEC_SUPPORT is not set -# CONFIG_MEDIA_CONTROLLER is not set -# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set -# CONFIG_MEDIA_PCI_SUPPORT is not set -# CONFIG_MEDIA_PLATFORM_SUPPORT is not set -# CONFIG_MEDIA_RADIO_SUPPORT is not set -# CONFIG_MEDIA_RC_SUPPORT is not set -# CONFIG_MEDIA_SDR_SUPPORT is not set -# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set -# CONFIG_MEDIA_SUPPORT is not set -# CONFIG_MEDIA_SUPPORT_FILTER is not set -# CONFIG_MEDIA_TEST_SUPPORT is not set -# CONFIG_MEDIA_TUNER_E4000 is not set -# CONFIG_MEDIA_TUNER_FC0011 is not set -# CONFIG_MEDIA_TUNER_FC0012 is not set -# CONFIG_MEDIA_TUNER_FC0013 is not set -# CONFIG_MEDIA_TUNER_FC2580 is not set -# CONFIG_MEDIA_TUNER_IT913X is not set -# CONFIG_MEDIA_TUNER_M88RS6000T is not set -# CONFIG_MEDIA_TUNER_MAX2165 is not set -# CONFIG_MEDIA_TUNER_MC44S803 is not set -# CONFIG_MEDIA_TUNER_MSI001 is not set -# CONFIG_MEDIA_TUNER_MT2060 is not set -# CONFIG_MEDIA_TUNER_MT2063 is not set -# CONFIG_MEDIA_TUNER_MT20XX is not set -# CONFIG_MEDIA_TUNER_MT2131 is not set -# CONFIG_MEDIA_TUNER_MT2266 is not set -# CONFIG_MEDIA_TUNER_MXL301RF is not set -# CONFIG_MEDIA_TUNER_MXL5005S is not set -# CONFIG_MEDIA_TUNER_MXL5007T is not set -# CONFIG_MEDIA_TUNER_QM1D1B0004 is not set -# CONFIG_MEDIA_TUNER_QM1D1C0042 is not set -# CONFIG_MEDIA_TUNER_QT1010 is not set -# CONFIG_MEDIA_TUNER_R820T is not set -# CONFIG_MEDIA_TUNER_SI2157 is not set -# CONFIG_MEDIA_TUNER_SIMPLE is not set -# CONFIG_MEDIA_TUNER_TDA18212 is not set -# CONFIG_MEDIA_TUNER_TDA18218 is not set -# CONFIG_MEDIA_TUNER_TDA18250 is not set -# CONFIG_MEDIA_TUNER_TDA18271 is not set -# CONFIG_MEDIA_TUNER_TDA827X is not set -# CONFIG_MEDIA_TUNER_TDA8290 is not set -# CONFIG_MEDIA_TUNER_TDA9887 is not set -# CONFIG_MEDIA_TUNER_TEA5761 is not set -# CONFIG_MEDIA_TUNER_TEA5767 is not set -# CONFIG_MEDIA_TUNER_TUA9001 is not set -# CONFIG_MEDIA_TUNER_XC2028 is not set -# CONFIG_MEDIA_TUNER_XC4000 is not set -# CONFIG_MEDIA_TUNER_XC5000 is not set -# CONFIG_MEDIA_USB_SUPPORT is not set -# CONFIG_MEGARAID_LEGACY is not set -# CONFIG_MEGARAID_NEWGEN is not set -# CONFIG_MEGARAID_SAS is not set -# CONFIG_MELLANOX_PLATFORM is not set -CONFIG_MEMBARRIER=y -# CONFIG_MEMORY is not set -# CONFIG_MEMORY_FAILURE is not set -# CONFIG_MEMORY_HOTPLUG is not set -# CONFIG_MEMSTICK is not set -# CONFIG_MEMTEST is not set -# CONFIG_MEN_A21_WDT is not set -# CONFIG_MESON_SM is not set -CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 -# CONFIG_MFD_88PM800 is not set -# CONFIG_MFD_88PM805 is not set -# CONFIG_MFD_88PM860X is not set -# CONFIG_MFD_AAT2870_CORE is not set -# CONFIG_MFD_AC100 is not set -# CONFIG_MFD_ACT8945A is not set -# CONFIG_MFD_ARIZONA_I2C is not set -# CONFIG_MFD_ARIZONA_SPI is not set -# CONFIG_MFD_AS3711 is not set -# CONFIG_MFD_AS3722 is not set -# CONFIG_MFD_ASIC3 is not set -# CONFIG_MFD_ATC260X_I2C is not set -# CONFIG_MFD_ATMEL_FLEXCOM is not set -# CONFIG_MFD_ATMEL_HLCDC is not set -# CONFIG_MFD_AXP20X is not set -# CONFIG_MFD_AXP20X_I2C is not set -# CONFIG_MFD_BCM590XX is not set -# CONFIG_MFD_BD9571MWV is not set -# CONFIG_MFD_CORE is not set -# CONFIG_MFD_CPCAP is not set -# CONFIG_MFD_CROS_EC is not set -# CONFIG_MFD_CS5535 is not set -# CONFIG_MFD_DA9052_I2C is not set -# CONFIG_MFD_DA9052_SPI is not set -# CONFIG_MFD_DA9055 is not set -# CONFIG_MFD_DA9062 is not set -# CONFIG_MFD_DA9063 is not set -# CONFIG_MFD_DA9150 is not set -# CONFIG_MFD_DLN2 is not set -# CONFIG_MFD_EXYNOS_LPASS is not set -# CONFIG_MFD_GATEWORKS_GSC is not set -# CONFIG_MFD_HI6421_PMIC is not set -# CONFIG_MFD_INTEL_M10_BMC is not set -# CONFIG_MFD_INTEL_QUARK_I2C_GPIO is not set -# CONFIG_MFD_IQS62X is not set -# CONFIG_MFD_JANZ_CMODIO is not set -# CONFIG_MFD_KEMPLD is not set -# CONFIG_MFD_LM3533 is not set -# CONFIG_MFD_LOCHNAGAR is not set -# CONFIG_MFD_LP3943 is not set -# CONFIG_MFD_LP8788 is not set -# CONFIG_MFD_MADERA is not set -# CONFIG_MFD_MAX14577 is not set -# CONFIG_MFD_MAX77620 is not set -# CONFIG_MFD_MAX77650 is not set -# CONFIG_MFD_MAX77686 is not set -# CONFIG_MFD_MAX77693 is not set -# CONFIG_MFD_MAX77843 is not set -# CONFIG_MFD_MAX8907 is not set -# CONFIG_MFD_MAX8925 is not set -# CONFIG_MFD_MAX8997 is not set -# CONFIG_MFD_MAX8998 is not set -# CONFIG_MFD_MC13XXX is not set -# CONFIG_MFD_MC13XXX_I2C is not set -# CONFIG_MFD_MC13XXX_SPI is not set -# CONFIG_MFD_MENF21BMC is not set -# CONFIG_MFD_MP2629 is not set -# CONFIG_MFD_MT6360 is not set -# CONFIG_MFD_MT6397 is not set -# CONFIG_MFD_NTXEC is not set -# CONFIG_MFD_OMAP_USB_HOST is not set -# CONFIG_MFD_PALMAS is not set -# CONFIG_MFD_PCF50633 is not set -# CONFIG_MFD_PM8921_CORE is not set -# CONFIG_MFD_PM8XXX is not set -# CONFIG_MFD_QCOM_PM8008 is not set -# CONFIG_MFD_RC5T583 is not set -# CONFIG_MFD_RDC321X is not set -# CONFIG_MFD_RETU is not set -# CONFIG_MFD_RK808 is not set -# CONFIG_MFD_RN5T618 is not set -# CONFIG_MFD_ROHM_BD70528 is not set -# CONFIG_MFD_ROHM_BD71828 is not set -# CONFIG_MFD_ROHM_BD718XX is not set -# CONFIG_MFD_ROHM_BD957XMUF is not set -# CONFIG_MFD_RSMU_I2C is not set -# CONFIG_MFD_RSMU_SPI is not set -# CONFIG_MFD_RT4831 is not set -# CONFIG_MFD_RT5033 is not set -# CONFIG_MFD_RTSX_PCI is not set -# CONFIG_MFD_RTSX_USB is not set -# CONFIG_MFD_SEC_CORE is not set -# CONFIG_MFD_SI476X_CORE is not set -# CONFIG_MFD_SKY81452 is not set -# CONFIG_MFD_SL28CPLD is not set -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_SMSC is not set -# CONFIG_MFD_STMFX is not set -# CONFIG_MFD_STMPE is not set -# CONFIG_MFD_STPMIC1 is not set -# CONFIG_MFD_SYSCON is not set -# CONFIG_MFD_T7L66XB is not set -# CONFIG_MFD_TC3589X is not set -# CONFIG_MFD_TC6387XB is not set -# CONFIG_MFD_TC6393XB is not set -# CONFIG_MFD_TIMBERDALE is not set -# CONFIG_MFD_TI_AM335X_TSCADC is not set -# CONFIG_MFD_TI_LMU is not set -# CONFIG_MFD_TI_LP873X is not set -# CONFIG_MFD_TI_LP87565 is not set -# CONFIG_MFD_TMIO is not set -# CONFIG_MFD_TPS65086 is not set -# CONFIG_MFD_TPS65090 is not set -# CONFIG_MFD_TPS65217 is not set -# CONFIG_MFD_TPS65218 is not set -# CONFIG_MFD_TPS6586X is not set -# CONFIG_MFD_TPS65910 is not set -# CONFIG_MFD_TPS65912 is not set -# CONFIG_MFD_TPS65912_I2C is not set -# CONFIG_MFD_TPS65912_SPI is not set -# CONFIG_MFD_TPS68470 is not set -# CONFIG_MFD_TPS80031 is not set -# CONFIG_MFD_TQMX86 is not set -# CONFIG_MFD_VIPERBOARD is not set -# CONFIG_MFD_VX855 is not set -# CONFIG_MFD_WL1273_CORE is not set -# CONFIG_MFD_WM831X is not set -# CONFIG_MFD_WM831X_I2C is not set -# CONFIG_MFD_WM831X_SPI is not set -# CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM8994 is not set -# CONFIG_MG_DISK is not set -# CONFIG_MHI_BUS is not set -# CONFIG_MICREL_KS8995MA is not set -# CONFIG_MICREL_PHY is not set -# CONFIG_MICROCHIP_KSZ is not set -# CONFIG_MICROCHIP_PHY is not set -# CONFIG_MICROCHIP_PIT64B is not set -# CONFIG_MICROCHIP_T1_PHY is not set -# CONFIG_MICROSEMI_PHY is not set -# CONFIG_MICROSOFT_MANA is not set -# CONFIG_MIGRATION is not set -CONFIG_MII=y -# CONFIG_MIKROTIK is not set -# CONFIG_MIKROTIK_RB532 is not set -# CONFIG_MINIX_FS is not set -# CONFIG_MINIX_FS_NATIVE_ENDIAN is not set -# CONFIG_MINIX_SUBPARTITION is not set -# CONFIG_MIPS_ALCHEMY is not set -# CONFIG_MIPS_CDMM is not set -# CONFIG_MIPS_COBALT is not set -# CONFIG_MIPS_FPU_EMULATOR is not set -# CONFIG_MIPS_FP_SUPPORT is not set -# CONFIG_MIPS_GENERIC is not set -# CONFIG_MIPS_GENERIC_KERNEL is not set -# CONFIG_MIPS_MALTA is not set -# CONFIG_MIPS_O32_FP64_SUPPORT is not set -# CONFIG_MIPS_PARAVIRT is not set -# CONFIG_MIPS_PLATFORM_DEVICES is not set -# CONFIG_MIPS_SEAD3 is not set -# CONFIG_MISC_ALCOR_PCI is not set -CONFIG_MISC_FILESYSTEMS=y -# CONFIG_MISC_RTSX_PCI is not set -# CONFIG_MISC_RTSX_USB is not set -# CONFIG_MISDN is not set -# CONFIG_MISDN_AVMFRITZ is not set -# CONFIG_MISDN_HFCPCI is not set -# CONFIG_MISDN_HFCUSB is not set -# CONFIG_MISDN_INFINEON is not set -# CONFIG_MISDN_NETJET is not set -# CONFIG_MISDN_SPEEDFAX is not set -# CONFIG_MISDN_W6692 is not set -# CONFIG_MKISS is not set -# CONFIG_MLX4_CORE is not set -# CONFIG_MLX4_EN is not set -# CONFIG_MLX5_CORE is not set -# CONFIG_MLX5_SF is not set -# CONFIG_MLX90614 is not set -# CONFIG_MLX90632 is not set -# CONFIG_MLXFW is not set -# CONFIG_MLXSW_CORE is not set -# CONFIG_MLX_CPLD_PLATFORM is not set -# CONFIG_MLX_PLATFORM is not set -# CONFIG_MMA7455_I2C is not set -# CONFIG_MMA7455_SPI is not set -# CONFIG_MMA7660 is not set -# CONFIG_MMA8452 is not set -# CONFIG_MMA9551 is not set -# CONFIG_MMA9553 is not set -# CONFIG_MMC is not set -# CONFIG_MMC35240 is not set -# CONFIG_MMC_ARMMMCI is not set -# CONFIG_MMC_AU1X is not set -# CONFIG_MMC_BLOCK is not set -CONFIG_MMC_BLOCK_BOUNCE=y -CONFIG_MMC_BLOCK_MINORS=8 -# CONFIG_MMC_CAVIUM_THUNDERX is not set -# CONFIG_MMC_CB710 is not set -# CONFIG_MMC_CQHCI is not set -# CONFIG_MMC_DEBUG is not set -# CONFIG_MMC_DW is not set -# CONFIG_MMC_DW_ROCKCHIP is not set -# CONFIG_MMC_HSQ is not set -# CONFIG_MMC_JZ4740 is not set -# CONFIG_MMC_MTK is not set -# CONFIG_MMC_MVSDIO is not set -# CONFIG_MMC_S3C is not set -# CONFIG_MMC_SDHCI is not set -# CONFIG_MMC_SDHCI_ACPI is not set -# CONFIG_MMC_SDHCI_AM654 is not set -# CONFIG_MMC_SDHCI_BCM_KONA is not set -# CONFIG_MMC_SDHCI_CADENCE is not set -# CONFIG_MMC_SDHCI_F_SDH30 is not set -# CONFIG_MMC_SDHCI_IPROC is not set -# CONFIG_MMC_SDHCI_MILBEAUT is not set -# CONFIG_MMC_SDHCI_MSM is not set -# CONFIG_MMC_SDHCI_OF_ARASAN is not set -# CONFIG_MMC_SDHCI_OF_ASPEED is not set -# CONFIG_MMC_SDHCI_OF_AT91 is not set -# CONFIG_MMC_SDHCI_OF_DWCMSHC is not set -# CONFIG_MMC_SDHCI_OF_ESDHC is not set -# CONFIG_MMC_SDHCI_OF_HLWD is not set -# CONFIG_MMC_SDHCI_OMAP is not set -# CONFIG_MMC_SDHCI_PXAV2 is not set -# CONFIG_MMC_SDHCI_PXAV3 is not set -# CONFIG_MMC_SDHCI_S3C is not set -# CONFIG_MMC_SDHCI_XENON is not set -# CONFIG_MMC_SDRICOH_CS is not set -# CONFIG_MMC_SPI is not set -# CONFIG_MMC_STM32_SDMMC is not set -# CONFIG_MMC_TEST is not set -# CONFIG_MMC_TIFM_SD is not set -# CONFIG_MMC_TOSHIBA_PCI is not set -# CONFIG_MMC_USDHI6ROL0 is not set -# CONFIG_MMC_USHC is not set -# CONFIG_MMC_VIA_SDMMC is not set -# CONFIG_MMC_VUB300 is not set -# CONFIG_MMIOTRACE is not set -CONFIG_MMU=y -CONFIG_MMU_GATHER_RCU_TABLE_FREE=y -CONFIG_MMU_GATHER_TABLE_FREE=y -CONFIG_MODPROBE_PATH="/sbin/modprobe" -CONFIG_MODULES=y -# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set -# CONFIG_MODULE_COMPRESS_GZIP is not set -CONFIG_MODULE_COMPRESS_NONE=y -# CONFIG_MODULE_COMPRESS_XZ is not set -# CONFIG_MODULE_COMPRESS_ZSTD is not set -# CONFIG_MODULE_FORCE_LOAD is not set -# CONFIG_MODULE_FORCE_UNLOAD is not set -# CONFIG_MODULE_SIG is not set -# CONFIG_MODULE_SRCVERSION_ALL is not set -CONFIG_MODULE_STRIPPED=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODVERSIONS is not set -# CONFIG_MOST is not set -# CONFIG_MOTORCOMM_PHY is not set -# CONFIG_MOUSE_APPLETOUCH is not set -# CONFIG_MOUSE_ELAN_I2C is not set -# CONFIG_MOUSE_GPIO is not set -# CONFIG_MOUSE_INPORT is not set -# CONFIG_MOUSE_LOGIBM is not set -# CONFIG_MOUSE_PC110PAD is not set -# CONFIG_MOUSE_PS2_FOCALTECH is not set -# CONFIG_MOUSE_PS2_SENTELIC is not set -# CONFIG_MOUSE_SYNAPTICS_I2C is not set -# CONFIG_MOUSE_SYNAPTICS_USB is not set -# CONFIG_MOXTET is not set -# CONFIG_MPL115 is not set -# CONFIG_MPL115_I2C is not set -# CONFIG_MPL115_SPI is not set -# CONFIG_MPL3115 is not set -# CONFIG_MPLS is not set -# CONFIG_MPTCP is not set -# CONFIG_MPU3050_I2C is not set -# CONFIG_MQ_IOSCHED_DEADLINE is not set -# CONFIG_MQ_IOSCHED_KYBER is not set -# CONFIG_MS5611 is not set -# CONFIG_MS5637 is not set -# CONFIG_MSCC_OCELOT_SWITCH is not set -# CONFIG_MSDOS_FS is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_MSI_BITMAP_SELFTEST is not set -# CONFIG_MSI_LAPTOP is not set -# CONFIG_MST_IRQ is not set -CONFIG_MTD=y -# CONFIG_MTD_ABSENT is not set -# CONFIG_MTD_AFS_PARTS is not set -# CONFIG_MTD_AR7_PARTS is not set -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -# CONFIG_MTD_BLOCK2MTD is not set -CONFIG_MTD_CFI=y -# CONFIG_MTD_CFI_ADV_OPTIONS is not set -CONFIG_MTD_CFI_AMDSTD=y -# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -CONFIG_MTD_CFI_INTELEXT=y -# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set -CONFIG_MTD_CFI_NOSWAP=y -# CONFIG_MTD_CFI_STAA is not set -CONFIG_MTD_CFI_UTIL=y -# CONFIG_MTD_CMDLINE_PARTS is not set -CONFIG_MTD_COMPLEX_MAPPINGS=y -# CONFIG_MTD_DATAFLASH is not set -# CONFIG_MTD_DOCG3 is not set -CONFIG_MTD_GEN_PROBE=y -# CONFIG_MTD_GPIO_ADDR is not set -# CONFIG_MTD_HYPERBUS is not set -# CONFIG_MTD_IMPA7 is not set -# CONFIG_MTD_INTEL_VR_NOR is not set -# CONFIG_MTD_JEDECPROBE is not set -# CONFIG_MTD_LATCH_ADDR is not set -# CONFIG_MTD_LPDDR is not set -# CONFIG_MTD_LPDDR2_NVM is not set -# CONFIG_MTD_M25P80 is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -CONFIG_MTD_MAP_BANK_WIDTH_2=y -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MCHP23K256 is not set -# CONFIG_MTD_MCHP48L640 is not set -# CONFIG_MTD_MT81xx_NOR is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_MYLOADER_PARTS is not set -# CONFIG_MTD_NAND is not set -# CONFIG_MTD_NAND_AMS_DELTA is not set -# CONFIG_MTD_NAND_AR934X is not set -# CONFIG_MTD_NAND_AR934X_HW_ECC is not set -# CONFIG_MTD_NAND_ARASAN is not set -# CONFIG_MTD_NAND_ATMEL is not set -# CONFIG_MTD_NAND_AU1550 is not set -# CONFIG_MTD_NAND_BCH is not set -# CONFIG_MTD_NAND_BF5XX is not set -# CONFIG_MTD_NAND_BRCMNAND is not set -# CONFIG_MTD_NAND_CADENCE is not set -# CONFIG_MTD_NAND_CAFE is not set -# CONFIG_MTD_NAND_CM_X270 is not set -# CONFIG_MTD_NAND_CS553X is not set -# CONFIG_MTD_NAND_DAVINCI is not set -# CONFIG_MTD_NAND_DENALI is not set -# CONFIG_MTD_NAND_DENALI_DT is not set -# CONFIG_MTD_NAND_DENALI_PCI is not set -CONFIG_MTD_NAND_DENALI_SCRATCH_REG_ADDR=0xff108018 -# CONFIG_MTD_NAND_DISKONCHIP is not set -# CONFIG_MTD_NAND_DOCG4 is not set -# CONFIG_MTD_NAND_ECC is not set -# CONFIG_MTD_NAND_ECC_BCH is not set -# CONFIG_MTD_NAND_ECC_SMC is not set -# CONFIG_MTD_NAND_ECC_SW_BCH is not set -# CONFIG_MTD_NAND_ECC_SW_HAMMING is not set -# CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC is not set -# CONFIG_MTD_NAND_FSL_ELBC is not set -# CONFIG_MTD_NAND_FSL_IFC is not set -# CONFIG_MTD_NAND_FSL_UPM is not set -# CONFIG_MTD_NAND_FSMC is not set -# CONFIG_MTD_NAND_GPIO is not set -# CONFIG_MTD_NAND_GPMI_NAND is not set -# CONFIG_MTD_NAND_HISI504 is not set -CONFIG_MTD_NAND_IDS=y -# CONFIG_MTD_NAND_INTEL_LGM is not set -# CONFIG_MTD_NAND_JZ4740 is not set -# CONFIG_MTD_NAND_MPC5121_NFC is not set -# CONFIG_MTD_NAND_MTK is not set -# CONFIG_MTD_NAND_MXC is not set -# CONFIG_MTD_NAND_MXIC is not set -# CONFIG_MTD_NAND_NANDSIM is not set -# CONFIG_MTD_NAND_NDFC is not set -# CONFIG_MTD_NAND_NUC900 is not set -# CONFIG_MTD_NAND_OMAP2 is not set -# CONFIG_MTD_NAND_OMAP_BCH_BUILD is not set -# CONFIG_MTD_NAND_ORION is not set -# CONFIG_MTD_NAND_PASEMI is not set -# CONFIG_MTD_NAND_PLATFORM is not set -# CONFIG_MTD_NAND_PXA3xx is not set -# CONFIG_MTD_NAND_RB4XX is not set -# CONFIG_MTD_NAND_RB750 is not set -# CONFIG_MTD_NAND_RB91X is not set -# CONFIG_MTD_NAND_RICOH is not set -# CONFIG_MTD_NAND_S3C2410 is not set -# CONFIG_MTD_NAND_SHARPSL is not set -# CONFIG_MTD_NAND_SH_FLCTL is not set -# CONFIG_MTD_NAND_SOCRATES is not set -# CONFIG_MTD_NAND_TMIO is not set -# CONFIG_MTD_NAND_TXX9NDFMC is not set -CONFIG_MTD_OF_PARTS=y -# CONFIG_MTD_ONENAND is not set -# CONFIG_MTD_OOPS is not set -# CONFIG_MTD_OTP is not set -# CONFIG_MTD_PARTITIONED_MASTER is not set -# CONFIG_MTD_PCI is not set -# CONFIG_MTD_PCMCIA is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_PHYSMAP is not set -# CONFIG_MTD_PHYSMAP_COMPAT is not set -# CONFIG_MTD_PHYSMAP_GEMINI is not set -# CONFIG_MTD_PHYSMAP_GPIO_ADDR is not set -# CONFIG_MTD_PHYSMAP_IXP4XX is not set -CONFIG_MTD_PHYSMAP_OF=y -# CONFIG_MTD_PHYSMAP_OF_GEMINI is not set -# CONFIG_MTD_PHYSMAP_OF_VERSATILE is not set -# CONFIG_MTD_PHYSMAP_VERSATILE is not set -# CONFIG_MTD_PLATRAM is not set -# CONFIG_MTD_PMC551 is not set -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_RAW_NAND is not set -CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set -# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set -# CONFIG_MTD_ROM is not set -CONFIG_MTD_ROOTFS_ROOT_DEV=y -# CONFIG_MTD_ROUTERBOOT_PARTS is not set -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_SM_COMMON is not set -# CONFIG_MTD_SPINAND_MT29F is not set -# CONFIG_MTD_SPI_NAND is not set -# CONFIG_MTD_SPI_NOR is not set -CONFIG_MTD_SPI_NOR_SWP_DISABLE=y -# CONFIG_MTD_SPI_NOR_SWP_DISABLE_ON_VOLATILE is not set -# CONFIG_MTD_SPI_NOR_SWP_KEEP is not set -# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set -CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT=4096 -CONFIG_MTD_SPLIT=y -# CONFIG_MTD_SPLIT_BCM63XX_FW is not set -# CONFIG_MTD_SPLIT_BCM_WFI_FW is not set -# CONFIG_MTD_SPLIT_BRNIMAGE_FW is not set -# CONFIG_MTD_SPLIT_ELF_FW is not set -# CONFIG_MTD_SPLIT_EVA_FW is not set -# CONFIG_MTD_SPLIT_FIRMWARE is not set -CONFIG_MTD_SPLIT_FIRMWARE_NAME="firmware" -# CONFIG_MTD_SPLIT_FIT_FW is not set -# CONFIG_MTD_SPLIT_JIMAGE_FW is not set -# CONFIG_MTD_SPLIT_LZMA_FW is not set -# CONFIG_MTD_SPLIT_MINOR_FW is not set -# CONFIG_MTD_SPLIT_SEAMA_FW is not set -CONFIG_MTD_SPLIT_SQUASHFS_ROOT=y -CONFIG_MTD_SPLIT_SUPPORT=y -# CONFIG_MTD_SPLIT_TPLINK_FW is not set -# CONFIG_MTD_SPLIT_TRX_FW is not set -# CONFIG_MTD_SPLIT_UIMAGE_FW is not set -# CONFIG_MTD_SPLIT_WRGG_FW is not set -# CONFIG_MTD_SST25L is not set -# CONFIG_MTD_SWAP is not set -# CONFIG_MTD_TESTS is not set -# CONFIG_MTD_UBI is not set -# CONFIG_MTD_UBI_FASTMAP is not set -# CONFIG_MTD_UBI_GLUEBI is not set -# CONFIG_MTD_UIMAGE_SPLIT is not set -# CONFIG_MTD_VIRT_CONCAT is not set -# CONFIG_MTK_MMC is not set -# CONFIG_MTK_MMSYS is not set -CONFIG_MULTIUSER=y -# CONFIG_MUTEX_SPIN_ON_OWNER is not set -# CONFIG_MV643XX_ETH is not set -# CONFIG_MVMDIO is not set -# CONFIG_MVNETA_BM is not set -# CONFIG_MVSW61XX_PHY is not set -# CONFIG_MVSWITCH_PHY is not set -# CONFIG_MV_XOR_V2 is not set -# CONFIG_MWAVE is not set -# CONFIG_MWL8K is not set -# CONFIG_MXC4005 is not set -# CONFIG_MXC6255 is not set -# CONFIG_MYRI10GE is not set -# CONFIG_NAMESPACES is not set -# CONFIG_NATIONAL_PHY is not set -# CONFIG_NATSEMI is not set -# CONFIG_NAU7802 is not set -# CONFIG_NBPFAXI_DMA is not set -# CONFIG_NCP_FS is not set -# CONFIG_ND_BLK is not set -# CONFIG_NE2000 is not set -# CONFIG_NE2K_PCI is not set -# CONFIG_NEC_MARKEINS is not set -CONFIG_NET=y -# CONFIG_NETCONSOLE is not set -CONFIG_NETDEVICES=y -# CONFIG_NETDEVSIM is not set -# CONFIG_NETFILTER is not set -# CONFIG_NETFILTER_ADVANCED is not set -# CONFIG_NETFILTER_DEBUG is not set -# CONFIG_NETFILTER_EGRESS is not set -# CONFIG_NETFILTER_INGRESS is not set -# CONFIG_NETFILTER_NETLINK is not set -# CONFIG_NETFILTER_NETLINK_ACCT is not set -# CONFIG_NETFILTER_NETLINK_GLUE_CT is not set -# CONFIG_NETFILTER_NETLINK_HOOK is not set -# CONFIG_NETFILTER_NETLINK_LOG is not set -# CONFIG_NETFILTER_NETLINK_OSF is not set -# CONFIG_NETFILTER_NETLINK_QUEUE is not set -# CONFIG_NETFILTER_XTABLES is not set -# CONFIG_NETFILTER_XTABLES_COMPAT is not set -# CONFIG_NETFILTER_XT_CONNMARK is not set -# CONFIG_NETFILTER_XT_MARK is not set -# CONFIG_NETFILTER_XT_MATCH_ADDRTYPE is not set -# CONFIG_NETFILTER_XT_MATCH_BPF is not set -# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set -# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set -# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set -# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set -# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set -# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set -# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set -# CONFIG_NETFILTER_XT_MATCH_CONNTRACK is not set -# CONFIG_NETFILTER_XT_MATCH_CPU is not set -# CONFIG_NETFILTER_XT_MATCH_DCCP is not set -# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set -# CONFIG_NETFILTER_XT_MATCH_DSCP is not set -# CONFIG_NETFILTER_XT_MATCH_ECN is not set -# CONFIG_NETFILTER_XT_MATCH_ESP is not set -# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set -# CONFIG_NETFILTER_XT_MATCH_HELPER is not set -# CONFIG_NETFILTER_XT_MATCH_HL is not set -# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set -# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set -# CONFIG_NETFILTER_XT_MATCH_L2TP is not set -# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set -# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set -# CONFIG_NETFILTER_XT_MATCH_MAC is not set -# CONFIG_NETFILTER_XT_MATCH_MARK is not set -# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set -# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set -# CONFIG_NETFILTER_XT_MATCH_OSF is not set -# CONFIG_NETFILTER_XT_MATCH_OWNER is not set -# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set -# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set -# CONFIG_NETFILTER_XT_MATCH_POLICY is not set -# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set -# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set -# CONFIG_NETFILTER_XT_MATCH_REALM is not set -# CONFIG_NETFILTER_XT_MATCH_RECENT is not set -# CONFIG_NETFILTER_XT_MATCH_SCTP is not set -# CONFIG_NETFILTER_XT_MATCH_SOCKET is not set -# CONFIG_NETFILTER_XT_MATCH_STATE is not set -# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set -# CONFIG_NETFILTER_XT_MATCH_STRING is not set -# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set -# CONFIG_NETFILTER_XT_MATCH_TIME is not set -# CONFIG_NETFILTER_XT_MATCH_U32 is not set -# CONFIG_NETFILTER_XT_TARGET_AUDIT is not set -# CONFIG_NETFILTER_XT_TARGET_CHECKSUM is not set -# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set -# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set -# CONFIG_NETFILTER_XT_TARGET_CT is not set -# CONFIG_NETFILTER_XT_TARGET_DSCP is not set -# CONFIG_NETFILTER_XT_TARGET_HL is not set -# CONFIG_NETFILTER_XT_TARGET_HMARK is not set -# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set -# CONFIG_NETFILTER_XT_TARGET_LED is not set -# CONFIG_NETFILTER_XT_TARGET_LOG is not set -# CONFIG_NETFILTER_XT_TARGET_MARK is not set -# CONFIG_NETFILTER_XT_TARGET_NETMAP is not set -# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set -# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set -# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set -# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set -# CONFIG_NETFILTER_XT_TARGET_REDIRECT is not set -# CONFIG_NETFILTER_XT_TARGET_SECMARK is not set -# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set -# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set -# CONFIG_NETFILTER_XT_TARGET_TEE is not set -# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set -# CONFIG_NETFILTER_XT_TARGET_TRACE is not set -# CONFIG_NETFS_STATS is not set -# CONFIG_NETFS_SUPPORT is not set -# CONFIG_NETLABEL is not set -# CONFIG_NETLINK_DIAG is not set -# CONFIG_NETLINK_MMAP is not set -# CONFIG_NETPOLL is not set -# CONFIG_NETROM is not set -CONFIG_NETWORK_FILESYSTEMS=y -# CONFIG_NETWORK_PHY_TIMESTAMPING is not set -# CONFIG_NETWORK_SECMARK is not set -# CONFIG_NETXEN_NIC is not set -# CONFIG_NET_9P is not set -# CONFIG_NET_ACT_BPF is not set -# CONFIG_NET_ACT_CSUM is not set -# CONFIG_NET_ACT_CT is not set -# CONFIG_NET_ACT_GACT is not set -# CONFIG_NET_ACT_GATE is not set -# CONFIG_NET_ACT_IFE is not set -# CONFIG_NET_ACT_IPT is not set -# CONFIG_NET_ACT_MIRRED is not set -# CONFIG_NET_ACT_MPLS is not set -# CONFIG_NET_ACT_NAT is not set -# CONFIG_NET_ACT_PEDIT is not set -# CONFIG_NET_ACT_POLICE is not set -# CONFIG_NET_ACT_SAMPLE is not set -# CONFIG_NET_ACT_SIMP is not set -# CONFIG_NET_ACT_SKBEDIT is not set -# CONFIG_NET_ACT_SKBMOD is not set -# CONFIG_NET_ACT_TUNNEL_KEY is not set -# CONFIG_NET_ACT_VLAN is not set -CONFIG_NET_CADENCE=y -# CONFIG_NET_CALXEDA_XGMAC is not set -CONFIG_NET_CLS=y -# CONFIG_NET_CLS_ACT is not set -# CONFIG_NET_CLS_BASIC is not set -# CONFIG_NET_CLS_BPF is not set -# CONFIG_NET_CLS_FLOW is not set -# CONFIG_NET_CLS_FLOWER is not set -# CONFIG_NET_CLS_FW is not set -CONFIG_NET_CLS_IND=y -# CONFIG_NET_CLS_MATCHALL is not set -# CONFIG_NET_CLS_ROUTE4 is not set -# CONFIG_NET_CLS_RSVP is not set -# CONFIG_NET_CLS_RSVP6 is not set -# CONFIG_NET_CLS_TCINDEX is not set -# CONFIG_NET_CLS_U32 is not set -CONFIG_NET_CORE=y -# CONFIG_NET_DEVLINK is not set -# CONFIG_NET_DEV_REFCNT_TRACKER is not set -# CONFIG_NET_DROP_MONITOR is not set -# CONFIG_NET_DSA is not set -# CONFIG_NET_DSA_AR9331 is not set -# CONFIG_NET_DSA_BCM_SF2 is not set -# CONFIG_NET_DSA_LANTIQ_GSWIP is not set -# CONFIG_NET_DSA_LEGACY is not set -# CONFIG_NET_DSA_LOOP is not set -# CONFIG_NET_DSA_MICROCHIP_KSZ8795 is not set -# CONFIG_NET_DSA_MICROCHIP_KSZ9477 is not set -# CONFIG_NET_DSA_MSCC_SEVILLE is not set -# CONFIG_NET_DSA_MT7530 is not set -# CONFIG_NET_DSA_MV88E6060 is not set -# CONFIG_NET_DSA_MV88E6123_61_65 is not set -# CONFIG_NET_DSA_MV88E6131 is not set -# CONFIG_NET_DSA_MV88E6171 is not set -# CONFIG_NET_DSA_MV88E6352 is not set -# CONFIG_NET_DSA_MV88E6XXX is not set -# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set -# CONFIG_NET_DSA_MV88E6XXX_PTP is not set -# CONFIG_NET_DSA_QCA8K is not set -# CONFIG_NET_DSA_REALTEK_SMI is not set -# CONFIG_NET_DSA_SJA1105 is not set -# CONFIG_NET_DSA_SMSC_LAN9303_I2C is not set -# CONFIG_NET_DSA_SMSC_LAN9303_MDIO is not set -# CONFIG_NET_DSA_TAG_8021Q is not set -# CONFIG_NET_DSA_TAG_AR9331 is not set -# CONFIG_NET_DSA_TAG_BRCM is not set -# CONFIG_NET_DSA_TAG_BRCM_LEGACY is not set -# CONFIG_NET_DSA_TAG_BRCM_PREPEND is not set -# CONFIG_NET_DSA_TAG_DSA is not set -# CONFIG_NET_DSA_TAG_DSA_COMMON is not set -# CONFIG_NET_DSA_TAG_EDSA is not set -# CONFIG_NET_DSA_TAG_GSWIP is not set -# CONFIG_NET_DSA_TAG_HELLCREEK is not set -# CONFIG_NET_DSA_TAG_KSZ is not set -# CONFIG_NET_DSA_TAG_LAN9303 is not set -# CONFIG_NET_DSA_TAG_MTK is not set -# CONFIG_NET_DSA_TAG_OCELOT is not set -# CONFIG_NET_DSA_TAG_OCELOT_8021Q is not set -# CONFIG_NET_DSA_TAG_QCA is not set -# CONFIG_NET_DSA_TAG_RTL4_A is not set -# CONFIG_NET_DSA_TAG_RTL8_4 is not set -# CONFIG_NET_DSA_TAG_SJA1105 is not set -# CONFIG_NET_DSA_TAG_TRAILER is not set -# CONFIG_NET_DSA_TAG_XRS700X is not set -# CONFIG_NET_DSA_VITESSE_VSC73XX is not set -# CONFIG_NET_DSA_VITESSE_VSC73XX_PLATFORM is not set -# CONFIG_NET_DSA_VITESSE_VSC73XX_SPI is not set -# CONFIG_NET_DSA_XRS700X_I2C is not set -# CONFIG_NET_DSA_XRS700X_MDIO is not set -# CONFIG_NET_EMATCH is not set -# CONFIG_NET_EMATCH_CANID is not set -# CONFIG_NET_EMATCH_CMP is not set -# CONFIG_NET_EMATCH_IPT is not set -# CONFIG_NET_EMATCH_META is not set -# CONFIG_NET_EMATCH_NBYTE is not set -CONFIG_NET_EMATCH_STACK=32 -# CONFIG_NET_EMATCH_TEXT is not set -# CONFIG_NET_EMATCH_U32 is not set -# CONFIG_NET_FAILOVER is not set -# CONFIG_NET_FC is not set -# CONFIG_NET_FOU is not set -# CONFIG_NET_FOU_IP_TUNNELS is not set -# CONFIG_NET_IFE is not set -# CONFIG_NET_IPGRE is not set -CONFIG_NET_IPGRE_BROADCAST=y -# CONFIG_NET_IPGRE_DEMUX is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPVTI is not set -# CONFIG_NET_IP_TUNNEL is not set -# CONFIG_NET_KEY is not set -# CONFIG_NET_KEY_MIGRATE is not set -# CONFIG_NET_L3_MASTER_DEV is not set -# CONFIG_NET_MEDIATEK_STAR_EMAC is not set -# CONFIG_NET_MPLS_GSO is not set -# CONFIG_NET_NCSI is not set -# CONFIG_NET_NSH is not set -# CONFIG_NET_NS_REFCNT_TRACKER is not set -# CONFIG_NET_PACKET_ENGINE is not set -# CONFIG_NET_PKTGEN is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_NET_PTP_CLASSIFY is not set -CONFIG_NET_RX_BUSY_POLL=y -# CONFIG_NET_SB1000 is not set -CONFIG_NET_SCHED=y -# CONFIG_NET_SCH_ATM is not set -# CONFIG_NET_SCH_CAKE is not set -# CONFIG_NET_SCH_CBQ is not set -# CONFIG_NET_SCH_CBS is not set -# CONFIG_NET_SCH_CHOKE is not set -# CONFIG_NET_SCH_CODEL is not set -CONFIG_NET_SCH_DEFAULT=y -# CONFIG_NET_SCH_DRR is not set -# CONFIG_NET_SCH_DSMARK is not set -# CONFIG_NET_SCH_ETF is not set -# CONFIG_NET_SCH_ETS is not set -CONFIG_NET_SCH_FIFO=y -# CONFIG_NET_SCH_FQ is not set -CONFIG_NET_SCH_FQ_CODEL=y -# CONFIG_NET_SCH_FQ_PIE is not set -# CONFIG_NET_SCH_GRED is not set -# CONFIG_NET_SCH_HFSC is not set -# CONFIG_NET_SCH_HHF is not set -# CONFIG_NET_SCH_HTB is not set -# CONFIG_NET_SCH_INGRESS is not set -# CONFIG_NET_SCH_MQPRIO is not set -# CONFIG_NET_SCH_MULTIQ is not set -# CONFIG_NET_SCH_NETEM is not set -# CONFIG_NET_SCH_PIE is not set -# CONFIG_NET_SCH_PLUG is not set -# CONFIG_NET_SCH_PRIO is not set -# CONFIG_NET_SCH_QFQ is not set -# CONFIG_NET_SCH_RED is not set -# CONFIG_NET_SCH_SFB is not set -# CONFIG_NET_SCH_SFQ is not set -# CONFIG_NET_SCH_SKBPRIO is not set -# CONFIG_NET_SCH_TAPRIO is not set -# CONFIG_NET_SCH_TBF is not set -# CONFIG_NET_SCH_TEQL is not set -# CONFIG_NET_SCTPPROBE is not set -# CONFIG_NET_SELFTESTS is not set -# CONFIG_NET_SOCK_MSG is not set -# CONFIG_NET_SWITCHDEV is not set -# CONFIG_NET_TCPPROBE is not set -# CONFIG_NET_TC_SKB_EXT is not set -# CONFIG_NET_TEAM is not set -# CONFIG_NET_TULIP is not set -# CONFIG_NET_UDP_TUNNEL is not set -CONFIG_NET_VENDOR_3COM=y -CONFIG_NET_VENDOR_8390=y -CONFIG_NET_VENDOR_ADAPTEC=y -CONFIG_NET_VENDOR_AGERE=y -CONFIG_NET_VENDOR_ALACRITECH=y -CONFIG_NET_VENDOR_ALTEON=y -CONFIG_NET_VENDOR_AMAZON=y -CONFIG_NET_VENDOR_AMD=y -CONFIG_NET_VENDOR_AQUANTIA=y -CONFIG_NET_VENDOR_ARC=y -# CONFIG_NET_VENDOR_ASIX is not set -CONFIG_NET_VENDOR_ATHEROS=y -CONFIG_NET_VENDOR_AURORA=y -CONFIG_NET_VENDOR_BROADCOM=y -CONFIG_NET_VENDOR_BROCADE=y -CONFIG_NET_VENDOR_CADENCE=y -CONFIG_NET_VENDOR_CAVIUM=y -CONFIG_NET_VENDOR_CHELSIO=y -CONFIG_NET_VENDOR_CIRRUS=y -CONFIG_NET_VENDOR_CISCO=y -CONFIG_NET_VENDOR_CORTINA=y -CONFIG_NET_VENDOR_DEC=y -CONFIG_NET_VENDOR_DLINK=y -CONFIG_NET_VENDOR_EMULEX=y -# CONFIG_NET_VENDOR_ENGLEDER is not set -CONFIG_NET_VENDOR_EXAR=y -CONFIG_NET_VENDOR_EZCHIP=y -CONFIG_NET_VENDOR_FARADAY=y -CONFIG_NET_VENDOR_FREESCALE=y -CONFIG_NET_VENDOR_FUJITSU=y -CONFIG_NET_VENDOR_GOOGLE=y -CONFIG_NET_VENDOR_HISILICON=y -CONFIG_NET_VENDOR_HP=y -CONFIG_NET_VENDOR_HUAWEI=y -CONFIG_NET_VENDOR_I825XX=y -CONFIG_NET_VENDOR_IBM=y -CONFIG_NET_VENDOR_INTEL=y -# CONFIG_NET_VENDOR_LITEX is not set -CONFIG_NET_VENDOR_MARVELL=y -CONFIG_NET_VENDOR_MELLANOX=y -CONFIG_NET_VENDOR_MICREL=y -CONFIG_NET_VENDOR_MICROCHIP=y -CONFIG_NET_VENDOR_MICROSEMI=y -CONFIG_NET_VENDOR_MICROSOFT=y -CONFIG_NET_VENDOR_MYRI=y -CONFIG_NET_VENDOR_NATSEMI=y -CONFIG_NET_VENDOR_NETERION=y -CONFIG_NET_VENDOR_NETRONOME=y -CONFIG_NET_VENDOR_NI=y -CONFIG_NET_VENDOR_NVIDIA=y -CONFIG_NET_VENDOR_OKI=y -CONFIG_NET_VENDOR_PACKET_ENGINES=y -CONFIG_NET_VENDOR_PENSANDO=y -CONFIG_NET_VENDOR_QLOGIC=y -CONFIG_NET_VENDOR_QUALCOMM=y -CONFIG_NET_VENDOR_RDC=y -CONFIG_NET_VENDOR_REALTEK=y -CONFIG_NET_VENDOR_RENESAS=y -CONFIG_NET_VENDOR_ROCKER=y -CONFIG_NET_VENDOR_SAMSUNG=y -CONFIG_NET_VENDOR_SEEQ=y -CONFIG_NET_VENDOR_SILAN=y -CONFIG_NET_VENDOR_SIS=y -CONFIG_NET_VENDOR_SMSC=y -CONFIG_NET_VENDOR_SOCIONEXT=y -CONFIG_NET_VENDOR_SOLARFLARE=y -CONFIG_NET_VENDOR_STMICRO=y -CONFIG_NET_VENDOR_SUN=y -CONFIG_NET_VENDOR_SYNOPSYS=y -CONFIG_NET_VENDOR_TEHUTI=y -CONFIG_NET_VENDOR_TI=y -CONFIG_NET_VENDOR_TOSHIBA=y -# CONFIG_NET_VENDOR_VERTEXCOM is not set -CONFIG_NET_VENDOR_VIA=y -CONFIG_NET_VENDOR_WIZNET=y -CONFIG_NET_VENDOR_XILINX=y -CONFIG_NET_VENDOR_XIRCOM=y -# CONFIG_NET_VRF is not set -# CONFIG_NET_XGENE is not set -CONFIG_NEW_LEDS=y -# CONFIG_NFC is not set -# CONFIG_NFP is not set -# CONFIG_NFSD is not set -# CONFIG_NFSD_V2_ACL is not set -CONFIG_NFSD_V3=y -# CONFIG_NFSD_V3_ACL is not set -# CONFIG_NFSD_V4 is not set -# CONFIG_NFS_ACL_SUPPORT is not set -CONFIG_NFS_COMMON=y -# CONFIG_NFS_DISABLE_UDP_SUPPORT is not set -# CONFIG_NFS_FS is not set -# CONFIG_NFS_FSCACHE is not set -# CONFIG_NFS_SWAP is not set -# CONFIG_NFS_V2 is not set -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_V4_1 is not set -# CONFIG_NFTL is not set -# CONFIG_NFT_BRIDGE_META is not set -# CONFIG_NFT_BRIDGE_REJECT is not set -# CONFIG_NFT_CONNLIMIT is not set -# CONFIG_NFT_DUP_IPV4 is not set -# CONFIG_NFT_DUP_IPV6 is not set -# CONFIG_NFT_FIB_IPV4 is not set -# CONFIG_NFT_FIB_IPV6 is not set -# CONFIG_NFT_FIB_NETDEV is not set -# CONFIG_NFT_FLOW_OFFLOAD is not set -# CONFIG_NFT_OBJREF is not set -# CONFIG_NFT_OSF is not set -# CONFIG_NFT_REJECT_NETDEV is not set -# CONFIG_NFT_RT is not set -# CONFIG_NFT_SET_BITMAP is not set -# CONFIG_NFT_SOCKET is not set -# CONFIG_NFT_SYNPROXY is not set -# CONFIG_NFT_TPROXY is not set -# CONFIG_NFT_TUNNEL is not set -# CONFIG_NFT_XFRM is not set -# CONFIG_NF_CONNTRACK is not set -# CONFIG_NF_CONNTRACK_AMANDA is not set -# CONFIG_NF_CONNTRACK_BRIDGE is not set -# CONFIG_NF_CONNTRACK_EVENTS is not set -# CONFIG_NF_CONNTRACK_FTP is not set -# CONFIG_NF_CONNTRACK_H323 is not set -# CONFIG_NF_CONNTRACK_IPV4 is not set -# CONFIG_NF_CONNTRACK_IPV6 is not set -# CONFIG_NF_CONNTRACK_IRC is not set -# CONFIG_NF_CONNTRACK_LABELS is not set -# CONFIG_NF_CONNTRACK_MARK is not set -# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set -# CONFIG_NF_CONNTRACK_PPTP is not set -CONFIG_NF_CONNTRACK_PROCFS=y -# CONFIG_NF_CONNTRACK_PROC_COMPAT is not set -# CONFIG_NF_CONNTRACK_SANE is not set -# CONFIG_NF_CONNTRACK_SECMARK is not set -# CONFIG_NF_CONNTRACK_SIP is not set -# CONFIG_NF_CONNTRACK_SNMP is not set -# CONFIG_NF_CONNTRACK_TFTP is not set -# CONFIG_NF_CONNTRACK_TIMEOUT is not set -# CONFIG_NF_CONNTRACK_TIMESTAMP is not set -# CONFIG_NF_CONNTRACK_ZONES is not set -# CONFIG_NF_CT_NETLINK is not set -# CONFIG_NF_CT_NETLINK_HELPER is not set -# CONFIG_NF_CT_NETLINK_TIMEOUT is not set -# CONFIG_NF_CT_PROTO_DCCP is not set -# CONFIG_NF_CT_PROTO_GRE is not set -# CONFIG_NF_CT_PROTO_SCTP is not set -# CONFIG_NF_CT_PROTO_UDPLITE is not set -# CONFIG_NF_DEFRAG_IPV4 is not set -# CONFIG_NF_DUP_IPV4 is not set -# CONFIG_NF_DUP_IPV6 is not set -# CONFIG_NF_FLOW_TABLE is not set -# CONFIG_NF_LOG_ARP is not set -CONFIG_NF_LOG_IPV4=y -CONFIG_NF_LOG_IPV6=y -CONFIG_NF_LOG_SYSLOG=y -# CONFIG_NF_NAT is not set -# CONFIG_NF_NAT_AMANDA is not set -# CONFIG_NF_NAT_FTP is not set -# CONFIG_NF_NAT_H323 is not set -# CONFIG_NF_NAT_IPV6 is not set -# CONFIG_NF_NAT_IRC is not set -CONFIG_NF_NAT_MASQUERADE_IPV4=y -CONFIG_NF_NAT_MASQUERADE_IPV6=y -# CONFIG_NF_NAT_NEEDED is not set -# CONFIG_NF_NAT_PPTP is not set -# CONFIG_NF_NAT_PROTO_GRE is not set -# CONFIG_NF_NAT_SIP is not set -# CONFIG_NF_NAT_SNMP_BASIC is not set -# CONFIG_NF_NAT_TFTP is not set -# CONFIG_NF_REJECT_IPV4 is not set -# CONFIG_NF_REJECT_IPV6 is not set -# CONFIG_NF_SOCKET_IPV4 is not set -# CONFIG_NF_SOCKET_IPV6 is not set -# CONFIG_NF_TABLES is not set -CONFIG_NF_TABLES_ARP=y -CONFIG_NF_TABLES_BRIDGE=y -CONFIG_NF_TABLES_INET=y -CONFIG_NF_TABLES_IPV4=y -CONFIG_NF_TABLES_IPV6=y -CONFIG_NF_TABLES_NETDEV=y -# CONFIG_NF_TABLES_SET is not set -# CONFIG_NF_TPROXY_IPV4 is not set -# CONFIG_NF_TPROXY_IPV6 is not set -# CONFIG_NI65 is not set -# CONFIG_NI903X_WDT is not set -# CONFIG_NIC7018_WDT is not set -# CONFIG_NILFS2_FS is not set -# CONFIG_NIU is not set -# CONFIG_NI_XGE_MANAGEMENT_ENET is not set -CONFIG_NLATTR=y -# CONFIG_NLMON is not set -# CONFIG_NLM_XLP_BOARD is not set -# CONFIG_NLM_XLR_BOARD is not set -# CONFIG_NLS is not set -# CONFIG_NLS_ASCII is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_CODEPAGE_437 is not set -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -CONFIG_NLS_DEFAULT="iso8859-1" -# CONFIG_NLS_ISO8859_1 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -# CONFIG_NLS_MAC_CELTIC is not set -# CONFIG_NLS_MAC_CENTEURO is not set -# CONFIG_NLS_MAC_CROATIAN is not set -# CONFIG_NLS_MAC_CYRILLIC is not set -# CONFIG_NLS_MAC_GAELIC is not set -# CONFIG_NLS_MAC_GREEK is not set -# CONFIG_NLS_MAC_ICELAND is not set -# CONFIG_NLS_MAC_INUIT is not set -# CONFIG_NLS_MAC_ROMAN is not set -# CONFIG_NLS_MAC_ROMANIAN is not set -# CONFIG_NLS_MAC_TURKISH is not set -# CONFIG_NLS_UTF8 is not set -CONFIG_NMI_LOG_BUF_SHIFT=13 -# CONFIG_NOA1305 is not set -# CONFIG_NOP_USB_XCEIV is not set -# CONFIG_NORTEL_HERMES is not set -# CONFIG_NOTIFIER_ERROR_INJECTION is not set -# CONFIG_NOUVEAU_LEGACY_CTX_SUPPORT is not set -# CONFIG_NOZOMI is not set -# CONFIG_NO_BOOTMEM is not set -# CONFIG_NO_HZ is not set -# CONFIG_NO_HZ_FULL is not set -# CONFIG_NO_HZ_IDLE is not set -CONFIG_NR_CPUS=256 -# CONFIG_NS83820 is not set -# CONFIG_NTB is not set -# CONFIG_NTFS3_FS is not set -# CONFIG_NTFS_DEBUG is not set -# CONFIG_NTFS_FS is not set -# CONFIG_NTFS_RW is not set -# CONFIG_NTP_PPS is not set -# CONFIG_NULL_TTY is not set -# CONFIG_NUMA is not set -# CONFIG_NVIDIA_CARMEL_CNP_ERRATUM is not set -# CONFIG_NVM is not set -# CONFIG_NVMEM is not set -# CONFIG_NVMEM_BCM_OCOTP is not set -# CONFIG_NVMEM_IMX_OCOTP is not set -# CONFIG_NVMEM_NINTENDO_OTP is not set -# CONFIG_NVMEM_REBOOT_MODE is not set -CONFIG_NVMEM_RMEM=y -# CONFIG_NVMEM_SYSFS is not set -# CONFIG_NVME_FC is not set -# CONFIG_NVME_TARGET is not set -# CONFIG_NVME_TCP is not set -# CONFIG_NVRAM is not set -# CONFIG_NV_TCO is not set -# CONFIG_NXP_C45_TJA11XX_PHY is not set -# CONFIG_NXP_STB220 is not set -# CONFIG_NXP_STB225 is not set -# CONFIG_NXP_TJA11XX_PHY is not set -# CONFIG_N_GSM is not set -# CONFIG_OABI_COMPAT is not set -# CONFIG_OBS600 is not set -# CONFIG_OCFS2_FS is not set -# CONFIG_OCTEONTX2_AF is not set -# CONFIG_OCTEONTX2_PF is not set -# CONFIG_OF_OVERLAY is not set -CONFIG_OF_RESERVED_MEM=y -# CONFIG_OF_UNITTEST is not set -# CONFIG_OID_REGISTRY is not set -# CONFIG_OMAP2_DSS_DEBUG is not set -# CONFIG_OMAP2_DSS_DEBUGFS is not set -# CONFIG_OMAP2_DSS_SDI is not set -# CONFIG_OMAP_OCP2SCP is not set -# CONFIG_OMAP_USB2 is not set -# CONFIG_OMFS_FS is not set -# CONFIG_OPENVSWITCH is not set -# CONFIG_OPROFILE is not set -# CONFIG_OPROFILE_EVENT_MULTIPLEX is not set -# CONFIG_OPT3001 is not set -CONFIG_OPTIMIZE_INLINING=y -# CONFIG_ORANGEFS_FS is not set -# CONFIG_ORION_WATCHDOG is not set -# CONFIG_OSF_PARTITION is not set -CONFIG_OVERLAY_FS=y -# CONFIG_OVERLAY_FS_INDEX is not set -# CONFIG_OVERLAY_FS_METACOPY is not set -CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y -# CONFIG_OVERLAY_FS_REDIRECT_DIR is not set -CONFIG_OVERLAY_FS_XINO_AUTO=y -# CONFIG_OWL_LOADER is not set -# CONFIG_P54_COMMON is not set -# CONFIG_PA12203001 is not set -CONFIG_PACKET=y -# CONFIG_PACKET_DIAG is not set -# CONFIG_PACKING is not set -# CONFIG_PAGE_EXTENSION is not set -# CONFIG_PAGE_OWNER is not set -# CONFIG_PAGE_POISONING is not set -# CONFIG_PAGE_REPORTING is not set -# CONFIG_PAGE_SIZE_16KB is not set -# CONFIG_PAGE_SIZE_32KB is not set -CONFIG_PAGE_SIZE_4KB=y -# CONFIG_PAGE_SIZE_64KB is not set -# CONFIG_PAGE_SIZE_8KB is not set -# CONFIG_PAGE_SIZE_LESS_THAN_64KB is not set -# CONFIG_PALMAS_GPADC is not set -# CONFIG_PANASONIC_LAPTOP is not set -# CONFIG_PANEL is not set -CONFIG_PANIC_ON_OOPS=y -CONFIG_PANIC_ON_OOPS_VALUE=1 -CONFIG_PANIC_TIMEOUT=1 -# CONFIG_PANTHERLORD_FF is not set -# CONFIG_PARAVIRT is not set -# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set -# CONFIG_PARPORT is not set -# CONFIG_PARPORT_1284 is not set -# CONFIG_PARPORT_AX88796 is not set -# CONFIG_PARPORT_GSC is not set -# CONFIG_PARPORT_PC is not set -CONFIG_PARTITION_ADVANCED=y -# CONFIG_PATA_ALI is not set -# CONFIG_PATA_AMD is not set -# CONFIG_PATA_ARASAN_CF is not set -# CONFIG_PATA_ARTOP is not set -# CONFIG_PATA_ATIIXP is not set -# CONFIG_PATA_ATP867X is not set -# CONFIG_PATA_CMD640_PCI is not set -# CONFIG_PATA_CMD64X is not set -# CONFIG_PATA_CS5520 is not set -# CONFIG_PATA_CS5530 is not set -# CONFIG_PATA_CS5535 is not set -# CONFIG_PATA_CS5536 is not set -# CONFIG_PATA_CYPRESS is not set -# CONFIG_PATA_EFAR is not set -# CONFIG_PATA_HPT366 is not set -# CONFIG_PATA_HPT37X is not set -# CONFIG_PATA_HPT3X2N is not set -# CONFIG_PATA_HPT3X3 is not set -# CONFIG_PATA_IMX is not set -# CONFIG_PATA_ISAPNP is not set -# CONFIG_PATA_IT8213 is not set -# CONFIG_PATA_IT821X is not set -# CONFIG_PATA_JMICRON is not set -# CONFIG_PATA_LEGACY is not set -# CONFIG_PATA_MARVELL is not set -# CONFIG_PATA_MPIIX is not set -# CONFIG_PATA_NETCELL is not set -# CONFIG_PATA_NINJA32 is not set -# CONFIG_PATA_NS87410 is not set -# CONFIG_PATA_NS87415 is not set -# CONFIG_PATA_OCTEON_CF is not set -# CONFIG_PATA_OF_PLATFORM is not set -# CONFIG_PATA_OLDPIIX is not set -# CONFIG_PATA_OPTI is not set -# CONFIG_PATA_OPTIDMA is not set -# CONFIG_PATA_PCMCIA is not set -# CONFIG_PATA_PDC2027X is not set -# CONFIG_PATA_PDC_OLD is not set -# CONFIG_PATA_PLATFORM is not set -# CONFIG_PATA_QDI is not set -# CONFIG_PATA_RADISYS is not set -# CONFIG_PATA_RDC is not set -# CONFIG_PATA_RZ1000 is not set -# CONFIG_PATA_SC1200 is not set -# CONFIG_PATA_SCH is not set -# CONFIG_PATA_SERVERWORKS is not set -# CONFIG_PATA_SIL680 is not set -# CONFIG_PATA_SIS is not set -# CONFIG_PATA_TOSHIBA is not set -# CONFIG_PATA_TRIFLEX is not set -# CONFIG_PATA_VIA is not set -# CONFIG_PATA_WINBOND is not set -# CONFIG_PATA_WINBOND_VLB is not set -# CONFIG_PC104 is not set -# CONFIG_PC300TOO is not set -# CONFIG_PCCARD is not set -# CONFIG_PCH_DMA is not set -# CONFIG_PCH_GBE is not set -# CONFIG_PCH_PHUB is not set -# CONFIG_PCI is not set -# CONFIG_PCI200SYN is not set -# CONFIG_PCIEAER is not set -# CONFIG_PCIEAER_INJECT is not set -# CONFIG_PCIEASPM is not set -# CONFIG_PCIEPORTBUS is not set -# CONFIG_PCIE_AL is not set -# CONFIG_PCIE_ALTERA is not set -# CONFIG_PCIE_ARMADA_8K is not set -CONFIG_PCIE_BUS_DEFAULT=y -# CONFIG_PCIE_BUS_PEER2PEER is not set -# CONFIG_PCIE_BUS_PERFORMANCE is not set -# CONFIG_PCIE_BUS_SAFE is not set -# CONFIG_PCIE_BUS_TUNE_OFF is not set -# CONFIG_PCIE_BW is not set -# CONFIG_PCIE_CADENCE_HOST is not set -# CONFIG_PCIE_CADENCE_PLAT_HOST is not set -# CONFIG_PCIE_DPC is not set -# CONFIG_PCIE_DW is not set -# CONFIG_PCIE_DW_HOST is not set -# CONFIG_PCIE_DW_PLAT is not set -# CONFIG_PCIE_DW_PLAT_HOST is not set -# CONFIG_PCIE_ECRC is not set -# CONFIG_PCIE_IPROC is not set -# CONFIG_PCIE_KIRIN is not set -# CONFIG_PCIE_LAYERSCAPE_GEN4 is not set -# CONFIG_PCIE_MICROCHIP_HOST is not set -# CONFIG_PCIE_PTM is not set -# CONFIG_PCIE_ROCKCHIP_DW_HOST is not set -# CONFIG_PCIE_XILINX is not set -# CONFIG_PCIPCWATCHDOG is not set -# CONFIG_PCI_ATMEL is not set -# CONFIG_PCI_CNB20LE_QUIRK is not set -# CONFIG_PCI_DEBUG is not set -# CONFIG_PCI_DISABLE_COMMON_QUIRKS is not set -# CONFIG_PCI_ENDPOINT is not set -# CONFIG_PCI_ENDPOINT_TEST is not set -# CONFIG_PCI_FTPCI100 is not set -# CONFIG_PCI_HERMES is not set -# CONFIG_PCI_HISI is not set -# CONFIG_PCI_HOST_GENERIC is not set -# CONFIG_PCI_HOST_THUNDER_ECAM is not set -# CONFIG_PCI_HOST_THUNDER_PEM is not set -# CONFIG_PCI_IOV is not set -# CONFIG_PCI_J721E_HOST is not set -# CONFIG_PCI_LAYERSCAPE is not set -# CONFIG_PCI_MESON is not set -# CONFIG_PCI_MSI is not set -# CONFIG_PCI_PASID is not set -# CONFIG_PCI_PF_STUB is not set -# CONFIG_PCI_PRI is not set -CONFIG_PCI_QUIRKS=y -# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set -# CONFIG_PCI_STUB is not set -# CONFIG_PCI_SW_SWITCHTEC is not set -CONFIG_PCI_SYSCALL=y -# CONFIG_PCI_V3_SEMI is not set -# CONFIG_PCI_XGENE is not set -# CONFIG_PCMCIA is not set -# CONFIG_PCMCIA_3C574 is not set -# CONFIG_PCMCIA_3C589 is not set -# CONFIG_PCMCIA_AHA152X is not set -# CONFIG_PCMCIA_ATMEL is not set -# CONFIG_PCMCIA_AXNET is not set -# CONFIG_PCMCIA_DEBUG is not set -# CONFIG_PCMCIA_FDOMAIN is not set -# CONFIG_PCMCIA_FMVJ18X is not set -# CONFIG_PCMCIA_HERMES is not set -# CONFIG_PCMCIA_LOAD_CIS is not set -# CONFIG_PCMCIA_NINJA_SCSI is not set -# CONFIG_PCMCIA_NMCLAN is not set -# CONFIG_PCMCIA_PCNET is not set -# CONFIG_PCMCIA_QLOGIC is not set -# CONFIG_PCMCIA_RAYCS is not set -# CONFIG_PCMCIA_SMC91C92 is not set -# CONFIG_PCMCIA_SPECTRUM is not set -# CONFIG_PCMCIA_SYM53C500 is not set -# CONFIG_PCMCIA_WL3501 is not set -# CONFIG_PCMCIA_XIRC2PS is not set -# CONFIG_PCMCIA_XIRCOM is not set -# CONFIG_PCNET32 is not set -CONFIG_PCPU_DEV_REFCNT=y -# CONFIG_PCSPKR_PLATFORM is not set -# CONFIG_PCS_XPCS is not set -# CONFIG_PD6729 is not set -# CONFIG_PDA_POWER is not set -# CONFIG_PDC_ADMA is not set -# CONFIG_PERCPU_STATS is not set -# CONFIG_PERCPU_TEST is not set -# CONFIG_PERF_EVENTS is not set -# CONFIG_PERF_EVENTS_AMD_POWER is not set -# CONFIG_PERSISTENT_KEYRINGS is not set -# CONFIG_PHANTOM is not set -# CONFIG_PHONET is not set -# CONFIG_PHYLIB is not set -# CONFIG_PHYS_ADDR_T_64BIT is not set -# CONFIG_PHY_CADENCE_DP is not set -# CONFIG_PHY_CADENCE_DPHY is not set -# CONFIG_PHY_CADENCE_SALVO is not set -# CONFIG_PHY_CADENCE_SIERRA is not set -# CONFIG_PHY_CADENCE_TORRENT is not set -# CONFIG_PHY_CAN_TRANSCEIVER is not set -# CONFIG_PHY_CPCAP_USB is not set -# CONFIG_PHY_EXYNOS_DP_VIDEO is not set -# CONFIG_PHY_EXYNOS_MIPI_VIDEO is not set -# CONFIG_PHY_FSL_IMX8MQ_USB is not set -# CONFIG_PHY_FSL_IMX8M_PCIE is not set -# CONFIG_PHY_INTEL_KEEMBAY_EMMC is not set -# CONFIG_PHY_LAN966X_SERDES is not set -# CONFIG_PHY_MAPPHONE_MDM6600 is not set -# CONFIG_PHY_MIXEL_MIPI_DPHY is not set -# CONFIG_PHY_MTK_HDMI is not set -# CONFIG_PHY_MVEBU_CP110_UTMI is not set -# CONFIG_PHY_OCELOT_SERDES is not set -# CONFIG_PHY_PXA_28NM_HSIC is not set -# CONFIG_PHY_PXA_28NM_USB2 is not set -# CONFIG_PHY_QCOM_DWC3 is not set -# CONFIG_PHY_QCOM_USB_HS is not set -# CONFIG_PHY_QCOM_USB_HSIC is not set -# CONFIG_PHY_ROCKCHIP_INNO_CSIDPHY is not set -# CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY is not set -# CONFIG_PHY_ROCKCHIP_INNO_USB2 is not set -# CONFIG_PHY_ROCKCHIP_NANENG_COMBO_PHY is not set -# CONFIG_PHY_SAMSUNG_USB2 is not set -# CONFIG_PHY_TUSB1210 is not set -# CONFIG_PHY_XGENE is not set -# CONFIG_PI433 is not set -# CONFIG_PID_IN_CONTEXTIDR is not set -# CONFIG_PID_NS is not set -CONFIG_PINCONF=y -# CONFIG_PINCTRL is not set -# CONFIG_PINCTRL_AMD is not set -# CONFIG_PINCTRL_AXP209 is not set -# CONFIG_PINCTRL_CEDARFORK is not set -# CONFIG_PINCTRL_EXYNOS is not set -# CONFIG_PINCTRL_EXYNOS5440 is not set -# CONFIG_PINCTRL_ICELAKE is not set -# CONFIG_PINCTRL_INGENIC is not set -# CONFIG_PINCTRL_MCP23S08 is not set -CONFIG_PINCTRL_MICROCHIP_SGPIO=y -# CONFIG_PINCTRL_MSM8X74 is not set -# CONFIG_PINCTRL_MT6779 is not set -# CONFIG_PINCTRL_MT8167 is not set -# CONFIG_PINCTRL_MT8192 is not set -# CONFIG_PINCTRL_MTK_V2 is not set -# CONFIG_PINCTRL_OCELOT is not set -# CONFIG_PINCTRL_ROCKCHIP is not set -CONFIG_PINCTRL_SINGLE=y -# CONFIG_PINCTRL_STMFX is not set -# CONFIG_PINCTRL_SX150X is not set -# CONFIG_PING is not set -CONFIG_PINMUX=y -# CONFIG_PKCS7_MESSAGE_PARSER is not set -# CONFIG_PL310_ERRATA_588369 is not set -# CONFIG_PL310_ERRATA_727915 is not set -# CONFIG_PL310_ERRATA_753970 is not set -# CONFIG_PL310_ERRATA_769419 is not set -# CONFIG_PL320_MBOX is not set -# CONFIG_PL330_DMA is not set -# CONFIG_PLATFORM_MHU is not set -# CONFIG_PLAT_SPEAR is not set -# CONFIG_PLIP is not set -# CONFIG_PLX_DMA is not set -# CONFIG_PLX_HERMES is not set -# CONFIG_PM is not set -# CONFIG_PMBUS is not set -# CONFIG_PMC_MSP is not set -# CONFIG_PMIC_ADP5520 is not set -# CONFIG_PMIC_DA903X is not set -# CONFIG_PMS7003 is not set -# CONFIG_PM_AUTOSLEEP is not set -# CONFIG_PM_DEBUG is not set -# CONFIG_PM_DEVFREQ is not set -# CONFIG_PM_WAKELOCKS is not set -# CONFIG_POSIX_CPU_TIMERS_TASK_WORK is not set -# CONFIG_POSIX_MQUEUE is not set -CONFIG_POSIX_TIMERS=y -# CONFIG_POWERCAP is not set -# CONFIG_POWER_AVS is not set -# CONFIG_POWER_RESET is not set -# CONFIG_POWER_RESET_BRCMKONA is not set -# CONFIG_POWER_RESET_BRCMSTB is not set -# CONFIG_POWER_RESET_GPIO is not set -# CONFIG_POWER_RESET_GPIO_RESTART is not set -# CONFIG_POWER_RESET_LINKSTATION is not set -# CONFIG_POWER_RESET_LTC2952 is not set -# CONFIG_POWER_RESET_PIIX4_POWEROFF is not set -# CONFIG_POWER_RESET_REGULATOR is not set -# CONFIG_POWER_RESET_RESTART is not set -# CONFIG_POWER_RESET_SYSCON is not set -# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set -# CONFIG_POWER_RESET_VERSATILE is not set -# CONFIG_POWER_RESET_XGENE is not set -# CONFIG_POWER_SUPPLY is not set -# CONFIG_POWER_SUPPLY_DEBUG is not set -# CONFIG_POWER_SUPPLY_HWMON is not set -# CONFIG_PPC4xx_GPIO is not set -# CONFIG_PPC_16K_PAGES is not set -# CONFIG_PPC_256K_PAGES is not set -CONFIG_PPC_4K_PAGES=y -# CONFIG_PPC_64K_PAGES is not set -# CONFIG_PPC_DISABLE_WERROR is not set -# CONFIG_PPC_EMULATED_STATS is not set -# CONFIG_PPC_EPAPR_HV_BYTECHAN is not set -# CONFIG_PPP is not set -# CONFIG_PPPOATM is not set -# CONFIG_PPPOE is not set -# CONFIG_PPPOL2TP is not set -# CONFIG_PPP_ASYNC is not set -# CONFIG_PPP_BSDCOMP is not set -# CONFIG_PPP_DEFLATE is not set -CONFIG_PPP_FILTER=y -# CONFIG_PPP_MPPE is not set -CONFIG_PPP_MULTILINK=y -# CONFIG_PPP_SYNC_TTY is not set -# CONFIG_PPS is not set -# CONFIG_PPS_CLIENT_GPIO is not set -# CONFIG_PPS_CLIENT_KTIMER is not set -# CONFIG_PPS_CLIENT_LDISC is not set -# CONFIG_PPS_CLIENT_PARPORT is not set -# CONFIG_PPS_DEBUG is not set -# CONFIG_PPTP is not set -# CONFIG_PREEMPT is not set -# CONFIG_PREEMPTIRQ_DELAY_TEST is not set -# CONFIG_PREEMPTIRQ_EVENTS is not set -# CONFIG_PREEMPT_BUILD is not set -CONFIG_PREEMPT_NONE=y -# CONFIG_PREEMPT_NONE_BUILD is not set -# CONFIG_PREEMPT_TRACER is not set -# CONFIG_PREEMPT_VOLUNTARY is not set -# CONFIG_PRESTERA is not set -CONFIG_PREVENT_FIRMWARE_BUILD=y -# CONFIG_PRIME_NUMBERS is not set -CONFIG_PRINTK=y -# CONFIG_PRINTK_CALLER is not set -# CONFIG_PRINTK_INDEX is not set -CONFIG_PRINTK_NMI=y -CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 -# CONFIG_PRINTK_TIME is not set -CONFIG_PRINT_STACK_DEPTH=64 -# CONFIG_PRISM2_USB is not set -# CONFIG_PRISM54 is not set -# CONFIG_PROC_CHILDREN is not set -CONFIG_PROC_FS=y -# CONFIG_PROC_KCORE is not set -# CONFIG_PROC_PAGE_MONITOR is not set -# CONFIG_PROC_STRIPPED is not set -CONFIG_PROC_SYSCTL=y -# CONFIG_PROC_VMCORE_DEVICE_DUMP is not set -# CONFIG_PROFILE_ALL_BRANCHES is not set -# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set -# CONFIG_PROFILING is not set -# CONFIG_PROVE_LOCKING is not set -# CONFIG_PROVE_RAW_LOCK_NESTING is not set -# CONFIG_PROVE_RCU is not set -# CONFIG_PROVE_RCU_LIST is not set -# CONFIG_PROVE_RCU_REPEATEDLY is not set -# CONFIG_PSAMPLE is not set -# CONFIG_PSB6970_PHY is not set -# CONFIG_PSI is not set -# CONFIG_PSTORE is not set -# CONFIG_PTDUMP_DEBUGFS is not set -# CONFIG_PTP_1588_CLOCK is not set -# CONFIG_PTP_1588_CLOCK_IDT82P33 is not set -# CONFIG_PTP_1588_CLOCK_IDTCM is not set -# CONFIG_PTP_1588_CLOCK_IXP46X is not set -# CONFIG_PTP_1588_CLOCK_KVM is not set -# CONFIG_PTP_1588_CLOCK_OCP is not set -# CONFIG_PTP_1588_CLOCK_OPTIONAL is not set -# CONFIG_PTP_1588_CLOCK_PCH is not set -# CONFIG_PTP_1588_CLOCK_VMW is not set -# CONFIG_PUBLIC_KEY_ALGO_RSA is not set -# CONFIG_PVPANIC is not set -# CONFIG_PWM is not set -# CONFIG_PWM_ATMEL_TCB is not set -# CONFIG_PWM_DEBUG is not set -# CONFIG_PWM_DWC is not set -# CONFIG_PWM_FSL_FTM is not set -# CONFIG_PWM_PCA9685 is not set -# CONFIG_PWM_ROCKCHIP is not set -CONFIG_PWRSEQ_EMMC=y -# CONFIG_PWRSEQ_SD8787 is not set -CONFIG_PWRSEQ_SIMPLE=y -# CONFIG_QCA7000 is not set -# CONFIG_QCA7000_SPI is not set -# CONFIG_QCA7000_UART is not set -# CONFIG_QCOM_EMAC is not set -# CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set -# CONFIG_QCOM_FALKOR_ERRATUM_1009 is not set -# CONFIG_QCOM_FALKOR_ERRATUM_E1041 is not set -# CONFIG_QCOM_HIDMA is not set -# CONFIG_QCOM_HIDMA_MGMT is not set -# CONFIG_QCOM_QDF2400_ERRATUM_0065 is not set -# CONFIG_QCOM_SCM is not set -# CONFIG_QCOM_SPMI_ADC5 is not set -# CONFIG_QCOM_SPMI_IADC is not set -# CONFIG_QCOM_SPMI_TEMP_ALARM is not set -# CONFIG_QCOM_SPMI_VADC is not set -# CONFIG_QED is not set -# CONFIG_QLA3XXX is not set -# CONFIG_QLCNIC is not set -# CONFIG_QLGE is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_QNX6FS_FS is not set -# CONFIG_QORIQ_CPUFREQ is not set -# CONFIG_QORIQ_THERMAL is not set -# CONFIG_QRTR is not set -# CONFIG_QSEMI_PHY is not set -# CONFIG_QUEUED_LOCK_STAT is not set -# CONFIG_QUICC_ENGINE is not set -# CONFIG_QUOTA is not set -# CONFIG_QUOTACTL is not set -# CONFIG_QUOTA_DEBUG is not set -# CONFIG_R3964 is not set -# CONFIG_R6040 is not set -# CONFIG_R8169 is not set -# CONFIG_R8188EU is not set -# CONFIG_R8712U is not set -# CONFIG_R8723AU is not set -# CONFIG_RADIO_ADAPTERS is not set -# CONFIG_RADIO_AZTECH is not set -# CONFIG_RADIO_CADET is not set -# CONFIG_RADIO_GEMTEK is not set -# CONFIG_RADIO_MAXIRADIO is not set -# CONFIG_RADIO_RTRACK is not set -# CONFIG_RADIO_RTRACK2 is not set -# CONFIG_RADIO_SF16FMI is not set -# CONFIG_RADIO_SF16FMR2 is not set -# CONFIG_RADIO_TERRATEC is not set -# CONFIG_RADIO_TRUST is not set -# CONFIG_RADIO_TYPHOON is not set -# CONFIG_RADIO_ZOLTRIX is not set -# CONFIG_RAID6_PQ_BENCHMARK is not set -# CONFIG_RAID_ATTRS is not set -# CONFIG_RALINK is not set -# CONFIG_RANDOM32_SELFTEST is not set -# CONFIG_RANDOMIZE_BASE is not set -# CONFIG_RANDOMIZE_KSTACK_OFFSET_DEFAULT is not set -# CONFIG_RANDOM_TRUST_BOOTLOADER is not set -# CONFIG_RANDOM_TRUST_CPU is not set -# CONFIG_RAPIDIO is not set -# CONFIG_RAS is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_RBTREE_TEST is not set -# CONFIG_RCU_BOOST is not set -CONFIG_RCU_CPU_STALL_TIMEOUT=21 -# CONFIG_RCU_EQS_DEBUG is not set -# CONFIG_RCU_EXPEDITE_BOOT is not set -# CONFIG_RCU_EXPERT is not set -CONFIG_RCU_KTHREAD_PRIO=0 -CONFIG_RCU_NEED_SEGCBLIST=y -# CONFIG_RCU_PERF_TEST is not set -# CONFIG_RCU_REF_SCALE_TEST is not set -# CONFIG_RCU_SCALE_TEST is not set -CONFIG_RCU_STALL_COMMON=y -# CONFIG_RCU_STRICT_GRACE_PERIOD is not set -# CONFIG_RCU_TORTURE_TEST is not set -CONFIG_RCU_TORTURE_TEST_SLOW_INIT_DELAY=3 -# CONFIG_RCU_TRACE is not set -# CONFIG_RC_ATI_REMOTE is not set -# CONFIG_RC_CORE is not set -# CONFIG_RC_DECODERS is not set -# CONFIG_RC_LOOPBACK is not set -# CONFIG_RC_MAP is not set -# CONFIG_RDS is not set -# CONFIG_RD_BZIP2 is not set -# CONFIG_RD_GZIP is not set -# CONFIG_RD_LZ4 is not set -# CONFIG_RD_LZMA is not set -# CONFIG_RD_LZO is not set -# CONFIG_RD_XZ is not set -# CONFIG_RD_ZSTD is not set -# CONFIG_READABLE_ASM is not set -# CONFIG_READ_ONLY_THP_FOR_FS is not set -# CONFIG_REALTEK_PHY is not set -# CONFIG_REDWOOD is not set -# CONFIG_REED_SOLOMON_TEST is not set -# CONFIG_REGMAP is not set -# CONFIG_REGMAP_I2C is not set -# CONFIG_REGMAP_MMIO is not set -# CONFIG_REGMAP_SPI is not set -# CONFIG_REGULATOR is not set -# CONFIG_REGULATOR_88PG86X is not set -# CONFIG_REGULATOR_ACT8865 is not set -# CONFIG_REGULATOR_AD5398 is not set -# CONFIG_REGULATOR_ANATOP is not set -# CONFIG_REGULATOR_DA9121 is not set -# CONFIG_REGULATOR_DA9210 is not set -# CONFIG_REGULATOR_DA9211 is not set -# CONFIG_REGULATOR_DEBUG is not set -# CONFIG_REGULATOR_FAN53555 is not set -# CONFIG_REGULATOR_FAN53880 is not set -# CONFIG_REGULATOR_FIXED_VOLTAGE is not set -# CONFIG_REGULATOR_GPIO is not set -# CONFIG_REGULATOR_ISL6271A is not set -# CONFIG_REGULATOR_ISL9305 is not set -# CONFIG_REGULATOR_LP3971 is not set -# CONFIG_REGULATOR_LP3972 is not set -# CONFIG_REGULATOR_LP872X is not set -# CONFIG_REGULATOR_LP8755 is not set -# CONFIG_REGULATOR_LTC3589 is not set -# CONFIG_REGULATOR_LTC3676 is not set -# CONFIG_REGULATOR_MAX1586 is not set -# CONFIG_REGULATOR_MAX20086 is not set -# CONFIG_REGULATOR_MAX77620 is not set -# CONFIG_REGULATOR_MAX77826 is not set -# CONFIG_REGULATOR_MAX8649 is not set -# CONFIG_REGULATOR_MAX8660 is not set -# CONFIG_REGULATOR_MAX8893 is not set -# CONFIG_REGULATOR_MAX8952 is not set -# CONFIG_REGULATOR_MAX8973 is not set -# CONFIG_REGULATOR_MCP16502 is not set -# CONFIG_REGULATOR_MP5416 is not set -# CONFIG_REGULATOR_MP8859 is not set -# CONFIG_REGULATOR_MP886X is not set -# CONFIG_REGULATOR_MPQ7920 is not set -# CONFIG_REGULATOR_MT6311 is not set -# CONFIG_REGULATOR_PCA9450 is not set -# CONFIG_REGULATOR_PF8X00 is not set -# CONFIG_REGULATOR_PFUZE100 is not set -# CONFIG_REGULATOR_PV88060 is not set -# CONFIG_REGULATOR_PV88080 is not set -# CONFIG_REGULATOR_PV88090 is not set -# CONFIG_REGULATOR_PWM is not set -# CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY is not set -# CONFIG_REGULATOR_RT4801 is not set -# CONFIG_REGULATOR_RT6160 is not set -# CONFIG_REGULATOR_RT6245 is not set -# CONFIG_REGULATOR_RTMV20 is not set -# CONFIG_REGULATOR_RTQ2134 is not set -# CONFIG_REGULATOR_RTQ6752 is not set -# CONFIG_REGULATOR_SLG51000 is not set -# CONFIG_REGULATOR_SY8106A is not set -# CONFIG_REGULATOR_SY8824X is not set -# CONFIG_REGULATOR_SY8827N is not set -# CONFIG_REGULATOR_TI_ABB is not set -# CONFIG_REGULATOR_TPS51632 is not set -# CONFIG_REGULATOR_TPS62360 is not set -# CONFIG_REGULATOR_TPS65023 is not set -# CONFIG_REGULATOR_TPS6507X is not set -# CONFIG_REGULATOR_TPS65132 is not set -# CONFIG_REGULATOR_TPS6524X is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -# CONFIG_REGULATOR_VCTRL is not set -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REISERFS_CHECK is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_REISERFS_FS_POSIX_ACL is not set -# CONFIG_REISERFS_FS_SECURITY is not set -CONFIG_REISERFS_FS_XATTR=y -# CONFIG_REISERFS_PROC_INFO is not set -# CONFIG_RELAY is not set -# CONFIG_RELOCATABLE is not set -# CONFIG_REMOTEPROC is not set -# CONFIG_RENESAS_PHY is not set -# CONFIG_RESET_ATH79 is not set -# CONFIG_RESET_BERLIN is not set -# CONFIG_RESET_BRCMSTB_RESCAL is not set -# CONFIG_RESET_CONTROLLER is not set -# CONFIG_RESET_IMX7 is not set -# CONFIG_RESET_INTEL_GW is not set -# CONFIG_RESET_LANTIQ is not set -# CONFIG_RESET_LPC18XX is not set -# CONFIG_RESET_MCHP_SPARX5 is not set -# CONFIG_RESET_MESON is not set -# CONFIG_RESET_PISTACHIO is not set -# CONFIG_RESET_SOCFPGA is not set -# CONFIG_RESET_STM32 is not set -# CONFIG_RESET_SUNXI is not set -# CONFIG_RESET_TEGRA_BPMP is not set -# CONFIG_RESET_TI_SYSCON is not set -# CONFIG_RESET_ZYNQ is not set -# CONFIG_RFD77402 is not set -# CONFIG_RFD_FTL is not set -CONFIG_RFKILL=y -# CONFIG_RFKILL_FULL is not set -# CONFIG_RFKILL_GPIO is not set -# CONFIG_RFKILL_INPUT is not set -# CONFIG_RFKILL_LEDS is not set -# CONFIG_RFKILL_REGULATOR is not set -# CONFIG_RING_BUFFER_BENCHMARK is not set -# CONFIG_RING_BUFFER_STARTUP_TEST is not set -# CONFIG_RMI4_CORE is not set -# CONFIG_RMNET is not set -# CONFIG_ROCKCHIP_DW_HDMI is not set -# CONFIG_ROCKCHIP_IODOMAIN is not set -# CONFIG_ROCKCHIP_IOMMU is not set -# CONFIG_ROCKCHIP_MBOX is not set -# CONFIG_ROCKCHIP_PHY is not set -# CONFIG_ROCKCHIP_PM_DOMAINS is not set -# CONFIG_ROCKCHIP_SARADC is not set -# CONFIG_ROCKCHIP_THERMAL is not set -# CONFIG_ROCKCHIP_VOP2 is not set -# CONFIG_ROCKER is not set -# CONFIG_RODATA_FULL_DEFAULT_ENABLED is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_ROSE is not set -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_RPMSG_QCOM_GLINK_RPM is not set -# CONFIG_RPMSG_VIRTIO is not set -# CONFIG_RPR0521 is not set -# CONFIG_RSEQ is not set -# CONFIG_RT2X00 is not set -# CONFIG_RTC_CLASS is not set -# CONFIG_RTC_DEBUG is not set -# CONFIG_RTC_DRV_ABB5ZES3 is not set -# CONFIG_RTC_DRV_ABEOZ9 is not set -# CONFIG_RTC_DRV_ABX80X is not set -# CONFIG_RTC_DRV_ARMADA38X is not set -# CONFIG_RTC_DRV_AU1XXX is not set -# CONFIG_RTC_DRV_BQ32K is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_CADENCE is not set -CONFIG_RTC_DRV_CMOS=y -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1302 is not set -# CONFIG_RTC_DRV_DS1305 is not set -# CONFIG_RTC_DRV_DS1307 is not set -# CONFIG_RTC_DRV_DS1307_CENTURY is not set -# CONFIG_RTC_DRV_DS1307_HWMON is not set -# CONFIG_RTC_DRV_DS1343 is not set -# CONFIG_RTC_DRV_DS1347 is not set -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1390 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_DS1685_FAMILY is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_DS2404 is not set -# CONFIG_RTC_DRV_DS3232 is not set -# CONFIG_RTC_DRV_DS3234 is not set -# CONFIG_RTC_DRV_EM3027 is not set -# CONFIG_RTC_DRV_EP93XX is not set -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_FTRTC010 is not set -# CONFIG_RTC_DRV_GENERIC is not set -# CONFIG_RTC_DRV_GOLDFISH is not set -# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set -# CONFIG_RTC_DRV_HYM8563 is not set -# CONFIG_RTC_DRV_ISL12022 is not set -# CONFIG_RTC_DRV_ISL12026 is not set -# CONFIG_RTC_DRV_ISL12057 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_JZ4740 is not set -# CONFIG_RTC_DRV_M41T80 is not set -# CONFIG_RTC_DRV_M41T93 is not set -# CONFIG_RTC_DRV_M41T94 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_MAX6902 is not set -# CONFIG_RTC_DRV_MAX6916 is not set -# CONFIG_RTC_DRV_MCP795 is not set -# CONFIG_RTC_DRV_MOXART is not set -# CONFIG_RTC_DRV_MPC5121 is not set -# CONFIG_RTC_DRV_MSM6242 is not set -# CONFIG_RTC_DRV_MT2712 is not set -# CONFIG_RTC_DRV_OMAP is not set -# CONFIG_RTC_DRV_PCF2123 is not set -# CONFIG_RTC_DRV_PCF2127 is not set -# CONFIG_RTC_DRV_PCF85063 is not set -# CONFIG_RTC_DRV_PCF8523 is not set -# CONFIG_RTC_DRV_PCF85363 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_PL030 is not set -# CONFIG_RTC_DRV_PL031 is not set -# CONFIG_RTC_DRV_PS3 is not set -# CONFIG_RTC_DRV_PT7C4338 is not set -# CONFIG_RTC_DRV_R7301 is not set -# CONFIG_RTC_DRV_R9701 is not set -# CONFIG_RTC_DRV_RK808 is not set -# CONFIG_RTC_DRV_RP5C01 is not set -# CONFIG_RTC_DRV_RS5C348 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_RTC7301 is not set -# CONFIG_RTC_DRV_RV3028 is not set -# CONFIG_RTC_DRV_RV3029C2 is not set -# CONFIG_RTC_DRV_RV3032 is not set -# CONFIG_RTC_DRV_RV8803 is not set -# CONFIG_RTC_DRV_RX4581 is not set -# CONFIG_RTC_DRV_RX6110 is not set -# CONFIG_RTC_DRV_RX8010 is not set -# CONFIG_RTC_DRV_RX8025 is not set -# CONFIG_RTC_DRV_RX8581 is not set -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_SD3078 is not set -# CONFIG_RTC_DRV_SNVS is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_SUN6I is not set -# CONFIG_RTC_DRV_TEST is not set -# CONFIG_RTC_DRV_V3020 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_XGENE is not set -# CONFIG_RTC_DRV_ZYNQMP is not set -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_LIB=y -# CONFIG_RTC_NVMEM is not set -CONFIG_RTC_SYSTOHC=y -CONFIG_RTC_SYSTOHC_DEVICE="rtc0" -# CONFIG_RTL8180 is not set -# CONFIG_RTL8187 is not set -# CONFIG_RTL8192E is not set -# CONFIG_RTL8192U is not set -# CONFIG_RTL8306_PHY is not set -# CONFIG_RTL8366RB_PHY is not set -# CONFIG_RTL8366S_PHY is not set -# CONFIG_RTL8366_SMI is not set -# CONFIG_RTL8366_SMI_DEBUG_FS is not set -# CONFIG_RTL8367B_PHY is not set -# CONFIG_RTL8367_PHY is not set -# CONFIG_RTLLIB is not set -# CONFIG_RTL_CARDS is not set -# CONFIG_RTS5208 is not set -CONFIG_RT_MUTEXES=y -# CONFIG_RUNTIME_DEBUG is not set -CONFIG_RUNTIME_TESTING_MENU=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_RXKAD=y -# CONFIG_S2IO is not set -# CONFIG_SAMPLES is not set -# CONFIG_SAMSUNG_LAPTOP is not set -# CONFIG_SATA_ACARD_AHCI is not set -# CONFIG_SATA_AHCI is not set -# CONFIG_SATA_AHCI_PLATFORM is not set -# CONFIG_SATA_DWC is not set -# CONFIG_SATA_FSL is not set -# CONFIG_SATA_HIGHBANK is not set -# CONFIG_SATA_HOST is not set -# CONFIG_SATA_INIC162X is not set -CONFIG_SATA_MOBILE_LPM_POLICY=0 -# CONFIG_SATA_MV is not set -# CONFIG_SATA_NV is not set -# CONFIG_SATA_PMP is not set -# CONFIG_SATA_PROMISE is not set -# CONFIG_SATA_QSTOR is not set -# CONFIG_SATA_RCAR is not set -# CONFIG_SATA_SIL is not set -# CONFIG_SATA_SIL24 is not set -# CONFIG_SATA_SIS is not set -# CONFIG_SATA_SVW is not set -# CONFIG_SATA_SX4 is not set -# CONFIG_SATA_ULI is not set -# CONFIG_SATA_VIA is not set -# CONFIG_SATA_VITESSE is not set -# CONFIG_SBC_FITPC2_WATCHDOG is not set -CONFIG_SBITMAP=y -# CONFIG_SC92031 is not set -# CONFIG_SCA3000 is not set -# CONFIG_SCA3300 is not set -# CONFIG_SCACHE_DEBUGFS is not set -# CONFIG_SCC is not set -# CONFIG_SCD30_CORE is not set -# CONFIG_SCF_TORTURE_TEST is not set -# CONFIG_SCHEDSTATS is not set -# CONFIG_SCHED_AUTOGROUP is not set -# CONFIG_SCHED_CLUSTER is not set -# CONFIG_SCHED_DEBUG is not set -CONFIG_SCHED_HRTICK=y -# CONFIG_SCHED_MC is not set -CONFIG_SCHED_OMIT_FRAME_POINTER=y -# CONFIG_SCHED_SMT is not set -# CONFIG_SCHED_STACK_END_CHECK is not set -# CONFIG_SCHED_TRACER is not set -# CONFIG_SCR24X is not set -# CONFIG_SCSI is not set -# CONFIG_SCSI_3W_9XXX is not set -# CONFIG_SCSI_3W_SAS is not set -# CONFIG_SCSI_7000FASST is not set -# CONFIG_SCSI_AACRAID is not set -# CONFIG_SCSI_ACARD is not set -# CONFIG_SCSI_ADVANSYS is not set -# CONFIG_SCSI_AHA152X is not set -# CONFIG_SCSI_AHA1542 is not set -# CONFIG_SCSI_AIC79XX is not set -# CONFIG_SCSI_AIC7XXX is not set -# CONFIG_SCSI_AIC94XX is not set -# CONFIG_SCSI_AM53C974 is not set -# CONFIG_SCSI_ARCMSR is not set -# CONFIG_SCSI_BFA_FC is not set -# CONFIG_SCSI_BNX2X_FCOE is not set -# CONFIG_SCSI_BNX2_ISCSI is not set -# CONFIG_SCSI_BUSLOGIC is not set -# CONFIG_SCSI_CHELSIO_FCOE is not set -# CONFIG_SCSI_COMMON is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_CXGB3_ISCSI is not set -# CONFIG_SCSI_CXGB4_ISCSI is not set -# CONFIG_SCSI_DC395x is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_DH is not set -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_DMX3191D is not set -# CONFIG_SCSI_DPT_I2O is not set -# CONFIG_SCSI_DTC3280 is not set -# CONFIG_SCSI_EATA is not set -# CONFIG_SCSI_ESAS2R is not set -# CONFIG_SCSI_FC_ATTRS is not set -# CONFIG_SCSI_FDOMAIN_PCI is not set -# CONFIG_SCSI_FUTURE_DOMAIN is not set -# CONFIG_SCSI_GDTH is not set -# CONFIG_SCSI_GENERIC_NCR5380 is not set -# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set -# CONFIG_SCSI_HISI_SAS is not set -# CONFIG_SCSI_HPSA is not set -# CONFIG_SCSI_HPTIOP is not set -# CONFIG_SCSI_IN2000 is not set -# CONFIG_SCSI_INIA100 is not set -# CONFIG_SCSI_INITIO is not set -# CONFIG_SCSI_IPR is not set -# CONFIG_SCSI_IPS is not set -# CONFIG_SCSI_ISCI is not set -# CONFIG_SCSI_ISCSI_ATTRS is not set -# CONFIG_SCSI_LOGGING is not set -CONFIG_SCSI_LOWLEVEL=y -# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set -# CONFIG_SCSI_LPFC is not set -CONFIG_SCSI_MOD=y -# CONFIG_SCSI_MPI3MR is not set -# CONFIG_SCSI_MPT2SAS is not set -# CONFIG_SCSI_MPT3SAS is not set -# CONFIG_SCSI_MQ_DEFAULT is not set -# CONFIG_SCSI_MVSAS is not set -# CONFIG_SCSI_MVSAS_DEBUG is not set -# CONFIG_SCSI_MVUMI is not set -# CONFIG_SCSI_MYRB is not set -# CONFIG_SCSI_MYRS is not set -# CONFIG_SCSI_NCR53C406A is not set -# CONFIG_SCSI_NETLINK is not set -# CONFIG_SCSI_NSP32 is not set -# CONFIG_SCSI_OSD_INITIATOR is not set -# CONFIG_SCSI_PAS16 is not set -# CONFIG_SCSI_PM8001 is not set -# CONFIG_SCSI_PMCRAID is not set -CONFIG_SCSI_PROC_FS=y -# CONFIG_SCSI_QLA_FC is not set -# CONFIG_SCSI_QLA_ISCSI is not set -# CONFIG_SCSI_QLOGIC_1280 is not set -# CONFIG_SCSI_QLOGIC_FAS is not set -# CONFIG_SCSI_SAS_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set -# CONFIG_SCSI_SCAN_ASYNC is not set -# CONFIG_SCSI_SMARTPQI is not set -# CONFIG_SCSI_SNIC is not set -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_SRP_ATTRS is not set -# CONFIG_SCSI_STEX is not set -# CONFIG_SCSI_SYM53C416 is not set -# CONFIG_SCSI_SYM53C8XX_2 is not set -# CONFIG_SCSI_T128 is not set -# CONFIG_SCSI_U14_34F is not set -# CONFIG_SCSI_UFSHCD is not set -# CONFIG_SCSI_UFS_HWMON is not set -# CONFIG_SCSI_ULTRASTOR is not set -# CONFIG_SCSI_VIRTIO is not set -# CONFIG_SCSI_WD719X is not set -# CONFIG_SCx200_ACB is not set -# CONFIG_SDIO_UART is not set -# CONFIG_SDR_MAX2175 is not set -# CONFIG_SDR_PLATFORM_DRIVERS is not set -# CONFIG_SD_ADC_MODULATOR is not set -# CONFIG_SECCOMP is not set -# CONFIG_SECCOMP_CACHE_DEBUG is not set -CONFIG_SECTION_MISMATCH_WARN_ONLY=y -# CONFIG_SECURITY is not set -# CONFIG_SECURITYFS is not set -# CONFIG_SECURITY_APPARMOR is not set -CONFIG_SECURITY_DMESG_RESTRICT=y -# CONFIG_SECURITY_LOADPIN is not set -# CONFIG_SECURITY_LOCKDOWN_LSM is not set -# CONFIG_SECURITY_NETWORK_XFRM is not set -# CONFIG_SECURITY_PATH is not set -# CONFIG_SECURITY_SAFESETID is not set -# CONFIG_SECURITY_SELINUX_AVC_STATS is not set -# CONFIG_SECURITY_SELINUX_BOOTPARAM is not set -CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=0 -# CONFIG_SECURITY_SELINUX_DEVELOP is not set -# CONFIG_SECURITY_SELINUX_DISABLE is not set -# CONFIG_SECURITY_SMACK is not set -# CONFIG_SECURITY_TOMOYO is not set -# CONFIG_SECURITY_YAMA is not set -CONFIG_SELECT_MEMORY_MODEL=y -# CONFIG_SENSIRION_SGP30 is not set -# CONFIG_SENSORS_ABITUGURU is not set -# CONFIG_SENSORS_ABITUGURU3 is not set -# CONFIG_SENSORS_ACPI_POWER is not set -# CONFIG_SENSORS_AD7314 is not set -# CONFIG_SENSORS_AD7414 is not set -# CONFIG_SENSORS_AD7418 is not set -# CONFIG_SENSORS_ADC128D818 is not set -# CONFIG_SENSORS_ADCXX is not set -# CONFIG_SENSORS_ADM1021 is not set -# CONFIG_SENSORS_ADM1025 is not set -# CONFIG_SENSORS_ADM1026 is not set -# CONFIG_SENSORS_ADM1029 is not set -# CONFIG_SENSORS_ADM1031 is not set -# CONFIG_SENSORS_ADM1177 is not set -# CONFIG_SENSORS_ADM1266 is not set -# CONFIG_SENSORS_ADM1275 is not set -# CONFIG_SENSORS_ADM9240 is not set -# CONFIG_SENSORS_ADS1015 is not set -# CONFIG_SENSORS_ADS7828 is not set -# CONFIG_SENSORS_ADS7871 is not set -# CONFIG_SENSORS_ADT7310 is not set -# CONFIG_SENSORS_ADT7410 is not set -# CONFIG_SENSORS_ADT7411 is not set -# CONFIG_SENSORS_ADT7462 is not set -# CONFIG_SENSORS_ADT7470 is not set -# CONFIG_SENSORS_ADT7475 is not set -# CONFIG_SENSORS_AHT10 is not set -# CONFIG_SENSORS_AMC6821 is not set -# CONFIG_SENSORS_APDS990X is not set -# CONFIG_SENSORS_APPLESMC is not set -# CONFIG_SENSORS_AQUACOMPUTER_D5NEXT is not set -# CONFIG_SENSORS_AS370 is not set -# CONFIG_SENSORS_ASB100 is not set -# CONFIG_SENSORS_ASC7621 is not set -# CONFIG_SENSORS_ASPEED is not set -# CONFIG_SENSORS_ATK0110 is not set -# CONFIG_SENSORS_ATXP1 is not set -# CONFIG_SENSORS_AXI_FAN_CONTROL is not set -# CONFIG_SENSORS_BEL_PFE is not set -# CONFIG_SENSORS_BH1770 is not set -# CONFIG_SENSORS_BH1780 is not set -# CONFIG_SENSORS_BPA_RS600 is not set -# CONFIG_SENSORS_CORETEMP is not set -# CONFIG_SENSORS_CORSAIR_CPRO is not set -# CONFIG_SENSORS_CORSAIR_PSU is not set -# CONFIG_SENSORS_DELL_SMM is not set -# CONFIG_SENSORS_DME1737 is not set -# CONFIG_SENSORS_DPS920AB is not set -# CONFIG_SENSORS_DRIVETEMP is not set -# CONFIG_SENSORS_DS1621 is not set -# CONFIG_SENSORS_DS620 is not set -# CONFIG_SENSORS_EMC1403 is not set -# CONFIG_SENSORS_EMC2103 is not set -# CONFIG_SENSORS_EMC6W201 is not set -# CONFIG_SENSORS_F71805F is not set -# CONFIG_SENSORS_F71882FG is not set -# CONFIG_SENSORS_F75375S is not set -# CONFIG_SENSORS_FAM15H_POWER is not set -# CONFIG_SENSORS_FSCHMD is not set -# CONFIG_SENSORS_FSP_3Y is not set -# CONFIG_SENSORS_FTSTEUTATES is not set -# CONFIG_SENSORS_G760A is not set -# CONFIG_SENSORS_G762 is not set -# CONFIG_SENSORS_GL518SM is not set -# CONFIG_SENSORS_GL520SM is not set -# CONFIG_SENSORS_GPIO_FAN is not set -# CONFIG_SENSORS_GSC is not set -# CONFIG_SENSORS_HDAPS is not set -# CONFIG_SENSORS_HIH6130 is not set -# CONFIG_SENSORS_HMC5843 is not set -# CONFIG_SENSORS_HMC5843_I2C is not set -# CONFIG_SENSORS_HMC5843_SPI is not set -# CONFIG_SENSORS_HTU21 is not set -# CONFIG_SENSORS_I5500 is not set -# CONFIG_SENSORS_I5K_AMB is not set -# CONFIG_SENSORS_IBM_CFFPS is not set -# CONFIG_SENSORS_IIO_HWMON is not set -# CONFIG_SENSORS_INA209 is not set -# CONFIG_SENSORS_INA238 is not set -# CONFIG_SENSORS_INA2XX is not set -# CONFIG_SENSORS_INA3221 is not set -# CONFIG_SENSORS_INSPUR_IPSPS is not set -# CONFIG_SENSORS_IR35221 is not set -# CONFIG_SENSORS_IR36021 is not set -# CONFIG_SENSORS_IR38064 is not set -# CONFIG_SENSORS_IRPS5401 is not set -# CONFIG_SENSORS_ISL29018 is not set -# CONFIG_SENSORS_ISL29028 is not set -# CONFIG_SENSORS_ISL68137 is not set -# CONFIG_SENSORS_IT87 is not set -# CONFIG_SENSORS_JC42 is not set -# CONFIG_SENSORS_K10TEMP is not set -# CONFIG_SENSORS_K8TEMP is not set -# CONFIG_SENSORS_LINEAGE is not set -# CONFIG_SENSORS_LIS3LV02D is not set -# CONFIG_SENSORS_LIS3_I2C is not set -# CONFIG_SENSORS_LIS3_SPI is not set -# CONFIG_SENSORS_LM25066 is not set -# CONFIG_SENSORS_LM63 is not set -# CONFIG_SENSORS_LM70 is not set -# CONFIG_SENSORS_LM73 is not set -# CONFIG_SENSORS_LM75 is not set -# CONFIG_SENSORS_LM77 is not set -# CONFIG_SENSORS_LM78 is not set -# CONFIG_SENSORS_LM80 is not set -# CONFIG_SENSORS_LM83 is not set -# CONFIG_SENSORS_LM85 is not set -# CONFIG_SENSORS_LM87 is not set -# CONFIG_SENSORS_LM90 is not set -# CONFIG_SENSORS_LM92 is not set -# CONFIG_SENSORS_LM93 is not set -# CONFIG_SENSORS_LM95234 is not set -# CONFIG_SENSORS_LM95241 is not set -# CONFIG_SENSORS_LM95245 is not set -# CONFIG_SENSORS_LTC2945 is not set -# CONFIG_SENSORS_LTC2947_I2C is not set -# CONFIG_SENSORS_LTC2947_SPI is not set -# CONFIG_SENSORS_LTC2978 is not set -# CONFIG_SENSORS_LTC2990 is not set -# CONFIG_SENSORS_LTC2992 is not set -# CONFIG_SENSORS_LTC3815 is not set -# CONFIG_SENSORS_LTC4151 is not set -# CONFIG_SENSORS_LTC4215 is not set -# CONFIG_SENSORS_LTC4222 is not set -# CONFIG_SENSORS_LTC4245 is not set -# CONFIG_SENSORS_LTC4260 is not set -# CONFIG_SENSORS_LTC4261 is not set -# CONFIG_SENSORS_LTQ_CPUTEMP is not set -# CONFIG_SENSORS_MAX1111 is not set -# CONFIG_SENSORS_MAX127 is not set -# CONFIG_SENSORS_MAX15301 is not set -# CONFIG_SENSORS_MAX16064 is not set -# CONFIG_SENSORS_MAX16065 is not set -# CONFIG_SENSORS_MAX1619 is not set -# CONFIG_SENSORS_MAX16601 is not set -# CONFIG_SENSORS_MAX1668 is not set -# CONFIG_SENSORS_MAX197 is not set -# CONFIG_SENSORS_MAX20730 is not set -# CONFIG_SENSORS_MAX20751 is not set -# CONFIG_SENSORS_MAX31722 is not set -# CONFIG_SENSORS_MAX31730 is not set -# CONFIG_SENSORS_MAX31785 is not set -# CONFIG_SENSORS_MAX31790 is not set -# CONFIG_SENSORS_MAX34440 is not set -# CONFIG_SENSORS_MAX6620 is not set -# CONFIG_SENSORS_MAX6621 is not set -# CONFIG_SENSORS_MAX6639 is not set -# CONFIG_SENSORS_MAX6642 is not set -# CONFIG_SENSORS_MAX6650 is not set -# CONFIG_SENSORS_MAX6697 is not set -# CONFIG_SENSORS_MAX8688 is not set -# CONFIG_SENSORS_MCP3021 is not set -# CONFIG_SENSORS_MP2888 is not set -# CONFIG_SENSORS_MP2975 is not set -# CONFIG_SENSORS_MR75203 is not set -# CONFIG_SENSORS_NCT6683 is not set -# CONFIG_SENSORS_NCT6775 is not set -# CONFIG_SENSORS_NCT7802 is not set -# CONFIG_SENSORS_NCT7904 is not set -# CONFIG_SENSORS_NPCM7XX is not set -# CONFIG_SENSORS_NSA320 is not set -# CONFIG_SENSORS_NTC_THERMISTOR is not set -# CONFIG_SENSORS_NZXT_KRAKEN2 is not set -# CONFIG_SENSORS_NZXT_SMART2 is not set -# CONFIG_SENSORS_OCC_P8_I2C is not set -# CONFIG_SENSORS_PC87360 is not set -# CONFIG_SENSORS_PC87427 is not set -# CONFIG_SENSORS_PCF8591 is not set -# CONFIG_SENSORS_PIM4328 is not set -# CONFIG_SENSORS_PM6764TR is not set -# CONFIG_SENSORS_PMBUS is not set -# CONFIG_SENSORS_POWR1220 is not set -# CONFIG_SENSORS_PWM_FAN is not set -# CONFIG_SENSORS_PXE1610 is not set -# CONFIG_SENSORS_Q54SJ108A2 is not set -# CONFIG_SENSORS_RM3100_I2C is not set -# CONFIG_SENSORS_RM3100_SPI is not set -# CONFIG_SENSORS_SBRMI is not set -# CONFIG_SENSORS_SBTSI is not set -# CONFIG_SENSORS_SCH5627 is not set -# CONFIG_SENSORS_SCH5636 is not set -# CONFIG_SENSORS_SCH56XX_COMMON is not set -# CONFIG_SENSORS_SHT15 is not set -# CONFIG_SENSORS_SHT21 is not set -# CONFIG_SENSORS_SHT3x is not set -# CONFIG_SENSORS_SHT4x is not set -# CONFIG_SENSORS_SHTC1 is not set -# CONFIG_SENSORS_SIS5595 is not set -# CONFIG_SENSORS_SMM665 is not set -# CONFIG_SENSORS_SMSC47B397 is not set -# CONFIG_SENSORS_SMSC47M1 is not set -# CONFIG_SENSORS_SMSC47M192 is not set -# CONFIG_SENSORS_STPDDC60 is not set -# CONFIG_SENSORS_STTS751 is not set -# CONFIG_SENSORS_TC654 is not set -# CONFIG_SENSORS_TC74 is not set -# CONFIG_SENSORS_THMC50 is not set -# CONFIG_SENSORS_TMP102 is not set -# CONFIG_SENSORS_TMP103 is not set -# CONFIG_SENSORS_TMP108 is not set -# CONFIG_SENSORS_TMP401 is not set -# CONFIG_SENSORS_TMP421 is not set -# CONFIG_SENSORS_TMP513 is not set -# CONFIG_SENSORS_TPS23861 is not set -# CONFIG_SENSORS_TPS40422 is not set -# CONFIG_SENSORS_TPS53679 is not set -# CONFIG_SENSORS_TSL2550 is not set -# CONFIG_SENSORS_TSL2563 is not set -# CONFIG_SENSORS_UCD9000 is not set -# CONFIG_SENSORS_UCD9200 is not set -# CONFIG_SENSORS_VEXPRESS is not set -# CONFIG_SENSORS_VIA686A is not set -# CONFIG_SENSORS_VIA_CPUTEMP is not set -# CONFIG_SENSORS_VT1211 is not set -# CONFIG_SENSORS_VT8231 is not set -# CONFIG_SENSORS_W83627EHF is not set -# CONFIG_SENSORS_W83627HF is not set -# CONFIG_SENSORS_W83773G is not set -# CONFIG_SENSORS_W83781D is not set -# CONFIG_SENSORS_W83791D is not set -# CONFIG_SENSORS_W83792D is not set -# CONFIG_SENSORS_W83793 is not set -# CONFIG_SENSORS_W83795 is not set -# CONFIG_SENSORS_W83L785TS is not set -# CONFIG_SENSORS_W83L786NG is not set -# CONFIG_SENSORS_XDPE122 is not set -# CONFIG_SENSORS_XGENE is not set -# CONFIG_SENSORS_ZL6100 is not set -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_16550A_VARIANTS=y -# CONFIG_SERIAL_8250_ACCENT is not set -# CONFIG_SERIAL_8250_ASPEED_VUART is not set -# CONFIG_SERIAL_8250_BOCA is not set -CONFIG_SERIAL_8250_CONSOLE=y -# CONFIG_SERIAL_8250_CS is not set -# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set -# CONFIG_SERIAL_8250_DETECT_IRQ is not set -CONFIG_SERIAL_8250_DMA=y -# CONFIG_SERIAL_8250_DW is not set -# CONFIG_SERIAL_8250_EM is not set -# CONFIG_SERIAL_8250_EXAR is not set -# CONFIG_SERIAL_8250_EXAR_ST16C554 is not set -# CONFIG_SERIAL_8250_EXTENDED is not set -# CONFIG_SERIAL_8250_FINTEK is not set -# CONFIG_SERIAL_8250_FOURPORT is not set -# CONFIG_SERIAL_8250_HUB6 is not set -# CONFIG_SERIAL_8250_INGENIC is not set -# CONFIG_SERIAL_8250_LPSS is not set -# CONFIG_SERIAL_8250_MANY_PORTS is not set -# CONFIG_SERIAL_8250_MID is not set -# CONFIG_SERIAL_8250_MOXA is not set -CONFIG_SERIAL_8250_NR_UARTS=2 -# CONFIG_SERIAL_8250_PCI is not set -# CONFIG_SERIAL_8250_PERICOM is not set -# CONFIG_SERIAL_8250_RSA is not set -# CONFIG_SERIAL_8250_RT288X is not set -CONFIG_SERIAL_8250_RUNTIME_UARTS=2 -# CONFIG_SERIAL_ALTERA_JTAGUART is not set -# CONFIG_SERIAL_ALTERA_UART is not set -# CONFIG_SERIAL_AMBA_PL010 is not set -# CONFIG_SERIAL_AMBA_PL011 is not set -# CONFIG_SERIAL_ARC is not set -# CONFIG_SERIAL_BCM63XX is not set -# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -# CONFIG_SERIAL_DEV_BUS is not set -CONFIG_SERIAL_EARLYCON=y -# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set -# CONFIG_SERIAL_FSL_LINFLEXUART is not set -# CONFIG_SERIAL_FSL_LPUART is not set -# CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set -# CONFIG_SERIAL_IFX6X60 is not set -# CONFIG_SERIAL_JSM is not set -# CONFIG_SERIAL_MAX3100 is not set -# CONFIG_SERIAL_MAX310X is not set -# CONFIG_SERIAL_NONSTANDARD is not set -# CONFIG_SERIAL_OF_PLATFORM is not set -# CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL is not set -# CONFIG_SERIAL_PCH_UART is not set -# CONFIG_SERIAL_RP2 is not set -# CONFIG_SERIAL_SC16IS7XX is not set -# CONFIG_SERIAL_SCCNXP is not set -# CONFIG_SERIAL_SH_SCI is not set -# CONFIG_SERIAL_SIFIVE is not set -# CONFIG_SERIAL_SPRD is not set -# CONFIG_SERIAL_STM32 is not set -# CONFIG_SERIAL_ST_ASC is not set -# CONFIG_SERIAL_TIMBERDALE is not set -# CONFIG_SERIAL_UARTLITE is not set -# CONFIG_SERIAL_XILINX_PS_UART is not set -# CONFIG_SERIO is not set -# CONFIG_SERIO_ALTERA_PS2 is not set -# CONFIG_SERIO_AMBAKMI is not set -# CONFIG_SERIO_APBPS2 is not set -# CONFIG_SERIO_ARC_PS2 is not set -# CONFIG_SERIO_CT82C710 is not set -# CONFIG_SERIO_GPIO_PS2 is not set -# CONFIG_SERIO_I8042 is not set -# CONFIG_SERIO_LIBPS2 is not set -# CONFIG_SERIO_PARKBD is not set -# CONFIG_SERIO_PCIPS2 is not set -# CONFIG_SERIO_PS2MULT is not set -# CONFIG_SERIO_RAW is not set -# CONFIG_SERIO_SERPORT is not set -# CONFIG_SERIO_SUN4I_PS2 is not set -# CONFIG_SFC is not set -# CONFIG_SFC_FALCON is not set -# CONFIG_SFI is not set -# CONFIG_SFP is not set -# CONFIG_SF_PDMA is not set -# CONFIG_SGETMASK_SYSCALL is not set -# CONFIG_SGI_IOC4 is not set -# CONFIG_SGI_IP22 is not set -# CONFIG_SGI_IP27 is not set -# CONFIG_SGI_IP28 is not set -# CONFIG_SGI_IP30 is not set -# CONFIG_SGI_IP32 is not set -# CONFIG_SGI_MFD_IOC3 is not set -# CONFIG_SGI_PARTITION is not set -# CONFIG_SG_POOL is not set -# CONFIG_SG_SPLIT is not set -CONFIG_SHMEM=y -# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set -# CONFIG_SH_ETH is not set -# CONFIG_SH_TIMER_CMT is not set -# CONFIG_SH_TIMER_MTU2 is not set -# CONFIG_SH_TIMER_TMU is not set -# CONFIG_SI1133 is not set -# CONFIG_SI1145 is not set -# CONFIG_SI7005 is not set -# CONFIG_SI7020 is not set -# CONFIG_SIBYTE_BIGSUR is not set -# CONFIG_SIBYTE_CARMEL is not set -# CONFIG_SIBYTE_CRHINE is not set -# CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SIBYTE_LITTLESUR is not set -# CONFIG_SIBYTE_RHONE is not set -# CONFIG_SIBYTE_SENTOSA is not set -# CONFIG_SIBYTE_SWARM is not set -CONFIG_SIGNALFD=y -# CONFIG_SIGNED_PE_FILE_VERIFICATION is not set -# CONFIG_SIMPLE_GPIO is not set -# CONFIG_SIMPLE_PM_BUS is not set -# CONFIG_SIOX is not set -# CONFIG_SIS190 is not set -# CONFIG_SIS900 is not set -# CONFIG_SKGE is not set -# CONFIG_SKY2 is not set -# CONFIG_SKY2_DEBUG is not set -# CONFIG_SLAB is not set -CONFIG_SLABINFO=y -# CONFIG_SLAB_FREELIST_HARDENED is not set -# CONFIG_SLAB_FREELIST_RANDOM is not set -CONFIG_SLAB_MERGE_DEFAULT=y -# CONFIG_SLHC is not set -# CONFIG_SLICOSS is not set -# CONFIG_SLIMBUS is not set -# CONFIG_SLIP is not set -# CONFIG_SLOB is not set -CONFIG_SLUB=y -CONFIG_SLUB_CPU_PARTIAL=y -# CONFIG_SLUB_DEBUG is not set -# CONFIG_SLUB_DEBUG_ON is not set -# CONFIG_SLUB_MEMCG_SYSFS_ON is not set -# CONFIG_SLUB_STATS is not set -# CONFIG_SMARTJOYPLUS_FF is not set -# CONFIG_SMB_SERVER is not set -# CONFIG_SMC911X is not set -# CONFIG_SMC9194 is not set -# CONFIG_SMC91X is not set -# CONFIG_SMP is not set -# CONFIG_SMSC911X is not set -# CONFIG_SMSC9420 is not set -# CONFIG_SMSC_PHY is not set -# CONFIG_SMS_SDIO_DRV is not set -# CONFIG_SMS_USB_DRV is not set -# CONFIG_SM_FTL is not set -# CONFIG_SND is not set -# CONFIG_SND_AC97_POWER_SAVE is not set -# CONFIG_SND_AD1816A is not set -# CONFIG_SND_AD1848 is not set -# CONFIG_SND_AD1889 is not set -# CONFIG_SND_ADLIB is not set -# CONFIG_SND_ALI5451 is not set -# CONFIG_SND_ALOOP is not set -# CONFIG_SND_ALS100 is not set -# CONFIG_SND_ALS300 is not set -# CONFIG_SND_ALS4000 is not set -# CONFIG_SND_ARM is not set -# CONFIG_SND_ASIHPI is not set -# CONFIG_SND_ATIIXP is not set -# CONFIG_SND_ATIIXP_MODEM is not set -# CONFIG_SND_ATMEL_AC97C is not set -# CONFIG_SND_ATMEL_SOC is not set -# CONFIG_SND_AU8810 is not set -# CONFIG_SND_AU8820 is not set -# CONFIG_SND_AU8830 is not set -# CONFIG_SND_AUDIO_GRAPH_CARD is not set -# CONFIG_SND_AUDIO_GRAPH_SCU_CARD is not set -# CONFIG_SND_AW2 is not set -# CONFIG_SND_AZT2320 is not set -# CONFIG_SND_AZT3328 is not set -# CONFIG_SND_BCD2000 is not set -# CONFIG_SND_BCM63XX_I2S_WHISTLER is not set -# CONFIG_SND_BT87X is not set -# CONFIG_SND_CA0106 is not set -# CONFIG_SND_CMI8330 is not set -# CONFIG_SND_CMIPCI is not set -# CONFIG_SND_CS4231 is not set -# CONFIG_SND_CS4236 is not set -# CONFIG_SND_CS4281 is not set -# CONFIG_SND_CS46XX is not set -# CONFIG_SND_CS5530 is not set -# CONFIG_SND_CS5535AUDIO is not set -# CONFIG_SND_CTXFI is not set -# CONFIG_SND_DARLA20 is not set -# CONFIG_SND_DARLA24 is not set -# CONFIG_SND_DEBUG is not set -# CONFIG_SND_DESIGNWARE_I2S is not set -CONFIG_SND_DRIVERS=y -# CONFIG_SND_DUMMY is not set -# CONFIG_SND_DYNAMIC_MINORS is not set -# CONFIG_SND_ECHO3G is not set -# CONFIG_SND_EDMA_SOC is not set -# CONFIG_SND_EMU10K1 is not set -# CONFIG_SND_EMU10K1X is not set -# CONFIG_SND_EMU10K1_SEQ is not set -# CONFIG_SND_ENS1370 is not set -# CONFIG_SND_ENS1371 is not set -# CONFIG_SND_ES1688 is not set -# CONFIG_SND_ES18XX is not set -# CONFIG_SND_ES1938 is not set -# CONFIG_SND_ES1968 is not set -# CONFIG_SND_FIREWIRE is not set -# CONFIG_SND_FM801 is not set -# CONFIG_SND_GINA20 is not set -# CONFIG_SND_GINA24 is not set -# CONFIG_SND_GUSCLASSIC is not set -# CONFIG_SND_GUSEXTREME is not set -# CONFIG_SND_GUSMAX is not set -# CONFIG_SND_HDA_INTEL is not set -# CONFIG_SND_HDA_INTEL_DETECT_DMIC is not set -# CONFIG_SND_HDA_INTEL_HDMI_SILENT_STREAM is not set -CONFIG_SND_HDA_POWER_SAVE_DEFAULT=0 -CONFIG_SND_HDA_PREALLOC_SIZE=64 -# CONFIG_SND_HDSP is not set -# CONFIG_SND_HDSPM is not set -# CONFIG_SND_HRTIMER is not set -# CONFIG_SND_HWDEP is not set -# CONFIG_SND_I2S_HI6210_I2S is not set -# CONFIG_SND_ICE1712 is not set -# CONFIG_SND_ICE1724 is not set -# CONFIG_SND_INDIGO is not set -# CONFIG_SND_INDIGODJ is not set -# CONFIG_SND_INDIGODJX is not set -# CONFIG_SND_INDIGOIO is not set -# CONFIG_SND_INDIGOIOX is not set -# CONFIG_SND_INTEL8X0 is not set -# CONFIG_SND_INTEL8X0M is not set -# CONFIG_SND_INTERWAVE is not set -# CONFIG_SND_INTERWAVE_STB is not set -# CONFIG_SND_ISA is not set -# CONFIG_SND_JZ4740_SOC_I2S is not set -# CONFIG_SND_KIRKWOOD_SOC is not set -# CONFIG_SND_KORG1212 is not set -# CONFIG_SND_LAYLA20 is not set -# CONFIG_SND_LAYLA24 is not set -# CONFIG_SND_LOLA is not set -# CONFIG_SND_LX6464ES is not set -# CONFIG_SND_MAESTRO3 is not set -CONFIG_SND_MAX_CARDS=16 -# CONFIG_SND_MIA is not set -# CONFIG_SND_MIPS is not set -# CONFIG_SND_MIRO is not set -# CONFIG_SND_MIXART is not set -# CONFIG_SND_MIXER_OSS is not set -# CONFIG_SND_MONA is not set -# CONFIG_SND_MPC52xx_SOC_EFIKA is not set -# CONFIG_SND_MPU401 is not set -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_MTS64 is not set -# CONFIG_SND_MXS_SOC is not set -# CONFIG_SND_NM256 is not set -# CONFIG_SND_OPL3SA2 is not set -# CONFIG_SND_OPL3_LIB_SEQ is not set -# CONFIG_SND_OPL4_LIB_SEQ is not set -# CONFIG_SND_OPTI92X_AD1848 is not set -# CONFIG_SND_OPTI92X_CS4231 is not set -# CONFIG_SND_OPTI93X is not set -CONFIG_SND_OSSEMUL=y -# CONFIG_SND_OXYGEN is not set -CONFIG_SND_PCI=y -# CONFIG_SND_PCM is not set -# CONFIG_SND_PCMCIA is not set -# CONFIG_SND_PCM_OSS is not set -CONFIG_SND_PCM_OSS_PLUGINS=y -# CONFIG_SND_PCM_TIMER is not set -# CONFIG_SND_PCM_XRUN_DEBUG is not set -# CONFIG_SND_PCXHR is not set -# CONFIG_SND_PDAUDIOCF is not set -# CONFIG_SND_PORTMAN2X4 is not set -# CONFIG_SND_POWERPC_SOC is not set -# CONFIG_SND_PPC is not set -CONFIG_SND_PROC_FS=y -# CONFIG_SND_RAWMIDI is not set -# CONFIG_SND_RAWMIDI_SEQ is not set -# CONFIG_SND_RIPTIDE is not set -# CONFIG_SND_RME32 is not set -# CONFIG_SND_RME96 is not set -# CONFIG_SND_RME9652 is not set -# CONFIG_SND_RTCTIMER is not set -# CONFIG_SND_SB16 is not set -# CONFIG_SND_SB8 is not set -# CONFIG_SND_SBAWE is not set -# CONFIG_SND_SBAWE_SEQ is not set -# CONFIG_SND_SE6X is not set -# CONFIG_SND_SEQUENCER is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_SIMPLE_CARD is not set -# CONFIG_SND_SIMPLE_SCU_CARD is not set -# CONFIG_SND_SIS7019 is not set -# CONFIG_SND_SOC is not set -# CONFIG_SND_SOC_AC97_CODEC is not set -# CONFIG_SND_SOC_ADAU1372_I2C is not set -# CONFIG_SND_SOC_ADAU1372_SPI is not set -# CONFIG_SND_SOC_ADAU1701 is not set -# CONFIG_SND_SOC_ADAU1761_I2C is not set -# CONFIG_SND_SOC_ADAU1761_SPI is not set -# CONFIG_SND_SOC_ADAU7002 is not set -# CONFIG_SND_SOC_ADAU7118_HW is not set -# CONFIG_SND_SOC_ADAU7118_I2C is not set -# CONFIG_SND_SOC_AK4104 is not set -# CONFIG_SND_SOC_AK4118 is not set -# CONFIG_SND_SOC_AK4458 is not set -# CONFIG_SND_SOC_AK4554 is not set -# CONFIG_SND_SOC_AK4613 is not set -# CONFIG_SND_SOC_AK4642 is not set -# CONFIG_SND_SOC_AK5386 is not set -# CONFIG_SND_SOC_AK5558 is not set -# CONFIG_SND_SOC_ALC5623 is not set -# CONFIG_SND_SOC_AMD_ACP is not set -# CONFIG_SND_SOC_AMD_ACP3x is not set -# CONFIG_SND_SOC_AMD_RENOIR is not set -# CONFIG_SND_SOC_AU1XAUDIO is not set -# CONFIG_SND_SOC_AU1XPSC is not set -# CONFIG_SND_SOC_BD28623 is not set -# CONFIG_SND_SOC_BT_SCO is not set -# CONFIG_SND_SOC_CS35L32 is not set -# CONFIG_SND_SOC_CS35L33 is not set -# CONFIG_SND_SOC_CS35L34 is not set -# CONFIG_SND_SOC_CS35L35 is not set -# CONFIG_SND_SOC_CS35L36 is not set -# CONFIG_SND_SOC_CS4234 is not set -# CONFIG_SND_SOC_CS4265 is not set -# CONFIG_SND_SOC_CS4270 is not set -# CONFIG_SND_SOC_CS4271 is not set -# CONFIG_SND_SOC_CS4271_I2C is not set -# CONFIG_SND_SOC_CS4271_SPI is not set -# CONFIG_SND_SOC_CS42L42 is not set -# CONFIG_SND_SOC_CS42L51_I2C is not set -# CONFIG_SND_SOC_CS42L52 is not set -# CONFIG_SND_SOC_CS42L56 is not set -# CONFIG_SND_SOC_CS42L73 is not set -# CONFIG_SND_SOC_CS42XX8_I2C is not set -# CONFIG_SND_SOC_CS43130 is not set -# CONFIG_SND_SOC_CS4341 is not set -# CONFIG_SND_SOC_CS4349 is not set -# CONFIG_SND_SOC_CS53L30 is not set -# CONFIG_SND_SOC_CX2072X is not set -# CONFIG_SND_SOC_DA7213 is not set -# CONFIG_SND_SOC_DIO2125 is not set -# CONFIG_SND_SOC_DMIC is not set -# CONFIG_SND_SOC_ES7134 is not set -# CONFIG_SND_SOC_ES7241 is not set -# CONFIG_SND_SOC_ES8316 is not set -# CONFIG_SND_SOC_ES8328 is not set -# CONFIG_SND_SOC_ES8328_I2C is not set -# CONFIG_SND_SOC_ES8328_SPI is not set -# CONFIG_SND_SOC_EUKREA_TLV320 is not set -# CONFIG_SND_SOC_FSL_ASOC_CARD is not set -# CONFIG_SND_SOC_FSL_ASRC is not set -# CONFIG_SND_SOC_FSL_AUDMIX is not set -# CONFIG_SND_SOC_FSL_ESAI is not set -# CONFIG_SND_SOC_FSL_MICFIL is not set -# CONFIG_SND_SOC_FSL_SAI is not set -# CONFIG_SND_SOC_FSL_SPDIF is not set -# CONFIG_SND_SOC_FSL_SSI is not set -# CONFIG_SND_SOC_FSL_XCVR is not set -# CONFIG_SND_SOC_GTM601 is not set -# CONFIG_SND_SOC_ICS43432 is not set -# CONFIG_SND_SOC_IMG is not set -# CONFIG_SND_SOC_IMX_AUDMIX is not set -# CONFIG_SND_SOC_IMX_AUDMUX is not set -# CONFIG_SND_SOC_IMX_ES8328 is not set -# CONFIG_SND_SOC_IMX_SPDIF is not set -# CONFIG_SND_SOC_IMX_WM8962 is not set -# CONFIG_SND_SOC_INNO_RK3036 is not set -# CONFIG_SND_SOC_INTEL_APL is not set -# CONFIG_SND_SOC_INTEL_BAYTRAIL is not set -# CONFIG_SND_SOC_INTEL_BDW_RT5677_MACH is not set -# CONFIG_SND_SOC_INTEL_BXT_DA7219_MAX98357A_MACH is not set -# CONFIG_SND_SOC_INTEL_BXT_RT298_MACH is not set -# CONFIG_SND_SOC_INTEL_BYTCR_RT5640_MACH is not set -# CONFIG_SND_SOC_INTEL_BYTCR_RT5651_MACH is not set -# CONFIG_SND_SOC_INTEL_BYT_CHT_DA7213_MACH is not set -# CONFIG_SND_SOC_INTEL_BYT_CHT_ES8316_MACH is not set -# CONFIG_SND_SOC_INTEL_BYT_CHT_NOCODEC_MACH is not set -# CONFIG_SND_SOC_INTEL_BYT_MAX98090_MACH is not set -# CONFIG_SND_SOC_INTEL_BYT_RT5640_MACH is not set -# CONFIG_SND_SOC_INTEL_CATPT is not set -# CONFIG_SND_SOC_INTEL_CFL is not set -# CONFIG_SND_SOC_INTEL_CHT_BSW_MAX98090_TI_MACH is not set -# CONFIG_SND_SOC_INTEL_CHT_BSW_NAU8824_MACH is not set -# CONFIG_SND_SOC_INTEL_CHT_BSW_RT5645_MACH is not set -# CONFIG_SND_SOC_INTEL_CHT_BSW_RT5672_MACH is not set -# CONFIG_SND_SOC_INTEL_CML_H is not set -# CONFIG_SND_SOC_INTEL_CML_LP is not set -# CONFIG_SND_SOC_INTEL_CNL is not set -# CONFIG_SND_SOC_INTEL_GLK is not set -# CONFIG_SND_SOC_INTEL_HASWELL is not set -# CONFIG_SND_SOC_INTEL_KBL is not set -# CONFIG_SND_SOC_INTEL_KBL_RT5663_MAX98927_MACH is not set -# CONFIG_SND_SOC_INTEL_KBL_RT5663_RT5514_MAX98927_MACH is not set -# CONFIG_SND_SOC_INTEL_KEEMBAY is not set -# CONFIG_SND_SOC_INTEL_SKL is not set -# CONFIG_SND_SOC_INTEL_SKL_NAU88L25_MAX98357A_MACH is not set -# CONFIG_SND_SOC_INTEL_SKL_NAU88L25_SSM4567_MACH is not set -# CONFIG_SND_SOC_INTEL_SKL_RT286_MACH is not set -# CONFIG_SND_SOC_INTEL_SKYLAKE is not set -# CONFIG_SND_SOC_INTEL_SST is not set -CONFIG_SND_SOC_INTEL_SST_TOPLEVEL=y -# CONFIG_SND_SOC_INTEL_USER_FRIENDLY_LONG_NAMES is not set -# CONFIG_SND_SOC_JZ4725B_CODEC is not set -# CONFIG_SND_SOC_JZ4740_CODEC is not set -# CONFIG_SND_SOC_JZ4770_CODEC is not set -# CONFIG_SND_SOC_LPASS_RX_MACRO is not set -# CONFIG_SND_SOC_LPASS_TX_MACRO is not set -# CONFIG_SND_SOC_LPASS_VA_MACRO is not set -# CONFIG_SND_SOC_LPASS_WSA_MACRO is not set -# CONFIG_SND_SOC_MA120X0P is not set -# CONFIG_SND_SOC_MAX9759 is not set -# CONFIG_SND_SOC_MAX98088 is not set -# CONFIG_SND_SOC_MAX98357A is not set -# CONFIG_SND_SOC_MAX98373 is not set -# CONFIG_SND_SOC_MAX98373_I2C is not set -# CONFIG_SND_SOC_MAX98390 is not set -# CONFIG_SND_SOC_MAX98504 is not set -# CONFIG_SND_SOC_MAX9860 is not set -# CONFIG_SND_SOC_MAX9867 is not set -# CONFIG_SND_SOC_MAX98927 is not set -# CONFIG_SND_SOC_MEDIATEK is not set -# CONFIG_SND_SOC_MPC5200_AC97 is not set -# CONFIG_SND_SOC_MPC5200_I2S is not set -# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set -# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set -# CONFIG_SND_SOC_MT2701 is not set -# CONFIG_SND_SOC_MT6351 is not set -# CONFIG_SND_SOC_MT6358 is not set -# CONFIG_SND_SOC_MT6660 is not set -# CONFIG_SND_SOC_MT6797 is not set -# CONFIG_SND_SOC_MT8173 is not set -# CONFIG_SND_SOC_MT8183 is not set -# CONFIG_SND_SOC_MTK_BTCVSD is not set -# CONFIG_SND_SOC_NAU8315 is not set -# CONFIG_SND_SOC_NAU8540 is not set -# CONFIG_SND_SOC_NAU8810 is not set -# CONFIG_SND_SOC_NAU8822 is not set -# CONFIG_SND_SOC_NAU8824 is not set -# CONFIG_SND_SOC_PCM1681 is not set -# CONFIG_SND_SOC_PCM1789_I2C is not set -# CONFIG_SND_SOC_PCM1792A is not set -# CONFIG_SND_SOC_PCM179X_I2C is not set -# CONFIG_SND_SOC_PCM179X_SPI is not set -# CONFIG_SND_SOC_PCM186X_I2C is not set -# CONFIG_SND_SOC_PCM186X_SPI is not set -# CONFIG_SND_SOC_PCM3060_I2C is not set -# CONFIG_SND_SOC_PCM3060_SPI is not set -# CONFIG_SND_SOC_PCM3168A_I2C is not set -# CONFIG_SND_SOC_PCM3168A_SPI is not set -# CONFIG_SND_SOC_PCM512x_I2C is not set -# CONFIG_SND_SOC_PCM512x_SPI is not set -# CONFIG_SND_SOC_QCOM is not set -# CONFIG_SND_SOC_RK3328 is not set -# CONFIG_SND_SOC_RK817 is not set -# CONFIG_SND_SOC_ROCKCHIP_SPDIF is not set -# CONFIG_SND_SOC_RT5616 is not set -# CONFIG_SND_SOC_RT5631 is not set -# CONFIG_SND_SOC_RT5640 is not set -# CONFIG_SND_SOC_RT5659 is not set -# CONFIG_SND_SOC_RT5677_SPI is not set -# CONFIG_SND_SOC_SGTL5000 is not set -# CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set -# CONFIG_SND_SOC_SIMPLE_MUX is not set -# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set -# CONFIG_SND_SOC_SOF_TOPLEVEL is not set -# CONFIG_SND_SOC_SPDIF is not set -# CONFIG_SND_SOC_SSM2305 is not set -# CONFIG_SND_SOC_SSM2602_I2C is not set -# CONFIG_SND_SOC_SSM2602_SPI is not set -# CONFIG_SND_SOC_SSM4567 is not set -# CONFIG_SND_SOC_STA32X is not set -# CONFIG_SND_SOC_STA350 is not set -# CONFIG_SND_SOC_STI_SAS is not set -# CONFIG_SND_SOC_TAS2552 is not set -# CONFIG_SND_SOC_TAS2562 is not set -# CONFIG_SND_SOC_TAS2764 is not set -# CONFIG_SND_SOC_TAS2770 is not set -# CONFIG_SND_SOC_TAS5086 is not set -# CONFIG_SND_SOC_TAS571X is not set -# CONFIG_SND_SOC_TAS5720 is not set -# CONFIG_SND_SOC_TAS6424 is not set -# CONFIG_SND_SOC_TDA7419 is not set -# CONFIG_SND_SOC_TFA9879 is not set -# CONFIG_SND_SOC_TFA989X is not set -# CONFIG_SND_SOC_TLV320ADCX140 is not set -# CONFIG_SND_SOC_TLV320AIC23_I2C is not set -# CONFIG_SND_SOC_TLV320AIC23_SPI is not set -# CONFIG_SND_SOC_TLV320AIC31XX is not set -# CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set -# CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set -# CONFIG_SND_SOC_TLV320AIC3X is not set -# CONFIG_SND_SOC_TLV320AIC3X_I2C is not set -# CONFIG_SND_SOC_TLV320AIC3X_SPI is not set -# CONFIG_SND_SOC_TPA6130A2 is not set -# CONFIG_SND_SOC_TS3A227E is not set -# CONFIG_SND_SOC_TSCS42XX is not set -# CONFIG_SND_SOC_TSCS454 is not set -# CONFIG_SND_SOC_UDA1334 is not set -# CONFIG_SND_SOC_WM8510 is not set -# CONFIG_SND_SOC_WM8523 is not set -# CONFIG_SND_SOC_WM8524 is not set -# CONFIG_SND_SOC_WM8580 is not set -# CONFIG_SND_SOC_WM8711 is not set -# CONFIG_SND_SOC_WM8728 is not set -# CONFIG_SND_SOC_WM8731 is not set -# CONFIG_SND_SOC_WM8737 is not set -# CONFIG_SND_SOC_WM8741 is not set -# CONFIG_SND_SOC_WM8750 is not set -# CONFIG_SND_SOC_WM8753 is not set -# CONFIG_SND_SOC_WM8770 is not set -# CONFIG_SND_SOC_WM8776 is not set -# CONFIG_SND_SOC_WM8782 is not set -# CONFIG_SND_SOC_WM8804_I2C is not set -# CONFIG_SND_SOC_WM8804_SPI is not set -# CONFIG_SND_SOC_WM8903 is not set -# CONFIG_SND_SOC_WM8904 is not set -# CONFIG_SND_SOC_WM8960 is not set -# CONFIG_SND_SOC_WM8962 is not set -# CONFIG_SND_SOC_WM8974 is not set -# CONFIG_SND_SOC_WM8978 is not set -# CONFIG_SND_SOC_WM8985 is not set -# CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER is not set -# CONFIG_SND_SOC_XILINX_I2S is not set -# CONFIG_SND_SOC_XILINX_SPDIF is not set -# CONFIG_SND_SOC_XTFPGA_I2S is not set -# CONFIG_SND_SOC_ZL38060 is not set -# CONFIG_SND_SOC_ZX_AUD96P22 is not set -# CONFIG_SND_SONICVIBES is not set -# CONFIG_SND_SPI is not set -# CONFIG_SND_SSCAPE is not set -# CONFIG_SND_SST_ATOM_HIFI2_PLATFORM_ACPI is not set -# CONFIG_SND_SST_ATOM_HIFI2_PLATFORM_PCI is not set -# CONFIG_SND_SUN4I_CODEC is not set -# CONFIG_SND_SUPPORT_OLD_API is not set -# CONFIG_SND_TIMER is not set -# CONFIG_SND_TRIDENT is not set -CONFIG_SND_USB=y -# CONFIG_SND_USB_6FIRE is not set -# CONFIG_SND_USB_AUDIO is not set -# CONFIG_SND_USB_CAIAQ is not set -# CONFIG_SND_USB_HIFACE is not set -# CONFIG_SND_USB_POD is not set -# CONFIG_SND_USB_PODHD is not set -# CONFIG_SND_USB_TONEPORT is not set -# CONFIG_SND_USB_UA101 is not set -# CONFIG_SND_USB_US122L is not set -# CONFIG_SND_USB_USX2Y is not set -# CONFIG_SND_USB_VARIAX is not set -# CONFIG_SND_VERBOSE_PRINTK is not set -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VIA82XX is not set -# CONFIG_SND_VIA82XX_MODEM is not set -# CONFIG_SND_VIRTUOSO is not set -# CONFIG_SND_VX222 is not set -# CONFIG_SND_VXPOCKET is not set -# CONFIG_SND_WAVEFRONT is not set -CONFIG_SND_X86=y -# CONFIG_SND_XEN_FRONTEND is not set -# CONFIG_SND_YMFPCI is not set -# CONFIG_SNI_RM is not set -# CONFIG_SOCIONEXT_SYNQUACER_PREITS is not set -# CONFIG_SOCK_CGROUP_DATA is not set -# CONFIG_SOCK_RX_QUEUE_MAPPING is not set -# CONFIG_SOC_AM33XX is not set -# CONFIG_SOC_AM43XX is not set -# CONFIG_SOC_BRCMSTB is not set -# CONFIG_SOC_CAMERA is not set -# CONFIG_SOC_DRA7XX is not set -# CONFIG_SOC_HAS_OMAP2_SDRC is not set -# CONFIG_SOC_OMAP5 is not set -# CONFIG_SOC_TI is not set -# CONFIG_SOFTLOCKUP_DETECTOR is not set -# CONFIG_SOFT_WATCHDOG is not set -# CONFIG_SOLARIS_X86_PARTITION is not set -# CONFIG_SONYPI is not set -# CONFIG_SONY_LAPTOP is not set -# CONFIG_SOUND is not set -# CONFIG_SOUNDWIRE is not set -# CONFIG_SOUND_OSS_CORE is not set -# CONFIG_SOUND_OSS_CORE_PRECLAIM is not set -# CONFIG_SOUND_PRIME is not set -# CONFIG_SP5100_TCO is not set -# CONFIG_SPARSEMEM_MANUAL is not set -# CONFIG_SPARSEMEM_STATIC is not set -# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set -# CONFIG_SPARSE_IRQ is not set -# CONFIG_SPARSE_RCU_POINTER is not set -# CONFIG_SPEAKUP is not set -# CONFIG_SPI is not set -# CONFIG_SPINLOCK_TEST is not set -# CONFIG_SPI_ALTERA is not set -# CONFIG_SPI_ALTERA_CORE is not set -# CONFIG_SPI_AMD is not set -# CONFIG_SPI_AU1550 is not set -# CONFIG_SPI_AXI_SPI_ENGINE is not set -# CONFIG_SPI_BCM2835 is not set -# CONFIG_SPI_BCM_QSPI is not set -# CONFIG_SPI_BITBANG is not set -# CONFIG_SPI_BUTTERFLY is not set -# CONFIG_SPI_CADENCE is not set -# CONFIG_SPI_CADENCE_QUADSPI is not set -# CONFIG_SPI_CADENCE_XSPI is not set -# CONFIG_SPI_DEBUG is not set -# CONFIG_SPI_DESIGNWARE is not set -# CONFIG_SPI_FSL_DSPI is not set -# CONFIG_SPI_FSL_ESPI is not set -# CONFIG_SPI_FSL_SPI is not set -# CONFIG_SPI_GPIO is not set -# CONFIG_SPI_GPIO_OLD is not set -# CONFIG_SPI_IMG_SPFI is not set -# CONFIG_SPI_LANTIQ_SSC is not set -# CONFIG_SPI_LM70_LLP is not set -# CONFIG_SPI_LOOPBACK_TEST is not set -# CONFIG_SPI_MASTER is not set -# CONFIG_SPI_MEM is not set -# CONFIG_SPI_MPC52xx is not set -# CONFIG_SPI_MPC52xx_PSC is not set -# CONFIG_SPI_MTK_QUADSPI is not set -# CONFIG_SPI_MUX is not set -# CONFIG_SPI_MXIC is not set -# CONFIG_SPI_NXP_FLEXSPI is not set -# CONFIG_SPI_OCTEON is not set -# CONFIG_SPI_OC_TINY is not set -# CONFIG_SPI_ORION is not set -# CONFIG_SPI_PL022 is not set -# CONFIG_SPI_PPC4xx is not set -# CONFIG_SPI_PXA2XX is not set -# CONFIG_SPI_PXA2XX_PCI is not set -# CONFIG_SPI_QCOM_QSPI is not set -# CONFIG_SPI_ROCKCHIP is not set -CONFIG_SPI_ROCKCHIP_SFC=y -# CONFIG_SPI_S3C64XX is not set -# CONFIG_SPI_SC18IS602 is not set -# CONFIG_SPI_SIFIVE is not set -# CONFIG_SPI_SLAVE is not set -# CONFIG_SPI_SPIDEV is not set -# CONFIG_SPI_THUNDERX is not set -# CONFIG_SPI_TI_QSPI is not set -# CONFIG_SPI_TLE62X0 is not set -# CONFIG_SPI_TOPCLIFF_PCH is not set -# CONFIG_SPI_XCOMM is not set -# CONFIG_SPI_XILINX is not set -# CONFIG_SPI_XWAY is not set -# CONFIG_SPI_ZYNQMP_GQSPI is not set -CONFIG_SPLIT_PTLOCK_CPUS=4 -# CONFIG_SPMI is not set -# CONFIG_SPS30 is not set -# CONFIG_SPS30_I2C is not set -CONFIG_SQUASHFS=y -# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set -# CONFIG_SQUASHFS_DECOMP_MULTI is not set -CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y -# CONFIG_SQUASHFS_DECOMP_SINGLE is not set -CONFIG_SQUASHFS_EMBEDDED=y -# CONFIG_SQUASHFS_FILE_CACHE is not set -CONFIG_SQUASHFS_FILE_DIRECT=y -CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 -# CONFIG_SQUASHFS_LZ4 is not set -# CONFIG_SQUASHFS_LZO is not set -# CONFIG_SQUASHFS_XATTR is not set -CONFIG_SQUASHFS_XZ=y -# CONFIG_SQUASHFS_ZLIB is not set -# CONFIG_SQUASHFS_ZSTD is not set -# CONFIG_SRAM is not set -# CONFIG_SRF04 is not set -# CONFIG_SRF08 is not set -# CONFIG_SSB is not set -# CONFIG_SSB_DEBUG is not set -# CONFIG_SSB_DRIVER_GPIO is not set -# CONFIG_SSB_HOST_SOC is not set -# CONFIG_SSB_PCMCIAHOST is not set -CONFIG_SSB_POSSIBLE=y -# CONFIG_SSB_SDIOHOST is not set -# CONFIG_SSB_SILENT is not set -# CONFIG_SSFDC is not set -# CONFIG_STACKPROTECTOR is not set -# CONFIG_STACKPROTECTOR_PER_TASK is not set -# CONFIG_STACKPROTECTOR_STRONG is not set -# CONFIG_STACKTRACE is not set -# CONFIG_STACKTRACE_BUILD_ID is not set -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_STACK_HASH_ORDER=20 -# CONFIG_STACK_TRACER is not set -# CONFIG_STACK_VALIDATION is not set -CONFIG_STAGING=y -# CONFIG_STAGING_BOARD is not set -# CONFIG_STAGING_GASKET_FRAMEWORK is not set -# CONFIG_STAGING_MEDIA is not set -CONFIG_STANDALONE=y -# CONFIG_STATIC_KEYS_SELFTEST is not set -# CONFIG_STATIC_USERMODEHELPER is not set -CONFIG_STDBINUTILS=y -# CONFIG_STE10XP is not set -# CONFIG_STE_MODEM_RPROC is not set -# CONFIG_STK3310 is not set -# CONFIG_STK8312 is not set -# CONFIG_STK8BA50 is not set -# CONFIG_STM is not set -# CONFIG_STMMAC_ETH is not set -# CONFIG_STMMAC_PCI is not set -# CONFIG_STMMAC_PLATFORM is not set -# CONFIG_STM_DUMMY is not set -# CONFIG_STM_SOURCE_CONSOLE is not set -CONFIG_STP=y -# CONFIG_STREAM_PARSER is not set -# CONFIG_STRICT_DEVMEM is not set -CONFIG_STRICT_KERNEL_RWX=y -CONFIG_STRICT_MODULE_RWX=y -# CONFIG_STRING_SELFTEST is not set -CONFIG_STRIP_ASM_SYMS=y -# CONFIG_STX104 is not set -# CONFIG_ST_UVIS25 is not set -# CONFIG_SUN4I_GPADC is not set -# CONFIG_SUN50I_DE2_BUS is not set -# CONFIG_SUN50I_ERRATUM_UNKNOWN1 is not set -# CONFIG_SUNDANCE is not set -# CONFIG_SUNGEM is not set -# CONFIG_SUNRPC is not set -# CONFIG_SUNRPC_DEBUG is not set -CONFIG_SUNRPC_DISABLE_INSECURE_ENCTYPES=y -# CONFIG_SUNRPC_GSS is not set -# CONFIG_SUNXI_SRAM is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_SURFACE_3_BUTTON is not set -# CONFIG_SURFACE_PLATFORMS is not set -# CONFIG_SUSPEND is not set -# CONFIG_SUSPEND_SKIP_SYNC is not set -CONFIG_SWAP=y -# CONFIG_SWCONFIG is not set -# CONFIG_SWCONFIG_B53 is not set -# CONFIG_SWCONFIG_B53_MDIO_DRIVER is not set -# CONFIG_SWCONFIG_B53_MMAP_DRIVER is not set -# CONFIG_SWCONFIG_B53_SPI_DRIVER is not set -# CONFIG_SWCONFIG_B53_SRAB_DRIVER is not set -# CONFIG_SWCONFIG_LEDS is not set -# CONFIG_SW_SYNC is not set -# CONFIG_SX9310 is not set -# CONFIG_SX9500 is not set -# CONFIG_SXGBE_ETH is not set -CONFIG_SYMBOLIC_ERRNAME=y -# CONFIG_SYNCLINK_CS is not set -# CONFIG_SYNC_FILE is not set -# CONFIG_SYNOPSYS_DWC_ETH_QOS is not set -# CONFIG_SYNTH_EVENTS is not set -CONFIG_SYN_COOKIES=y -# CONFIG_SYSCON_REBOOT_MODE is not set -CONFIG_SYSCTL=y -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_SYSFS=y -# CONFIG_SYSFS_DEPRECATED is not set -# CONFIG_SYSFS_DEPRECATED_V2 is not set -# CONFIG_SYSFS_SYSCALL is not set -# CONFIG_SYSTEMPORT is not set -# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set -# CONFIG_SYSTEM_DATA_VERIFICATION is not set -# CONFIG_SYSTEM_TRUSTED_KEYRING is not set -CONFIG_SYSTEM_TRUSTED_KEYS="" -# CONFIG_SYSV68_PARTITION is not set -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -# CONFIG_SYSV_FS is not set -# CONFIG_SYS_HYPERVISOR is not set -# CONFIG_T5403 is not set -# CONFIG_TARGET_CORE is not set -# CONFIG_TASKSTATS is not set -# CONFIG_TASKS_RCU is not set -CONFIG_TASKS_TRACE_RCU_READ_MB=y -# CONFIG_TASK_XACCT is not set -# CONFIG_TC35815 is not set -# CONFIG_TCG_ATMEL is not set -# CONFIG_TCG_CRB is not set -# CONFIG_TCG_FTPM_TEE is not set -# CONFIG_TCG_INFINEON is not set -# CONFIG_TCG_NSC is not set -# CONFIG_TCG_ST33_I2C is not set -# CONFIG_TCG_TIS is not set -# CONFIG_TCG_TIS_I2C_ATMEL is not set -# CONFIG_TCG_TIS_I2C_CR50 is not set -# CONFIG_TCG_TIS_I2C_INFINEON is not set -# CONFIG_TCG_TIS_I2C_NUVOTON is not set -# CONFIG_TCG_TIS_SPI is not set -# CONFIG_TCG_TIS_ST33ZP24_I2C is not set -# CONFIG_TCG_TIS_ST33ZP24_SPI is not set -# CONFIG_TCG_TPM is not set -# CONFIG_TCG_VTPM_PROXY is not set -# CONFIG_TCG_XEN is not set -# CONFIG_TCIC is not set -CONFIG_TCP_CONG_ADVANCED=y -# CONFIG_TCP_CONG_BBR is not set -# CONFIG_TCP_CONG_BIC is not set -# CONFIG_TCP_CONG_CDG is not set -CONFIG_TCP_CONG_CUBIC=y -# CONFIG_TCP_CONG_DCTCP is not set -# CONFIG_TCP_CONG_HSTCP is not set -# CONFIG_TCP_CONG_HTCP is not set -# CONFIG_TCP_CONG_HYBLA is not set -# CONFIG_TCP_CONG_ILLINOIS is not set -# CONFIG_TCP_CONG_LP is not set -# CONFIG_TCP_CONG_NV is not set -# CONFIG_TCP_CONG_SCALABLE is not set -# CONFIG_TCP_CONG_VEGAS is not set -# CONFIG_TCP_CONG_VENO is not set -# CONFIG_TCP_CONG_WESTWOOD is not set -# CONFIG_TCP_CONG_YEAH is not set -# CONFIG_TCP_MD5SIG is not set -# CONFIG_TCS3414 is not set -# CONFIG_TCS3472 is not set -# CONFIG_TEE is not set -# CONFIG_TEGRA_AHB is not set -# CONFIG_TEGRA_HOST1X is not set -# CONFIG_TEHUTI is not set -# CONFIG_TERANETICS_PHY is not set -# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set -# CONFIG_TEST_BITFIELD is not set -# CONFIG_TEST_BITMAP is not set -# CONFIG_TEST_BITOPS is not set -# CONFIG_TEST_BLACKHOLE_DEV is not set -# CONFIG_TEST_BPF is not set -# CONFIG_TEST_DIV64 is not set -# CONFIG_TEST_FIRMWARE is not set -# CONFIG_TEST_FREE_PAGES is not set -# CONFIG_TEST_HASH is not set -# CONFIG_TEST_HEXDUMP is not set -# CONFIG_TEST_IDA is not set -# CONFIG_TEST_KMOD is not set -# CONFIG_TEST_KSTRTOX is not set -# CONFIG_TEST_LIST_SORT is not set -# CONFIG_TEST_LKM is not set -# CONFIG_TEST_LOCKUP is not set -# CONFIG_TEST_MEMCAT_P is not set -# CONFIG_TEST_MEMINIT is not set -# CONFIG_TEST_MIN_HEAP is not set -# CONFIG_TEST_OVERFLOW is not set -# CONFIG_TEST_POWER is not set -# CONFIG_TEST_PRINTF is not set -# CONFIG_TEST_REF_TRACKER is not set -# CONFIG_TEST_RHASHTABLE is not set -# CONFIG_TEST_SCANF is not set -# CONFIG_TEST_SIPHASH is not set -# CONFIG_TEST_SORT is not set -# CONFIG_TEST_STACKINIT is not set -# CONFIG_TEST_STATIC_KEYS is not set -# CONFIG_TEST_STRING_HELPERS is not set -# CONFIG_TEST_STRSCPY is not set -# CONFIG_TEST_SYSCTL is not set -# CONFIG_TEST_UDELAY is not set -# CONFIG_TEST_USER_COPY is not set -# CONFIG_TEST_UUID is not set -# CONFIG_TEST_VMALLOC is not set -# CONFIG_TEST_XARRAY is not set -CONFIG_TEXTSEARCH=y -# CONFIG_TEXTSEARCH_BM is not set -# CONFIG_TEXTSEARCH_FSM is not set -# CONFIG_TEXTSEARCH_KMP is not set -# CONFIG_THERMAL is not set -# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set -# CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set -# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set -# CONFIG_THERMAL_EMULATION is not set -# CONFIG_THERMAL_GOV_BANG_BANG is not set -# CONFIG_THERMAL_GOV_FAIR_SHARE is not set -# CONFIG_THERMAL_GOV_POWER_ALLOCATOR is not set -# CONFIG_THERMAL_GOV_USER_SPACE is not set -# CONFIG_THERMAL_HWMON is not set -# CONFIG_THERMAL_MMIO is not set -# CONFIG_THERMAL_NETLINK is not set -# CONFIG_THERMAL_STATISTICS is not set -# CONFIG_THERMAL_WRITABLE_TRIPS is not set -# CONFIG_THINKPAD_ACPI is not set -CONFIG_THIN_ARCHIVES=y -# CONFIG_THREAD_INFO_IN_TASK is not set -# CONFIG_THRUSTMASTER_FF is not set -# CONFIG_THUMB2_KERNEL is not set -# CONFIG_THUNDERBOLT is not set -# CONFIG_THUNDER_NIC_BGX is not set -# CONFIG_THUNDER_NIC_PF is not set -# CONFIG_THUNDER_NIC_RGX is not set -# CONFIG_THUNDER_NIC_VF is not set -# CONFIG_TICK_CPU_ACCOUNTING is not set -CONFIG_TICK_ONESHOT=y -# CONFIG_TIFM_CORE is not set -# CONFIG_TIGON3 is not set -# CONFIG_TIMB_DMA is not set -CONFIG_TIMERFD=y -# CONFIG_TIMER_STATS is not set -# CONFIG_TIME_NS is not set -# CONFIG_TINYDRM_HX8357D is not set -# CONFIG_TINYDRM_ILI9225 is not set -# CONFIG_TINYDRM_ILI9341 is not set -# CONFIG_TINYDRM_ILI9486 is not set -# CONFIG_TINYDRM_MI0283QT is not set -# CONFIG_TINYDRM_REPAPER is not set -# CONFIG_TINYDRM_ST7586 is not set -# CONFIG_TINYDRM_ST7735R is not set -CONFIG_TINY_RCU=y -# CONFIG_TIPC is not set -# CONFIG_TI_ADC081C is not set -# CONFIG_TI_ADC0832 is not set -# CONFIG_TI_ADC084S021 is not set -# CONFIG_TI_ADC108S102 is not set -# CONFIG_TI_ADC12138 is not set -# CONFIG_TI_ADC128S052 is not set -# CONFIG_TI_ADC161S626 is not set -# CONFIG_TI_ADS1015 is not set -# CONFIG_TI_ADS124S08 is not set -# CONFIG_TI_ADS131E08 is not set -# CONFIG_TI_ADS7950 is not set -# CONFIG_TI_ADS8344 is not set -# CONFIG_TI_ADS8688 is not set -# CONFIG_TI_AM335X_ADC is not set -# CONFIG_TI_CPSW is not set -# CONFIG_TI_CPSW_ALE is not set -# CONFIG_TI_CPSW_PHY_SEL is not set -# CONFIG_TI_CPTS is not set -# CONFIG_TI_DAC082S085 is not set -# CONFIG_TI_DAC5571 is not set -# CONFIG_TI_DAC7311 is not set -# CONFIG_TI_DAC7512 is not set -# CONFIG_TI_DAC7612 is not set -# CONFIG_TI_DAVINCI_CPDMA is not set -# CONFIG_TI_DAVINCI_MDIO is not set -# CONFIG_TI_ST is not set -# CONFIG_TI_SYSCON_RESET is not set -# CONFIG_TI_TLC4541 is not set -# CONFIG_TI_TSC2046 is not set -# CONFIG_TLAN is not set -# CONFIG_TLS is not set -# CONFIG_TMD_HERMES is not set -# CONFIG_TMP006 is not set -# CONFIG_TMP007 is not set -# CONFIG_TMP117 is not set -CONFIG_TMPFS=y -# CONFIG_TMPFS_INODE64 is not set -# CONFIG_TMPFS_POSIX_ACL is not set -CONFIG_TMPFS_XATTR=y -# CONFIG_TOPSTAR_LAPTOP is not set -# CONFIG_TORTURE_TEST is not set -# CONFIG_TOSHIBA_HAPS is not set -# CONFIG_TOUCHSCREEN_88PM860X is not set -# CONFIG_TOUCHSCREEN_AD7877 is not set -# CONFIG_TOUCHSCREEN_AD7879 is not set -# CONFIG_TOUCHSCREEN_AD7879_I2C is not set -# CONFIG_TOUCHSCREEN_AD7879_SPI is not set -# CONFIG_TOUCHSCREEN_ADC is not set -# CONFIG_TOUCHSCREEN_ADS7846 is not set -# CONFIG_TOUCHSCREEN_AR1021_I2C is not set -# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set -# CONFIG_TOUCHSCREEN_ATMEL_MXT_T37 is not set -# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set -# CONFIG_TOUCHSCREEN_BU21013 is not set -# CONFIG_TOUCHSCREEN_BU21029 is not set -# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set -# CONFIG_TOUCHSCREEN_CHIPONE_ICN8505 is not set -# CONFIG_TOUCHSCREEN_COLIBRI_VF50 is not set -# CONFIG_TOUCHSCREEN_CY8CTMA140 is not set -# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set -# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set -# CONFIG_TOUCHSCREEN_CYTTSP4_I2C is not set -# CONFIG_TOUCHSCREEN_CYTTSP4_SPI is not set -# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set -# CONFIG_TOUCHSCREEN_CYTTSP_I2C is not set -# CONFIG_TOUCHSCREEN_CYTTSP_SPI is not set -# CONFIG_TOUCHSCREEN_DA9034 is not set -# CONFIG_TOUCHSCREEN_DA9052 is not set -# CONFIG_TOUCHSCREEN_DYNAPRO is not set -# CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set -# CONFIG_TOUCHSCREEN_EETI is not set -# CONFIG_TOUCHSCREEN_EGALAX is not set -# CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set -# CONFIG_TOUCHSCREEN_EKTF2127 is not set -# CONFIG_TOUCHSCREEN_ELAN is not set -# CONFIG_TOUCHSCREEN_ELO is not set -# CONFIG_TOUCHSCREEN_EXC3000 is not set -# CONFIG_TOUCHSCREEN_FUJITSU is not set -# CONFIG_TOUCHSCREEN_GOODIX is not set -# CONFIG_TOUCHSCREEN_GUNZE is not set -# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set -# CONFIG_TOUCHSCREEN_HIDEEP is not set -# CONFIG_TOUCHSCREEN_HP600 is not set -# CONFIG_TOUCHSCREEN_HP7XX is not set -# CONFIG_TOUCHSCREEN_HTCPEN is not set -# CONFIG_TOUCHSCREEN_HYCON_HY46XX is not set -# CONFIG_TOUCHSCREEN_ILI210X is not set -# CONFIG_TOUCHSCREEN_ILITEK is not set -# CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set -# CONFIG_TOUCHSCREEN_INEXIO is not set -# CONFIG_TOUCHSCREEN_IPAQ_MICRO is not set -# CONFIG_TOUCHSCREEN_IPROC is not set -# CONFIG_TOUCHSCREEN_IQS5XX is not set -# CONFIG_TOUCHSCREEN_LPC32XX is not set -# CONFIG_TOUCHSCREEN_MAX11801 is not set -# CONFIG_TOUCHSCREEN_MC13783 is not set -# CONFIG_TOUCHSCREEN_MCS5000 is not set -# CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set -# CONFIG_TOUCHSCREEN_MIGOR is not set -# CONFIG_TOUCHSCREEN_MK712 is not set -# CONFIG_TOUCHSCREEN_MMS114 is not set -# CONFIG_TOUCHSCREEN_MSG2638 is not set -# CONFIG_TOUCHSCREEN_MTOUCH is not set -# CONFIG_TOUCHSCREEN_MX25 is not set -# CONFIG_TOUCHSCREEN_MXS_LRADC is not set -# CONFIG_TOUCHSCREEN_PCAP is not set -# CONFIG_TOUCHSCREEN_PENMOUNT is not set -# CONFIG_TOUCHSCREEN_PIXCIR is not set -# CONFIG_TOUCHSCREEN_PROPERTIES is not set -# CONFIG_TOUCHSCREEN_RASPBERRYPI_FW is not set -# CONFIG_TOUCHSCREEN_RM_TS is not set -# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set -# CONFIG_TOUCHSCREEN_RPI_FT5406 is not set -# CONFIG_TOUCHSCREEN_S3C2410 is not set -# CONFIG_TOUCHSCREEN_S6SY761 is not set -# CONFIG_TOUCHSCREEN_SILEAD is not set -# CONFIG_TOUCHSCREEN_SIS_I2C is not set -# CONFIG_TOUCHSCREEN_ST1232 is not set -# CONFIG_TOUCHSCREEN_STMFTS is not set -# CONFIG_TOUCHSCREEN_STMPE is not set -# CONFIG_TOUCHSCREEN_SUN4I is not set -# CONFIG_TOUCHSCREEN_SUR40 is not set -# CONFIG_TOUCHSCREEN_SURFACE3_SPI is not set -# CONFIG_TOUCHSCREEN_SX8654 is not set -# CONFIG_TOUCHSCREEN_TI_AM335X_TSC is not set -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set -# CONFIG_TOUCHSCREEN_TPS6507X is not set -# CONFIG_TOUCHSCREEN_TS4800 is not set -# CONFIG_TOUCHSCREEN_TSC2004 is not set -# CONFIG_TOUCHSCREEN_TSC2005 is not set -# CONFIG_TOUCHSCREEN_TSC2007 is not set -# CONFIG_TOUCHSCREEN_TSC2007_IIO is not set -# CONFIG_TOUCHSCREEN_TSC200X_CORE is not set -# CONFIG_TOUCHSCREEN_TSC_SERIO is not set -# CONFIG_TOUCHSCREEN_UCB1400 is not set -# CONFIG_TOUCHSCREEN_USB_3M is not set -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set -# CONFIG_TOUCHSCREEN_USB_DMC_TSC10 is not set -# CONFIG_TOUCHSCREEN_USB_E2I is not set -# CONFIG_TOUCHSCREEN_USB_EASYTOUCH is not set -# CONFIG_TOUCHSCREEN_USB_EGALAX is not set -# CONFIG_TOUCHSCREEN_USB_ELO is not set -# CONFIG_TOUCHSCREEN_USB_ETT_TC45USB is not set -# CONFIG_TOUCHSCREEN_USB_ETURBO is not set -# CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH is not set -# CONFIG_TOUCHSCREEN_USB_GOTOP is not set -# CONFIG_TOUCHSCREEN_USB_GUNZE is not set -# CONFIG_TOUCHSCREEN_USB_IDEALTEK is not set -# CONFIG_TOUCHSCREEN_USB_IRTOUCH is not set -# CONFIG_TOUCHSCREEN_USB_ITM is not set -# CONFIG_TOUCHSCREEN_USB_JASTEC is not set -# CONFIG_TOUCHSCREEN_USB_NEXIO is not set -# CONFIG_TOUCHSCREEN_USB_PANJIT is not set -# CONFIG_TOUCHSCREEN_USB_ZYTRONIC is not set -# CONFIG_TOUCHSCREEN_W90X900 is not set -# CONFIG_TOUCHSCREEN_WACOM_I2C is not set -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set -# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set -# CONFIG_TOUCHSCREEN_WM831X is not set -# CONFIG_TOUCHSCREEN_WM9705 is not set -# CONFIG_TOUCHSCREEN_WM9712 is not set -# CONFIG_TOUCHSCREEN_WM9713 is not set -# CONFIG_TOUCHSCREEN_WM97XX is not set -# CONFIG_TOUCHSCREEN_WM97XX_MAINSTONE is not set -# CONFIG_TOUCHSCREEN_WM97XX_ZYLONITE is not set -# CONFIG_TOUCHSCREEN_ZET6223 is not set -# CONFIG_TOUCHSCREEN_ZFORCE is not set -# CONFIG_TOUCHSCREEN_ZINITIX is not set -# CONFIG_TPL0102 is not set -# CONFIG_TPS6105X is not set -# CONFIG_TPS65010 is not set -# CONFIG_TPS6507X is not set -# CONFIG_TRACEPOINT_BENCHMARK is not set -# CONFIG_TRACER_SNAPSHOT is not set -# CONFIG_TRACER_SNAPSHOT_PER_CPU_SWAP is not set -# CONFIG_TRACE_BRANCH_PROFILING is not set -# CONFIG_TRACE_EVAL_MAP_FILE is not set -# CONFIG_TRACE_EVENT_INJECT is not set -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -# CONFIG_TRACE_SINK is not set -# CONFIG_TRACING_EVENTS_GPIO is not set -CONFIG_TRACING_SUPPORT=y -CONFIG_TRAD_SIGNALS=y -# CONFIG_TRANSPARENT_HUGEPAGE is not set -# CONFIG_TRANS_TABLE is not set -# CONFIG_TREE_RCU is not set -# CONFIG_TREE_RCU_TRACE is not set -# CONFIG_TRIM_UNUSED_KSYMS is not set -# CONFIG_TRUSTED_FOUNDATIONS is not set -# CONFIG_TRUSTED_KEYS is not set -# CONFIG_TSL2583 is not set -# CONFIG_TSL2591 is not set -# CONFIG_TSL2772 is not set -# CONFIG_TSL2x7x is not set -# CONFIG_TSL4531 is not set -# CONFIG_TSYS01 is not set -# CONFIG_TSYS02D is not set -# CONFIG_TTPCI_EEPROM is not set -CONFIG_TTY=y -# CONFIG_TTY_PRINTK is not set -# CONFIG_TUN is not set -# CONFIG_TUN_VNET_CROSS_LE is not set -# CONFIG_TWL4030_CORE is not set -# CONFIG_TWL4030_MADC is not set -# CONFIG_TWL6030_GPADC is not set -# CONFIG_TWL6040_CORE is not set -# CONFIG_TYPEC is not set -# CONFIG_TYPEC_TCPM is not set -# CONFIG_TYPEC_UCSI is not set -# CONFIG_TYPHOON is not set -# CONFIG_UACCESS_WITH_MEMCPY is not set -# CONFIG_UBIFS_ATIME_SUPPORT is not set -# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set -# CONFIG_UBIFS_FS_AUTHENTICATION is not set -# CONFIG_UBIFS_FS_ENCRYPTION is not set -CONFIG_UBIFS_FS_LZO=y -# CONFIG_UBIFS_FS_SECURITY is not set -CONFIG_UBIFS_FS_XATTR=y -CONFIG_UBIFS_FS_ZLIB=y -CONFIG_UBIFS_FS_ZSTD=y -# CONFIG_UBSAN is not set -CONFIG_UBSAN_ALIGNMENT=y -# CONFIG_UCB1400_CORE is not set -# CONFIG_UCSI is not set -# CONFIG_UDF_FS is not set -# CONFIG_UDMABUF is not set -CONFIG_UEVENT_HELPER=y -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -# CONFIG_UFS_FS is not set -# CONFIG_UHID is not set -CONFIG_UID16=y -# CONFIG_UIO is not set -# CONFIG_ULTRA is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_UNICODE is not set -# CONFIG_UNISYSSPAR is not set -# CONFIG_UNISYS_VISORBUS is not set -CONFIG_UNIX=y -CONFIG_UNIX98_PTYS=y -# CONFIG_UNIXWARE_DISKLABEL is not set -# CONFIG_UNIX_DIAG is not set -CONFIG_UNIX_SCM=y -# CONFIG_UNMAP_KERNEL_AT_EL0 is not set -# CONFIG_UNUSED_SYMBOLS is not set -# CONFIG_UNWINDER_FRAME_POINTER is not set -# CONFIG_UPROBES is not set -# CONFIG_UPROBE_EVENTS is not set -# CONFIG_US5182D is not set -# CONFIG_USB is not set -# CONFIG_USB4 is not set -# CONFIG_USBIP_CORE is not set -CONFIG_USBIP_VHCI_HC_PORTS=8 -CONFIG_USBIP_VHCI_NR_HCS=1 -# CONFIG_USBIP_VUDC is not set -# CONFIG_USBPCWATCHDOG is not set -# CONFIG_USB_ACM is not set -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_AIRSPY is not set -CONFIG_USB_ALI_M5632=y -# CONFIG_USB_AMD5536UDC is not set -CONFIG_USB_AN2720=y -# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set -# CONFIG_USB_APPLEDISPLAY is not set -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARMLINUX=y -# CONFIG_USB_ATM is not set -CONFIG_USB_AUTOSUSPEND_DELAY=2 -# CONFIG_USB_BDC_UDC is not set -CONFIG_USB_BELKIN=y -# CONFIG_USB_C67X00_HCD is not set -# CONFIG_USB_CATC is not set -# CONFIG_USB_CDC_COMPOSITE is not set -# CONFIG_USB_CDNS3 is not set -# CONFIG_USB_CDNS_SUPPORT is not set -# CONFIG_USB_CHAOSKEY is not set -# CONFIG_USB_CHIPIDEA is not set -# CONFIG_USB_CHIPIDEA_GENERIC is not set -# CONFIG_USB_CHIPIDEA_IMX is not set -# CONFIG_USB_CHIPIDEA_MSM is not set -# CONFIG_USB_CHIPIDEA_PCI is not set -# CONFIG_USB_CHIPIDEA_TEGRA is not set -# CONFIG_USB_CONFIGFS is not set -# CONFIG_USB_CONN_GPIO is not set -# CONFIG_USB_CXACRU is not set -# CONFIG_USB_CYPRESS_CY7C63 is not set -# CONFIG_USB_CYTHERM is not set -CONFIG_USB_DEFAULT_PERSIST=y -# CONFIG_USB_DSBR is not set -# CONFIG_USB_DUMMY_HCD is not set -# CONFIG_USB_DWC2 is not set -# CONFIG_USB_DWC2_DEBUG is not set -# CONFIG_USB_DWC2_DUAL_ROLE is not set -# CONFIG_USB_DWC2_HOST is not set -# CONFIG_USB_DWC2_PERIPHERAL is not set -# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set -# CONFIG_USB_DWC3 is not set -# CONFIG_USB_DWC3_EXYNOS is not set -# CONFIG_USB_DWC3_HAPS is not set -# CONFIG_USB_DWC3_KEYSTONE is not set -# CONFIG_USB_DWC3_OF_SIMPLE is not set -# CONFIG_USB_DWC3_PCI is not set -# CONFIG_USB_DWC3_QCOM is not set -# CONFIG_USB_DWC3_ULPI is not set -# CONFIG_USB_DYNAMIC_MINORS is not set -# CONFIG_USB_EG20T is not set -# CONFIG_USB_EHCI_ATH79 is not set -# CONFIG_USB_EHCI_FSL is not set -# CONFIG_USB_EHCI_HCD is not set -# CONFIG_USB_EHCI_HCD_AT91 is not set -# CONFIG_USB_EHCI_HCD_OMAP is not set -# CONFIG_USB_EHCI_HCD_PPC_OF is not set -# CONFIG_USB_EHCI_MSM is not set -# CONFIG_USB_EHCI_MV is not set -CONFIG_USB_EHCI_ROOT_HUB_TT=y -CONFIG_USB_EHCI_TT_NEWSCHED=y -# CONFIG_USB_EHSET_TEST_FIXTURE is not set -# CONFIG_USB_EMI26 is not set -# CONFIG_USB_EMI62 is not set -# CONFIG_USB_EPSON2888 is not set -# CONFIG_USB_EZUSB_FX2 is not set -# CONFIG_USB_FEW_INIT_RETRIES is not set -# CONFIG_USB_FOTG210_HCD is not set -# CONFIG_USB_FOTG210_UDC is not set -# CONFIG_USB_FSL_USB2 is not set -# CONFIG_USB_FTDI_ELAN is not set -# CONFIG_USB_FUNCTIONFS is not set -# CONFIG_USB_FUSB300 is not set -# CONFIG_USB_GADGET is not set -# CONFIG_USB_GADGETFS is not set -# CONFIG_USB_GADGET_DEBUG is not set -# CONFIG_USB_GADGET_DEBUG_FILES is not set -# CONFIG_USB_GADGET_DEBUG_FS is not set -CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 -CONFIG_USB_GADGET_VBUS_DRAW=2 -# CONFIG_USB_GADGET_XILINX is not set -# CONFIG_USB_GL860 is not set -# CONFIG_USB_GOKU is not set -# CONFIG_USB_GPIO_VBUS is not set -# CONFIG_USB_GR_UDC is not set -# CONFIG_USB_GSPCA is not set -# CONFIG_USB_GSPCA_BENQ is not set -# CONFIG_USB_GSPCA_CONEX is not set -# CONFIG_USB_GSPCA_CPIA1 is not set -# CONFIG_USB_GSPCA_DTCS033 is not set -# CONFIG_USB_GSPCA_ETOMS is not set -# CONFIG_USB_GSPCA_FINEPIX is not set -# CONFIG_USB_GSPCA_JEILINJ is not set -# CONFIG_USB_GSPCA_JL2005BCD is not set -# CONFIG_USB_GSPCA_KINECT is not set -# CONFIG_USB_GSPCA_KONICA is not set -# CONFIG_USB_GSPCA_MARS is not set -# CONFIG_USB_GSPCA_MR97310A is not set -# CONFIG_USB_GSPCA_NW80X is not set -# CONFIG_USB_GSPCA_OV519 is not set -# CONFIG_USB_GSPCA_OV534 is not set -# CONFIG_USB_GSPCA_OV534_9 is not set -# CONFIG_USB_GSPCA_PAC207 is not set -# CONFIG_USB_GSPCA_PAC7302 is not set -# CONFIG_USB_GSPCA_PAC7311 is not set -# CONFIG_USB_GSPCA_SE401 is not set -# CONFIG_USB_GSPCA_SN9C2028 is not set -# CONFIG_USB_GSPCA_SN9C20X is not set -# CONFIG_USB_GSPCA_SONIXB is not set -# CONFIG_USB_GSPCA_SONIXJ is not set -# CONFIG_USB_GSPCA_SPCA1528 is not set -# CONFIG_USB_GSPCA_SPCA500 is not set -# CONFIG_USB_GSPCA_SPCA501 is not set -# CONFIG_USB_GSPCA_SPCA505 is not set -# CONFIG_USB_GSPCA_SPCA506 is not set -# CONFIG_USB_GSPCA_SPCA508 is not set -# CONFIG_USB_GSPCA_SPCA561 is not set -# CONFIG_USB_GSPCA_SQ905 is not set -# CONFIG_USB_GSPCA_SQ905C is not set -# CONFIG_USB_GSPCA_SQ930X is not set -# CONFIG_USB_GSPCA_STK014 is not set -# CONFIG_USB_GSPCA_STK1135 is not set -# CONFIG_USB_GSPCA_STV0680 is not set -# CONFIG_USB_GSPCA_SUNPLUS is not set -# CONFIG_USB_GSPCA_T613 is not set -# CONFIG_USB_GSPCA_TOPRO is not set -# CONFIG_USB_GSPCA_TOUPTEK is not set -# CONFIG_USB_GSPCA_TV8532 is not set -# CONFIG_USB_GSPCA_VC032X is not set -# CONFIG_USB_GSPCA_VICAM is not set -# CONFIG_USB_GSPCA_XIRLINK_CIT is not set -# CONFIG_USB_GSPCA_ZC3XX is not set -# CONFIG_USB_G_ACM_MS is not set -# CONFIG_USB_G_DBGP is not set -# CONFIG_USB_G_HID is not set -# CONFIG_USB_G_MULTI is not set -# CONFIG_USB_G_NCM is not set -# CONFIG_USB_G_NOKIA is not set -# CONFIG_USB_G_PRINTER is not set -# CONFIG_USB_G_SERIAL is not set -# CONFIG_USB_G_WEBCAM is not set -# CONFIG_USB_HACKRF is not set -# CONFIG_USB_HCD_TEST_MODE is not set -# CONFIG_USB_HID is not set -# CONFIG_USB_HIDDEV is not set -# CONFIG_USB_HSIC_USB3503 is not set -# CONFIG_USB_HSIC_USB4604 is not set -# CONFIG_USB_HSO is not set -# CONFIG_USB_HUB_USB251XB is not set -# CONFIG_USB_HWA_HCD is not set -# CONFIG_USB_IDMOUSE is not set -# CONFIG_USB_IMX21_HCD is not set -# CONFIG_USB_IOWARRIOR is not set -# CONFIG_USB_IPHETH is not set -# CONFIG_USB_ISIGHTFW is not set -# CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_ISP1301 is not set -# CONFIG_USB_ISP1362_HCD is not set -# CONFIG_USB_ISP1760 is not set -# CONFIG_USB_ISP1760_HCD is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_KBD is not set -# CONFIG_USB_KC2190 is not set -# CONFIG_USB_LAN78XX is not set -# CONFIG_USB_LCD is not set -# CONFIG_USB_LD is not set -# CONFIG_USB_LED is not set -# CONFIG_USB_LEDS_TRIGGER_USBPORT is not set -# CONFIG_USB_LED_TRIG is not set -# CONFIG_USB_LEGOTOWER is not set -# CONFIG_USB_LGM_PHY is not set -# CONFIG_USB_LINK_LAYER_TEST is not set -# CONFIG_USB_M5602 is not set -# CONFIG_USB_M66592 is not set -# CONFIG_USB_MASS_STORAGE is not set -# CONFIG_USB_MAX3420_UDC is not set -# CONFIG_USB_MAX3421_HCD is not set -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set -# CONFIG_USB_MIDI_GADGET is not set -# CONFIG_USB_MON is not set -# CONFIG_USB_MOUSE is not set -# CONFIG_USB_MSI2500 is not set -# CONFIG_USB_MSM_OTG is not set -# CONFIG_USB_MTU3 is not set -# CONFIG_USB_MUSB_HDRC is not set -# CONFIG_USB_MV_U3D is not set -# CONFIG_USB_MV_UDC is not set -# CONFIG_USB_MXS_PHY is not set -# CONFIG_USB_NET2272 is not set -# CONFIG_USB_NET2280 is not set -# CONFIG_USB_NET_AQC111 is not set -# CONFIG_USB_NET_AX88179_178A is not set -# CONFIG_USB_NET_AX8817X is not set -# CONFIG_USB_NET_CDCETHER is not set -# CONFIG_USB_NET_CDC_EEM is not set -# CONFIG_USB_NET_CDC_MBIM is not set -# CONFIG_USB_NET_CDC_NCM is not set -# CONFIG_USB_NET_CDC_SUBSET is not set -# CONFIG_USB_NET_CH9200 is not set -# CONFIG_USB_NET_CX82310_ETH is not set -# CONFIG_USB_NET_DM9601 is not set -# CONFIG_USB_NET_DRIVERS is not set -# CONFIG_USB_NET_GL620A is not set -# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set -# CONFIG_USB_NET_INT51X1 is not set -# CONFIG_USB_NET_KALMIA is not set -# CONFIG_USB_NET_MCS7830 is not set -# CONFIG_USB_NET_NET1080 is not set -# CONFIG_USB_NET_PLUSB is not set -# CONFIG_USB_NET_QMI_WWAN is not set -# CONFIG_USB_NET_RNDIS_HOST is not set -# CONFIG_USB_NET_RNDIS_WLAN is not set -# CONFIG_USB_NET_SMSC75XX is not set -# CONFIG_USB_NET_SMSC95XX is not set -# CONFIG_USB_NET_SR9700 is not set -# CONFIG_USB_NET_SR9800 is not set -# CONFIG_USB_NET_ZAURUS is not set -# CONFIG_USB_OHCI_HCD is not set -# CONFIG_USB_OHCI_HCD_PCI is not set -# CONFIG_USB_OHCI_HCD_PPC_OF is not set -# CONFIG_USB_OHCI_HCD_PPC_OF_BE is not set -# CONFIG_USB_OHCI_HCD_PPC_OF_LE is not set -# CONFIG_USB_OHCI_HCD_SSB is not set -CONFIG_USB_OHCI_LITTLE_ENDIAN=y -# CONFIG_USB_OTG is not set -# CONFIG_USB_OTG_BLACKLIST_HUB is not set -# CONFIG_USB_OTG_DISABLE_EXTERNAL_HUB is not set -# CONFIG_USB_OTG_FSM is not set -# CONFIG_USB_OTG_PRODUCTLIST is not set -# CONFIG_USB_OTG_WHITELIST is not set -# CONFIG_USB_OXU210HP_HCD is not set -# CONFIG_USB_PCI is not set -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_PHY is not set -# CONFIG_USB_PRINTER is not set -# CONFIG_USB_PWC_INPUT_EVDEV is not set -# CONFIG_USB_PXA27X is not set -# CONFIG_USB_R8A66597 is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_RAW_GADGET is not set -# CONFIG_USB_RCAR_PHY is not set -# CONFIG_USB_RENESAS_USBHS is not set -# CONFIG_USB_RIO500 is not set -# CONFIG_USB_ROLES_INTEL_XHCI is not set -# CONFIG_USB_ROLE_SWITCH is not set -# CONFIG_USB_RTL8150 is not set -# CONFIG_USB_RTL8152 is not set -# CONFIG_USB_RTL8153_ECM is not set -# CONFIG_USB_S2255 is not set -# CONFIG_USB_SERIAL is not set -# CONFIG_USB_SERIAL_AIRCABLE is not set -# CONFIG_USB_SERIAL_ARK3116 is not set -# CONFIG_USB_SERIAL_BELKIN is not set -# CONFIG_USB_SERIAL_CH341 is not set -# CONFIG_USB_SERIAL_CP210X is not set -# CONFIG_USB_SERIAL_CYBERJACK is not set -# CONFIG_USB_SERIAL_CYPRESS_M8 is not set -# CONFIG_USB_SERIAL_DEBUG is not set -# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set -# CONFIG_USB_SERIAL_EDGEPORT is not set -# CONFIG_USB_SERIAL_EDGEPORT_TI is not set -# CONFIG_USB_SERIAL_EMPEG is not set -# CONFIG_USB_SERIAL_F81232 is not set -# CONFIG_USB_SERIAL_F8153X is not set -# CONFIG_USB_SERIAL_FTDI_SIO is not set -# CONFIG_USB_SERIAL_GARMIN is not set -CONFIG_USB_SERIAL_GENERIC=y -# CONFIG_USB_SERIAL_IPAQ is not set -# CONFIG_USB_SERIAL_IPW is not set -# CONFIG_USB_SERIAL_IR is not set -# CONFIG_USB_SERIAL_IUU is not set -# CONFIG_USB_SERIAL_KEYSPAN is not set -CONFIG_USB_SERIAL_KEYSPAN_MPR=y -# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set -CONFIG_USB_SERIAL_KEYSPAN_USA18X=y -CONFIG_USB_SERIAL_KEYSPAN_USA19=y -CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y -CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y -CONFIG_USB_SERIAL_KEYSPAN_USA19W=y -CONFIG_USB_SERIAL_KEYSPAN_USA28=y -CONFIG_USB_SERIAL_KEYSPAN_USA28X=y -CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y -CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y -CONFIG_USB_SERIAL_KEYSPAN_USA49W=y -CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y -# CONFIG_USB_SERIAL_KLSI is not set -# CONFIG_USB_SERIAL_KOBIL_SCT is not set -# CONFIG_USB_SERIAL_MCT_U232 is not set -# CONFIG_USB_SERIAL_METRO is not set -# CONFIG_USB_SERIAL_MOS7715_PARPORT is not set -# CONFIG_USB_SERIAL_MOS7720 is not set -# CONFIG_USB_SERIAL_MOS7840 is not set -# CONFIG_USB_SERIAL_MXUPORT is not set -# CONFIG_USB_SERIAL_NAVMAN is not set -# CONFIG_USB_SERIAL_OMNINET is not set -# CONFIG_USB_SERIAL_OPTICON is not set -# CONFIG_USB_SERIAL_OPTION is not set -# CONFIG_USB_SERIAL_OTI6858 is not set -# CONFIG_USB_SERIAL_PL2303 is not set -# CONFIG_USB_SERIAL_QCAUX is not set -# CONFIG_USB_SERIAL_QT2 is not set -# CONFIG_USB_SERIAL_QUALCOMM is not set -# CONFIG_USB_SERIAL_SAFE is not set -CONFIG_USB_SERIAL_SAFE_PADDED=y -# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set -# CONFIG_USB_SERIAL_SIMPLE is not set -# CONFIG_USB_SERIAL_SPCP8X5 is not set -# CONFIG_USB_SERIAL_SSU100 is not set -# CONFIG_USB_SERIAL_SYMBOL is not set -# CONFIG_USB_SERIAL_TI is not set -# CONFIG_USB_SERIAL_UPD78F0730 is not set -# CONFIG_USB_SERIAL_VISOR is not set -# CONFIG_USB_SERIAL_WHITEHEAT is not set -# CONFIG_USB_SERIAL_WISHBONE is not set -# CONFIG_USB_SERIAL_XIRCOM is not set -# CONFIG_USB_SERIAL_XR is not set -# CONFIG_USB_SERIAL_XSENS_MT is not set -# CONFIG_USB_SEVSEG is not set -# CONFIG_USB_SIERRA_NET is not set -# CONFIG_USB_SISUSBVGA is not set -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_SNP_UDC_PLAT is not set -# CONFIG_USB_SPEEDTOUCH is not set -# CONFIG_USB_STKWEBCAM is not set -# CONFIG_USB_STORAGE is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_ENE_UB6250 is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_REALTEK is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STV06XX is not set -# CONFIG_USB_SUPPORT is not set -# CONFIG_USB_SWITCH_FSA9480 is not set -# CONFIG_USB_TEST is not set -# CONFIG_USB_TMC is not set -# CONFIG_USB_TRANCEVIBRATOR is not set -# CONFIG_USB_UAS is not set -# CONFIG_USB_UEAGLEATM is not set -# CONFIG_USB_ULPI is not set -# CONFIG_USB_ULPI_BUS is not set -# CONFIG_USB_USBNET is not set -# CONFIG_USB_USS720 is not set -# CONFIG_USB_VIDEO_CLASS is not set -CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y -# CONFIG_USB_VL600 is not set -# CONFIG_USB_WDM is not set -# CONFIG_USB_WHCI_HCD is not set -# CONFIG_USB_WUSB is not set -# CONFIG_USB_WUSB_CBAF is not set -# CONFIG_USB_XHCI_DBGCAP is not set -# CONFIG_USB_XHCI_HCD is not set -# CONFIG_USB_XHCI_MVEBU is not set -# CONFIG_USB_XHCI_PCI_RENESAS is not set -# CONFIG_USB_XUSBATM is not set -# CONFIG_USB_YUREX is not set -# CONFIG_USB_ZD1201 is not set -# CONFIG_USB_ZERO is not set -# CONFIG_USB_ZR364XX is not set -# CONFIG_USELIB is not set -# CONFIG_USERFAULTFD is not set -# CONFIG_USERIO is not set -# CONFIG_USE_OF is not set -# CONFIG_UTS_NS is not set -# CONFIG_UWB is not set -# CONFIG_U_SERIAL_CONSOLE is not set -# CONFIG_V4L_MEM2MEM_DRIVERS is not set -# CONFIG_V4L_PLATFORM_DRIVERS is not set -# CONFIG_V4L_TEST_DRIVERS is not set -# CONFIG_VALIDATE_FS_PARSER is not set -# CONFIG_VBOXGUEST is not set -# CONFIG_VCNL3020 is not set -# CONFIG_VCNL4000 is not set -# CONFIG_VCNL4035 is not set -# CONFIG_VDPA is not set -CONFIG_VDSO=y -# CONFIG_VEML6030 is not set -# CONFIG_VEML6070 is not set -# CONFIG_VETH is not set -# CONFIG_VEXPRESS_CONFIG is not set -# CONFIG_VF610_ADC is not set -# CONFIG_VF610_DAC is not set -# CONFIG_VFAT_FS is not set -# CONFIG_VFIO is not set -# CONFIG_VGASTATE is not set -# CONFIG_VGA_ARB is not set -# CONFIG_VGA_SWITCHEROO is not set -# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set -CONFIG_VHOST_MENU=y -# CONFIG_VHOST_NET is not set -# CONFIG_VHOST_VSOCK is not set -# CONFIG_VIA_RHINE is not set -# CONFIG_VIA_VELOCITY is not set -# CONFIG_VIDEO_AD5820 is not set -# CONFIG_VIDEO_AD9389B is not set -# CONFIG_VIDEO_ADP1653 is not set -# CONFIG_VIDEO_ADV7170 is not set -# CONFIG_VIDEO_ADV7175 is not set -# CONFIG_VIDEO_ADV7180 is not set -# CONFIG_VIDEO_ADV7183 is not set -# CONFIG_VIDEO_ADV7343 is not set -# CONFIG_VIDEO_ADV7393 is not set -# CONFIG_VIDEO_ADV748X is not set -# CONFIG_VIDEO_ADV7511 is not set -# CONFIG_VIDEO_ADV7604 is not set -# CONFIG_VIDEO_ADV7842 is not set -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_AK7375 is not set -# CONFIG_VIDEO_AK881X is not set -# CONFIG_VIDEO_ASPEED is not set -# CONFIG_VIDEO_AU0828 is not set -# CONFIG_VIDEO_BT819 is not set -# CONFIG_VIDEO_BT848 is not set -# CONFIG_VIDEO_BT856 is not set -# CONFIG_VIDEO_BT866 is not set -# CONFIG_VIDEO_CADENCE is not set -# CONFIG_VIDEO_CAFE_CCIC is not set -# CONFIG_VIDEO_CCS is not set -# CONFIG_VIDEO_CS3308 is not set -# CONFIG_VIDEO_CS5345 is not set -# CONFIG_VIDEO_CS53L32A is not set -# CONFIG_VIDEO_CX231XX is not set -# CONFIG_VIDEO_CX2341X is not set -# CONFIG_VIDEO_CX25840 is not set -# CONFIG_VIDEO_CX88 is not set -# CONFIG_VIDEO_DEV is not set -# CONFIG_VIDEO_DM6446_CCDC is not set -# CONFIG_VIDEO_DT3155 is not set -# CONFIG_VIDEO_DW9714 is not set -# CONFIG_VIDEO_DW9768 is not set -# CONFIG_VIDEO_DW9807_VCM is not set -# CONFIG_VIDEO_EM28XX is not set -# CONFIG_VIDEO_ET8EK8 is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -# CONFIG_VIDEO_GO7007 is not set -# CONFIG_VIDEO_GS1662 is not set -# CONFIG_VIDEO_HANTRO_ROCKCHIP is not set -# CONFIG_VIDEO_HDPVR is not set -# CONFIG_VIDEO_HEXIUM_GEMINI is not set -# CONFIG_VIDEO_HEXIUM_ORION is not set -# CONFIG_VIDEO_HI556 is not set -# CONFIG_VIDEO_I2C is not set -# CONFIG_VIDEO_IMX214 is not set -# CONFIG_VIDEO_IMX219 is not set -# CONFIG_VIDEO_IMX258 is not set -# CONFIG_VIDEO_IMX274 is not set -# CONFIG_VIDEO_IMX290 is not set -# CONFIG_VIDEO_IMX319 is not set -# CONFIG_VIDEO_IMX334 is not set -# CONFIG_VIDEO_IMX355 is not set -# CONFIG_VIDEO_IMX477 is not set -# CONFIG_VIDEO_IRS1125 is not set -# CONFIG_VIDEO_IR_I2C is not set -# CONFIG_VIDEO_IVTV is not set -# CONFIG_VIDEO_KS0127 is not set -# CONFIG_VIDEO_LM3560 is not set -# CONFIG_VIDEO_LM3646 is not set -# CONFIG_VIDEO_M52790 is not set -# CONFIG_VIDEO_M5MOLS is not set -# CONFIG_VIDEO_MAX9286 is not set -# CONFIG_VIDEO_ML86V7667 is not set -# CONFIG_VIDEO_MSP3400 is not set -# CONFIG_VIDEO_MT9M001 is not set -# CONFIG_VIDEO_MT9M032 is not set -# CONFIG_VIDEO_MT9M111 is not set -# CONFIG_VIDEO_MT9P031 is not set -# CONFIG_VIDEO_MT9T001 is not set -# CONFIG_VIDEO_MT9T112 is not set -# CONFIG_VIDEO_MT9V011 is not set -# CONFIG_VIDEO_MT9V032 is not set -# CONFIG_VIDEO_MT9V111 is not set -# CONFIG_VIDEO_MUX is not set -# CONFIG_VIDEO_MXB is not set -# CONFIG_VIDEO_NOON010PC30 is not set -# CONFIG_VIDEO_OMAP2_VOUT is not set -# CONFIG_VIDEO_OV02A10 is not set -# CONFIG_VIDEO_OV13858 is not set -# CONFIG_VIDEO_OV2640 is not set -# CONFIG_VIDEO_OV2659 is not set -# CONFIG_VIDEO_OV2680 is not set -# CONFIG_VIDEO_OV2685 is not set -# CONFIG_VIDEO_OV2740 is not set -# CONFIG_VIDEO_OV5640 is not set -# CONFIG_VIDEO_OV5645 is not set -# CONFIG_VIDEO_OV5647 is not set -# CONFIG_VIDEO_OV5670 is not set -# CONFIG_VIDEO_OV5675 is not set -# CONFIG_VIDEO_OV5695 is not set -# CONFIG_VIDEO_OV6650 is not set -# CONFIG_VIDEO_OV7251 is not set -# CONFIG_VIDEO_OV7640 is not set -# CONFIG_VIDEO_OV7670 is not set -# CONFIG_VIDEO_OV772X is not set -# CONFIG_VIDEO_OV7740 is not set -# CONFIG_VIDEO_OV8856 is not set -# CONFIG_VIDEO_OV9281 is not set -# CONFIG_VIDEO_OV9640 is not set -# CONFIG_VIDEO_OV9650 is not set -# CONFIG_VIDEO_PVRUSB2 is not set -# CONFIG_VIDEO_RDACM20 is not set -# CONFIG_VIDEO_RDACM21 is not set -# CONFIG_VIDEO_RJ54N1 is not set -# CONFIG_VIDEO_S5C73M3 is not set -# CONFIG_VIDEO_S5K4ECGX is not set -# CONFIG_VIDEO_S5K5BAF is not set -# CONFIG_VIDEO_S5K6A3 is not set -# CONFIG_VIDEO_S5K6AA is not set -# CONFIG_VIDEO_SAA6588 is not set -# CONFIG_VIDEO_SAA6752HS is not set -# CONFIG_VIDEO_SAA7110 is not set -# CONFIG_VIDEO_SAA711X is not set -# CONFIG_VIDEO_SAA7127 is not set -# CONFIG_VIDEO_SAA7134 is not set -# CONFIG_VIDEO_SAA717X is not set -# CONFIG_VIDEO_SAA7185 is not set -# CONFIG_VIDEO_SH_MOBILE_CEU is not set -# CONFIG_VIDEO_SMIAPP is not set -# CONFIG_VIDEO_SONY_BTF_MPX is not set -# CONFIG_VIDEO_SR030PC30 is not set -# CONFIG_VIDEO_STK1160_COMMON is not set -# CONFIG_VIDEO_ST_MIPID02 is not set -# CONFIG_VIDEO_TC358743 is not set -# CONFIG_VIDEO_TDA1997X is not set -# CONFIG_VIDEO_TDA7432 is not set -# CONFIG_VIDEO_TDA9840 is not set -# CONFIG_VIDEO_TEA6415C is not set -# CONFIG_VIDEO_TEA6420 is not set -# CONFIG_VIDEO_THS7303 is not set -# CONFIG_VIDEO_THS8200 is not set -# CONFIG_VIDEO_TIMBERDALE is not set -# CONFIG_VIDEO_TLV320AIC23B is not set -# CONFIG_VIDEO_TM6000 is not set -# CONFIG_VIDEO_TVAUDIO is not set -# CONFIG_VIDEO_TVP514X is not set -# CONFIG_VIDEO_TVP5150 is not set -# CONFIG_VIDEO_TVP7002 is not set -# CONFIG_VIDEO_TW2804 is not set -# CONFIG_VIDEO_TW9903 is not set -# CONFIG_VIDEO_TW9906 is not set -# CONFIG_VIDEO_TW9910 is not set -# CONFIG_VIDEO_UDA1342 is not set -# CONFIG_VIDEO_UPD64031A is not set -# CONFIG_VIDEO_UPD64083 is not set -# CONFIG_VIDEO_USBTV is not set -# CONFIG_VIDEO_USBVISION is not set -# CONFIG_VIDEO_V4L2 is not set -# CONFIG_VIDEO_VP27SMPX is not set -# CONFIG_VIDEO_VPX3220 is not set -# CONFIG_VIDEO_VS6624 is not set -# CONFIG_VIDEO_WM8739 is not set -# CONFIG_VIDEO_WM8775 is not set -# CONFIG_VIDEO_XILINX is not set -# CONFIG_VIDEO_ZORAN is not set -# CONFIG_VIRTIO_BALLOON is not set -# CONFIG_VIRTIO_BLK_SCSI is not set -# CONFIG_VIRTIO_CONSOLE is not set -# CONFIG_VIRTIO_FS is not set -# CONFIG_VIRTIO_INPUT is not set -CONFIG_VIRTIO_MENU=y -# CONFIG_VIRTIO_MMIO is not set -# CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set -# CONFIG_VIRTIO_PCI is not set -# CONFIG_VIRTUALIZATION is not set -# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set -# CONFIG_VIRT_DRIVERS is not set -CONFIG_VIRT_TO_BUS=y -# CONFIG_VITESSE_PHY is not set -# CONFIG_VL53L0X_I2C is not set -# CONFIG_VL6180 is not set -CONFIG_VLAN_8021Q=y -# CONFIG_VLAN_8021Q_GVRP is not set -# CONFIG_VLAN_8021Q_MVRP is not set -# CONFIG_VMAP_STACK is not set -# CONFIG_VME_BUS is not set -# CONFIG_VMLINUX_MAP is not set -# CONFIG_VMSPLIT_1G is not set -# CONFIG_VMSPLIT_2G is not set -# CONFIG_VMSPLIT_2G_OPT is not set -CONFIG_VMSPLIT_3G=y -# CONFIG_VMSPLIT_3G_OPT is not set -# CONFIG_VMWARE_PVSCSI is not set -# CONFIG_VMXNET3 is not set -# CONFIG_VM_EVENT_COUNTERS is not set -# CONFIG_VOP_BUS is not set -# CONFIG_VORTEX is not set -# CONFIG_VSOCKETS is not set -# CONFIG_VSOCKETS_DIAG is not set -# CONFIG_VT is not set -# CONFIG_VT6655 is not set -# CONFIG_VT6656 is not set -# CONFIG_VXFS_FS is not set -# CONFIG_VXGE is not set -# CONFIG_VXLAN is not set -# CONFIG_VZ89X is not set -# CONFIG_W1 is not set -# CONFIG_W1_CON is not set -# CONFIG_W1_MASTER_DS1WM is not set -# CONFIG_W1_MASTER_DS2482 is not set -# CONFIG_W1_MASTER_DS2490 is not set -# CONFIG_W1_MASTER_GPIO is not set -# CONFIG_W1_MASTER_MATROX is not set -# CONFIG_W1_MASTER_SGI is not set -# CONFIG_W1_SLAVE_DS2405 is not set -# CONFIG_W1_SLAVE_DS2406 is not set -# CONFIG_W1_SLAVE_DS2408 is not set -# CONFIG_W1_SLAVE_DS2413 is not set -# CONFIG_W1_SLAVE_DS2423 is not set -# CONFIG_W1_SLAVE_DS2430 is not set -# CONFIG_W1_SLAVE_DS2431 is not set -# CONFIG_W1_SLAVE_DS2433 is not set -# CONFIG_W1_SLAVE_DS2438 is not set -# CONFIG_W1_SLAVE_DS250X is not set -# CONFIG_W1_SLAVE_DS2780 is not set -# CONFIG_W1_SLAVE_DS2781 is not set -# CONFIG_W1_SLAVE_DS2805 is not set -# CONFIG_W1_SLAVE_DS28E04 is not set -# CONFIG_W1_SLAVE_DS28E17 is not set -# CONFIG_W1_SLAVE_SMEM is not set -# CONFIG_W1_SLAVE_THERM is not set -# CONFIG_W83627HF_WDT is not set -# CONFIG_W83877F_WDT is not set -# CONFIG_W83977F_WDT is not set -# CONFIG_WAN is not set -# CONFIG_WANXL is not set -# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set -CONFIG_WATCHDOG=y -# CONFIG_WATCHDOG_CORE is not set -CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y -# CONFIG_WATCHDOG_HRTIMER_PRETIMEOUT is not set -# CONFIG_WATCHDOG_NOWAYOUT is not set -CONFIG_WATCHDOG_OPEN_TIMEOUT=0 -# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set -# CONFIG_WATCHDOG_SYSFS is not set -# CONFIG_WATCH_QUEUE is not set -# CONFIG_WD80x3 is not set -# CONFIG_WDAT_WDT is not set -# CONFIG_WDTPCI is not set -# CONFIG_WERROR is not set -CONFIG_WEXT_CORE=y -CONFIG_WEXT_PRIV=y -CONFIG_WEXT_PROC=y -CONFIG_WEXT_SPY=y -CONFIG_WILINK_PLATFORM_DATA=y -# CONFIG_WIMAX is not set -# CONFIG_WIREGUARD is not set -CONFIG_WIRELESS=y -CONFIG_WIRELESS_EXT=y -# CONFIG_WIRELESS_WDS is not set -# CONFIG_WIZNET_W5100 is not set -# CONFIG_WIZNET_W5300 is not set -# CONFIG_WL1251 is not set -# CONFIG_WL12XX is not set -# CONFIG_WL18XX is not set -CONFIG_WLAN=y -# CONFIG_WLAN_VENDOR_ADMTEK is not set -# CONFIG_WLAN_VENDOR_ATH is not set -# CONFIG_WLAN_VENDOR_ATMEL is not set -# CONFIG_WLAN_VENDOR_BROADCOM is not set -# CONFIG_WLAN_VENDOR_CISCO is not set -# CONFIG_WLAN_VENDOR_INTEL is not set -# CONFIG_WLAN_VENDOR_INTERSIL is not set -# CONFIG_WLAN_VENDOR_MARVELL is not set -# CONFIG_WLAN_VENDOR_MEDIATEK is not set -# CONFIG_WLAN_VENDOR_MICROCHIP is not set -# CONFIG_WLAN_VENDOR_QUANTENNA is not set -# CONFIG_WLAN_VENDOR_RALINK is not set -# CONFIG_WLAN_VENDOR_REALTEK is not set -# CONFIG_WLAN_VENDOR_RSI is not set -# CONFIG_WLAN_VENDOR_ST is not set -# CONFIG_WLAN_VENDOR_TI is not set -# CONFIG_WLAN_VENDOR_ZYDAS is not set -# CONFIG_WLCORE is not set -CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y -# CONFIG_WQ_WATCHDOG is not set -# CONFIG_WWAN is not set -# CONFIG_WW_MUTEX_SELFTEST is not set -# CONFIG_X25 is not set -# CONFIG_X509_CERTIFICATE_PARSER is not set -# CONFIG_X86_PKG_TEMP_THERMAL is not set -CONFIG_X86_SYSFB=y -# CONFIG_XDP_SOCKETS is not set -# CONFIG_XEN is not set -# CONFIG_XEN_GRANT_DMA_ALLOC is not set -# CONFIG_XEN_PVCALLS_FRONTEND is not set -CONFIG_XEN_SCRUB_PAGES_DEFAULT=y -CONFIG_XFRM=y -# CONFIG_XFRM_INTERFACE is not set -# CONFIG_XFRM_IPCOMP is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_XFRM_STATISTICS is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_USER is not set -# CONFIG_XFS_DEBUG is not set -# CONFIG_XFS_FS is not set -# CONFIG_XFS_ONLINE_SCRUB is not set -# CONFIG_XFS_POSIX_ACL is not set -# CONFIG_XFS_QUOTA is not set -# CONFIG_XFS_RT is not set -# CONFIG_XFS_SUPPORT_V4 is not set -# CONFIG_XFS_WARN is not set -# CONFIG_XILINX_AXI_EMAC is not set -# CONFIG_XILINX_DMA is not set -# CONFIG_XILINX_EMACLITE is not set -# CONFIG_XILINX_GMII2RGMII is not set -# CONFIG_XILINX_LL_TEMAC is not set -# CONFIG_XILINX_SDFEC is not set -# CONFIG_XILINX_VCU is not set -# CONFIG_XILINX_WATCHDOG is not set -# CONFIG_XILINX_XADC is not set -# CONFIG_XILINX_ZYNQMP_DMA is not set -# CONFIG_XILINX_ZYNQMP_DPDMA is not set -# CONFIG_XILLYBUS is not set -# CONFIG_XILLYUSB is not set -# CONFIG_XIL_AXIS_FIFO is not set -# CONFIG_XIP_KERNEL is not set -# CONFIG_XMON is not set -# CONFIG_XXHASH is not set -CONFIG_XZ_DEC=y -# CONFIG_XZ_DEC_ARM is not set -# CONFIG_XZ_DEC_ARMTHUMB is not set -# CONFIG_XZ_DEC_BCJ is not set -# CONFIG_XZ_DEC_IA64 is not set -# CONFIG_XZ_DEC_MICROLZMA is not set -# CONFIG_XZ_DEC_POWERPC is not set -# CONFIG_XZ_DEC_SPARC is not set -# CONFIG_XZ_DEC_TEST is not set -# CONFIG_XZ_DEC_X86 is not set -# CONFIG_YAM is not set -# CONFIG_YAMAHA_YAS530 is not set -# CONFIG_YELLOWFIN is not set -# CONFIG_YENTA is not set -# CONFIG_YENTA_O2 is not set -# CONFIG_YENTA_RICOH is not set -# CONFIG_YENTA_TI is not set -# CONFIG_YENTA_TOSHIBA is not set -# CONFIG_ZBUD is not set -# CONFIG_ZD1211RW is not set -# CONFIG_ZD1211RW_DEBUG is not set -# CONFIG_ZEROPLUS_FF is not set -# CONFIG_ZERO_CALL_USED_REGS is not set -# CONFIG_ZIIRAVE_WATCHDOG is not set -# CONFIG_ZISOFS is not set -# CONFIG_ZLIB_DEFLATE is not set -# CONFIG_ZLIB_INFLATE is not set -CONFIG_ZONE_DMA=y -# CONFIG_ZONE_DMA32 is not set -# CONFIG_ZOPT2201 is not set -# CONFIG_ZPA2326 is not set -# CONFIG_ZPOOL is not set -# CONFIG_ZRAM is not set -# CONFIG_ZRAM_MEMORY_TRACKING is not set -# CONFIG_ZSMALLOC is not set -# CONFIG_ZSTD_COMPRESS is not set -# CONFIG_ZSTD_DECOMPRESS is not set -# CONFIG_ZSWAP is not set -# CONFIG_ZX_TDM is not set diff --git a/target/linux/generic/hack-5.18/204-module_strip.patch b/target/linux/generic/hack-5.18/204-module_strip.patch deleted file mode 100644 index 72c6eb7cb4c12f..00000000000000 --- a/target/linux/generic/hack-5.18/204-module_strip.patch +++ /dev/null @@ -1,196 +0,0 @@ -From a779a482fb9b9f8fcdf8b2519c789b4b9bb5dd05 Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Fri, 7 Jul 2017 16:56:48 +0200 -Subject: build: add a hack for removing non-essential module info - -Signed-off-by: Felix Fietkau ---- - include/linux/module.h | 13 ++++++++----- - include/linux/moduleparam.h | 15 ++++++++++++--- - init/Kconfig | 7 +++++++ - kernel/module.c | 5 ++++- - scripts/mod/modpost.c | 12 ++++++++++++ - 5 files changed, 43 insertions(+), 9 deletions(-) - ---- a/include/linux/module.h -+++ b/include/linux/module.h -@@ -164,6 +164,7 @@ extern void cleanup_module(void); - - /* Generic info of form tag = "info" */ - #define MODULE_INFO(tag, info) __MODULE_INFO(tag, tag, info) -+#define MODULE_INFO_STRIP(tag, info) __MODULE_INFO_STRIP(tag, tag, info) - - /* For userspace: you can also call me... */ - #define MODULE_ALIAS(_alias) MODULE_INFO(alias, _alias) -@@ -233,12 +234,12 @@ extern void cleanup_module(void); - * Author(s), use "Name " or just "Name", for multiple - * authors use multiple MODULE_AUTHOR() statements/lines. - */ --#define MODULE_AUTHOR(_author) MODULE_INFO(author, _author) -+#define MODULE_AUTHOR(_author) MODULE_INFO_STRIP(author, _author) - - /* What your module does. */ --#define MODULE_DESCRIPTION(_description) MODULE_INFO(description, _description) -+#define MODULE_DESCRIPTION(_description) MODULE_INFO_STRIP(description, _description) - --#ifdef MODULE -+#if defined(MODULE) && !defined(CONFIG_MODULE_STRIPPED) - /* Creates an alias so file2alias.c can find device table. */ - #define MODULE_DEVICE_TABLE(type, name) \ - extern typeof(name) __mod_##type##__##name##_device_table \ -@@ -265,7 +266,9 @@ extern typeof(name) __mod_##type##__##na - */ - - #if defined(MODULE) || !defined(CONFIG_SYSFS) --#define MODULE_VERSION(_version) MODULE_INFO(version, _version) -+#define MODULE_VERSION(_version) MODULE_INFO_STRIP(version, _version) -+#elif defined(CONFIG_MODULE_STRIPPED) -+#define MODULE_VERSION(_version) __MODULE_INFO_DISABLED(version) - #else - #define MODULE_VERSION(_version) \ - MODULE_INFO(version, _version); \ -@@ -288,7 +291,7 @@ extern typeof(name) __mod_##type##__##na - /* Optional firmware file (or files) needed by the module - * format is simply firmware file name. Multiple firmware - * files require multiple MODULE_FIRMWARE() specifiers */ --#define MODULE_FIRMWARE(_firmware) MODULE_INFO(firmware, _firmware) -+#define MODULE_FIRMWARE(_firmware) MODULE_INFO_STRIP(firmware, _firmware) - - #define MODULE_IMPORT_NS(ns) MODULE_INFO(import_ns, __stringify(ns)) - ---- a/include/linux/moduleparam.h -+++ b/include/linux/moduleparam.h -@@ -20,6 +20,16 @@ - /* Chosen so that structs with an unsigned long line up. */ - #define MAX_PARAM_PREFIX_LEN (64 - sizeof(unsigned long)) - -+/* This struct is here for syntactic coherency, it is not used */ -+#define __MODULE_INFO_DISABLED(name) \ -+ struct __UNIQUE_ID(name) {} -+ -+#ifdef CONFIG_MODULE_STRIPPED -+#define __MODULE_INFO_STRIP(tag, name, info) __MODULE_INFO_DISABLED(name) -+#else -+#define __MODULE_INFO_STRIP(tag, name, info) __MODULE_INFO(tag, name, info) -+#endif -+ - #define __MODULE_INFO(tag, name, info) \ - static const char __UNIQUE_ID(name)[] \ - __used __section(".modinfo") __aligned(1) \ -@@ -31,7 +41,7 @@ - /* One for each parameter, describing how to use it. Some files do - multiple of these per line, so can't just use MODULE_INFO. */ - #define MODULE_PARM_DESC(_parm, desc) \ -- __MODULE_INFO(parm, _parm, #_parm ":" desc) -+ __MODULE_INFO_STRIP(parm, _parm, #_parm ":" desc) - - struct kernel_param; - ---- a/init/Kconfig -+++ b/init/Kconfig -@@ -2383,6 +2383,13 @@ config UNUSED_KSYMS_WHITELIST - one per line. The path can be absolute, or relative to the kernel - source tree. - -+config MODULE_STRIPPED -+ bool "Reduce module size" -+ depends on MODULES -+ help -+ Remove module parameter descriptions, author info, version, aliases, -+ device tables, etc. -+ - endif # MODULES - - config MODULES_TREE_LOOKUP ---- a/kernel/module.c -+++ b/kernel/module.c -@@ -3273,9 +3273,11 @@ static int setup_load_info(struct load_i - - static int check_modinfo(struct module *mod, struct load_info *info, int flags) - { -- const char *modmagic = get_modinfo(info, "vermagic"); - int err; - -+#ifndef CONFIG_MODULE_STRIPPED -+ const char *modmagic = get_modinfo(info, "vermagic"); -+ - if (flags & MODULE_INIT_IGNORE_VERMAGIC) - modmagic = NULL; - -@@ -3296,6 +3298,7 @@ static int check_modinfo(struct module * - mod->name); - add_taint_module(mod, TAINT_OOT_MODULE, LOCKDEP_STILL_OK); - } -+#endif - - check_modinfo_retpoline(mod, info); - ---- a/scripts/mod/modpost.c -+++ b/scripts/mod/modpost.c -@@ -2056,7 +2056,9 @@ static void read_symbols(const char *mod - symname = remove_dot(info.strtab + sym->st_name); - - handle_symbol(mod, &info, sym, symname); -+#ifndef CONFIG_MODULE_STRIPPED - handle_moddevtable(mod, &info, sym, symname); -+#endif - } - - for (sym = info.symtab_start; sym < info.symtab_stop; sym++) { -@@ -2235,8 +2237,10 @@ static void add_header(struct buffer *b, - buf_printf(b, "BUILD_SALT;\n"); - buf_printf(b, "BUILD_LTO_INFO;\n"); - buf_printf(b, "\n"); -+#ifndef CONFIG_MODULE_STRIPPED - buf_printf(b, "MODULE_INFO(vermagic, VERMAGIC_STRING);\n"); - buf_printf(b, "MODULE_INFO(name, KBUILD_MODNAME);\n"); -+#endif - buf_printf(b, "\n"); - buf_printf(b, "__visible struct module __this_module\n"); - buf_printf(b, "__section(\".gnu.linkonce.this_module\") = {\n"); -@@ -2253,8 +2257,10 @@ static void add_header(struct buffer *b, - - static void add_intree_flag(struct buffer *b, int is_intree) - { -+#ifndef CONFIG_MODULE_STRIPPED - if (is_intree) - buf_printf(b, "\nMODULE_INFO(intree, \"Y\");\n"); -+#endif - } - - /* Cannot check for assembler */ -@@ -2267,8 +2273,10 @@ static void add_retpoline(struct buffer - - static void add_staging_flag(struct buffer *b, const char *name) - { -+#ifndef CONFIG_MODULE_STRIPPED - if (strstarts(name, "drivers/staging")) - buf_printf(b, "\nMODULE_INFO(staging, \"Y\");\n"); -+#endif - } - - /** -@@ -2348,11 +2356,13 @@ static void add_depends(struct buffer *b - - static void add_srcversion(struct buffer *b, struct module *mod) - { -+#ifndef CONFIG_MODULE_STRIPPED - if (mod->srcversion[0]) { - buf_printf(b, "\n"); - buf_printf(b, "MODULE_INFO(srcversion, \"%s\");\n", - mod->srcversion); - } -+#endif - } - - static void write_buf(struct buffer *b, const char *fname) -@@ -2601,7 +2611,9 @@ int main(int argc, char **argv) - add_staging_flag(&buf, mod->name); - add_versions(&buf, mod); - add_depends(&buf, mod); -+#ifndef CONFIG_MODULE_STRIPPED - add_moddevtable(&buf, mod); -+#endif - add_srcversion(&buf, mod); - - sprintf(fname, "%s.mod.c", mod->name); diff --git a/target/linux/generic/hack-5.18/205-kconfig-exit.patch b/target/linux/generic/hack-5.18/205-kconfig-exit.patch deleted file mode 100644 index f1b50283daa14b..00000000000000 --- a/target/linux/generic/hack-5.18/205-kconfig-exit.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/scripts/kconfig/conf.c -+++ b/scripts/kconfig/conf.c -@@ -432,6 +432,8 @@ static int conf_sym(struct menu *menu) - break; - continue; - case 0: -+ if (!sym_has_value(sym) && !tty_stdio && getenv("FAIL_ON_UNCONFIGURED")) -+ exit(1); - newval = oldval; - break; - case '?': diff --git a/target/linux/generic/hack-5.18/210-darwin_scripts_include.patch b/target/linux/generic/hack-5.18/210-darwin_scripts_include.patch deleted file mode 100644 index be6adc0d11aa4c..00000000000000 --- a/target/linux/generic/hack-5.18/210-darwin_scripts_include.patch +++ /dev/null @@ -1,3053 +0,0 @@ -From db7c30dcd9a0391bf13b62c9f91e144d762ef43a Mon Sep 17 00:00:00 2001 -From: Florian Fainelli -Date: Fri, 7 Jul 2017 17:00:49 +0200 -Subject: Add an OSX specific patch to make the kernel be compiled - -lede-commit: 3fc2a24f0422b2f55f9ed43f116db3111f700526 -Signed-off-by: Florian Fainelli ---- - scripts/kconfig/Makefile | 3 + - scripts/mod/elf.h | 3007 ++++++++++++++++++++++++++++++++++++++++++++ - scripts/mod/mk_elfconfig.c | 4 + - scripts/mod/modpost.h | 4 + - 4 files changed, 3018 insertions(+) - create mode 100644 scripts/mod/elf.h - ---- /dev/null -+++ b/scripts/mod/elf.h -@@ -0,0 +1,3007 @@ -+/* This file defines standard ELF types, structures, and macros. -+ Copyright (C) 1995-2012 Free Software Foundation, Inc. -+ This file is part of the GNU C Library. -+ -+ The GNU C Library is free software; you can redistribute it and/or -+ modify it under the terms of the GNU Lesser General Public -+ License as published by the Free Software Foundation; either -+ version 2.1 of the License, or (at your option) any later version. -+ -+ The GNU C Library is distributed in the hope that it will be useful, -+ but WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ Lesser General Public License for more details. -+ -+ You should have received a copy of the GNU Lesser General Public -+ License along with the GNU C Library; if not, see -+ . */ -+ -+#ifndef _ELF_H -+#define _ELF_H 1 -+ -+/* Standard ELF types. */ -+ -+#include -+ -+/* Type for a 16-bit quantity. */ -+typedef uint16_t Elf32_Half; -+typedef uint16_t Elf64_Half; -+ -+/* Types for signed and unsigned 32-bit quantities. */ -+typedef uint32_t Elf32_Word; -+typedef int32_t Elf32_Sword; -+typedef uint32_t Elf64_Word; -+typedef int32_t Elf64_Sword; -+ -+/* Types for signed and unsigned 64-bit quantities. */ -+typedef uint64_t Elf32_Xword; -+typedef int64_t Elf32_Sxword; -+typedef uint64_t Elf64_Xword; -+typedef int64_t Elf64_Sxword; -+ -+/* Type of addresses. */ -+typedef uint32_t Elf32_Addr; -+typedef uint64_t Elf64_Addr; -+ -+/* Type of file offsets. */ -+typedef uint32_t Elf32_Off; -+typedef uint64_t Elf64_Off; -+ -+/* Type for section indices, which are 16-bit quantities. */ -+typedef uint16_t Elf32_Section; -+typedef uint16_t Elf64_Section; -+ -+/* Type for version symbol information. */ -+typedef Elf32_Half Elf32_Versym; -+typedef Elf64_Half Elf64_Versym; -+ -+ -+/* The ELF file header. This appears at the start of every ELF file. */ -+ -+#define EI_NIDENT (16) -+ -+typedef struct -+{ -+ unsigned char e_ident[EI_NIDENT]; /* Magic number and other info */ -+ Elf32_Half e_type; /* Object file type */ -+ Elf32_Half e_machine; /* Architecture */ -+ Elf32_Word e_version; /* Object file version */ -+ Elf32_Addr e_entry; /* Entry point virtual address */ -+ Elf32_Off e_phoff; /* Program header table file offset */ -+ Elf32_Off e_shoff; /* Section header table file offset */ -+ Elf32_Word e_flags; /* Processor-specific flags */ -+ Elf32_Half e_ehsize; /* ELF header size in bytes */ -+ Elf32_Half e_phentsize; /* Program header table entry size */ -+ Elf32_Half e_phnum; /* Program header table entry count */ -+ Elf32_Half e_shentsize; /* Section header table entry size */ -+ Elf32_Half e_shnum; /* Section header table entry count */ -+ Elf32_Half e_shstrndx; /* Section header string table index */ -+} Elf32_Ehdr; -+ -+typedef struct -+{ -+ unsigned char e_ident[EI_NIDENT]; /* Magic number and other info */ -+ Elf64_Half e_type; /* Object file type */ -+ Elf64_Half e_machine; /* Architecture */ -+ Elf64_Word e_version; /* Object file version */ -+ Elf64_Addr e_entry; /* Entry point virtual address */ -+ Elf64_Off e_phoff; /* Program header table file offset */ -+ Elf64_Off e_shoff; /* Section header table file offset */ -+ Elf64_Word e_flags; /* Processor-specific flags */ -+ Elf64_Half e_ehsize; /* ELF header size in bytes */ -+ Elf64_Half e_phentsize; /* Program header table entry size */ -+ Elf64_Half e_phnum; /* Program header table entry count */ -+ Elf64_Half e_shentsize; /* Section header table entry size */ -+ Elf64_Half e_shnum; /* Section header table entry count */ -+ Elf64_Half e_shstrndx; /* Section header string table index */ -+} Elf64_Ehdr; -+ -+/* Fields in the e_ident array. The EI_* macros are indices into the -+ array. The macros under each EI_* macro are the values the byte -+ may have. */ -+ -+#define EI_MAG0 0 /* File identification byte 0 index */ -+#define ELFMAG0 0x7f /* Magic number byte 0 */ -+ -+#define EI_MAG1 1 /* File identification byte 1 index */ -+#define ELFMAG1 'E' /* Magic number byte 1 */ -+ -+#define EI_MAG2 2 /* File identification byte 2 index */ -+#define ELFMAG2 'L' /* Magic number byte 2 */ -+ -+#define EI_MAG3 3 /* File identification byte 3 index */ -+#define ELFMAG3 'F' /* Magic number byte 3 */ -+ -+/* Conglomeration of the identification bytes, for easy testing as a word. */ -+#define ELFMAG "\177ELF" -+#define SELFMAG 4 -+ -+#define EI_CLASS 4 /* File class byte index */ -+#define ELFCLASSNONE 0 /* Invalid class */ -+#define ELFCLASS32 1 /* 32-bit objects */ -+#define ELFCLASS64 2 /* 64-bit objects */ -+#define ELFCLASSNUM 3 -+ -+#define EI_DATA 5 /* Data encoding byte index */ -+#define ELFDATANONE 0 /* Invalid data encoding */ -+#define ELFDATA2LSB 1 /* 2's complement, little endian */ -+#define ELFDATA2MSB 2 /* 2's complement, big endian */ -+#define ELFDATANUM 3 -+ -+#define EI_VERSION 6 /* File version byte index */ -+ /* Value must be EV_CURRENT */ -+ -+#define EI_OSABI 7 /* OS ABI identification */ -+#define ELFOSABI_NONE 0 /* UNIX System V ABI */ -+#define ELFOSABI_SYSV 0 /* Alias. */ -+#define ELFOSABI_HPUX 1 /* HP-UX */ -+#define ELFOSABI_NETBSD 2 /* NetBSD. */ -+#define ELFOSABI_GNU 3 /* Object uses GNU ELF extensions. */ -+#define ELFOSABI_LINUX ELFOSABI_GNU /* Compatibility alias. */ -+#define ELFOSABI_SOLARIS 6 /* Sun Solaris. */ -+#define ELFOSABI_AIX 7 /* IBM AIX. */ -+#define ELFOSABI_IRIX 8 /* SGI Irix. */ -+#define ELFOSABI_FREEBSD 9 /* FreeBSD. */ -+#define ELFOSABI_TRU64 10 /* Compaq TRU64 UNIX. */ -+#define ELFOSABI_MODESTO 11 /* Novell Modesto. */ -+#define ELFOSABI_OPENBSD 12 /* OpenBSD. */ -+#define ELFOSABI_ARM_AEABI 64 /* ARM EABI */ -+#define ELFOSABI_ARM 97 /* ARM */ -+#define ELFOSABI_STANDALONE 255 /* Standalone (embedded) application */ -+ -+#define EI_ABIVERSION 8 /* ABI version */ -+ -+#define EI_PAD 9 /* Byte index of padding bytes */ -+ -+/* Legal values for e_type (object file type). */ -+ -+#define ET_NONE 0 /* No file type */ -+#define ET_REL 1 /* Relocatable file */ -+#define ET_EXEC 2 /* Executable file */ -+#define ET_DYN 3 /* Shared object file */ -+#define ET_CORE 4 /* Core file */ -+#define ET_NUM 5 /* Number of defined types */ -+#define ET_LOOS 0xfe00 /* OS-specific range start */ -+#define ET_HIOS 0xfeff /* OS-specific range end */ -+#define ET_LOPROC 0xff00 /* Processor-specific range start */ -+#define ET_HIPROC 0xffff /* Processor-specific range end */ -+ -+/* Legal values for e_machine (architecture). */ -+ -+#define EM_NONE 0 /* No machine */ -+#define EM_M32 1 /* AT&T WE 32100 */ -+#define EM_SPARC 2 /* SUN SPARC */ -+#define EM_386 3 /* Intel 80386 */ -+#define EM_68K 4 /* Motorola m68k family */ -+#define EM_88K 5 /* Motorola m88k family */ -+#define EM_860 7 /* Intel 80860 */ -+#define EM_MIPS 8 /* MIPS R3000 big-endian */ -+#define EM_S370 9 /* IBM System/370 */ -+#define EM_MIPS_RS3_LE 10 /* MIPS R3000 little-endian */ -+ -+#define EM_PARISC 15 /* HPPA */ -+#define EM_VPP500 17 /* Fujitsu VPP500 */ -+#define EM_SPARC32PLUS 18 /* Sun's "v8plus" */ -+#define EM_960 19 /* Intel 80960 */ -+#define EM_PPC 20 /* PowerPC */ -+#define EM_PPC64 21 /* PowerPC 64-bit */ -+#define EM_S390 22 /* IBM S390 */ -+ -+#define EM_V800 36 /* NEC V800 series */ -+#define EM_FR20 37 /* Fujitsu FR20 */ -+#define EM_RH32 38 /* TRW RH-32 */ -+#define EM_RCE 39 /* Motorola RCE */ -+#define EM_ARM 40 /* ARM */ -+#define EM_FAKE_ALPHA 41 /* Digital Alpha */ -+#define EM_SH 42 /* Hitachi SH */ -+#define EM_SPARCV9 43 /* SPARC v9 64-bit */ -+#define EM_TRICORE 44 /* Siemens Tricore */ -+#define EM_ARC 45 /* Argonaut RISC Core */ -+#define EM_H8_300 46 /* Hitachi H8/300 */ -+#define EM_H8_300H 47 /* Hitachi H8/300H */ -+#define EM_H8S 48 /* Hitachi H8S */ -+#define EM_H8_500 49 /* Hitachi H8/500 */ -+#define EM_IA_64 50 /* Intel Merced */ -+#define EM_MIPS_X 51 /* Stanford MIPS-X */ -+#define EM_COLDFIRE 52 /* Motorola Coldfire */ -+#define EM_68HC12 53 /* Motorola M68HC12 */ -+#define EM_MMA 54 /* Fujitsu MMA Multimedia Accelerator*/ -+#define EM_PCP 55 /* Siemens PCP */ -+#define EM_NCPU 56 /* Sony nCPU embeeded RISC */ -+#define EM_NDR1 57 /* Denso NDR1 microprocessor */ -+#define EM_STARCORE 58 /* Motorola Start*Core processor */ -+#define EM_ME16 59 /* Toyota ME16 processor */ -+#define EM_ST100 60 /* STMicroelectronic ST100 processor */ -+#define EM_TINYJ 61 /* Advanced Logic Corp. Tinyj emb.fam*/ -+#define EM_X86_64 62 /* AMD x86-64 architecture */ -+#define EM_PDSP 63 /* Sony DSP Processor */ -+ -+#define EM_FX66 66 /* Siemens FX66 microcontroller */ -+#define EM_ST9PLUS 67 /* STMicroelectronics ST9+ 8/16 mc */ -+#define EM_ST7 68 /* STmicroelectronics ST7 8 bit mc */ -+#define EM_68HC16 69 /* Motorola MC68HC16 microcontroller */ -+#define EM_68HC11 70 /* Motorola MC68HC11 microcontroller */ -+#define EM_68HC08 71 /* Motorola MC68HC08 microcontroller */ -+#define EM_68HC05 72 /* Motorola MC68HC05 microcontroller */ -+#define EM_SVX 73 /* Silicon Graphics SVx */ -+#define EM_ST19 74 /* STMicroelectronics ST19 8 bit mc */ -+#define EM_VAX 75 /* Digital VAX */ -+#define EM_CRIS 76 /* Axis Communications 32-bit embedded processor */ -+#define EM_JAVELIN 77 /* Infineon Technologies 32-bit embedded processor */ -+#define EM_FIREPATH 78 /* Element 14 64-bit DSP Processor */ -+#define EM_ZSP 79 /* LSI Logic 16-bit DSP Processor */ -+#define EM_MMIX 80 /* Donald Knuth's educational 64-bit processor */ -+#define EM_HUANY 81 /* Harvard University machine-independent object files */ -+#define EM_PRISM 82 /* SiTera Prism */ -+#define EM_AVR 83 /* Atmel AVR 8-bit microcontroller */ -+#define EM_FR30 84 /* Fujitsu FR30 */ -+#define EM_D10V 85 /* Mitsubishi D10V */ -+#define EM_D30V 86 /* Mitsubishi D30V */ -+#define EM_V850 87 /* NEC v850 */ -+#define EM_M32R 88 /* Mitsubishi M32R */ -+#define EM_MN10300 89 /* Matsushita MN10300 */ -+#define EM_MN10200 90 /* Matsushita MN10200 */ -+#define EM_PJ 91 /* picoJava */ -+#define EM_OPENRISC 92 /* OpenRISC 32-bit embedded processor */ -+#define EM_ARC_A5 93 /* ARC Cores Tangent-A5 */ -+#define EM_XTENSA 94 /* Tensilica Xtensa Architecture */ -+#define EM_TILEPRO 188 /* Tilera TILEPro */ -+#define EM_TILEGX 191 /* Tilera TILE-Gx */ -+#define EM_NUM 192 -+ -+/* If it is necessary to assign new unofficial EM_* values, please -+ pick large random numbers (0x8523, 0xa7f2, etc.) to minimize the -+ chances of collision with official or non-GNU unofficial values. */ -+ -+#define EM_ALPHA 0x9026 -+ -+/* Legal values for e_version (version). */ -+ -+#define EV_NONE 0 /* Invalid ELF version */ -+#define EV_CURRENT 1 /* Current version */ -+#define EV_NUM 2 -+ -+/* Section header. */ -+ -+typedef struct -+{ -+ Elf32_Word sh_name; /* Section name (string tbl index) */ -+ Elf32_Word sh_type; /* Section type */ -+ Elf32_Word sh_flags; /* Section flags */ -+ Elf32_Addr sh_addr; /* Section virtual addr at execution */ -+ Elf32_Off sh_offset; /* Section file offset */ -+ Elf32_Word sh_size; /* Section size in bytes */ -+ Elf32_Word sh_link; /* Link to another section */ -+ Elf32_Word sh_info; /* Additional section information */ -+ Elf32_Word sh_addralign; /* Section alignment */ -+ Elf32_Word sh_entsize; /* Entry size if section holds table */ -+} Elf32_Shdr; -+ -+typedef struct -+{ -+ Elf64_Word sh_name; /* Section name (string tbl index) */ -+ Elf64_Word sh_type; /* Section type */ -+ Elf64_Xword sh_flags; /* Section flags */ -+ Elf64_Addr sh_addr; /* Section virtual addr at execution */ -+ Elf64_Off sh_offset; /* Section file offset */ -+ Elf64_Xword sh_size; /* Section size in bytes */ -+ Elf64_Word sh_link; /* Link to another section */ -+ Elf64_Word sh_info; /* Additional section information */ -+ Elf64_Xword sh_addralign; /* Section alignment */ -+ Elf64_Xword sh_entsize; /* Entry size if section holds table */ -+} Elf64_Shdr; -+ -+/* Special section indices. */ -+ -+#define SHN_UNDEF 0 /* Undefined section */ -+#define SHN_LORESERVE 0xff00 /* Start of reserved indices */ -+#define SHN_LOPROC 0xff00 /* Start of processor-specific */ -+#define SHN_BEFORE 0xff00 /* Order section before all others -+ (Solaris). */ -+#define SHN_AFTER 0xff01 /* Order section after all others -+ (Solaris). */ -+#define SHN_HIPROC 0xff1f /* End of processor-specific */ -+#define SHN_LOOS 0xff20 /* Start of OS-specific */ -+#define SHN_HIOS 0xff3f /* End of OS-specific */ -+#define SHN_ABS 0xfff1 /* Associated symbol is absolute */ -+#define SHN_COMMON 0xfff2 /* Associated symbol is common */ -+#define SHN_XINDEX 0xffff /* Index is in extra table. */ -+#define SHN_HIRESERVE 0xffff /* End of reserved indices */ -+ -+/* Legal values for sh_type (section type). */ -+ -+#define SHT_NULL 0 /* Section header table entry unused */ -+#define SHT_PROGBITS 1 /* Program data */ -+#define SHT_SYMTAB 2 /* Symbol table */ -+#define SHT_STRTAB 3 /* String table */ -+#define SHT_RELA 4 /* Relocation entries with addends */ -+#define SHT_HASH 5 /* Symbol hash table */ -+#define SHT_DYNAMIC 6 /* Dynamic linking information */ -+#define SHT_NOTE 7 /* Notes */ -+#define SHT_NOBITS 8 /* Program space with no data (bss) */ -+#define SHT_REL 9 /* Relocation entries, no addends */ -+#define SHT_SHLIB 10 /* Reserved */ -+#define SHT_DYNSYM 11 /* Dynamic linker symbol table */ -+#define SHT_INIT_ARRAY 14 /* Array of constructors */ -+#define SHT_FINI_ARRAY 15 /* Array of destructors */ -+#define SHT_PREINIT_ARRAY 16 /* Array of pre-constructors */ -+#define SHT_GROUP 17 /* Section group */ -+#define SHT_SYMTAB_SHNDX 18 /* Extended section indeces */ -+#define SHT_NUM 19 /* Number of defined types. */ -+#define SHT_LOOS 0x60000000 /* Start OS-specific. */ -+#define SHT_GNU_ATTRIBUTES 0x6ffffff5 /* Object attributes. */ -+#define SHT_GNU_HASH 0x6ffffff6 /* GNU-style hash table. */ -+#define SHT_GNU_LIBLIST 0x6ffffff7 /* Prelink library list */ -+#define SHT_CHECKSUM 0x6ffffff8 /* Checksum for DSO content. */ -+#define SHT_LOSUNW 0x6ffffffa /* Sun-specific low bound. */ -+#define SHT_SUNW_move 0x6ffffffa -+#define SHT_SUNW_COMDAT 0x6ffffffb -+#define SHT_SUNW_syminfo 0x6ffffffc -+#define SHT_GNU_verdef 0x6ffffffd /* Version definition section. */ -+#define SHT_GNU_verneed 0x6ffffffe /* Version needs section. */ -+#define SHT_GNU_versym 0x6fffffff /* Version symbol table. */ -+#define SHT_HISUNW 0x6fffffff /* Sun-specific high bound. */ -+#define SHT_HIOS 0x6fffffff /* End OS-specific type */ -+#define SHT_LOPROC 0x70000000 /* Start of processor-specific */ -+#define SHT_HIPROC 0x7fffffff /* End of processor-specific */ -+#define SHT_LOUSER 0x80000000 /* Start of application-specific */ -+#define SHT_HIUSER 0x8fffffff /* End of application-specific */ -+ -+/* Legal values for sh_flags (section flags). */ -+ -+#define SHF_WRITE (1 << 0) /* Writable */ -+#define SHF_ALLOC (1 << 1) /* Occupies memory during execution */ -+#define SHF_EXECINSTR (1 << 2) /* Executable */ -+#define SHF_MERGE (1 << 4) /* Might be merged */ -+#define SHF_STRINGS (1 << 5) /* Contains nul-terminated strings */ -+#define SHF_INFO_LINK (1 << 6) /* `sh_info' contains SHT index */ -+#define SHF_LINK_ORDER (1 << 7) /* Preserve order after combining */ -+#define SHF_OS_NONCONFORMING (1 << 8) /* Non-standard OS specific handling -+ required */ -+#define SHF_GROUP (1 << 9) /* Section is member of a group. */ -+#define SHF_TLS (1 << 10) /* Section hold thread-local data. */ -+#define SHF_MASKOS 0x0ff00000 /* OS-specific. */ -+#define SHF_MASKPROC 0xf0000000 /* Processor-specific */ -+#define SHF_ORDERED (1 << 30) /* Special ordering requirement -+ (Solaris). */ -+#define SHF_EXCLUDE (1 << 31) /* Section is excluded unless -+ referenced or allocated (Solaris).*/ -+ -+/* Section group handling. */ -+#define GRP_COMDAT 0x1 /* Mark group as COMDAT. */ -+ -+/* Symbol table entry. */ -+ -+typedef struct -+{ -+ Elf32_Word st_name; /* Symbol name (string tbl index) */ -+ Elf32_Addr st_value; /* Symbol value */ -+ Elf32_Word st_size; /* Symbol size */ -+ unsigned char st_info; /* Symbol type and binding */ -+ unsigned char st_other; /* Symbol visibility */ -+ Elf32_Section st_shndx; /* Section index */ -+} Elf32_Sym; -+ -+typedef struct -+{ -+ Elf64_Word st_name; /* Symbol name (string tbl index) */ -+ unsigned char st_info; /* Symbol type and binding */ -+ unsigned char st_other; /* Symbol visibility */ -+ Elf64_Section st_shndx; /* Section index */ -+ Elf64_Addr st_value; /* Symbol value */ -+ Elf64_Xword st_size; /* Symbol size */ -+} Elf64_Sym; -+ -+/* The syminfo section if available contains additional information about -+ every dynamic symbol. */ -+ -+typedef struct -+{ -+ Elf32_Half si_boundto; /* Direct bindings, symbol bound to */ -+ Elf32_Half si_flags; /* Per symbol flags */ -+} Elf32_Syminfo; -+ -+typedef struct -+{ -+ Elf64_Half si_boundto; /* Direct bindings, symbol bound to */ -+ Elf64_Half si_flags; /* Per symbol flags */ -+} Elf64_Syminfo; -+ -+/* Possible values for si_boundto. */ -+#define SYMINFO_BT_SELF 0xffff /* Symbol bound to self */ -+#define SYMINFO_BT_PARENT 0xfffe /* Symbol bound to parent */ -+#define SYMINFO_BT_LOWRESERVE 0xff00 /* Beginning of reserved entries */ -+ -+/* Possible bitmasks for si_flags. */ -+#define SYMINFO_FLG_DIRECT 0x0001 /* Direct bound symbol */ -+#define SYMINFO_FLG_PASSTHRU 0x0002 /* Pass-thru symbol for translator */ -+#define SYMINFO_FLG_COPY 0x0004 /* Symbol is a copy-reloc */ -+#define SYMINFO_FLG_LAZYLOAD 0x0008 /* Symbol bound to object to be lazy -+ loaded */ -+/* Syminfo version values. */ -+#define SYMINFO_NONE 0 -+#define SYMINFO_CURRENT 1 -+#define SYMINFO_NUM 2 -+ -+ -+/* How to extract and insert information held in the st_info field. */ -+ -+#define ELF32_ST_BIND(val) (((unsigned char) (val)) >> 4) -+#define ELF32_ST_TYPE(val) ((val) & 0xf) -+#define ELF32_ST_INFO(bind, type) (((bind) << 4) + ((type) & 0xf)) -+ -+/* Both Elf32_Sym and Elf64_Sym use the same one-byte st_info field. */ -+#define ELF64_ST_BIND(val) ELF32_ST_BIND (val) -+#define ELF64_ST_TYPE(val) ELF32_ST_TYPE (val) -+#define ELF64_ST_INFO(bind, type) ELF32_ST_INFO ((bind), (type)) -+ -+/* Legal values for ST_BIND subfield of st_info (symbol binding). */ -+ -+#define STB_LOCAL 0 /* Local symbol */ -+#define STB_GLOBAL 1 /* Global symbol */ -+#define STB_WEAK 2 /* Weak symbol */ -+#define STB_NUM 3 /* Number of defined types. */ -+#define STB_LOOS 10 /* Start of OS-specific */ -+#define STB_GNU_UNIQUE 10 /* Unique symbol. */ -+#define STB_HIOS 12 /* End of OS-specific */ -+#define STB_LOPROC 13 /* Start of processor-specific */ -+#define STB_HIPROC 15 /* End of processor-specific */ -+ -+/* Legal values for ST_TYPE subfield of st_info (symbol type). */ -+ -+#define STT_NOTYPE 0 /* Symbol type is unspecified */ -+#define STT_OBJECT 1 /* Symbol is a data object */ -+#define STT_FUNC 2 /* Symbol is a code object */ -+#define STT_SECTION 3 /* Symbol associated with a section */ -+#define STT_FILE 4 /* Symbol's name is file name */ -+#define STT_COMMON 5 /* Symbol is a common data object */ -+#define STT_TLS 6 /* Symbol is thread-local data object*/ -+#define STT_NUM 7 /* Number of defined types. */ -+#define STT_LOOS 10 /* Start of OS-specific */ -+#define STT_GNU_IFUNC 10 /* Symbol is indirect code object */ -+#define STT_HIOS 12 /* End of OS-specific */ -+#define STT_LOPROC 13 /* Start of processor-specific */ -+#define STT_HIPROC 15 /* End of processor-specific */ -+ -+ -+/* Symbol table indices are found in the hash buckets and chain table -+ of a symbol hash table section. This special index value indicates -+ the end of a chain, meaning no further symbols are found in that bucket. */ -+ -+#define STN_UNDEF 0 /* End of a chain. */ -+ -+ -+/* How to extract and insert information held in the st_other field. */ -+ -+#define ELF32_ST_VISIBILITY(o) ((o) & 0x03) -+ -+/* For ELF64 the definitions are the same. */ -+#define ELF64_ST_VISIBILITY(o) ELF32_ST_VISIBILITY (o) -+ -+/* Symbol visibility specification encoded in the st_other field. */ -+#define STV_DEFAULT 0 /* Default symbol visibility rules */ -+#define STV_INTERNAL 1 /* Processor specific hidden class */ -+#define STV_HIDDEN 2 /* Sym unavailable in other modules */ -+#define STV_PROTECTED 3 /* Not preemptible, not exported */ -+ -+ -+/* Relocation table entry without addend (in section of type SHT_REL). */ -+ -+typedef struct -+{ -+ Elf32_Addr r_offset; /* Address */ -+ Elf32_Word r_info; /* Relocation type and symbol index */ -+} Elf32_Rel; -+ -+/* I have seen two different definitions of the Elf64_Rel and -+ Elf64_Rela structures, so we'll leave them out until Novell (or -+ whoever) gets their act together. */ -+/* The following, at least, is used on Sparc v9, MIPS, and Alpha. */ -+ -+typedef struct -+{ -+ Elf64_Addr r_offset; /* Address */ -+ Elf64_Xword r_info; /* Relocation type and symbol index */ -+} Elf64_Rel; -+ -+/* Relocation table entry with addend (in section of type SHT_RELA). */ -+ -+typedef struct -+{ -+ Elf32_Addr r_offset; /* Address */ -+ Elf32_Word r_info; /* Relocation type and symbol index */ -+ Elf32_Sword r_addend; /* Addend */ -+} Elf32_Rela; -+ -+typedef struct -+{ -+ Elf64_Addr r_offset; /* Address */ -+ Elf64_Xword r_info; /* Relocation type and symbol index */ -+ Elf64_Sxword r_addend; /* Addend */ -+} Elf64_Rela; -+ -+/* How to extract and insert information held in the r_info field. */ -+ -+#define ELF32_R_SYM(val) ((val) >> 8) -+#define ELF32_R_TYPE(val) ((val) & 0xff) -+#define ELF32_R_INFO(sym, type) (((sym) << 8) + ((type) & 0xff)) -+ -+#define ELF64_R_SYM(i) ((i) >> 32) -+#define ELF64_R_TYPE(i) ((i) & 0xffffffff) -+#define ELF64_R_INFO(sym,type) ((((Elf64_Xword) (sym)) << 32) + (type)) -+ -+/* Program segment header. */ -+ -+typedef struct -+{ -+ Elf32_Word p_type; /* Segment type */ -+ Elf32_Off p_offset; /* Segment file offset */ -+ Elf32_Addr p_vaddr; /* Segment virtual address */ -+ Elf32_Addr p_paddr; /* Segment physical address */ -+ Elf32_Word p_filesz; /* Segment size in file */ -+ Elf32_Word p_memsz; /* Segment size in memory */ -+ Elf32_Word p_flags; /* Segment flags */ -+ Elf32_Word p_align; /* Segment alignment */ -+} Elf32_Phdr; -+ -+typedef struct -+{ -+ Elf64_Word p_type; /* Segment type */ -+ Elf64_Word p_flags; /* Segment flags */ -+ Elf64_Off p_offset; /* Segment file offset */ -+ Elf64_Addr p_vaddr; /* Segment virtual address */ -+ Elf64_Addr p_paddr; /* Segment physical address */ -+ Elf64_Xword p_filesz; /* Segment size in file */ -+ Elf64_Xword p_memsz; /* Segment size in memory */ -+ Elf64_Xword p_align; /* Segment alignment */ -+} Elf64_Phdr; -+ -+/* Special value for e_phnum. This indicates that the real number of -+ program headers is too large to fit into e_phnum. Instead the real -+ value is in the field sh_info of section 0. */ -+ -+#define PN_XNUM 0xffff -+ -+/* Legal values for p_type (segment type). */ -+ -+#define PT_NULL 0 /* Program header table entry unused */ -+#define PT_LOAD 1 /* Loadable program segment */ -+#define PT_DYNAMIC 2 /* Dynamic linking information */ -+#define PT_INTERP 3 /* Program interpreter */ -+#define PT_NOTE 4 /* Auxiliary information */ -+#define PT_SHLIB 5 /* Reserved */ -+#define PT_PHDR 6 /* Entry for header table itself */ -+#define PT_TLS 7 /* Thread-local storage segment */ -+#define PT_NUM 8 /* Number of defined types */ -+#define PT_LOOS 0x60000000 /* Start of OS-specific */ -+#define PT_GNU_EH_FRAME 0x6474e550 /* GCC .eh_frame_hdr segment */ -+#define PT_GNU_STACK 0x6474e551 /* Indicates stack executability */ -+#define PT_GNU_RELRO 0x6474e552 /* Read-only after relocation */ -+#define PT_LOSUNW 0x6ffffffa -+#define PT_SUNWBSS 0x6ffffffa /* Sun Specific segment */ -+#define PT_SUNWSTACK 0x6ffffffb /* Stack segment */ -+#define PT_HISUNW 0x6fffffff -+#define PT_HIOS 0x6fffffff /* End of OS-specific */ -+#define PT_LOPROC 0x70000000 /* Start of processor-specific */ -+#define PT_HIPROC 0x7fffffff /* End of processor-specific */ -+ -+/* Legal values for p_flags (segment flags). */ -+ -+#define PF_X (1 << 0) /* Segment is executable */ -+#define PF_W (1 << 1) /* Segment is writable */ -+#define PF_R (1 << 2) /* Segment is readable */ -+#define PF_MASKOS 0x0ff00000 /* OS-specific */ -+#define PF_MASKPROC 0xf0000000 /* Processor-specific */ -+ -+/* Legal values for note segment descriptor types for core files. */ -+ -+#define NT_PRSTATUS 1 /* Contains copy of prstatus struct */ -+#define NT_FPREGSET 2 /* Contains copy of fpregset struct */ -+#define NT_PRPSINFO 3 /* Contains copy of prpsinfo struct */ -+#define NT_PRXREG 4 /* Contains copy of prxregset struct */ -+#define NT_TASKSTRUCT 4 /* Contains copy of task structure */ -+#define NT_PLATFORM 5 /* String from sysinfo(SI_PLATFORM) */ -+#define NT_AUXV 6 /* Contains copy of auxv array */ -+#define NT_GWINDOWS 7 /* Contains copy of gwindows struct */ -+#define NT_ASRS 8 /* Contains copy of asrset struct */ -+#define NT_PSTATUS 10 /* Contains copy of pstatus struct */ -+#define NT_PSINFO 13 /* Contains copy of psinfo struct */ -+#define NT_PRCRED 14 /* Contains copy of prcred struct */ -+#define NT_UTSNAME 15 /* Contains copy of utsname struct */ -+#define NT_LWPSTATUS 16 /* Contains copy of lwpstatus struct */ -+#define NT_LWPSINFO 17 /* Contains copy of lwpinfo struct */ -+#define NT_PRFPXREG 20 /* Contains copy of fprxregset struct */ -+#define NT_PRXFPREG 0x46e62b7f /* Contains copy of user_fxsr_struct */ -+#define NT_PPC_VMX 0x100 /* PowerPC Altivec/VMX registers */ -+#define NT_PPC_SPE 0x101 /* PowerPC SPE/EVR registers */ -+#define NT_PPC_VSX 0x102 /* PowerPC VSX registers */ -+#define NT_386_TLS 0x200 /* i386 TLS slots (struct user_desc) */ -+#define NT_386_IOPERM 0x201 /* x86 io permission bitmap (1=deny) */ -+#define NT_X86_XSTATE 0x202 /* x86 extended state using xsave */ -+ -+/* Legal values for the note segment descriptor types for object files. */ -+ -+#define NT_VERSION 1 /* Contains a version string. */ -+ -+ -+/* Dynamic section entry. */ -+ -+typedef struct -+{ -+ Elf32_Sword d_tag; /* Dynamic entry type */ -+ union -+ { -+ Elf32_Word d_val; /* Integer value */ -+ Elf32_Addr d_ptr; /* Address value */ -+ } d_un; -+} Elf32_Dyn; -+ -+typedef struct -+{ -+ Elf64_Sxword d_tag; /* Dynamic entry type */ -+ union -+ { -+ Elf64_Xword d_val; /* Integer value */ -+ Elf64_Addr d_ptr; /* Address value */ -+ } d_un; -+} Elf64_Dyn; -+ -+/* Legal values for d_tag (dynamic entry type). */ -+ -+#define DT_NULL 0 /* Marks end of dynamic section */ -+#define DT_NEEDED 1 /* Name of needed library */ -+#define DT_PLTRELSZ 2 /* Size in bytes of PLT relocs */ -+#define DT_PLTGOT 3 /* Processor defined value */ -+#define DT_HASH 4 /* Address of symbol hash table */ -+#define DT_STRTAB 5 /* Address of string table */ -+#define DT_SYMTAB 6 /* Address of symbol table */ -+#define DT_RELA 7 /* Address of Rela relocs */ -+#define DT_RELASZ 8 /* Total size of Rela relocs */ -+#define DT_RELAENT 9 /* Size of one Rela reloc */ -+#define DT_STRSZ 10 /* Size of string table */ -+#define DT_SYMENT 11 /* Size of one symbol table entry */ -+#define DT_INIT 12 /* Address of init function */ -+#define DT_FINI 13 /* Address of termination function */ -+#define DT_SONAME 14 /* Name of shared object */ -+#define DT_RPATH 15 /* Library search path (deprecated) */ -+#define DT_SYMBOLIC 16 /* Start symbol search here */ -+#define DT_REL 17 /* Address of Rel relocs */ -+#define DT_RELSZ 18 /* Total size of Rel relocs */ -+#define DT_RELENT 19 /* Size of one Rel reloc */ -+#define DT_PLTREL 20 /* Type of reloc in PLT */ -+#define DT_DEBUG 21 /* For debugging; unspecified */ -+#define DT_TEXTREL 22 /* Reloc might modify .text */ -+#define DT_JMPREL 23 /* Address of PLT relocs */ -+#define DT_BIND_NOW 24 /* Process relocations of object */ -+#define DT_INIT_ARRAY 25 /* Array with addresses of init fct */ -+#define DT_FINI_ARRAY 26 /* Array with addresses of fini fct */ -+#define DT_INIT_ARRAYSZ 27 /* Size in bytes of DT_INIT_ARRAY */ -+#define DT_FINI_ARRAYSZ 28 /* Size in bytes of DT_FINI_ARRAY */ -+#define DT_RUNPATH 29 /* Library search path */ -+#define DT_FLAGS 30 /* Flags for the object being loaded */ -+#define DT_ENCODING 32 /* Start of encoded range */ -+#define DT_PREINIT_ARRAY 32 /* Array with addresses of preinit fct*/ -+#define DT_PREINIT_ARRAYSZ 33 /* size in bytes of DT_PREINIT_ARRAY */ -+#define DT_NUM 34 /* Number used */ -+#define DT_LOOS 0x6000000d /* Start of OS-specific */ -+#define DT_HIOS 0x6ffff000 /* End of OS-specific */ -+#define DT_LOPROC 0x70000000 /* Start of processor-specific */ -+#define DT_HIPROC 0x7fffffff /* End of processor-specific */ -+#define DT_PROCNUM DT_MIPS_NUM /* Most used by any processor */ -+ -+/* DT_* entries which fall between DT_VALRNGHI & DT_VALRNGLO use the -+ Dyn.d_un.d_val field of the Elf*_Dyn structure. This follows Sun's -+ approach. */ -+#define DT_VALRNGLO 0x6ffffd00 -+#define DT_GNU_PRELINKED 0x6ffffdf5 /* Prelinking timestamp */ -+#define DT_GNU_CONFLICTSZ 0x6ffffdf6 /* Size of conflict section */ -+#define DT_GNU_LIBLISTSZ 0x6ffffdf7 /* Size of library list */ -+#define DT_CHECKSUM 0x6ffffdf8 -+#define DT_PLTPADSZ 0x6ffffdf9 -+#define DT_MOVEENT 0x6ffffdfa -+#define DT_MOVESZ 0x6ffffdfb -+#define DT_FEATURE_1 0x6ffffdfc /* Feature selection (DTF_*). */ -+#define DT_POSFLAG_1 0x6ffffdfd /* Flags for DT_* entries, effecting -+ the following DT_* entry. */ -+#define DT_SYMINSZ 0x6ffffdfe /* Size of syminfo table (in bytes) */ -+#define DT_SYMINENT 0x6ffffdff /* Entry size of syminfo */ -+#define DT_VALRNGHI 0x6ffffdff -+#define DT_VALTAGIDX(tag) (DT_VALRNGHI - (tag)) /* Reverse order! */ -+#define DT_VALNUM 12 -+ -+/* DT_* entries which fall between DT_ADDRRNGHI & DT_ADDRRNGLO use the -+ Dyn.d_un.d_ptr field of the Elf*_Dyn structure. -+ -+ If any adjustment is made to the ELF object after it has been -+ built these entries will need to be adjusted. */ -+#define DT_ADDRRNGLO 0x6ffffe00 -+#define DT_GNU_HASH 0x6ffffef5 /* GNU-style hash table. */ -+#define DT_TLSDESC_PLT 0x6ffffef6 -+#define DT_TLSDESC_GOT 0x6ffffef7 -+#define DT_GNU_CONFLICT 0x6ffffef8 /* Start of conflict section */ -+#define DT_GNU_LIBLIST 0x6ffffef9 /* Library list */ -+#define DT_CONFIG 0x6ffffefa /* Configuration information. */ -+#define DT_DEPAUDIT 0x6ffffefb /* Dependency auditing. */ -+#define DT_AUDIT 0x6ffffefc /* Object auditing. */ -+#define DT_PLTPAD 0x6ffffefd /* PLT padding. */ -+#define DT_MOVETAB 0x6ffffefe /* Move table. */ -+#define DT_SYMINFO 0x6ffffeff /* Syminfo table. */ -+#define DT_ADDRRNGHI 0x6ffffeff -+#define DT_ADDRTAGIDX(tag) (DT_ADDRRNGHI - (tag)) /* Reverse order! */ -+#define DT_ADDRNUM 11 -+ -+/* The versioning entry types. The next are defined as part of the -+ GNU extension. */ -+#define DT_VERSYM 0x6ffffff0 -+ -+#define DT_RELACOUNT 0x6ffffff9 -+#define DT_RELCOUNT 0x6ffffffa -+ -+/* These were chosen by Sun. */ -+#define DT_FLAGS_1 0x6ffffffb /* State flags, see DF_1_* below. */ -+#define DT_VERDEF 0x6ffffffc /* Address of version definition -+ table */ -+#define DT_VERDEFNUM 0x6ffffffd /* Number of version definitions */ -+#define DT_VERNEED 0x6ffffffe /* Address of table with needed -+ versions */ -+#define DT_VERNEEDNUM 0x6fffffff /* Number of needed versions */ -+#define DT_VERSIONTAGIDX(tag) (DT_VERNEEDNUM - (tag)) /* Reverse order! */ -+#define DT_VERSIONTAGNUM 16 -+ -+/* Sun added these machine-independent extensions in the "processor-specific" -+ range. Be compatible. */ -+#define DT_AUXILIARY 0x7ffffffd /* Shared object to load before self */ -+#define DT_FILTER 0x7fffffff /* Shared object to get values from */ -+#define DT_EXTRATAGIDX(tag) ((Elf32_Word)-((Elf32_Sword) (tag) <<1>>1)-1) -+#define DT_EXTRANUM 3 -+ -+/* Values of `d_un.d_val' in the DT_FLAGS entry. */ -+#define DF_ORIGIN 0x00000001 /* Object may use DF_ORIGIN */ -+#define DF_SYMBOLIC 0x00000002 /* Symbol resolutions starts here */ -+#define DF_TEXTREL 0x00000004 /* Object contains text relocations */ -+#define DF_BIND_NOW 0x00000008 /* No lazy binding for this object */ -+#define DF_STATIC_TLS 0x00000010 /* Module uses the static TLS model */ -+ -+/* State flags selectable in the `d_un.d_val' element of the DT_FLAGS_1 -+ entry in the dynamic section. */ -+#define DF_1_NOW 0x00000001 /* Set RTLD_NOW for this object. */ -+#define DF_1_GLOBAL 0x00000002 /* Set RTLD_GLOBAL for this object. */ -+#define DF_1_GROUP 0x00000004 /* Set RTLD_GROUP for this object. */ -+#define DF_1_NODELETE 0x00000008 /* Set RTLD_NODELETE for this object.*/ -+#define DF_1_LOADFLTR 0x00000010 /* Trigger filtee loading at runtime.*/ -+#define DF_1_INITFIRST 0x00000020 /* Set RTLD_INITFIRST for this object*/ -+#define DF_1_NOOPEN 0x00000040 /* Set RTLD_NOOPEN for this object. */ -+#define DF_1_ORIGIN 0x00000080 /* $ORIGIN must be handled. */ -+#define DF_1_DIRECT 0x00000100 /* Direct binding enabled. */ -+#define DF_1_TRANS 0x00000200 -+#define DF_1_INTERPOSE 0x00000400 /* Object is used to interpose. */ -+#define DF_1_NODEFLIB 0x00000800 /* Ignore default lib search path. */ -+#define DF_1_NODUMP 0x00001000 /* Object can't be dldump'ed. */ -+#define DF_1_CONFALT 0x00002000 /* Configuration alternative created.*/ -+#define DF_1_ENDFILTEE 0x00004000 /* Filtee terminates filters search. */ -+#define DF_1_DISPRELDNE 0x00008000 /* Disp reloc applied at build time. */ -+#define DF_1_DISPRELPND 0x00010000 /* Disp reloc applied at run-time. */ -+ -+/* Flags for the feature selection in DT_FEATURE_1. */ -+#define DTF_1_PARINIT 0x00000001 -+#define DTF_1_CONFEXP 0x00000002 -+ -+/* Flags in the DT_POSFLAG_1 entry effecting only the next DT_* entry. */ -+#define DF_P1_LAZYLOAD 0x00000001 /* Lazyload following object. */ -+#define DF_P1_GROUPPERM 0x00000002 /* Symbols from next object are not -+ generally available. */ -+ -+/* Version definition sections. */ -+ -+typedef struct -+{ -+ Elf32_Half vd_version; /* Version revision */ -+ Elf32_Half vd_flags; /* Version information */ -+ Elf32_Half vd_ndx; /* Version Index */ -+ Elf32_Half vd_cnt; /* Number of associated aux entries */ -+ Elf32_Word vd_hash; /* Version name hash value */ -+ Elf32_Word vd_aux; /* Offset in bytes to verdaux array */ -+ Elf32_Word vd_next; /* Offset in bytes to next verdef -+ entry */ -+} Elf32_Verdef; -+ -+typedef struct -+{ -+ Elf64_Half vd_version; /* Version revision */ -+ Elf64_Half vd_flags; /* Version information */ -+ Elf64_Half vd_ndx; /* Version Index */ -+ Elf64_Half vd_cnt; /* Number of associated aux entries */ -+ Elf64_Word vd_hash; /* Version name hash value */ -+ Elf64_Word vd_aux; /* Offset in bytes to verdaux array */ -+ Elf64_Word vd_next; /* Offset in bytes to next verdef -+ entry */ -+} Elf64_Verdef; -+ -+ -+/* Legal values for vd_version (version revision). */ -+#define VER_DEF_NONE 0 /* No version */ -+#define VER_DEF_CURRENT 1 /* Current version */ -+#define VER_DEF_NUM 2 /* Given version number */ -+ -+/* Legal values for vd_flags (version information flags). */ -+#define VER_FLG_BASE 0x1 /* Version definition of file itself */ -+#define VER_FLG_WEAK 0x2 /* Weak version identifier */ -+ -+/* Versym symbol index values. */ -+#define VER_NDX_LOCAL 0 /* Symbol is local. */ -+#define VER_NDX_GLOBAL 1 /* Symbol is global. */ -+#define VER_NDX_LORESERVE 0xff00 /* Beginning of reserved entries. */ -+#define VER_NDX_ELIMINATE 0xff01 /* Symbol is to be eliminated. */ -+ -+/* Auxialiary version information. */ -+ -+typedef struct -+{ -+ Elf32_Word vda_name; /* Version or dependency names */ -+ Elf32_Word vda_next; /* Offset in bytes to next verdaux -+ entry */ -+} Elf32_Verdaux; -+ -+typedef struct -+{ -+ Elf64_Word vda_name; /* Version or dependency names */ -+ Elf64_Word vda_next; /* Offset in bytes to next verdaux -+ entry */ -+} Elf64_Verdaux; -+ -+ -+/* Version dependency section. */ -+ -+typedef struct -+{ -+ Elf32_Half vn_version; /* Version of structure */ -+ Elf32_Half vn_cnt; /* Number of associated aux entries */ -+ Elf32_Word vn_file; /* Offset of filename for this -+ dependency */ -+ Elf32_Word vn_aux; /* Offset in bytes to vernaux array */ -+ Elf32_Word vn_next; /* Offset in bytes to next verneed -+ entry */ -+} Elf32_Verneed; -+ -+typedef struct -+{ -+ Elf64_Half vn_version; /* Version of structure */ -+ Elf64_Half vn_cnt; /* Number of associated aux entries */ -+ Elf64_Word vn_file; /* Offset of filename for this -+ dependency */ -+ Elf64_Word vn_aux; /* Offset in bytes to vernaux array */ -+ Elf64_Word vn_next; /* Offset in bytes to next verneed -+ entry */ -+} Elf64_Verneed; -+ -+ -+/* Legal values for vn_version (version revision). */ -+#define VER_NEED_NONE 0 /* No version */ -+#define VER_NEED_CURRENT 1 /* Current version */ -+#define VER_NEED_NUM 2 /* Given version number */ -+ -+/* Auxiliary needed version information. */ -+ -+typedef struct -+{ -+ Elf32_Word vna_hash; /* Hash value of dependency name */ -+ Elf32_Half vna_flags; /* Dependency specific information */ -+ Elf32_Half vna_other; /* Unused */ -+ Elf32_Word vna_name; /* Dependency name string offset */ -+ Elf32_Word vna_next; /* Offset in bytes to next vernaux -+ entry */ -+} Elf32_Vernaux; -+ -+typedef struct -+{ -+ Elf64_Word vna_hash; /* Hash value of dependency name */ -+ Elf64_Half vna_flags; /* Dependency specific information */ -+ Elf64_Half vna_other; /* Unused */ -+ Elf64_Word vna_name; /* Dependency name string offset */ -+ Elf64_Word vna_next; /* Offset in bytes to next vernaux -+ entry */ -+} Elf64_Vernaux; -+ -+ -+/* Legal values for vna_flags. */ -+#define VER_FLG_WEAK 0x2 /* Weak version identifier */ -+ -+ -+/* Auxiliary vector. */ -+ -+/* This vector is normally only used by the program interpreter. The -+ usual definition in an ABI supplement uses the name auxv_t. The -+ vector is not usually defined in a standard file, but it -+ can't hurt. We rename it to avoid conflicts. The sizes of these -+ types are an arrangement between the exec server and the program -+ interpreter, so we don't fully specify them here. */ -+ -+typedef struct -+{ -+ uint32_t a_type; /* Entry type */ -+ union -+ { -+ uint32_t a_val; /* Integer value */ -+ /* We use to have pointer elements added here. We cannot do that, -+ though, since it does not work when using 32-bit definitions -+ on 64-bit platforms and vice versa. */ -+ } a_un; -+} Elf32_auxv_t; -+ -+typedef struct -+{ -+ uint64_t a_type; /* Entry type */ -+ union -+ { -+ uint64_t a_val; /* Integer value */ -+ /* We use to have pointer elements added here. We cannot do that, -+ though, since it does not work when using 32-bit definitions -+ on 64-bit platforms and vice versa. */ -+ } a_un; -+} Elf64_auxv_t; -+ -+/* Legal values for a_type (entry type). */ -+ -+#define AT_NULL 0 /* End of vector */ -+#define AT_IGNORE 1 /* Entry should be ignored */ -+#define AT_EXECFD 2 /* File descriptor of program */ -+#define AT_PHDR 3 /* Program headers for program */ -+#define AT_PHENT 4 /* Size of program header entry */ -+#define AT_PHNUM 5 /* Number of program headers */ -+#define AT_PAGESZ 6 /* System page size */ -+#define AT_BASE 7 /* Base address of interpreter */ -+#define AT_FLAGS 8 /* Flags */ -+#define AT_ENTRY 9 /* Entry point of program */ -+#define AT_NOTELF 10 /* Program is not ELF */ -+#define AT_UID 11 /* Real uid */ -+#define AT_EUID 12 /* Effective uid */ -+#define AT_GID 13 /* Real gid */ -+#define AT_EGID 14 /* Effective gid */ -+#define AT_CLKTCK 17 /* Frequency of times() */ -+ -+/* Some more special a_type values describing the hardware. */ -+#define AT_PLATFORM 15 /* String identifying platform. */ -+#define AT_HWCAP 16 /* Machine dependent hints about -+ processor capabilities. */ -+ -+/* This entry gives some information about the FPU initialization -+ performed by the kernel. */ -+#define AT_FPUCW 18 /* Used FPU control word. */ -+ -+/* Cache block sizes. */ -+#define AT_DCACHEBSIZE 19 /* Data cache block size. */ -+#define AT_ICACHEBSIZE 20 /* Instruction cache block size. */ -+#define AT_UCACHEBSIZE 21 /* Unified cache block size. */ -+ -+/* A special ignored value for PPC, used by the kernel to control the -+ interpretation of the AUXV. Must be > 16. */ -+#define AT_IGNOREPPC 22 /* Entry should be ignored. */ -+ -+#define AT_SECURE 23 /* Boolean, was exec setuid-like? */ -+ -+#define AT_BASE_PLATFORM 24 /* String identifying real platforms.*/ -+ -+#define AT_RANDOM 25 /* Address of 16 random bytes. */ -+ -+#define AT_EXECFN 31 /* Filename of executable. */ -+ -+/* Pointer to the global system page used for system calls and other -+ nice things. */ -+#define AT_SYSINFO 32 -+#define AT_SYSINFO_EHDR 33 -+ -+/* Shapes of the caches. Bits 0-3 contains associativity; bits 4-7 contains -+ log2 of line size; mask those to get cache size. */ -+#define AT_L1I_CACHESHAPE 34 -+#define AT_L1D_CACHESHAPE 35 -+#define AT_L2_CACHESHAPE 36 -+#define AT_L3_CACHESHAPE 37 -+ -+/* Note section contents. Each entry in the note section begins with -+ a header of a fixed form. */ -+ -+typedef struct -+{ -+ Elf32_Word n_namesz; /* Length of the note's name. */ -+ Elf32_Word n_descsz; /* Length of the note's descriptor. */ -+ Elf32_Word n_type; /* Type of the note. */ -+} Elf32_Nhdr; -+ -+typedef struct -+{ -+ Elf64_Word n_namesz; /* Length of the note's name. */ -+ Elf64_Word n_descsz; /* Length of the note's descriptor. */ -+ Elf64_Word n_type; /* Type of the note. */ -+} Elf64_Nhdr; -+ -+/* Known names of notes. */ -+ -+/* Solaris entries in the note section have this name. */ -+#define ELF_NOTE_SOLARIS "SUNW Solaris" -+ -+/* Note entries for GNU systems have this name. */ -+#define ELF_NOTE_GNU "GNU" -+ -+ -+/* Defined types of notes for Solaris. */ -+ -+/* Value of descriptor (one word) is desired pagesize for the binary. */ -+#define ELF_NOTE_PAGESIZE_HINT 1 -+ -+ -+/* Defined note types for GNU systems. */ -+ -+/* ABI information. The descriptor consists of words: -+ word 0: OS descriptor -+ word 1: major version of the ABI -+ word 2: minor version of the ABI -+ word 3: subminor version of the ABI -+*/ -+#define NT_GNU_ABI_TAG 1 -+#define ELF_NOTE_ABI NT_GNU_ABI_TAG /* Old name. */ -+ -+/* Known OSes. These values can appear in word 0 of an -+ NT_GNU_ABI_TAG note section entry. */ -+#define ELF_NOTE_OS_LINUX 0 -+#define ELF_NOTE_OS_GNU 1 -+#define ELF_NOTE_OS_SOLARIS2 2 -+#define ELF_NOTE_OS_FREEBSD 3 -+ -+/* Synthetic hwcap information. The descriptor begins with two words: -+ word 0: number of entries -+ word 1: bitmask of enabled entries -+ Then follow variable-length entries, one byte followed by a -+ '\0'-terminated hwcap name string. The byte gives the bit -+ number to test if enabled, (1U << bit) & bitmask. */ -+#define NT_GNU_HWCAP 2 -+ -+/* Build ID bits as generated by ld --build-id. -+ The descriptor consists of any nonzero number of bytes. */ -+#define NT_GNU_BUILD_ID 3 -+ -+/* Version note generated by GNU gold containing a version string. */ -+#define NT_GNU_GOLD_VERSION 4 -+ -+ -+/* Move records. */ -+typedef struct -+{ -+ Elf32_Xword m_value; /* Symbol value. */ -+ Elf32_Word m_info; /* Size and index. */ -+ Elf32_Word m_poffset; /* Symbol offset. */ -+ Elf32_Half m_repeat; /* Repeat count. */ -+ Elf32_Half m_stride; /* Stride info. */ -+} Elf32_Move; -+ -+typedef struct -+{ -+ Elf64_Xword m_value; /* Symbol value. */ -+ Elf64_Xword m_info; /* Size and index. */ -+ Elf64_Xword m_poffset; /* Symbol offset. */ -+ Elf64_Half m_repeat; /* Repeat count. */ -+ Elf64_Half m_stride; /* Stride info. */ -+} Elf64_Move; -+ -+/* Macro to construct move records. */ -+#define ELF32_M_SYM(info) ((info) >> 8) -+#define ELF32_M_SIZE(info) ((unsigned char) (info)) -+#define ELF32_M_INFO(sym, size) (((sym) << 8) + (unsigned char) (size)) -+ -+#define ELF64_M_SYM(info) ELF32_M_SYM (info) -+#define ELF64_M_SIZE(info) ELF32_M_SIZE (info) -+#define ELF64_M_INFO(sym, size) ELF32_M_INFO (sym, size) -+ -+ -+/* Motorola 68k specific definitions. */ -+ -+/* Values for Elf32_Ehdr.e_flags. */ -+#define EF_CPU32 0x00810000 -+ -+/* m68k relocs. */ -+ -+#define R_68K_NONE 0 /* No reloc */ -+#define R_68K_32 1 /* Direct 32 bit */ -+#define R_68K_16 2 /* Direct 16 bit */ -+#define R_68K_8 3 /* Direct 8 bit */ -+#define R_68K_PC32 4 /* PC relative 32 bit */ -+#define R_68K_PC16 5 /* PC relative 16 bit */ -+#define R_68K_PC8 6 /* PC relative 8 bit */ -+#define R_68K_GOT32 7 /* 32 bit PC relative GOT entry */ -+#define R_68K_GOT16 8 /* 16 bit PC relative GOT entry */ -+#define R_68K_GOT8 9 /* 8 bit PC relative GOT entry */ -+#define R_68K_GOT32O 10 /* 32 bit GOT offset */ -+#define R_68K_GOT16O 11 /* 16 bit GOT offset */ -+#define R_68K_GOT8O 12 /* 8 bit GOT offset */ -+#define R_68K_PLT32 13 /* 32 bit PC relative PLT address */ -+#define R_68K_PLT16 14 /* 16 bit PC relative PLT address */ -+#define R_68K_PLT8 15 /* 8 bit PC relative PLT address */ -+#define R_68K_PLT32O 16 /* 32 bit PLT offset */ -+#define R_68K_PLT16O 17 /* 16 bit PLT offset */ -+#define R_68K_PLT8O 18 /* 8 bit PLT offset */ -+#define R_68K_COPY 19 /* Copy symbol at runtime */ -+#define R_68K_GLOB_DAT 20 /* Create GOT entry */ -+#define R_68K_JMP_SLOT 21 /* Create PLT entry */ -+#define R_68K_RELATIVE 22 /* Adjust by program base */ -+#define R_68K_TLS_GD32 25 /* 32 bit GOT offset for GD */ -+#define R_68K_TLS_GD16 26 /* 16 bit GOT offset for GD */ -+#define R_68K_TLS_GD8 27 /* 8 bit GOT offset for GD */ -+#define R_68K_TLS_LDM32 28 /* 32 bit GOT offset for LDM */ -+#define R_68K_TLS_LDM16 29 /* 16 bit GOT offset for LDM */ -+#define R_68K_TLS_LDM8 30 /* 8 bit GOT offset for LDM */ -+#define R_68K_TLS_LDO32 31 /* 32 bit module-relative offset */ -+#define R_68K_TLS_LDO16 32 /* 16 bit module-relative offset */ -+#define R_68K_TLS_LDO8 33 /* 8 bit module-relative offset */ -+#define R_68K_TLS_IE32 34 /* 32 bit GOT offset for IE */ -+#define R_68K_TLS_IE16 35 /* 16 bit GOT offset for IE */ -+#define R_68K_TLS_IE8 36 /* 8 bit GOT offset for IE */ -+#define R_68K_TLS_LE32 37 /* 32 bit offset relative to -+ static TLS block */ -+#define R_68K_TLS_LE16 38 /* 16 bit offset relative to -+ static TLS block */ -+#define R_68K_TLS_LE8 39 /* 8 bit offset relative to -+ static TLS block */ -+#define R_68K_TLS_DTPMOD32 40 /* 32 bit module number */ -+#define R_68K_TLS_DTPREL32 41 /* 32 bit module-relative offset */ -+#define R_68K_TLS_TPREL32 42 /* 32 bit TP-relative offset */ -+/* Keep this the last entry. */ -+#define R_68K_NUM 43 -+ -+/* Intel 80386 specific definitions. */ -+ -+/* i386 relocs. */ -+ -+#define R_386_NONE 0 /* No reloc */ -+#define R_386_32 1 /* Direct 32 bit */ -+#define R_386_PC32 2 /* PC relative 32 bit */ -+#define R_386_GOT32 3 /* 32 bit GOT entry */ -+#define R_386_PLT32 4 /* 32 bit PLT address */ -+#define R_386_COPY 5 /* Copy symbol at runtime */ -+#define R_386_GLOB_DAT 6 /* Create GOT entry */ -+#define R_386_JMP_SLOT 7 /* Create PLT entry */ -+#define R_386_RELATIVE 8 /* Adjust by program base */ -+#define R_386_GOTOFF 9 /* 32 bit offset to GOT */ -+#define R_386_GOTPC 10 /* 32 bit PC relative offset to GOT */ -+#define R_386_32PLT 11 -+#define R_386_TLS_TPOFF 14 /* Offset in static TLS block */ -+#define R_386_TLS_IE 15 /* Address of GOT entry for static TLS -+ block offset */ -+#define R_386_TLS_GOTIE 16 /* GOT entry for static TLS block -+ offset */ -+#define R_386_TLS_LE 17 /* Offset relative to static TLS -+ block */ -+#define R_386_TLS_GD 18 /* Direct 32 bit for GNU version of -+ general dynamic thread local data */ -+#define R_386_TLS_LDM 19 /* Direct 32 bit for GNU version of -+ local dynamic thread local data -+ in LE code */ -+#define R_386_16 20 -+#define R_386_PC16 21 -+#define R_386_8 22 -+#define R_386_PC8 23 -+#define R_386_TLS_GD_32 24 /* Direct 32 bit for general dynamic -+ thread local data */ -+#define R_386_TLS_GD_PUSH 25 /* Tag for pushl in GD TLS code */ -+#define R_386_TLS_GD_CALL 26 /* Relocation for call to -+ __tls_get_addr() */ -+#define R_386_TLS_GD_POP 27 /* Tag for popl in GD TLS code */ -+#define R_386_TLS_LDM_32 28 /* Direct 32 bit for local dynamic -+ thread local data in LE code */ -+#define R_386_TLS_LDM_PUSH 29 /* Tag for pushl in LDM TLS code */ -+#define R_386_TLS_LDM_CALL 30 /* Relocation for call to -+ __tls_get_addr() in LDM code */ -+#define R_386_TLS_LDM_POP 31 /* Tag for popl in LDM TLS code */ -+#define R_386_TLS_LDO_32 32 /* Offset relative to TLS block */ -+#define R_386_TLS_IE_32 33 /* GOT entry for negated static TLS -+ block offset */ -+#define R_386_TLS_LE_32 34 /* Negated offset relative to static -+ TLS block */ -+#define R_386_TLS_DTPMOD32 35 /* ID of module containing symbol */ -+#define R_386_TLS_DTPOFF32 36 /* Offset in TLS block */ -+#define R_386_TLS_TPOFF32 37 /* Negated offset in static TLS block */ -+/* 38? */ -+#define R_386_TLS_GOTDESC 39 /* GOT offset for TLS descriptor. */ -+#define R_386_TLS_DESC_CALL 40 /* Marker of call through TLS -+ descriptor for -+ relaxation. */ -+#define R_386_TLS_DESC 41 /* TLS descriptor containing -+ pointer to code and to -+ argument, returning the TLS -+ offset for the symbol. */ -+#define R_386_IRELATIVE 42 /* Adjust indirectly by program base */ -+/* Keep this the last entry. */ -+#define R_386_NUM 43 -+ -+/* SUN SPARC specific definitions. */ -+ -+/* Legal values for ST_TYPE subfield of st_info (symbol type). */ -+ -+#define STT_SPARC_REGISTER 13 /* Global register reserved to app. */ -+ -+/* Values for Elf64_Ehdr.e_flags. */ -+ -+#define EF_SPARCV9_MM 3 -+#define EF_SPARCV9_TSO 0 -+#define EF_SPARCV9_PSO 1 -+#define EF_SPARCV9_RMO 2 -+#define EF_SPARC_LEDATA 0x800000 /* little endian data */ -+#define EF_SPARC_EXT_MASK 0xFFFF00 -+#define EF_SPARC_32PLUS 0x000100 /* generic V8+ features */ -+#define EF_SPARC_SUN_US1 0x000200 /* Sun UltraSPARC1 extensions */ -+#define EF_SPARC_HAL_R1 0x000400 /* HAL R1 extensions */ -+#define EF_SPARC_SUN_US3 0x000800 /* Sun UltraSPARCIII extensions */ -+ -+/* SPARC relocs. */ -+ -+#define R_SPARC_NONE 0 /* No reloc */ -+#define R_SPARC_8 1 /* Direct 8 bit */ -+#define R_SPARC_16 2 /* Direct 16 bit */ -+#define R_SPARC_32 3 /* Direct 32 bit */ -+#define R_SPARC_DISP8 4 /* PC relative 8 bit */ -+#define R_SPARC_DISP16 5 /* PC relative 16 bit */ -+#define R_SPARC_DISP32 6 /* PC relative 32 bit */ -+#define R_SPARC_WDISP30 7 /* PC relative 30 bit shifted */ -+#define R_SPARC_WDISP22 8 /* PC relative 22 bit shifted */ -+#define R_SPARC_HI22 9 /* High 22 bit */ -+#define R_SPARC_22 10 /* Direct 22 bit */ -+#define R_SPARC_13 11 /* Direct 13 bit */ -+#define R_SPARC_LO10 12 /* Truncated 10 bit */ -+#define R_SPARC_GOT10 13 /* Truncated 10 bit GOT entry */ -+#define R_SPARC_GOT13 14 /* 13 bit GOT entry */ -+#define R_SPARC_GOT22 15 /* 22 bit GOT entry shifted */ -+#define R_SPARC_PC10 16 /* PC relative 10 bit truncated */ -+#define R_SPARC_PC22 17 /* PC relative 22 bit shifted */ -+#define R_SPARC_WPLT30 18 /* 30 bit PC relative PLT address */ -+#define R_SPARC_COPY 19 /* Copy symbol at runtime */ -+#define R_SPARC_GLOB_DAT 20 /* Create GOT entry */ -+#define R_SPARC_JMP_SLOT 21 /* Create PLT entry */ -+#define R_SPARC_RELATIVE 22 /* Adjust by program base */ -+#define R_SPARC_UA32 23 /* Direct 32 bit unaligned */ -+ -+/* Additional Sparc64 relocs. */ -+ -+#define R_SPARC_PLT32 24 /* Direct 32 bit ref to PLT entry */ -+#define R_SPARC_HIPLT22 25 /* High 22 bit PLT entry */ -+#define R_SPARC_LOPLT10 26 /* Truncated 10 bit PLT entry */ -+#define R_SPARC_PCPLT32 27 /* PC rel 32 bit ref to PLT entry */ -+#define R_SPARC_PCPLT22 28 /* PC rel high 22 bit PLT entry */ -+#define R_SPARC_PCPLT10 29 /* PC rel trunc 10 bit PLT entry */ -+#define R_SPARC_10 30 /* Direct 10 bit */ -+#define R_SPARC_11 31 /* Direct 11 bit */ -+#define R_SPARC_64 32 /* Direct 64 bit */ -+#define R_SPARC_OLO10 33 /* 10bit with secondary 13bit addend */ -+#define R_SPARC_HH22 34 /* Top 22 bits of direct 64 bit */ -+#define R_SPARC_HM10 35 /* High middle 10 bits of ... */ -+#define R_SPARC_LM22 36 /* Low middle 22 bits of ... */ -+#define R_SPARC_PC_HH22 37 /* Top 22 bits of pc rel 64 bit */ -+#define R_SPARC_PC_HM10 38 /* High middle 10 bit of ... */ -+#define R_SPARC_PC_LM22 39 /* Low miggle 22 bits of ... */ -+#define R_SPARC_WDISP16 40 /* PC relative 16 bit shifted */ -+#define R_SPARC_WDISP19 41 /* PC relative 19 bit shifted */ -+#define R_SPARC_GLOB_JMP 42 /* was part of v9 ABI but was removed */ -+#define R_SPARC_7 43 /* Direct 7 bit */ -+#define R_SPARC_5 44 /* Direct 5 bit */ -+#define R_SPARC_6 45 /* Direct 6 bit */ -+#define R_SPARC_DISP64 46 /* PC relative 64 bit */ -+#define R_SPARC_PLT64 47 /* Direct 64 bit ref to PLT entry */ -+#define R_SPARC_HIX22 48 /* High 22 bit complemented */ -+#define R_SPARC_LOX10 49 /* Truncated 11 bit complemented */ -+#define R_SPARC_H44 50 /* Direct high 12 of 44 bit */ -+#define R_SPARC_M44 51 /* Direct mid 22 of 44 bit */ -+#define R_SPARC_L44 52 /* Direct low 10 of 44 bit */ -+#define R_SPARC_REGISTER 53 /* Global register usage */ -+#define R_SPARC_UA64 54 /* Direct 64 bit unaligned */ -+#define R_SPARC_UA16 55 /* Direct 16 bit unaligned */ -+#define R_SPARC_TLS_GD_HI22 56 -+#define R_SPARC_TLS_GD_LO10 57 -+#define R_SPARC_TLS_GD_ADD 58 -+#define R_SPARC_TLS_GD_CALL 59 -+#define R_SPARC_TLS_LDM_HI22 60 -+#define R_SPARC_TLS_LDM_LO10 61 -+#define R_SPARC_TLS_LDM_ADD 62 -+#define R_SPARC_TLS_LDM_CALL 63 -+#define R_SPARC_TLS_LDO_HIX22 64 -+#define R_SPARC_TLS_LDO_LOX10 65 -+#define R_SPARC_TLS_LDO_ADD 66 -+#define R_SPARC_TLS_IE_HI22 67 -+#define R_SPARC_TLS_IE_LO10 68 -+#define R_SPARC_TLS_IE_LD 69 -+#define R_SPARC_TLS_IE_LDX 70 -+#define R_SPARC_TLS_IE_ADD 71 -+#define R_SPARC_TLS_LE_HIX22 72 -+#define R_SPARC_TLS_LE_LOX10 73 -+#define R_SPARC_TLS_DTPMOD32 74 -+#define R_SPARC_TLS_DTPMOD64 75 -+#define R_SPARC_TLS_DTPOFF32 76 -+#define R_SPARC_TLS_DTPOFF64 77 -+#define R_SPARC_TLS_TPOFF32 78 -+#define R_SPARC_TLS_TPOFF64 79 -+#define R_SPARC_GOTDATA_HIX22 80 -+#define R_SPARC_GOTDATA_LOX10 81 -+#define R_SPARC_GOTDATA_OP_HIX22 82 -+#define R_SPARC_GOTDATA_OP_LOX10 83 -+#define R_SPARC_GOTDATA_OP 84 -+#define R_SPARC_H34 85 -+#define R_SPARC_SIZE32 86 -+#define R_SPARC_SIZE64 87 -+#define R_SPARC_WDISP10 88 -+#define R_SPARC_JMP_IREL 248 -+#define R_SPARC_IRELATIVE 249 -+#define R_SPARC_GNU_VTINHERIT 250 -+#define R_SPARC_GNU_VTENTRY 251 -+#define R_SPARC_REV32 252 -+/* Keep this the last entry. */ -+#define R_SPARC_NUM 253 -+ -+/* For Sparc64, legal values for d_tag of Elf64_Dyn. */ -+ -+#define DT_SPARC_REGISTER 0x70000001 -+#define DT_SPARC_NUM 2 -+ -+/* MIPS R3000 specific definitions. */ -+ -+/* Legal values for e_flags field of Elf32_Ehdr. */ -+ -+#define EF_MIPS_NOREORDER 1 /* A .noreorder directive was used */ -+#define EF_MIPS_PIC 2 /* Contains PIC code */ -+#define EF_MIPS_CPIC 4 /* Uses PIC calling sequence */ -+#define EF_MIPS_XGOT 8 -+#define EF_MIPS_64BIT_WHIRL 16 -+#define EF_MIPS_ABI2 32 -+#define EF_MIPS_ABI_ON32 64 -+#define EF_MIPS_ARCH 0xf0000000 /* MIPS architecture level */ -+ -+/* Legal values for MIPS architecture level. */ -+ -+#define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code. */ -+#define EF_MIPS_ARCH_2 0x10000000 /* -mips2 code. */ -+#define EF_MIPS_ARCH_3 0x20000000 /* -mips3 code. */ -+#define EF_MIPS_ARCH_4 0x30000000 /* -mips4 code. */ -+#define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code. */ -+#define EF_MIPS_ARCH_32 0x60000000 /* MIPS32 code. */ -+#define EF_MIPS_ARCH_64 0x70000000 /* MIPS64 code. */ -+ -+/* The following are non-official names and should not be used. */ -+ -+#define E_MIPS_ARCH_1 0x00000000 /* -mips1 code. */ -+#define E_MIPS_ARCH_2 0x10000000 /* -mips2 code. */ -+#define E_MIPS_ARCH_3 0x20000000 /* -mips3 code. */ -+#define E_MIPS_ARCH_4 0x30000000 /* -mips4 code. */ -+#define E_MIPS_ARCH_5 0x40000000 /* -mips5 code. */ -+#define E_MIPS_ARCH_32 0x60000000 /* MIPS32 code. */ -+#define E_MIPS_ARCH_64 0x70000000 /* MIPS64 code. */ -+ -+/* Special section indices. */ -+ -+#define SHN_MIPS_ACOMMON 0xff00 /* Allocated common symbols */ -+#define SHN_MIPS_TEXT 0xff01 /* Allocated test symbols. */ -+#define SHN_MIPS_DATA 0xff02 /* Allocated data symbols. */ -+#define SHN_MIPS_SCOMMON 0xff03 /* Small common symbols */ -+#define SHN_MIPS_SUNDEFINED 0xff04 /* Small undefined symbols */ -+ -+/* Legal values for sh_type field of Elf32_Shdr. */ -+ -+#define SHT_MIPS_LIBLIST 0x70000000 /* Shared objects used in link */ -+#define SHT_MIPS_MSYM 0x70000001 -+#define SHT_MIPS_CONFLICT 0x70000002 /* Conflicting symbols */ -+#define SHT_MIPS_GPTAB 0x70000003 /* Global data area sizes */ -+#define SHT_MIPS_UCODE 0x70000004 /* Reserved for SGI/MIPS compilers */ -+#define SHT_MIPS_DEBUG 0x70000005 /* MIPS ECOFF debugging information*/ -+#define SHT_MIPS_REGINFO 0x70000006 /* Register usage information */ -+#define SHT_MIPS_PACKAGE 0x70000007 -+#define SHT_MIPS_PACKSYM 0x70000008 -+#define SHT_MIPS_RELD 0x70000009 -+#define SHT_MIPS_IFACE 0x7000000b -+#define SHT_MIPS_CONTENT 0x7000000c -+#define SHT_MIPS_OPTIONS 0x7000000d /* Miscellaneous options. */ -+#define SHT_MIPS_SHDR 0x70000010 -+#define SHT_MIPS_FDESC 0x70000011 -+#define SHT_MIPS_EXTSYM 0x70000012 -+#define SHT_MIPS_DENSE 0x70000013 -+#define SHT_MIPS_PDESC 0x70000014 -+#define SHT_MIPS_LOCSYM 0x70000015 -+#define SHT_MIPS_AUXSYM 0x70000016 -+#define SHT_MIPS_OPTSYM 0x70000017 -+#define SHT_MIPS_LOCSTR 0x70000018 -+#define SHT_MIPS_LINE 0x70000019 -+#define SHT_MIPS_RFDESC 0x7000001a -+#define SHT_MIPS_DELTASYM 0x7000001b -+#define SHT_MIPS_DELTAINST 0x7000001c -+#define SHT_MIPS_DELTACLASS 0x7000001d -+#define SHT_MIPS_DWARF 0x7000001e /* DWARF debugging information. */ -+#define SHT_MIPS_DELTADECL 0x7000001f -+#define SHT_MIPS_SYMBOL_LIB 0x70000020 -+#define SHT_MIPS_EVENTS 0x70000021 /* Event section. */ -+#define SHT_MIPS_TRANSLATE 0x70000022 -+#define SHT_MIPS_PIXIE 0x70000023 -+#define SHT_MIPS_XLATE 0x70000024 -+#define SHT_MIPS_XLATE_DEBUG 0x70000025 -+#define SHT_MIPS_WHIRL 0x70000026 -+#define SHT_MIPS_EH_REGION 0x70000027 -+#define SHT_MIPS_XLATE_OLD 0x70000028 -+#define SHT_MIPS_PDR_EXCEPTION 0x70000029 -+ -+/* Legal values for sh_flags field of Elf32_Shdr. */ -+ -+#define SHF_MIPS_GPREL 0x10000000 /* Must be part of global data area */ -+#define SHF_MIPS_MERGE 0x20000000 -+#define SHF_MIPS_ADDR 0x40000000 -+#define SHF_MIPS_STRINGS 0x80000000 -+#define SHF_MIPS_NOSTRIP 0x08000000 -+#define SHF_MIPS_LOCAL 0x04000000 -+#define SHF_MIPS_NAMES 0x02000000 -+#define SHF_MIPS_NODUPE 0x01000000 -+ -+ -+/* Symbol tables. */ -+ -+/* MIPS specific values for `st_other'. */ -+#define STO_MIPS_DEFAULT 0x0 -+#define STO_MIPS_INTERNAL 0x1 -+#define STO_MIPS_HIDDEN 0x2 -+#define STO_MIPS_PROTECTED 0x3 -+#define STO_MIPS_PLT 0x8 -+#define STO_MIPS_SC_ALIGN_UNUSED 0xff -+ -+/* MIPS specific values for `st_info'. */ -+#define STB_MIPS_SPLIT_COMMON 13 -+ -+/* Entries found in sections of type SHT_MIPS_GPTAB. */ -+ -+typedef union -+{ -+ struct -+ { -+ Elf32_Word gt_current_g_value; /* -G value used for compilation */ -+ Elf32_Word gt_unused; /* Not used */ -+ } gt_header; /* First entry in section */ -+ struct -+ { -+ Elf32_Word gt_g_value; /* If this value were used for -G */ -+ Elf32_Word gt_bytes; /* This many bytes would be used */ -+ } gt_entry; /* Subsequent entries in section */ -+} Elf32_gptab; -+ -+/* Entry found in sections of type SHT_MIPS_REGINFO. */ -+ -+typedef struct -+{ -+ Elf32_Word ri_gprmask; /* General registers used */ -+ Elf32_Word ri_cprmask[4]; /* Coprocessor registers used */ -+ Elf32_Sword ri_gp_value; /* $gp register value */ -+} Elf32_RegInfo; -+ -+/* Entries found in sections of type SHT_MIPS_OPTIONS. */ -+ -+typedef struct -+{ -+ unsigned char kind; /* Determines interpretation of the -+ variable part of descriptor. */ -+ unsigned char size; /* Size of descriptor, including header. */ -+ Elf32_Section section; /* Section header index of section affected, -+ 0 for global options. */ -+ Elf32_Word info; /* Kind-specific information. */ -+} Elf_Options; -+ -+/* Values for `kind' field in Elf_Options. */ -+ -+#define ODK_NULL 0 /* Undefined. */ -+#define ODK_REGINFO 1 /* Register usage information. */ -+#define ODK_EXCEPTIONS 2 /* Exception processing options. */ -+#define ODK_PAD 3 /* Section padding options. */ -+#define ODK_HWPATCH 4 /* Hardware workarounds performed */ -+#define ODK_FILL 5 /* record the fill value used by the linker. */ -+#define ODK_TAGS 6 /* reserve space for desktop tools to write. */ -+#define ODK_HWAND 7 /* HW workarounds. 'AND' bits when merging. */ -+#define ODK_HWOR 8 /* HW workarounds. 'OR' bits when merging. */ -+ -+/* Values for `info' in Elf_Options for ODK_EXCEPTIONS entries. */ -+ -+#define OEX_FPU_MIN 0x1f /* FPE's which MUST be enabled. */ -+#define OEX_FPU_MAX 0x1f00 /* FPE's which MAY be enabled. */ -+#define OEX_PAGE0 0x10000 /* page zero must be mapped. */ -+#define OEX_SMM 0x20000 /* Force sequential memory mode? */ -+#define OEX_FPDBUG 0x40000 /* Force floating point debug mode? */ -+#define OEX_PRECISEFP OEX_FPDBUG -+#define OEX_DISMISS 0x80000 /* Dismiss invalid address faults? */ -+ -+#define OEX_FPU_INVAL 0x10 -+#define OEX_FPU_DIV0 0x08 -+#define OEX_FPU_OFLO 0x04 -+#define OEX_FPU_UFLO 0x02 -+#define OEX_FPU_INEX 0x01 -+ -+/* Masks for `info' in Elf_Options for an ODK_HWPATCH entry. */ -+ -+#define OHW_R4KEOP 0x1 /* R4000 end-of-page patch. */ -+#define OHW_R8KPFETCH 0x2 /* may need R8000 prefetch patch. */ -+#define OHW_R5KEOP 0x4 /* R5000 end-of-page patch. */ -+#define OHW_R5KCVTL 0x8 /* R5000 cvt.[ds].l bug. clean=1. */ -+ -+#define OPAD_PREFIX 0x1 -+#define OPAD_POSTFIX 0x2 -+#define OPAD_SYMBOL 0x4 -+ -+/* Entry found in `.options' section. */ -+ -+typedef struct -+{ -+ Elf32_Word hwp_flags1; /* Extra flags. */ -+ Elf32_Word hwp_flags2; /* Extra flags. */ -+} Elf_Options_Hw; -+ -+/* Masks for `info' in ElfOptions for ODK_HWAND and ODK_HWOR entries. */ -+ -+#define OHWA0_R4KEOP_CHECKED 0x00000001 -+#define OHWA1_R4KEOP_CLEAN 0x00000002 -+ -+/* MIPS relocs. */ -+ -+#define R_MIPS_NONE 0 /* No reloc */ -+#define R_MIPS_16 1 /* Direct 16 bit */ -+#define R_MIPS_32 2 /* Direct 32 bit */ -+#define R_MIPS_REL32 3 /* PC relative 32 bit */ -+#define R_MIPS_26 4 /* Direct 26 bit shifted */ -+#define R_MIPS_HI16 5 /* High 16 bit */ -+#define R_MIPS_LO16 6 /* Low 16 bit */ -+#define R_MIPS_GPREL16 7 /* GP relative 16 bit */ -+#define R_MIPS_LITERAL 8 /* 16 bit literal entry */ -+#define R_MIPS_GOT16 9 /* 16 bit GOT entry */ -+#define R_MIPS_PC16 10 /* PC relative 16 bit */ -+#define R_MIPS_CALL16 11 /* 16 bit GOT entry for function */ -+#define R_MIPS_GPREL32 12 /* GP relative 32 bit */ -+ -+#define R_MIPS_SHIFT5 16 -+#define R_MIPS_SHIFT6 17 -+#define R_MIPS_64 18 -+#define R_MIPS_GOT_DISP 19 -+#define R_MIPS_GOT_PAGE 20 -+#define R_MIPS_GOT_OFST 21 -+#define R_MIPS_GOT_HI16 22 -+#define R_MIPS_GOT_LO16 23 -+#define R_MIPS_SUB 24 -+#define R_MIPS_INSERT_A 25 -+#define R_MIPS_INSERT_B 26 -+#define R_MIPS_DELETE 27 -+#define R_MIPS_HIGHER 28 -+#define R_MIPS_HIGHEST 29 -+#define R_MIPS_CALL_HI16 30 -+#define R_MIPS_CALL_LO16 31 -+#define R_MIPS_SCN_DISP 32 -+#define R_MIPS_REL16 33 -+#define R_MIPS_ADD_IMMEDIATE 34 -+#define R_MIPS_PJUMP 35 -+#define R_MIPS_RELGOT 36 -+#define R_MIPS_JALR 37 -+#define R_MIPS_TLS_DTPMOD32 38 /* Module number 32 bit */ -+#define R_MIPS_TLS_DTPREL32 39 /* Module-relative offset 32 bit */ -+#define R_MIPS_TLS_DTPMOD64 40 /* Module number 64 bit */ -+#define R_MIPS_TLS_DTPREL64 41 /* Module-relative offset 64 bit */ -+#define R_MIPS_TLS_GD 42 /* 16 bit GOT offset for GD */ -+#define R_MIPS_TLS_LDM 43 /* 16 bit GOT offset for LDM */ -+#define R_MIPS_TLS_DTPREL_HI16 44 /* Module-relative offset, high 16 bits */ -+#define R_MIPS_TLS_DTPREL_LO16 45 /* Module-relative offset, low 16 bits */ -+#define R_MIPS_TLS_GOTTPREL 46 /* 16 bit GOT offset for IE */ -+#define R_MIPS_TLS_TPREL32 47 /* TP-relative offset, 32 bit */ -+#define R_MIPS_TLS_TPREL64 48 /* TP-relative offset, 64 bit */ -+#define R_MIPS_TLS_TPREL_HI16 49 /* TP-relative offset, high 16 bits */ -+#define R_MIPS_TLS_TPREL_LO16 50 /* TP-relative offset, low 16 bits */ -+#define R_MIPS_GLOB_DAT 51 -+#define R_MIPS_COPY 126 -+#define R_MIPS_JUMP_SLOT 127 -+/* Keep this the last entry. */ -+#define R_MIPS_NUM 128 -+ -+/* Legal values for p_type field of Elf32_Phdr. */ -+ -+#define PT_MIPS_REGINFO 0x70000000 /* Register usage information */ -+#define PT_MIPS_RTPROC 0x70000001 /* Runtime procedure table. */ -+#define PT_MIPS_OPTIONS 0x70000002 -+ -+/* Special program header types. */ -+ -+#define PF_MIPS_LOCAL 0x10000000 -+ -+/* Legal values for d_tag field of Elf32_Dyn. */ -+ -+#define DT_MIPS_RLD_VERSION 0x70000001 /* Runtime linker interface version */ -+#define DT_MIPS_TIME_STAMP 0x70000002 /* Timestamp */ -+#define DT_MIPS_ICHECKSUM 0x70000003 /* Checksum */ -+#define DT_MIPS_IVERSION 0x70000004 /* Version string (string tbl index) */ -+#define DT_MIPS_FLAGS 0x70000005 /* Flags */ -+#define DT_MIPS_BASE_ADDRESS 0x70000006 /* Base address */ -+#define DT_MIPS_MSYM 0x70000007 -+#define DT_MIPS_CONFLICT 0x70000008 /* Address of CONFLICT section */ -+#define DT_MIPS_LIBLIST 0x70000009 /* Address of LIBLIST section */ -+#define DT_MIPS_LOCAL_GOTNO 0x7000000a /* Number of local GOT entries */ -+#define DT_MIPS_CONFLICTNO 0x7000000b /* Number of CONFLICT entries */ -+#define DT_MIPS_LIBLISTNO 0x70000010 /* Number of LIBLIST entries */ -+#define DT_MIPS_SYMTABNO 0x70000011 /* Number of DYNSYM entries */ -+#define DT_MIPS_UNREFEXTNO 0x70000012 /* First external DYNSYM */ -+#define DT_MIPS_GOTSYM 0x70000013 /* First GOT entry in DYNSYM */ -+#define DT_MIPS_HIPAGENO 0x70000014 /* Number of GOT page table entries */ -+#define DT_MIPS_RLD_MAP 0x70000016 /* Address of run time loader map. */ -+#define DT_MIPS_DELTA_CLASS 0x70000017 /* Delta C++ class definition. */ -+#define DT_MIPS_DELTA_CLASS_NO 0x70000018 /* Number of entries in -+ DT_MIPS_DELTA_CLASS. */ -+#define DT_MIPS_DELTA_INSTANCE 0x70000019 /* Delta C++ class instances. */ -+#define DT_MIPS_DELTA_INSTANCE_NO 0x7000001a /* Number of entries in -+ DT_MIPS_DELTA_INSTANCE. */ -+#define DT_MIPS_DELTA_RELOC 0x7000001b /* Delta relocations. */ -+#define DT_MIPS_DELTA_RELOC_NO 0x7000001c /* Number of entries in -+ DT_MIPS_DELTA_RELOC. */ -+#define DT_MIPS_DELTA_SYM 0x7000001d /* Delta symbols that Delta -+ relocations refer to. */ -+#define DT_MIPS_DELTA_SYM_NO 0x7000001e /* Number of entries in -+ DT_MIPS_DELTA_SYM. */ -+#define DT_MIPS_DELTA_CLASSSYM 0x70000020 /* Delta symbols that hold the -+ class declaration. */ -+#define DT_MIPS_DELTA_CLASSSYM_NO 0x70000021 /* Number of entries in -+ DT_MIPS_DELTA_CLASSSYM. */ -+#define DT_MIPS_CXX_FLAGS 0x70000022 /* Flags indicating for C++ flavor. */ -+#define DT_MIPS_PIXIE_INIT 0x70000023 -+#define DT_MIPS_SYMBOL_LIB 0x70000024 -+#define DT_MIPS_LOCALPAGE_GOTIDX 0x70000025 -+#define DT_MIPS_LOCAL_GOTIDX 0x70000026 -+#define DT_MIPS_HIDDEN_GOTIDX 0x70000027 -+#define DT_MIPS_PROTECTED_GOTIDX 0x70000028 -+#define DT_MIPS_OPTIONS 0x70000029 /* Address of .options. */ -+#define DT_MIPS_INTERFACE 0x7000002a /* Address of .interface. */ -+#define DT_MIPS_DYNSTR_ALIGN 0x7000002b -+#define DT_MIPS_INTERFACE_SIZE 0x7000002c /* Size of the .interface section. */ -+#define DT_MIPS_RLD_TEXT_RESOLVE_ADDR 0x7000002d /* Address of rld_text_rsolve -+ function stored in GOT. */ -+#define DT_MIPS_PERF_SUFFIX 0x7000002e /* Default suffix of dso to be added -+ by rld on dlopen() calls. */ -+#define DT_MIPS_COMPACT_SIZE 0x7000002f /* (O32)Size of compact rel section. */ -+#define DT_MIPS_GP_VALUE 0x70000030 /* GP value for aux GOTs. */ -+#define DT_MIPS_AUX_DYNAMIC 0x70000031 /* Address of aux .dynamic. */ -+/* The address of .got.plt in an executable using the new non-PIC ABI. */ -+#define DT_MIPS_PLTGOT 0x70000032 -+/* The base of the PLT in an executable using the new non-PIC ABI if that -+ PLT is writable. For a non-writable PLT, this is omitted or has a zero -+ value. */ -+#define DT_MIPS_RWPLT 0x70000034 -+#define DT_MIPS_NUM 0x35 -+ -+/* Legal values for DT_MIPS_FLAGS Elf32_Dyn entry. */ -+ -+#define RHF_NONE 0 /* No flags */ -+#define RHF_QUICKSTART (1 << 0) /* Use quickstart */ -+#define RHF_NOTPOT (1 << 1) /* Hash size not power of 2 */ -+#define RHF_NO_LIBRARY_REPLACEMENT (1 << 2) /* Ignore LD_LIBRARY_PATH */ -+#define RHF_NO_MOVE (1 << 3) -+#define RHF_SGI_ONLY (1 << 4) -+#define RHF_GUARANTEE_INIT (1 << 5) -+#define RHF_DELTA_C_PLUS_PLUS (1 << 6) -+#define RHF_GUARANTEE_START_INIT (1 << 7) -+#define RHF_PIXIE (1 << 8) -+#define RHF_DEFAULT_DELAY_LOAD (1 << 9) -+#define RHF_REQUICKSTART (1 << 10) -+#define RHF_REQUICKSTARTED (1 << 11) -+#define RHF_CORD (1 << 12) -+#define RHF_NO_UNRES_UNDEF (1 << 13) -+#define RHF_RLD_ORDER_SAFE (1 << 14) -+ -+/* Entries found in sections of type SHT_MIPS_LIBLIST. */ -+ -+typedef struct -+{ -+ Elf32_Word l_name; /* Name (string table index) */ -+ Elf32_Word l_time_stamp; /* Timestamp */ -+ Elf32_Word l_checksum; /* Checksum */ -+ Elf32_Word l_version; /* Interface version */ -+ Elf32_Word l_flags; /* Flags */ -+} Elf32_Lib; -+ -+typedef struct -+{ -+ Elf64_Word l_name; /* Name (string table index) */ -+ Elf64_Word l_time_stamp; /* Timestamp */ -+ Elf64_Word l_checksum; /* Checksum */ -+ Elf64_Word l_version; /* Interface version */ -+ Elf64_Word l_flags; /* Flags */ -+} Elf64_Lib; -+ -+ -+/* Legal values for l_flags. */ -+ -+#define LL_NONE 0 -+#define LL_EXACT_MATCH (1 << 0) /* Require exact match */ -+#define LL_IGNORE_INT_VER (1 << 1) /* Ignore interface version */ -+#define LL_REQUIRE_MINOR (1 << 2) -+#define LL_EXPORTS (1 << 3) -+#define LL_DELAY_LOAD (1 << 4) -+#define LL_DELTA (1 << 5) -+ -+/* Entries found in sections of type SHT_MIPS_CONFLICT. */ -+ -+typedef Elf32_Addr Elf32_Conflict; -+ -+ -+/* HPPA specific definitions. */ -+ -+/* Legal values for e_flags field of Elf32_Ehdr. */ -+ -+#define EF_PARISC_TRAPNIL 0x00010000 /* Trap nil pointer dereference. */ -+#define EF_PARISC_EXT 0x00020000 /* Program uses arch. extensions. */ -+#define EF_PARISC_LSB 0x00040000 /* Program expects little endian. */ -+#define EF_PARISC_WIDE 0x00080000 /* Program expects wide mode. */ -+#define EF_PARISC_NO_KABP 0x00100000 /* No kernel assisted branch -+ prediction. */ -+#define EF_PARISC_LAZYSWAP 0x00400000 /* Allow lazy swapping. */ -+#define EF_PARISC_ARCH 0x0000ffff /* Architecture version. */ -+ -+/* Defined values for `e_flags & EF_PARISC_ARCH' are: */ -+ -+#define EFA_PARISC_1_0 0x020b /* PA-RISC 1.0 big-endian. */ -+#define EFA_PARISC_1_1 0x0210 /* PA-RISC 1.1 big-endian. */ -+#define EFA_PARISC_2_0 0x0214 /* PA-RISC 2.0 big-endian. */ -+ -+/* Additional section indeces. */ -+ -+#define SHN_PARISC_ANSI_COMMON 0xff00 /* Section for tenatively declared -+ symbols in ANSI C. */ -+#define SHN_PARISC_HUGE_COMMON 0xff01 /* Common blocks in huge model. */ -+ -+/* Legal values for sh_type field of Elf32_Shdr. */ -+ -+#define SHT_PARISC_EXT 0x70000000 /* Contains product specific ext. */ -+#define SHT_PARISC_UNWIND 0x70000001 /* Unwind information. */ -+#define SHT_PARISC_DOC 0x70000002 /* Debug info for optimized code. */ -+ -+/* Legal values for sh_flags field of Elf32_Shdr. */ -+ -+#define SHF_PARISC_SHORT 0x20000000 /* Section with short addressing. */ -+#define SHF_PARISC_HUGE 0x40000000 /* Section far from gp. */ -+#define SHF_PARISC_SBP 0x80000000 /* Static branch prediction code. */ -+ -+/* Legal values for ST_TYPE subfield of st_info (symbol type). */ -+ -+#define STT_PARISC_MILLICODE 13 /* Millicode function entry point. */ -+ -+#define STT_HP_OPAQUE (STT_LOOS + 0x1) -+#define STT_HP_STUB (STT_LOOS + 0x2) -+ -+/* HPPA relocs. */ -+ -+#define R_PARISC_NONE 0 /* No reloc. */ -+#define R_PARISC_DIR32 1 /* Direct 32-bit reference. */ -+#define R_PARISC_DIR21L 2 /* Left 21 bits of eff. address. */ -+#define R_PARISC_DIR17R 3 /* Right 17 bits of eff. address. */ -+#define R_PARISC_DIR17F 4 /* 17 bits of eff. address. */ -+#define R_PARISC_DIR14R 6 /* Right 14 bits of eff. address. */ -+#define R_PARISC_PCREL32 9 /* 32-bit rel. address. */ -+#define R_PARISC_PCREL21L 10 /* Left 21 bits of rel. address. */ -+#define R_PARISC_PCREL17R 11 /* Right 17 bits of rel. address. */ -+#define R_PARISC_PCREL17F 12 /* 17 bits of rel. address. */ -+#define R_PARISC_PCREL14R 14 /* Right 14 bits of rel. address. */ -+#define R_PARISC_DPREL21L 18 /* Left 21 bits of rel. address. */ -+#define R_PARISC_DPREL14R 22 /* Right 14 bits of rel. address. */ -+#define R_PARISC_GPREL21L 26 /* GP-relative, left 21 bits. */ -+#define R_PARISC_GPREL14R 30 /* GP-relative, right 14 bits. */ -+#define R_PARISC_LTOFF21L 34 /* LT-relative, left 21 bits. */ -+#define R_PARISC_LTOFF14R 38 /* LT-relative, right 14 bits. */ -+#define R_PARISC_SECREL32 41 /* 32 bits section rel. address. */ -+#define R_PARISC_SEGBASE 48 /* No relocation, set segment base. */ -+#define R_PARISC_SEGREL32 49 /* 32 bits segment rel. address. */ -+#define R_PARISC_PLTOFF21L 50 /* PLT rel. address, left 21 bits. */ -+#define R_PARISC_PLTOFF14R 54 /* PLT rel. address, right 14 bits. */ -+#define R_PARISC_LTOFF_FPTR32 57 /* 32 bits LT-rel. function pointer. */ -+#define R_PARISC_LTOFF_FPTR21L 58 /* LT-rel. fct ptr, left 21 bits. */ -+#define R_PARISC_LTOFF_FPTR14R 62 /* LT-rel. fct ptr, right 14 bits. */ -+#define R_PARISC_FPTR64 64 /* 64 bits function address. */ -+#define R_PARISC_PLABEL32 65 /* 32 bits function address. */ -+#define R_PARISC_PLABEL21L 66 /* Left 21 bits of fdesc address. */ -+#define R_PARISC_PLABEL14R 70 /* Right 14 bits of fdesc address. */ -+#define R_PARISC_PCREL64 72 /* 64 bits PC-rel. address. */ -+#define R_PARISC_PCREL22F 74 /* 22 bits PC-rel. address. */ -+#define R_PARISC_PCREL14WR 75 /* PC-rel. address, right 14 bits. */ -+#define R_PARISC_PCREL14DR 76 /* PC rel. address, right 14 bits. */ -+#define R_PARISC_PCREL16F 77 /* 16 bits PC-rel. address. */ -+#define R_PARISC_PCREL16WF 78 /* 16 bits PC-rel. address. */ -+#define R_PARISC_PCREL16DF 79 /* 16 bits PC-rel. address. */ -+#define R_PARISC_DIR64 80 /* 64 bits of eff. address. */ -+#define R_PARISC_DIR14WR 83 /* 14 bits of eff. address. */ -+#define R_PARISC_DIR14DR 84 /* 14 bits of eff. address. */ -+#define R_PARISC_DIR16F 85 /* 16 bits of eff. address. */ -+#define R_PARISC_DIR16WF 86 /* 16 bits of eff. address. */ -+#define R_PARISC_DIR16DF 87 /* 16 bits of eff. address. */ -+#define R_PARISC_GPREL64 88 /* 64 bits of GP-rel. address. */ -+#define R_PARISC_GPREL14WR 91 /* GP-rel. address, right 14 bits. */ -+#define R_PARISC_GPREL14DR 92 /* GP-rel. address, right 14 bits. */ -+#define R_PARISC_GPREL16F 93 /* 16 bits GP-rel. address. */ -+#define R_PARISC_GPREL16WF 94 /* 16 bits GP-rel. address. */ -+#define R_PARISC_GPREL16DF 95 /* 16 bits GP-rel. address. */ -+#define R_PARISC_LTOFF64 96 /* 64 bits LT-rel. address. */ -+#define R_PARISC_LTOFF14WR 99 /* LT-rel. address, right 14 bits. */ -+#define R_PARISC_LTOFF14DR 100 /* LT-rel. address, right 14 bits. */ -+#define R_PARISC_LTOFF16F 101 /* 16 bits LT-rel. address. */ -+#define R_PARISC_LTOFF16WF 102 /* 16 bits LT-rel. address. */ -+#define R_PARISC_LTOFF16DF 103 /* 16 bits LT-rel. address. */ -+#define R_PARISC_SECREL64 104 /* 64 bits section rel. address. */ -+#define R_PARISC_SEGREL64 112 /* 64 bits segment rel. address. */ -+#define R_PARISC_PLTOFF14WR 115 /* PLT-rel. address, right 14 bits. */ -+#define R_PARISC_PLTOFF14DR 116 /* PLT-rel. address, right 14 bits. */ -+#define R_PARISC_PLTOFF16F 117 /* 16 bits LT-rel. address. */ -+#define R_PARISC_PLTOFF16WF 118 /* 16 bits PLT-rel. address. */ -+#define R_PARISC_PLTOFF16DF 119 /* 16 bits PLT-rel. address. */ -+#define R_PARISC_LTOFF_FPTR64 120 /* 64 bits LT-rel. function ptr. */ -+#define R_PARISC_LTOFF_FPTR14WR 123 /* LT-rel. fct. ptr., right 14 bits. */ -+#define R_PARISC_LTOFF_FPTR14DR 124 /* LT-rel. fct. ptr., right 14 bits. */ -+#define R_PARISC_LTOFF_FPTR16F 125 /* 16 bits LT-rel. function ptr. */ -+#define R_PARISC_LTOFF_FPTR16WF 126 /* 16 bits LT-rel. function ptr. */ -+#define R_PARISC_LTOFF_FPTR16DF 127 /* 16 bits LT-rel. function ptr. */ -+#define R_PARISC_LORESERVE 128 -+#define R_PARISC_COPY 128 /* Copy relocation. */ -+#define R_PARISC_IPLT 129 /* Dynamic reloc, imported PLT */ -+#define R_PARISC_EPLT 130 /* Dynamic reloc, exported PLT */ -+#define R_PARISC_TPREL32 153 /* 32 bits TP-rel. address. */ -+#define R_PARISC_TPREL21L 154 /* TP-rel. address, left 21 bits. */ -+#define R_PARISC_TPREL14R 158 /* TP-rel. address, right 14 bits. */ -+#define R_PARISC_LTOFF_TP21L 162 /* LT-TP-rel. address, left 21 bits. */ -+#define R_PARISC_LTOFF_TP14R 166 /* LT-TP-rel. address, right 14 bits.*/ -+#define R_PARISC_LTOFF_TP14F 167 /* 14 bits LT-TP-rel. address. */ -+#define R_PARISC_TPREL64 216 /* 64 bits TP-rel. address. */ -+#define R_PARISC_TPREL14WR 219 /* TP-rel. address, right 14 bits. */ -+#define R_PARISC_TPREL14DR 220 /* TP-rel. address, right 14 bits. */ -+#define R_PARISC_TPREL16F 221 /* 16 bits TP-rel. address. */ -+#define R_PARISC_TPREL16WF 222 /* 16 bits TP-rel. address. */ -+#define R_PARISC_TPREL16DF 223 /* 16 bits TP-rel. address. */ -+#define R_PARISC_LTOFF_TP64 224 /* 64 bits LT-TP-rel. address. */ -+#define R_PARISC_LTOFF_TP14WR 227 /* LT-TP-rel. address, right 14 bits.*/ -+#define R_PARISC_LTOFF_TP14DR 228 /* LT-TP-rel. address, right 14 bits.*/ -+#define R_PARISC_LTOFF_TP16F 229 /* 16 bits LT-TP-rel. address. */ -+#define R_PARISC_LTOFF_TP16WF 230 /* 16 bits LT-TP-rel. address. */ -+#define R_PARISC_LTOFF_TP16DF 231 /* 16 bits LT-TP-rel. address. */ -+#define R_PARISC_GNU_VTENTRY 232 -+#define R_PARISC_GNU_VTINHERIT 233 -+#define R_PARISC_TLS_GD21L 234 /* GD 21-bit left. */ -+#define R_PARISC_TLS_GD14R 235 /* GD 14-bit right. */ -+#define R_PARISC_TLS_GDCALL 236 /* GD call to __t_g_a. */ -+#define R_PARISC_TLS_LDM21L 237 /* LD module 21-bit left. */ -+#define R_PARISC_TLS_LDM14R 238 /* LD module 14-bit right. */ -+#define R_PARISC_TLS_LDMCALL 239 /* LD module call to __t_g_a. */ -+#define R_PARISC_TLS_LDO21L 240 /* LD offset 21-bit left. */ -+#define R_PARISC_TLS_LDO14R 241 /* LD offset 14-bit right. */ -+#define R_PARISC_TLS_DTPMOD32 242 /* DTP module 32-bit. */ -+#define R_PARISC_TLS_DTPMOD64 243 /* DTP module 64-bit. */ -+#define R_PARISC_TLS_DTPOFF32 244 /* DTP offset 32-bit. */ -+#define R_PARISC_TLS_DTPOFF64 245 /* DTP offset 32-bit. */ -+#define R_PARISC_TLS_LE21L R_PARISC_TPREL21L -+#define R_PARISC_TLS_LE14R R_PARISC_TPREL14R -+#define R_PARISC_TLS_IE21L R_PARISC_LTOFF_TP21L -+#define R_PARISC_TLS_IE14R R_PARISC_LTOFF_TP14R -+#define R_PARISC_TLS_TPREL32 R_PARISC_TPREL32 -+#define R_PARISC_TLS_TPREL64 R_PARISC_TPREL64 -+#define R_PARISC_HIRESERVE 255 -+ -+/* Legal values for p_type field of Elf32_Phdr/Elf64_Phdr. */ -+ -+#define PT_HP_TLS (PT_LOOS + 0x0) -+#define PT_HP_CORE_NONE (PT_LOOS + 0x1) -+#define PT_HP_CORE_VERSION (PT_LOOS + 0x2) -+#define PT_HP_CORE_KERNEL (PT_LOOS + 0x3) -+#define PT_HP_CORE_COMM (PT_LOOS + 0x4) -+#define PT_HP_CORE_PROC (PT_LOOS + 0x5) -+#define PT_HP_CORE_LOADABLE (PT_LOOS + 0x6) -+#define PT_HP_CORE_STACK (PT_LOOS + 0x7) -+#define PT_HP_CORE_SHM (PT_LOOS + 0x8) -+#define PT_HP_CORE_MMF (PT_LOOS + 0x9) -+#define PT_HP_PARALLEL (PT_LOOS + 0x10) -+#define PT_HP_FASTBIND (PT_LOOS + 0x11) -+#define PT_HP_OPT_ANNOT (PT_LOOS + 0x12) -+#define PT_HP_HSL_ANNOT (PT_LOOS + 0x13) -+#define PT_HP_STACK (PT_LOOS + 0x14) -+ -+#define PT_PARISC_ARCHEXT 0x70000000 -+#define PT_PARISC_UNWIND 0x70000001 -+ -+/* Legal values for p_flags field of Elf32_Phdr/Elf64_Phdr. */ -+ -+#define PF_PARISC_SBP 0x08000000 -+ -+#define PF_HP_PAGE_SIZE 0x00100000 -+#define PF_HP_FAR_SHARED 0x00200000 -+#define PF_HP_NEAR_SHARED 0x00400000 -+#define PF_HP_CODE 0x01000000 -+#define PF_HP_MODIFY 0x02000000 -+#define PF_HP_LAZYSWAP 0x04000000 -+#define PF_HP_SBP 0x08000000 -+ -+ -+/* Alpha specific definitions. */ -+ -+/* Legal values for e_flags field of Elf64_Ehdr. */ -+ -+#define EF_ALPHA_32BIT 1 /* All addresses must be < 2GB. */ -+#define EF_ALPHA_CANRELAX 2 /* Relocations for relaxing exist. */ -+ -+/* Legal values for sh_type field of Elf64_Shdr. */ -+ -+/* These two are primerily concerned with ECOFF debugging info. */ -+#define SHT_ALPHA_DEBUG 0x70000001 -+#define SHT_ALPHA_REGINFO 0x70000002 -+ -+/* Legal values for sh_flags field of Elf64_Shdr. */ -+ -+#define SHF_ALPHA_GPREL 0x10000000 -+ -+/* Legal values for st_other field of Elf64_Sym. */ -+#define STO_ALPHA_NOPV 0x80 /* No PV required. */ -+#define STO_ALPHA_STD_GPLOAD 0x88 /* PV only used for initial ldgp. */ -+ -+/* Alpha relocs. */ -+ -+#define R_ALPHA_NONE 0 /* No reloc */ -+#define R_ALPHA_REFLONG 1 /* Direct 32 bit */ -+#define R_ALPHA_REFQUAD 2 /* Direct 64 bit */ -+#define R_ALPHA_GPREL32 3 /* GP relative 32 bit */ -+#define R_ALPHA_LITERAL 4 /* GP relative 16 bit w/optimization */ -+#define R_ALPHA_LITUSE 5 /* Optimization hint for LITERAL */ -+#define R_ALPHA_GPDISP 6 /* Add displacement to GP */ -+#define R_ALPHA_BRADDR 7 /* PC+4 relative 23 bit shifted */ -+#define R_ALPHA_HINT 8 /* PC+4 relative 16 bit shifted */ -+#define R_ALPHA_SREL16 9 /* PC relative 16 bit */ -+#define R_ALPHA_SREL32 10 /* PC relative 32 bit */ -+#define R_ALPHA_SREL64 11 /* PC relative 64 bit */ -+#define R_ALPHA_GPRELHIGH 17 /* GP relative 32 bit, high 16 bits */ -+#define R_ALPHA_GPRELLOW 18 /* GP relative 32 bit, low 16 bits */ -+#define R_ALPHA_GPREL16 19 /* GP relative 16 bit */ -+#define R_ALPHA_COPY 24 /* Copy symbol at runtime */ -+#define R_ALPHA_GLOB_DAT 25 /* Create GOT entry */ -+#define R_ALPHA_JMP_SLOT 26 /* Create PLT entry */ -+#define R_ALPHA_RELATIVE 27 /* Adjust by program base */ -+#define R_ALPHA_TLS_GD_HI 28 -+#define R_ALPHA_TLSGD 29 -+#define R_ALPHA_TLS_LDM 30 -+#define R_ALPHA_DTPMOD64 31 -+#define R_ALPHA_GOTDTPREL 32 -+#define R_ALPHA_DTPREL64 33 -+#define R_ALPHA_DTPRELHI 34 -+#define R_ALPHA_DTPRELLO 35 -+#define R_ALPHA_DTPREL16 36 -+#define R_ALPHA_GOTTPREL 37 -+#define R_ALPHA_TPREL64 38 -+#define R_ALPHA_TPRELHI 39 -+#define R_ALPHA_TPRELLO 40 -+#define R_ALPHA_TPREL16 41 -+/* Keep this the last entry. */ -+#define R_ALPHA_NUM 46 -+ -+/* Magic values of the LITUSE relocation addend. */ -+#define LITUSE_ALPHA_ADDR 0 -+#define LITUSE_ALPHA_BASE 1 -+#define LITUSE_ALPHA_BYTOFF 2 -+#define LITUSE_ALPHA_JSR 3 -+#define LITUSE_ALPHA_TLS_GD 4 -+#define LITUSE_ALPHA_TLS_LDM 5 -+ -+/* Legal values for d_tag of Elf64_Dyn. */ -+#define DT_ALPHA_PLTRO (DT_LOPROC + 0) -+#define DT_ALPHA_NUM 1 -+ -+/* PowerPC specific declarations */ -+ -+/* Values for Elf32/64_Ehdr.e_flags. */ -+#define EF_PPC_EMB 0x80000000 /* PowerPC embedded flag */ -+ -+/* Cygnus local bits below */ -+#define EF_PPC_RELOCATABLE 0x00010000 /* PowerPC -mrelocatable flag*/ -+#define EF_PPC_RELOCATABLE_LIB 0x00008000 /* PowerPC -mrelocatable-lib -+ flag */ -+ -+/* PowerPC relocations defined by the ABIs */ -+#define R_PPC_NONE 0 -+#define R_PPC_ADDR32 1 /* 32bit absolute address */ -+#define R_PPC_ADDR24 2 /* 26bit address, 2 bits ignored. */ -+#define R_PPC_ADDR16 3 /* 16bit absolute address */ -+#define R_PPC_ADDR16_LO 4 /* lower 16bit of absolute address */ -+#define R_PPC_ADDR16_HI 5 /* high 16bit of absolute address */ -+#define R_PPC_ADDR16_HA 6 /* adjusted high 16bit */ -+#define R_PPC_ADDR14 7 /* 16bit address, 2 bits ignored */ -+#define R_PPC_ADDR14_BRTAKEN 8 -+#define R_PPC_ADDR14_BRNTAKEN 9 -+#define R_PPC_REL24 10 /* PC relative 26 bit */ -+#define R_PPC_REL14 11 /* PC relative 16 bit */ -+#define R_PPC_REL14_BRTAKEN 12 -+#define R_PPC_REL14_BRNTAKEN 13 -+#define R_PPC_GOT16 14 -+#define R_PPC_GOT16_LO 15 -+#define R_PPC_GOT16_HI 16 -+#define R_PPC_GOT16_HA 17 -+#define R_PPC_PLTREL24 18 -+#define R_PPC_COPY 19 -+#define R_PPC_GLOB_DAT 20 -+#define R_PPC_JMP_SLOT 21 -+#define R_PPC_RELATIVE 22 -+#define R_PPC_LOCAL24PC 23 -+#define R_PPC_UADDR32 24 -+#define R_PPC_UADDR16 25 -+#define R_PPC_REL32 26 -+#define R_PPC_PLT32 27 -+#define R_PPC_PLTREL32 28 -+#define R_PPC_PLT16_LO 29 -+#define R_PPC_PLT16_HI 30 -+#define R_PPC_PLT16_HA 31 -+#define R_PPC_SDAREL16 32 -+#define R_PPC_SECTOFF 33 -+#define R_PPC_SECTOFF_LO 34 -+#define R_PPC_SECTOFF_HI 35 -+#define R_PPC_SECTOFF_HA 36 -+ -+/* PowerPC relocations defined for the TLS access ABI. */ -+#define R_PPC_TLS 67 /* none (sym+add)@tls */ -+#define R_PPC_DTPMOD32 68 /* word32 (sym+add)@dtpmod */ -+#define R_PPC_TPREL16 69 /* half16* (sym+add)@tprel */ -+#define R_PPC_TPREL16_LO 70 /* half16 (sym+add)@tprel@l */ -+#define R_PPC_TPREL16_HI 71 /* half16 (sym+add)@tprel@h */ -+#define R_PPC_TPREL16_HA 72 /* half16 (sym+add)@tprel@ha */ -+#define R_PPC_TPREL32 73 /* word32 (sym+add)@tprel */ -+#define R_PPC_DTPREL16 74 /* half16* (sym+add)@dtprel */ -+#define R_PPC_DTPREL16_LO 75 /* half16 (sym+add)@dtprel@l */ -+#define R_PPC_DTPREL16_HI 76 /* half16 (sym+add)@dtprel@h */ -+#define R_PPC_DTPREL16_HA 77 /* half16 (sym+add)@dtprel@ha */ -+#define R_PPC_DTPREL32 78 /* word32 (sym+add)@dtprel */ -+#define R_PPC_GOT_TLSGD16 79 /* half16* (sym+add)@got@tlsgd */ -+#define R_PPC_GOT_TLSGD16_LO 80 /* half16 (sym+add)@got@tlsgd@l */ -+#define R_PPC_GOT_TLSGD16_HI 81 /* half16 (sym+add)@got@tlsgd@h */ -+#define R_PPC_GOT_TLSGD16_HA 82 /* half16 (sym+add)@got@tlsgd@ha */ -+#define R_PPC_GOT_TLSLD16 83 /* half16* (sym+add)@got@tlsld */ -+#define R_PPC_GOT_TLSLD16_LO 84 /* half16 (sym+add)@got@tlsld@l */ -+#define R_PPC_GOT_TLSLD16_HI 85 /* half16 (sym+add)@got@tlsld@h */ -+#define R_PPC_GOT_TLSLD16_HA 86 /* half16 (sym+add)@got@tlsld@ha */ -+#define R_PPC_GOT_TPREL16 87 /* half16* (sym+add)@got@tprel */ -+#define R_PPC_GOT_TPREL16_LO 88 /* half16 (sym+add)@got@tprel@l */ -+#define R_PPC_GOT_TPREL16_HI 89 /* half16 (sym+add)@got@tprel@h */ -+#define R_PPC_GOT_TPREL16_HA 90 /* half16 (sym+add)@got@tprel@ha */ -+#define R_PPC_GOT_DTPREL16 91 /* half16* (sym+add)@got@dtprel */ -+#define R_PPC_GOT_DTPREL16_LO 92 /* half16* (sym+add)@got@dtprel@l */ -+#define R_PPC_GOT_DTPREL16_HI 93 /* half16* (sym+add)@got@dtprel@h */ -+#define R_PPC_GOT_DTPREL16_HA 94 /* half16* (sym+add)@got@dtprel@ha */ -+ -+/* The remaining relocs are from the Embedded ELF ABI, and are not -+ in the SVR4 ELF ABI. */ -+#define R_PPC_EMB_NADDR32 101 -+#define R_PPC_EMB_NADDR16 102 -+#define R_PPC_EMB_NADDR16_LO 103 -+#define R_PPC_EMB_NADDR16_HI 104 -+#define R_PPC_EMB_NADDR16_HA 105 -+#define R_PPC_EMB_SDAI16 106 -+#define R_PPC_EMB_SDA2I16 107 -+#define R_PPC_EMB_SDA2REL 108 -+#define R_PPC_EMB_SDA21 109 /* 16 bit offset in SDA */ -+#define R_PPC_EMB_MRKREF 110 -+#define R_PPC_EMB_RELSEC16 111 -+#define R_PPC_EMB_RELST_LO 112 -+#define R_PPC_EMB_RELST_HI 113 -+#define R_PPC_EMB_RELST_HA 114 -+#define R_PPC_EMB_BIT_FLD 115 -+#define R_PPC_EMB_RELSDA 116 /* 16 bit relative offset in SDA */ -+ -+/* Diab tool relocations. */ -+#define R_PPC_DIAB_SDA21_LO 180 /* like EMB_SDA21, but lower 16 bit */ -+#define R_PPC_DIAB_SDA21_HI 181 /* like EMB_SDA21, but high 16 bit */ -+#define R_PPC_DIAB_SDA21_HA 182 /* like EMB_SDA21, adjusted high 16 */ -+#define R_PPC_DIAB_RELSDA_LO 183 /* like EMB_RELSDA, but lower 16 bit */ -+#define R_PPC_DIAB_RELSDA_HI 184 /* like EMB_RELSDA, but high 16 bit */ -+#define R_PPC_DIAB_RELSDA_HA 185 /* like EMB_RELSDA, adjusted high 16 */ -+ -+/* GNU extension to support local ifunc. */ -+#define R_PPC_IRELATIVE 248 -+ -+/* GNU relocs used in PIC code sequences. */ -+#define R_PPC_REL16 249 /* half16 (sym+add-.) */ -+#define R_PPC_REL16_LO 250 /* half16 (sym+add-.)@l */ -+#define R_PPC_REL16_HI 251 /* half16 (sym+add-.)@h */ -+#define R_PPC_REL16_HA 252 /* half16 (sym+add-.)@ha */ -+ -+/* This is a phony reloc to handle any old fashioned TOC16 references -+ that may still be in object files. */ -+#define R_PPC_TOC16 255 -+ -+/* PowerPC specific values for the Dyn d_tag field. */ -+#define DT_PPC_GOT (DT_LOPROC + 0) -+#define DT_PPC_NUM 1 -+ -+/* PowerPC64 relocations defined by the ABIs */ -+#define R_PPC64_NONE R_PPC_NONE -+#define R_PPC64_ADDR32 R_PPC_ADDR32 /* 32bit absolute address */ -+#define R_PPC64_ADDR24 R_PPC_ADDR24 /* 26bit address, word aligned */ -+#define R_PPC64_ADDR16 R_PPC_ADDR16 /* 16bit absolute address */ -+#define R_PPC64_ADDR16_LO R_PPC_ADDR16_LO /* lower 16bits of address */ -+#define R_PPC64_ADDR16_HI R_PPC_ADDR16_HI /* high 16bits of address. */ -+#define R_PPC64_ADDR16_HA R_PPC_ADDR16_HA /* adjusted high 16bits. */ -+#define R_PPC64_ADDR14 R_PPC_ADDR14 /* 16bit address, word aligned */ -+#define R_PPC64_ADDR14_BRTAKEN R_PPC_ADDR14_BRTAKEN -+#define R_PPC64_ADDR14_BRNTAKEN R_PPC_ADDR14_BRNTAKEN -+#define R_PPC64_REL24 R_PPC_REL24 /* PC-rel. 26 bit, word aligned */ -+#define R_PPC64_REL14 R_PPC_REL14 /* PC relative 16 bit */ -+#define R_PPC64_REL14_BRTAKEN R_PPC_REL14_BRTAKEN -+#define R_PPC64_REL14_BRNTAKEN R_PPC_REL14_BRNTAKEN -+#define R_PPC64_GOT16 R_PPC_GOT16 -+#define R_PPC64_GOT16_LO R_PPC_GOT16_LO -+#define R_PPC64_GOT16_HI R_PPC_GOT16_HI -+#define R_PPC64_GOT16_HA R_PPC_GOT16_HA -+ -+#define R_PPC64_COPY R_PPC_COPY -+#define R_PPC64_GLOB_DAT R_PPC_GLOB_DAT -+#define R_PPC64_JMP_SLOT R_PPC_JMP_SLOT -+#define R_PPC64_RELATIVE R_PPC_RELATIVE -+ -+#define R_PPC64_UADDR32 R_PPC_UADDR32 -+#define R_PPC64_UADDR16 R_PPC_UADDR16 -+#define R_PPC64_REL32 R_PPC_REL32 -+#define R_PPC64_PLT32 R_PPC_PLT32 -+#define R_PPC64_PLTREL32 R_PPC_PLTREL32 -+#define R_PPC64_PLT16_LO R_PPC_PLT16_LO -+#define R_PPC64_PLT16_HI R_PPC_PLT16_HI -+#define R_PPC64_PLT16_HA R_PPC_PLT16_HA -+ -+#define R_PPC64_SECTOFF R_PPC_SECTOFF -+#define R_PPC64_SECTOFF_LO R_PPC_SECTOFF_LO -+#define R_PPC64_SECTOFF_HI R_PPC_SECTOFF_HI -+#define R_PPC64_SECTOFF_HA R_PPC_SECTOFF_HA -+#define R_PPC64_ADDR30 37 /* word30 (S + A - P) >> 2 */ -+#define R_PPC64_ADDR64 38 /* doubleword64 S + A */ -+#define R_PPC64_ADDR16_HIGHER 39 /* half16 #higher(S + A) */ -+#define R_PPC64_ADDR16_HIGHERA 40 /* half16 #highera(S + A) */ -+#define R_PPC64_ADDR16_HIGHEST 41 /* half16 #highest(S + A) */ -+#define R_PPC64_ADDR16_HIGHESTA 42 /* half16 #highesta(S + A) */ -+#define R_PPC64_UADDR64 43 /* doubleword64 S + A */ -+#define R_PPC64_REL64 44 /* doubleword64 S + A - P */ -+#define R_PPC64_PLT64 45 /* doubleword64 L + A */ -+#define R_PPC64_PLTREL64 46 /* doubleword64 L + A - P */ -+#define R_PPC64_TOC16 47 /* half16* S + A - .TOC */ -+#define R_PPC64_TOC16_LO 48 /* half16 #lo(S + A - .TOC.) */ -+#define R_PPC64_TOC16_HI 49 /* half16 #hi(S + A - .TOC.) */ -+#define R_PPC64_TOC16_HA 50 /* half16 #ha(S + A - .TOC.) */ -+#define R_PPC64_TOC 51 /* doubleword64 .TOC */ -+#define R_PPC64_PLTGOT16 52 /* half16* M + A */ -+#define R_PPC64_PLTGOT16_LO 53 /* half16 #lo(M + A) */ -+#define R_PPC64_PLTGOT16_HI 54 /* half16 #hi(M + A) */ -+#define R_PPC64_PLTGOT16_HA 55 /* half16 #ha(M + A) */ -+ -+#define R_PPC64_ADDR16_DS 56 /* half16ds* (S + A) >> 2 */ -+#define R_PPC64_ADDR16_LO_DS 57 /* half16ds #lo(S + A) >> 2 */ -+#define R_PPC64_GOT16_DS 58 /* half16ds* (G + A) >> 2 */ -+#define R_PPC64_GOT16_LO_DS 59 /* half16ds #lo(G + A) >> 2 */ -+#define R_PPC64_PLT16_LO_DS 60 /* half16ds #lo(L + A) >> 2 */ -+#define R_PPC64_SECTOFF_DS 61 /* half16ds* (R + A) >> 2 */ -+#define R_PPC64_SECTOFF_LO_DS 62 /* half16ds #lo(R + A) >> 2 */ -+#define R_PPC64_TOC16_DS 63 /* half16ds* (S + A - .TOC.) >> 2 */ -+#define R_PPC64_TOC16_LO_DS 64 /* half16ds #lo(S + A - .TOC.) >> 2 */ -+#define R_PPC64_PLTGOT16_DS 65 /* half16ds* (M + A) >> 2 */ -+#define R_PPC64_PLTGOT16_LO_DS 66 /* half16ds #lo(M + A) >> 2 */ -+ -+/* PowerPC64 relocations defined for the TLS access ABI. */ -+#define R_PPC64_TLS 67 /* none (sym+add)@tls */ -+#define R_PPC64_DTPMOD64 68 /* doubleword64 (sym+add)@dtpmod */ -+#define R_PPC64_TPREL16 69 /* half16* (sym+add)@tprel */ -+#define R_PPC64_TPREL16_LO 70 /* half16 (sym+add)@tprel@l */ -+#define R_PPC64_TPREL16_HI 71 /* half16 (sym+add)@tprel@h */ -+#define R_PPC64_TPREL16_HA 72 /* half16 (sym+add)@tprel@ha */ -+#define R_PPC64_TPREL64 73 /* doubleword64 (sym+add)@tprel */ -+#define R_PPC64_DTPREL16 74 /* half16* (sym+add)@dtprel */ -+#define R_PPC64_DTPREL16_LO 75 /* half16 (sym+add)@dtprel@l */ -+#define R_PPC64_DTPREL16_HI 76 /* half16 (sym+add)@dtprel@h */ -+#define R_PPC64_DTPREL16_HA 77 /* half16 (sym+add)@dtprel@ha */ -+#define R_PPC64_DTPREL64 78 /* doubleword64 (sym+add)@dtprel */ -+#define R_PPC64_GOT_TLSGD16 79 /* half16* (sym+add)@got@tlsgd */ -+#define R_PPC64_GOT_TLSGD16_LO 80 /* half16 (sym+add)@got@tlsgd@l */ -+#define R_PPC64_GOT_TLSGD16_HI 81 /* half16 (sym+add)@got@tlsgd@h */ -+#define R_PPC64_GOT_TLSGD16_HA 82 /* half16 (sym+add)@got@tlsgd@ha */ -+#define R_PPC64_GOT_TLSLD16 83 /* half16* (sym+add)@got@tlsld */ -+#define R_PPC64_GOT_TLSLD16_LO 84 /* half16 (sym+add)@got@tlsld@l */ -+#define R_PPC64_GOT_TLSLD16_HI 85 /* half16 (sym+add)@got@tlsld@h */ -+#define R_PPC64_GOT_TLSLD16_HA 86 /* half16 (sym+add)@got@tlsld@ha */ -+#define R_PPC64_GOT_TPREL16_DS 87 /* half16ds* (sym+add)@got@tprel */ -+#define R_PPC64_GOT_TPREL16_LO_DS 88 /* half16ds (sym+add)@got@tprel@l */ -+#define R_PPC64_GOT_TPREL16_HI 89 /* half16 (sym+add)@got@tprel@h */ -+#define R_PPC64_GOT_TPREL16_HA 90 /* half16 (sym+add)@got@tprel@ha */ -+#define R_PPC64_GOT_DTPREL16_DS 91 /* half16ds* (sym+add)@got@dtprel */ -+#define R_PPC64_GOT_DTPREL16_LO_DS 92 /* half16ds (sym+add)@got@dtprel@l */ -+#define R_PPC64_GOT_DTPREL16_HI 93 /* half16 (sym+add)@got@dtprel@h */ -+#define R_PPC64_GOT_DTPREL16_HA 94 /* half16 (sym+add)@got@dtprel@ha */ -+#define R_PPC64_TPREL16_DS 95 /* half16ds* (sym+add)@tprel */ -+#define R_PPC64_TPREL16_LO_DS 96 /* half16ds (sym+add)@tprel@l */ -+#define R_PPC64_TPREL16_HIGHER 97 /* half16 (sym+add)@tprel@higher */ -+#define R_PPC64_TPREL16_HIGHERA 98 /* half16 (sym+add)@tprel@highera */ -+#define R_PPC64_TPREL16_HIGHEST 99 /* half16 (sym+add)@tprel@highest */ -+#define R_PPC64_TPREL16_HIGHESTA 100 /* half16 (sym+add)@tprel@highesta */ -+#define R_PPC64_DTPREL16_DS 101 /* half16ds* (sym+add)@dtprel */ -+#define R_PPC64_DTPREL16_LO_DS 102 /* half16ds (sym+add)@dtprel@l */ -+#define R_PPC64_DTPREL16_HIGHER 103 /* half16 (sym+add)@dtprel@higher */ -+#define R_PPC64_DTPREL16_HIGHERA 104 /* half16 (sym+add)@dtprel@highera */ -+#define R_PPC64_DTPREL16_HIGHEST 105 /* half16 (sym+add)@dtprel@highest */ -+#define R_PPC64_DTPREL16_HIGHESTA 106 /* half16 (sym+add)@dtprel@highesta */ -+ -+/* GNU extension to support local ifunc. */ -+#define R_PPC64_JMP_IREL 247 -+#define R_PPC64_IRELATIVE 248 -+#define R_PPC64_REL16 249 /* half16 (sym+add-.) */ -+#define R_PPC64_REL16_LO 250 /* half16 (sym+add-.)@l */ -+#define R_PPC64_REL16_HI 251 /* half16 (sym+add-.)@h */ -+#define R_PPC64_REL16_HA 252 /* half16 (sym+add-.)@ha */ -+ -+/* PowerPC64 specific values for the Dyn d_tag field. */ -+#define DT_PPC64_GLINK (DT_LOPROC + 0) -+#define DT_PPC64_OPD (DT_LOPROC + 1) -+#define DT_PPC64_OPDSZ (DT_LOPROC + 2) -+#define DT_PPC64_NUM 3 -+ -+ -+/* ARM specific declarations */ -+ -+/* Processor specific flags for the ELF header e_flags field. */ -+#define EF_ARM_RELEXEC 0x01 -+#define EF_ARM_HASENTRY 0x02 -+#define EF_ARM_INTERWORK 0x04 -+#define EF_ARM_APCS_26 0x08 -+#define EF_ARM_APCS_FLOAT 0x10 -+#define EF_ARM_PIC 0x20 -+#define EF_ARM_ALIGN8 0x40 /* 8-bit structure alignment is in use */ -+#define EF_ARM_NEW_ABI 0x80 -+#define EF_ARM_OLD_ABI 0x100 -+#define EF_ARM_SOFT_FLOAT 0x200 -+#define EF_ARM_VFP_FLOAT 0x400 -+#define EF_ARM_MAVERICK_FLOAT 0x800 -+ -+ -+/* Other constants defined in the ARM ELF spec. version B-01. */ -+/* NB. These conflict with values defined above. */ -+#define EF_ARM_SYMSARESORTED 0x04 -+#define EF_ARM_DYNSYMSUSESEGIDX 0x08 -+#define EF_ARM_MAPSYMSFIRST 0x10 -+#define EF_ARM_EABIMASK 0XFF000000 -+ -+/* Constants defined in AAELF. */ -+#define EF_ARM_BE8 0x00800000 -+#define EF_ARM_LE8 0x00400000 -+ -+#define EF_ARM_EABI_VERSION(flags) ((flags) & EF_ARM_EABIMASK) -+#define EF_ARM_EABI_UNKNOWN 0x00000000 -+#define EF_ARM_EABI_VER1 0x01000000 -+#define EF_ARM_EABI_VER2 0x02000000 -+#define EF_ARM_EABI_VER3 0x03000000 -+#define EF_ARM_EABI_VER4 0x04000000 -+#define EF_ARM_EABI_VER5 0x05000000 -+ -+/* Additional symbol types for Thumb. */ -+#define STT_ARM_TFUNC STT_LOPROC /* A Thumb function. */ -+#define STT_ARM_16BIT STT_HIPROC /* A Thumb label. */ -+ -+/* ARM-specific values for sh_flags */ -+#define SHF_ARM_ENTRYSECT 0x10000000 /* Section contains an entry point */ -+#define SHF_ARM_COMDEF 0x80000000 /* Section may be multiply defined -+ in the input to a link step. */ -+ -+/* ARM-specific program header flags */ -+#define PF_ARM_SB 0x10000000 /* Segment contains the location -+ addressed by the static base. */ -+#define PF_ARM_PI 0x20000000 /* Position-independent segment. */ -+#define PF_ARM_ABS 0x40000000 /* Absolute segment. */ -+ -+/* Processor specific values for the Phdr p_type field. */ -+#define PT_ARM_EXIDX (PT_LOPROC + 1) /* ARM unwind segment. */ -+ -+/* Processor specific values for the Shdr sh_type field. */ -+#define SHT_ARM_EXIDX (SHT_LOPROC + 1) /* ARM unwind section. */ -+#define SHT_ARM_PREEMPTMAP (SHT_LOPROC + 2) /* Preemption details. */ -+#define SHT_ARM_ATTRIBUTES (SHT_LOPROC + 3) /* ARM attributes section. */ -+ -+ -+/* ARM relocs. */ -+ -+#define R_ARM_NONE 0 /* No reloc */ -+#define R_ARM_PC24 1 /* PC relative 26 bit branch */ -+#define R_ARM_ABS32 2 /* Direct 32 bit */ -+#define R_ARM_REL32 3 /* PC relative 32 bit */ -+#define R_ARM_PC13 4 -+#define R_ARM_ABS16 5 /* Direct 16 bit */ -+#define R_ARM_ABS12 6 /* Direct 12 bit */ -+#define R_ARM_THM_ABS5 7 -+#define R_ARM_ABS8 8 /* Direct 8 bit */ -+#define R_ARM_SBREL32 9 -+#define R_ARM_THM_PC22 10 -+#define R_ARM_THM_PC8 11 -+#define R_ARM_AMP_VCALL9 12 -+#define R_ARM_SWI24 13 /* Obsolete static relocation. */ -+#define R_ARM_TLS_DESC 13 /* Dynamic relocation. */ -+#define R_ARM_THM_SWI8 14 -+#define R_ARM_XPC25 15 -+#define R_ARM_THM_XPC22 16 -+#define R_ARM_TLS_DTPMOD32 17 /* ID of module containing symbol */ -+#define R_ARM_TLS_DTPOFF32 18 /* Offset in TLS block */ -+#define R_ARM_TLS_TPOFF32 19 /* Offset in static TLS block */ -+#define R_ARM_COPY 20 /* Copy symbol at runtime */ -+#define R_ARM_GLOB_DAT 21 /* Create GOT entry */ -+#define R_ARM_JUMP_SLOT 22 /* Create PLT entry */ -+#define R_ARM_RELATIVE 23 /* Adjust by program base */ -+#define R_ARM_GOTOFF 24 /* 32 bit offset to GOT */ -+#define R_ARM_GOTPC 25 /* 32 bit PC relative offset to GOT */ -+#define R_ARM_GOT32 26 /* 32 bit GOT entry */ -+#define R_ARM_PLT32 27 /* 32 bit PLT address */ -+#define R_ARM_ALU_PCREL_7_0 32 -+#define R_ARM_ALU_PCREL_15_8 33 -+#define R_ARM_ALU_PCREL_23_15 34 -+#define R_ARM_LDR_SBREL_11_0 35 -+#define R_ARM_ALU_SBREL_19_12 36 -+#define R_ARM_ALU_SBREL_27_20 37 -+#define R_ARM_TLS_GOTDESC 90 -+#define R_ARM_TLS_CALL 91 -+#define R_ARM_TLS_DESCSEQ 92 -+#define R_ARM_THM_TLS_CALL 93 -+#define R_ARM_GNU_VTENTRY 100 -+#define R_ARM_GNU_VTINHERIT 101 -+#define R_ARM_THM_PC11 102 /* thumb unconditional branch */ -+#define R_ARM_THM_PC9 103 /* thumb conditional branch */ -+#define R_ARM_TLS_GD32 104 /* PC-rel 32 bit for global dynamic -+ thread local data */ -+#define R_ARM_TLS_LDM32 105 /* PC-rel 32 bit for local dynamic -+ thread local data */ -+#define R_ARM_TLS_LDO32 106 /* 32 bit offset relative to TLS -+ block */ -+#define R_ARM_TLS_IE32 107 /* PC-rel 32 bit for GOT entry of -+ static TLS block offset */ -+#define R_ARM_TLS_LE32 108 /* 32 bit offset relative to static -+ TLS block */ -+#define R_ARM_THM_TLS_DESCSEQ 129 -+#define R_ARM_IRELATIVE 160 -+#define R_ARM_RXPC25 249 -+#define R_ARM_RSBREL32 250 -+#define R_ARM_THM_RPC22 251 -+#define R_ARM_RREL32 252 -+#define R_ARM_RABS22 253 -+#define R_ARM_RPC24 254 -+#define R_ARM_RBASE 255 -+/* Keep this the last entry. */ -+#define R_ARM_NUM 256 -+ -+/* IA-64 specific declarations. */ -+ -+/* Processor specific flags for the Ehdr e_flags field. */ -+#define EF_IA_64_MASKOS 0x0000000f /* os-specific flags */ -+#define EF_IA_64_ABI64 0x00000010 /* 64-bit ABI */ -+#define EF_IA_64_ARCH 0xff000000 /* arch. version mask */ -+ -+/* Processor specific values for the Phdr p_type field. */ -+#define PT_IA_64_ARCHEXT (PT_LOPROC + 0) /* arch extension bits */ -+#define PT_IA_64_UNWIND (PT_LOPROC + 1) /* ia64 unwind bits */ -+#define PT_IA_64_HP_OPT_ANOT (PT_LOOS + 0x12) -+#define PT_IA_64_HP_HSL_ANOT (PT_LOOS + 0x13) -+#define PT_IA_64_HP_STACK (PT_LOOS + 0x14) -+ -+/* Processor specific flags for the Phdr p_flags field. */ -+#define PF_IA_64_NORECOV 0x80000000 /* spec insns w/o recovery */ -+ -+/* Processor specific values for the Shdr sh_type field. */ -+#define SHT_IA_64_EXT (SHT_LOPROC + 0) /* extension bits */ -+#define SHT_IA_64_UNWIND (SHT_LOPROC + 1) /* unwind bits */ -+ -+/* Processor specific flags for the Shdr sh_flags field. */ -+#define SHF_IA_64_SHORT 0x10000000 /* section near gp */ -+#define SHF_IA_64_NORECOV 0x20000000 /* spec insns w/o recovery */ -+ -+/* Processor specific values for the Dyn d_tag field. */ -+#define DT_IA_64_PLT_RESERVE (DT_LOPROC + 0) -+#define DT_IA_64_NUM 1 -+ -+/* IA-64 relocations. */ -+#define R_IA64_NONE 0x00 /* none */ -+#define R_IA64_IMM14 0x21 /* symbol + addend, add imm14 */ -+#define R_IA64_IMM22 0x22 /* symbol + addend, add imm22 */ -+#define R_IA64_IMM64 0x23 /* symbol + addend, mov imm64 */ -+#define R_IA64_DIR32MSB 0x24 /* symbol + addend, data4 MSB */ -+#define R_IA64_DIR32LSB 0x25 /* symbol + addend, data4 LSB */ -+#define R_IA64_DIR64MSB 0x26 /* symbol + addend, data8 MSB */ -+#define R_IA64_DIR64LSB 0x27 /* symbol + addend, data8 LSB */ -+#define R_IA64_GPREL22 0x2a /* @gprel(sym + add), add imm22 */ -+#define R_IA64_GPREL64I 0x2b /* @gprel(sym + add), mov imm64 */ -+#define R_IA64_GPREL32MSB 0x2c /* @gprel(sym + add), data4 MSB */ -+#define R_IA64_GPREL32LSB 0x2d /* @gprel(sym + add), data4 LSB */ -+#define R_IA64_GPREL64MSB 0x2e /* @gprel(sym + add), data8 MSB */ -+#define R_IA64_GPREL64LSB 0x2f /* @gprel(sym + add), data8 LSB */ -+#define R_IA64_LTOFF22 0x32 /* @ltoff(sym + add), add imm22 */ -+#define R_IA64_LTOFF64I 0x33 /* @ltoff(sym + add), mov imm64 */ -+#define R_IA64_PLTOFF22 0x3a /* @pltoff(sym + add), add imm22 */ -+#define R_IA64_PLTOFF64I 0x3b /* @pltoff(sym + add), mov imm64 */ -+#define R_IA64_PLTOFF64MSB 0x3e /* @pltoff(sym + add), data8 MSB */ -+#define R_IA64_PLTOFF64LSB 0x3f /* @pltoff(sym + add), data8 LSB */ -+#define R_IA64_FPTR64I 0x43 /* @fptr(sym + add), mov imm64 */ -+#define R_IA64_FPTR32MSB 0x44 /* @fptr(sym + add), data4 MSB */ -+#define R_IA64_FPTR32LSB 0x45 /* @fptr(sym + add), data4 LSB */ -+#define R_IA64_FPTR64MSB 0x46 /* @fptr(sym + add), data8 MSB */ -+#define R_IA64_FPTR64LSB 0x47 /* @fptr(sym + add), data8 LSB */ -+#define R_IA64_PCREL60B 0x48 /* @pcrel(sym + add), brl */ -+#define R_IA64_PCREL21B 0x49 /* @pcrel(sym + add), ptb, call */ -+#define R_IA64_PCREL21M 0x4a /* @pcrel(sym + add), chk.s */ -+#define R_IA64_PCREL21F 0x4b /* @pcrel(sym + add), fchkf */ -+#define R_IA64_PCREL32MSB 0x4c /* @pcrel(sym + add), data4 MSB */ -+#define R_IA64_PCREL32LSB 0x4d /* @pcrel(sym + add), data4 LSB */ -+#define R_IA64_PCREL64MSB 0x4e /* @pcrel(sym + add), data8 MSB */ -+#define R_IA64_PCREL64LSB 0x4f /* @pcrel(sym + add), data8 LSB */ -+#define R_IA64_LTOFF_FPTR22 0x52 /* @ltoff(@fptr(s+a)), imm22 */ -+#define R_IA64_LTOFF_FPTR64I 0x53 /* @ltoff(@fptr(s+a)), imm64 */ -+#define R_IA64_LTOFF_FPTR32MSB 0x54 /* @ltoff(@fptr(s+a)), data4 MSB */ -+#define R_IA64_LTOFF_FPTR32LSB 0x55 /* @ltoff(@fptr(s+a)), data4 LSB */ -+#define R_IA64_LTOFF_FPTR64MSB 0x56 /* @ltoff(@fptr(s+a)), data8 MSB */ -+#define R_IA64_LTOFF_FPTR64LSB 0x57 /* @ltoff(@fptr(s+a)), data8 LSB */ -+#define R_IA64_SEGREL32MSB 0x5c /* @segrel(sym + add), data4 MSB */ -+#define R_IA64_SEGREL32LSB 0x5d /* @segrel(sym + add), data4 LSB */ -+#define R_IA64_SEGREL64MSB 0x5e /* @segrel(sym + add), data8 MSB */ -+#define R_IA64_SEGREL64LSB 0x5f /* @segrel(sym + add), data8 LSB */ -+#define R_IA64_SECREL32MSB 0x64 /* @secrel(sym + add), data4 MSB */ -+#define R_IA64_SECREL32LSB 0x65 /* @secrel(sym + add), data4 LSB */ -+#define R_IA64_SECREL64MSB 0x66 /* @secrel(sym + add), data8 MSB */ -+#define R_IA64_SECREL64LSB 0x67 /* @secrel(sym + add), data8 LSB */ -+#define R_IA64_REL32MSB 0x6c /* data 4 + REL */ -+#define R_IA64_REL32LSB 0x6d /* data 4 + REL */ -+#define R_IA64_REL64MSB 0x6e /* data 8 + REL */ -+#define R_IA64_REL64LSB 0x6f /* data 8 + REL */ -+#define R_IA64_LTV32MSB 0x74 /* symbol + addend, data4 MSB */ -+#define R_IA64_LTV32LSB 0x75 /* symbol + addend, data4 LSB */ -+#define R_IA64_LTV64MSB 0x76 /* symbol + addend, data8 MSB */ -+#define R_IA64_LTV64LSB 0x77 /* symbol + addend, data8 LSB */ -+#define R_IA64_PCREL21BI 0x79 /* @pcrel(sym + add), 21bit inst */ -+#define R_IA64_PCREL22 0x7a /* @pcrel(sym + add), 22bit inst */ -+#define R_IA64_PCREL64I 0x7b /* @pcrel(sym + add), 64bit inst */ -+#define R_IA64_IPLTMSB 0x80 /* dynamic reloc, imported PLT, MSB */ -+#define R_IA64_IPLTLSB 0x81 /* dynamic reloc, imported PLT, LSB */ -+#define R_IA64_COPY 0x84 /* copy relocation */ -+#define R_IA64_SUB 0x85 /* Addend and symbol difference */ -+#define R_IA64_LTOFF22X 0x86 /* LTOFF22, relaxable. */ -+#define R_IA64_LDXMOV 0x87 /* Use of LTOFF22X. */ -+#define R_IA64_TPREL14 0x91 /* @tprel(sym + add), imm14 */ -+#define R_IA64_TPREL22 0x92 /* @tprel(sym + add), imm22 */ -+#define R_IA64_TPREL64I 0x93 /* @tprel(sym + add), imm64 */ -+#define R_IA64_TPREL64MSB 0x96 /* @tprel(sym + add), data8 MSB */ -+#define R_IA64_TPREL64LSB 0x97 /* @tprel(sym + add), data8 LSB */ -+#define R_IA64_LTOFF_TPREL22 0x9a /* @ltoff(@tprel(s+a)), imm2 */ -+#define R_IA64_DTPMOD64MSB 0xa6 /* @dtpmod(sym + add), data8 MSB */ -+#define R_IA64_DTPMOD64LSB 0xa7 /* @dtpmod(sym + add), data8 LSB */ -+#define R_IA64_LTOFF_DTPMOD22 0xaa /* @ltoff(@dtpmod(sym + add)), imm22 */ -+#define R_IA64_DTPREL14 0xb1 /* @dtprel(sym + add), imm14 */ -+#define R_IA64_DTPREL22 0xb2 /* @dtprel(sym + add), imm22 */ -+#define R_IA64_DTPREL64I 0xb3 /* @dtprel(sym + add), imm64 */ -+#define R_IA64_DTPREL32MSB 0xb4 /* @dtprel(sym + add), data4 MSB */ -+#define R_IA64_DTPREL32LSB 0xb5 /* @dtprel(sym + add), data4 LSB */ -+#define R_IA64_DTPREL64MSB 0xb6 /* @dtprel(sym + add), data8 MSB */ -+#define R_IA64_DTPREL64LSB 0xb7 /* @dtprel(sym + add), data8 LSB */ -+#define R_IA64_LTOFF_DTPREL22 0xba /* @ltoff(@dtprel(s+a)), imm22 */ -+ -+/* SH specific declarations */ -+ -+/* Processor specific flags for the ELF header e_flags field. */ -+#define EF_SH_MACH_MASK 0x1f -+#define EF_SH_UNKNOWN 0x0 -+#define EF_SH1 0x1 -+#define EF_SH2 0x2 -+#define EF_SH3 0x3 -+#define EF_SH_DSP 0x4 -+#define EF_SH3_DSP 0x5 -+#define EF_SH4AL_DSP 0x6 -+#define EF_SH3E 0x8 -+#define EF_SH4 0x9 -+#define EF_SH2E 0xb -+#define EF_SH4A 0xc -+#define EF_SH2A 0xd -+#define EF_SH4_NOFPU 0x10 -+#define EF_SH4A_NOFPU 0x11 -+#define EF_SH4_NOMMU_NOFPU 0x12 -+#define EF_SH2A_NOFPU 0x13 -+#define EF_SH3_NOMMU 0x14 -+#define EF_SH2A_SH4_NOFPU 0x15 -+#define EF_SH2A_SH3_NOFPU 0x16 -+#define EF_SH2A_SH4 0x17 -+#define EF_SH2A_SH3E 0x18 -+ -+/* SH relocs. */ -+#define R_SH_NONE 0 -+#define R_SH_DIR32 1 -+#define R_SH_REL32 2 -+#define R_SH_DIR8WPN 3 -+#define R_SH_IND12W 4 -+#define R_SH_DIR8WPL 5 -+#define R_SH_DIR8WPZ 6 -+#define R_SH_DIR8BP 7 -+#define R_SH_DIR8W 8 -+#define R_SH_DIR8L 9 -+#define R_SH_SWITCH16 25 -+#define R_SH_SWITCH32 26 -+#define R_SH_USES 27 -+#define R_SH_COUNT 28 -+#define R_SH_ALIGN 29 -+#define R_SH_CODE 30 -+#define R_SH_DATA 31 -+#define R_SH_LABEL 32 -+#define R_SH_SWITCH8 33 -+#define R_SH_GNU_VTINHERIT 34 -+#define R_SH_GNU_VTENTRY 35 -+#define R_SH_TLS_GD_32 144 -+#define R_SH_TLS_LD_32 145 -+#define R_SH_TLS_LDO_32 146 -+#define R_SH_TLS_IE_32 147 -+#define R_SH_TLS_LE_32 148 -+#define R_SH_TLS_DTPMOD32 149 -+#define R_SH_TLS_DTPOFF32 150 -+#define R_SH_TLS_TPOFF32 151 -+#define R_SH_GOT32 160 -+#define R_SH_PLT32 161 -+#define R_SH_COPY 162 -+#define R_SH_GLOB_DAT 163 -+#define R_SH_JMP_SLOT 164 -+#define R_SH_RELATIVE 165 -+#define R_SH_GOTOFF 166 -+#define R_SH_GOTPC 167 -+/* Keep this the last entry. */ -+#define R_SH_NUM 256 -+ -+/* S/390 specific definitions. */ -+ -+/* Valid values for the e_flags field. */ -+ -+#define EF_S390_HIGH_GPRS 0x00000001 /* High GPRs kernel facility needed. */ -+ -+/* Additional s390 relocs */ -+ -+#define R_390_NONE 0 /* No reloc. */ -+#define R_390_8 1 /* Direct 8 bit. */ -+#define R_390_12 2 /* Direct 12 bit. */ -+#define R_390_16 3 /* Direct 16 bit. */ -+#define R_390_32 4 /* Direct 32 bit. */ -+#define R_390_PC32 5 /* PC relative 32 bit. */ -+#define R_390_GOT12 6 /* 12 bit GOT offset. */ -+#define R_390_GOT32 7 /* 32 bit GOT offset. */ -+#define R_390_PLT32 8 /* 32 bit PC relative PLT address. */ -+#define R_390_COPY 9 /* Copy symbol at runtime. */ -+#define R_390_GLOB_DAT 10 /* Create GOT entry. */ -+#define R_390_JMP_SLOT 11 /* Create PLT entry. */ -+#define R_390_RELATIVE 12 /* Adjust by program base. */ -+#define R_390_GOTOFF32 13 /* 32 bit offset to GOT. */ -+#define R_390_GOTPC 14 /* 32 bit PC relative offset to GOT. */ -+#define R_390_GOT16 15 /* 16 bit GOT offset. */ -+#define R_390_PC16 16 /* PC relative 16 bit. */ -+#define R_390_PC16DBL 17 /* PC relative 16 bit shifted by 1. */ -+#define R_390_PLT16DBL 18 /* 16 bit PC rel. PLT shifted by 1. */ -+#define R_390_PC32DBL 19 /* PC relative 32 bit shifted by 1. */ -+#define R_390_PLT32DBL 20 /* 32 bit PC rel. PLT shifted by 1. */ -+#define R_390_GOTPCDBL 21 /* 32 bit PC rel. GOT shifted by 1. */ -+#define R_390_64 22 /* Direct 64 bit. */ -+#define R_390_PC64 23 /* PC relative 64 bit. */ -+#define R_390_GOT64 24 /* 64 bit GOT offset. */ -+#define R_390_PLT64 25 /* 64 bit PC relative PLT address. */ -+#define R_390_GOTENT 26 /* 32 bit PC rel. to GOT entry >> 1. */ -+#define R_390_GOTOFF16 27 /* 16 bit offset to GOT. */ -+#define R_390_GOTOFF64 28 /* 64 bit offset to GOT. */ -+#define R_390_GOTPLT12 29 /* 12 bit offset to jump slot. */ -+#define R_390_GOTPLT16 30 /* 16 bit offset to jump slot. */ -+#define R_390_GOTPLT32 31 /* 32 bit offset to jump slot. */ -+#define R_390_GOTPLT64 32 /* 64 bit offset to jump slot. */ -+#define R_390_GOTPLTENT 33 /* 32 bit rel. offset to jump slot. */ -+#define R_390_PLTOFF16 34 /* 16 bit offset from GOT to PLT. */ -+#define R_390_PLTOFF32 35 /* 32 bit offset from GOT to PLT. */ -+#define R_390_PLTOFF64 36 /* 16 bit offset from GOT to PLT. */ -+#define R_390_TLS_LOAD 37 /* Tag for load insn in TLS code. */ -+#define R_390_TLS_GDCALL 38 /* Tag for function call in general -+ dynamic TLS code. */ -+#define R_390_TLS_LDCALL 39 /* Tag for function call in local -+ dynamic TLS code. */ -+#define R_390_TLS_GD32 40 /* Direct 32 bit for general dynamic -+ thread local data. */ -+#define R_390_TLS_GD64 41 /* Direct 64 bit for general dynamic -+ thread local data. */ -+#define R_390_TLS_GOTIE12 42 /* 12 bit GOT offset for static TLS -+ block offset. */ -+#define R_390_TLS_GOTIE32 43 /* 32 bit GOT offset for static TLS -+ block offset. */ -+#define R_390_TLS_GOTIE64 44 /* 64 bit GOT offset for static TLS -+ block offset. */ -+#define R_390_TLS_LDM32 45 /* Direct 32 bit for local dynamic -+ thread local data in LE code. */ -+#define R_390_TLS_LDM64 46 /* Direct 64 bit for local dynamic -+ thread local data in LE code. */ -+#define R_390_TLS_IE32 47 /* 32 bit address of GOT entry for -+ negated static TLS block offset. */ -+#define R_390_TLS_IE64 48 /* 64 bit address of GOT entry for -+ negated static TLS block offset. */ -+#define R_390_TLS_IEENT 49 /* 32 bit rel. offset to GOT entry for -+ negated static TLS block offset. */ -+#define R_390_TLS_LE32 50 /* 32 bit negated offset relative to -+ static TLS block. */ -+#define R_390_TLS_LE64 51 /* 64 bit negated offset relative to -+ static TLS block. */ -+#define R_390_TLS_LDO32 52 /* 32 bit offset relative to TLS -+ block. */ -+#define R_390_TLS_LDO64 53 /* 64 bit offset relative to TLS -+ block. */ -+#define R_390_TLS_DTPMOD 54 /* ID of module containing symbol. */ -+#define R_390_TLS_DTPOFF 55 /* Offset in TLS block. */ -+#define R_390_TLS_TPOFF 56 /* Negated offset in static TLS -+ block. */ -+#define R_390_20 57 /* Direct 20 bit. */ -+#define R_390_GOT20 58 /* 20 bit GOT offset. */ -+#define R_390_GOTPLT20 59 /* 20 bit offset to jump slot. */ -+#define R_390_TLS_GOTIE20 60 /* 20 bit GOT offset for static TLS -+ block offset. */ -+#define R_390_IRELATIVE 61 /* STT_GNU_IFUNC relocation. */ -+/* Keep this the last entry. */ -+#define R_390_NUM 62 -+ -+ -+/* CRIS relocations. */ -+#define R_CRIS_NONE 0 -+#define R_CRIS_8 1 -+#define R_CRIS_16 2 -+#define R_CRIS_32 3 -+#define R_CRIS_8_PCREL 4 -+#define R_CRIS_16_PCREL 5 -+#define R_CRIS_32_PCREL 6 -+#define R_CRIS_GNU_VTINHERIT 7 -+#define R_CRIS_GNU_VTENTRY 8 -+#define R_CRIS_COPY 9 -+#define R_CRIS_GLOB_DAT 10 -+#define R_CRIS_JUMP_SLOT 11 -+#define R_CRIS_RELATIVE 12 -+#define R_CRIS_16_GOT 13 -+#define R_CRIS_32_GOT 14 -+#define R_CRIS_16_GOTPLT 15 -+#define R_CRIS_32_GOTPLT 16 -+#define R_CRIS_32_GOTREL 17 -+#define R_CRIS_32_PLT_GOTREL 18 -+#define R_CRIS_32_PLT_PCREL 19 -+ -+#define R_CRIS_NUM 20 -+ -+ -+/* AMD x86-64 relocations. */ -+#define R_X86_64_NONE 0 /* No reloc */ -+#define R_X86_64_64 1 /* Direct 64 bit */ -+#define R_X86_64_PC32 2 /* PC relative 32 bit signed */ -+#define R_X86_64_GOT32 3 /* 32 bit GOT entry */ -+#define R_X86_64_PLT32 4 /* 32 bit PLT address */ -+#define R_X86_64_COPY 5 /* Copy symbol at runtime */ -+#define R_X86_64_GLOB_DAT 6 /* Create GOT entry */ -+#define R_X86_64_JUMP_SLOT 7 /* Create PLT entry */ -+#define R_X86_64_RELATIVE 8 /* Adjust by program base */ -+#define R_X86_64_GOTPCREL 9 /* 32 bit signed PC relative -+ offset to GOT */ -+#define R_X86_64_32 10 /* Direct 32 bit zero extended */ -+#define R_X86_64_32S 11 /* Direct 32 bit sign extended */ -+#define R_X86_64_16 12 /* Direct 16 bit zero extended */ -+#define R_X86_64_PC16 13 /* 16 bit sign extended pc relative */ -+#define R_X86_64_8 14 /* Direct 8 bit sign extended */ -+#define R_X86_64_PC8 15 /* 8 bit sign extended pc relative */ -+#define R_X86_64_DTPMOD64 16 /* ID of module containing symbol */ -+#define R_X86_64_DTPOFF64 17 /* Offset in module's TLS block */ -+#define R_X86_64_TPOFF64 18 /* Offset in initial TLS block */ -+#define R_X86_64_TLSGD 19 /* 32 bit signed PC relative offset -+ to two GOT entries for GD symbol */ -+#define R_X86_64_TLSLD 20 /* 32 bit signed PC relative offset -+ to two GOT entries for LD symbol */ -+#define R_X86_64_DTPOFF32 21 /* Offset in TLS block */ -+#define R_X86_64_GOTTPOFF 22 /* 32 bit signed PC relative offset -+ to GOT entry for IE symbol */ -+#define R_X86_64_TPOFF32 23 /* Offset in initial TLS block */ -+#define R_X86_64_PC64 24 /* PC relative 64 bit */ -+#define R_X86_64_GOTOFF64 25 /* 64 bit offset to GOT */ -+#define R_X86_64_GOTPC32 26 /* 32 bit signed pc relative -+ offset to GOT */ -+#define R_X86_64_GOT64 27 /* 64-bit GOT entry offset */ -+#define R_X86_64_GOTPCREL64 28 /* 64-bit PC relative offset -+ to GOT entry */ -+#define R_X86_64_GOTPC64 29 /* 64-bit PC relative offset to GOT */ -+#define R_X86_64_GOTPLT64 30 /* like GOT64, says PLT entry needed */ -+#define R_X86_64_PLTOFF64 31 /* 64-bit GOT relative offset -+ to PLT entry */ -+#define R_X86_64_SIZE32 32 /* Size of symbol plus 32-bit addend */ -+#define R_X86_64_SIZE64 33 /* Size of symbol plus 64-bit addend */ -+#define R_X86_64_GOTPC32_TLSDESC 34 /* GOT offset for TLS descriptor. */ -+#define R_X86_64_TLSDESC_CALL 35 /* Marker for call through TLS -+ descriptor. */ -+#define R_X86_64_TLSDESC 36 /* TLS descriptor. */ -+#define R_X86_64_IRELATIVE 37 /* Adjust indirectly by program base */ -+#define R_X86_64_RELATIVE64 38 /* 64-bit adjust by program base */ -+ -+#define R_X86_64_NUM 39 -+ -+ -+/* AM33 relocations. */ -+#define R_MN10300_NONE 0 /* No reloc. */ -+#define R_MN10300_32 1 /* Direct 32 bit. */ -+#define R_MN10300_16 2 /* Direct 16 bit. */ -+#define R_MN10300_8 3 /* Direct 8 bit. */ -+#define R_MN10300_PCREL32 4 /* PC-relative 32-bit. */ -+#define R_MN10300_PCREL16 5 /* PC-relative 16-bit signed. */ -+#define R_MN10300_PCREL8 6 /* PC-relative 8-bit signed. */ -+#define R_MN10300_GNU_VTINHERIT 7 /* Ancient C++ vtable garbage... */ -+#define R_MN10300_GNU_VTENTRY 8 /* ... collection annotation. */ -+#define R_MN10300_24 9 /* Direct 24 bit. */ -+#define R_MN10300_GOTPC32 10 /* 32-bit PCrel offset to GOT. */ -+#define R_MN10300_GOTPC16 11 /* 16-bit PCrel offset to GOT. */ -+#define R_MN10300_GOTOFF32 12 /* 32-bit offset from GOT. */ -+#define R_MN10300_GOTOFF24 13 /* 24-bit offset from GOT. */ -+#define R_MN10300_GOTOFF16 14 /* 16-bit offset from GOT. */ -+#define R_MN10300_PLT32 15 /* 32-bit PCrel to PLT entry. */ -+#define R_MN10300_PLT16 16 /* 16-bit PCrel to PLT entry. */ -+#define R_MN10300_GOT32 17 /* 32-bit offset to GOT entry. */ -+#define R_MN10300_GOT24 18 /* 24-bit offset to GOT entry. */ -+#define R_MN10300_GOT16 19 /* 16-bit offset to GOT entry. */ -+#define R_MN10300_COPY 20 /* Copy symbol at runtime. */ -+#define R_MN10300_GLOB_DAT 21 /* Create GOT entry. */ -+#define R_MN10300_JMP_SLOT 22 /* Create PLT entry. */ -+#define R_MN10300_RELATIVE 23 /* Adjust by program base. */ -+ -+#define R_MN10300_NUM 24 -+ -+ -+/* M32R relocs. */ -+#define R_M32R_NONE 0 /* No reloc. */ -+#define R_M32R_16 1 /* Direct 16 bit. */ -+#define R_M32R_32 2 /* Direct 32 bit. */ -+#define R_M32R_24 3 /* Direct 24 bit. */ -+#define R_M32R_10_PCREL 4 /* PC relative 10 bit shifted. */ -+#define R_M32R_18_PCREL 5 /* PC relative 18 bit shifted. */ -+#define R_M32R_26_PCREL 6 /* PC relative 26 bit shifted. */ -+#define R_M32R_HI16_ULO 7 /* High 16 bit with unsigned low. */ -+#define R_M32R_HI16_SLO 8 /* High 16 bit with signed low. */ -+#define R_M32R_LO16 9 /* Low 16 bit. */ -+#define R_M32R_SDA16 10 /* 16 bit offset in SDA. */ -+#define R_M32R_GNU_VTINHERIT 11 -+#define R_M32R_GNU_VTENTRY 12 -+/* M32R relocs use SHT_RELA. */ -+#define R_M32R_16_RELA 33 /* Direct 16 bit. */ -+#define R_M32R_32_RELA 34 /* Direct 32 bit. */ -+#define R_M32R_24_RELA 35 /* Direct 24 bit. */ -+#define R_M32R_10_PCREL_RELA 36 /* PC relative 10 bit shifted. */ -+#define R_M32R_18_PCREL_RELA 37 /* PC relative 18 bit shifted. */ -+#define R_M32R_26_PCREL_RELA 38 /* PC relative 26 bit shifted. */ -+#define R_M32R_HI16_ULO_RELA 39 /* High 16 bit with unsigned low */ -+#define R_M32R_HI16_SLO_RELA 40 /* High 16 bit with signed low */ -+#define R_M32R_LO16_RELA 41 /* Low 16 bit */ -+#define R_M32R_SDA16_RELA 42 /* 16 bit offset in SDA */ -+#define R_M32R_RELA_GNU_VTINHERIT 43 -+#define R_M32R_RELA_GNU_VTENTRY 44 -+#define R_M32R_REL32 45 /* PC relative 32 bit. */ -+ -+#define R_M32R_GOT24 48 /* 24 bit GOT entry */ -+#define R_M32R_26_PLTREL 49 /* 26 bit PC relative to PLT shifted */ -+#define R_M32R_COPY 50 /* Copy symbol at runtime */ -+#define R_M32R_GLOB_DAT 51 /* Create GOT entry */ -+#define R_M32R_JMP_SLOT 52 /* Create PLT entry */ -+#define R_M32R_RELATIVE 53 /* Adjust by program base */ -+#define R_M32R_GOTOFF 54 /* 24 bit offset to GOT */ -+#define R_M32R_GOTPC24 55 /* 24 bit PC relative offset to GOT */ -+#define R_M32R_GOT16_HI_ULO 56 /* High 16 bit GOT entry with unsigned -+ low */ -+#define R_M32R_GOT16_HI_SLO 57 /* High 16 bit GOT entry with signed -+ low */ -+#define R_M32R_GOT16_LO 58 /* Low 16 bit GOT entry */ -+#define R_M32R_GOTPC_HI_ULO 59 /* High 16 bit PC relative offset to -+ GOT with unsigned low */ -+#define R_M32R_GOTPC_HI_SLO 60 /* High 16 bit PC relative offset to -+ GOT with signed low */ -+#define R_M32R_GOTPC_LO 61 /* Low 16 bit PC relative offset to -+ GOT */ -+#define R_M32R_GOTOFF_HI_ULO 62 /* High 16 bit offset to GOT -+ with unsigned low */ -+#define R_M32R_GOTOFF_HI_SLO 63 /* High 16 bit offset to GOT -+ with signed low */ -+#define R_M32R_GOTOFF_LO 64 /* Low 16 bit offset to GOT */ -+#define R_M32R_NUM 256 /* Keep this the last entry. */ -+ -+ -+/* TILEPro relocations. */ -+#define R_TILEPRO_NONE 0 /* No reloc */ -+#define R_TILEPRO_32 1 /* Direct 32 bit */ -+#define R_TILEPRO_16 2 /* Direct 16 bit */ -+#define R_TILEPRO_8 3 /* Direct 8 bit */ -+#define R_TILEPRO_32_PCREL 4 /* PC relative 32 bit */ -+#define R_TILEPRO_16_PCREL 5 /* PC relative 16 bit */ -+#define R_TILEPRO_8_PCREL 6 /* PC relative 8 bit */ -+#define R_TILEPRO_LO16 7 /* Low 16 bit */ -+#define R_TILEPRO_HI16 8 /* High 16 bit */ -+#define R_TILEPRO_HA16 9 /* High 16 bit, adjusted */ -+#define R_TILEPRO_COPY 10 /* Copy relocation */ -+#define R_TILEPRO_GLOB_DAT 11 /* Create GOT entry */ -+#define R_TILEPRO_JMP_SLOT 12 /* Create PLT entry */ -+#define R_TILEPRO_RELATIVE 13 /* Adjust by program base */ -+#define R_TILEPRO_BROFF_X1 14 /* X1 pipe branch offset */ -+#define R_TILEPRO_JOFFLONG_X1 15 /* X1 pipe jump offset */ -+#define R_TILEPRO_JOFFLONG_X1_PLT 16 /* X1 pipe jump offset to PLT */ -+#define R_TILEPRO_IMM8_X0 17 /* X0 pipe 8-bit */ -+#define R_TILEPRO_IMM8_Y0 18 /* Y0 pipe 8-bit */ -+#define R_TILEPRO_IMM8_X1 19 /* X1 pipe 8-bit */ -+#define R_TILEPRO_IMM8_Y1 20 /* Y1 pipe 8-bit */ -+#define R_TILEPRO_MT_IMM15_X1 21 /* X1 pipe mtspr */ -+#define R_TILEPRO_MF_IMM15_X1 22 /* X1 pipe mfspr */ -+#define R_TILEPRO_IMM16_X0 23 /* X0 pipe 16-bit */ -+#define R_TILEPRO_IMM16_X1 24 /* X1 pipe 16-bit */ -+#define R_TILEPRO_IMM16_X0_LO 25 /* X0 pipe low 16-bit */ -+#define R_TILEPRO_IMM16_X1_LO 26 /* X1 pipe low 16-bit */ -+#define R_TILEPRO_IMM16_X0_HI 27 /* X0 pipe high 16-bit */ -+#define R_TILEPRO_IMM16_X1_HI 28 /* X1 pipe high 16-bit */ -+#define R_TILEPRO_IMM16_X0_HA 29 /* X0 pipe high 16-bit, adjusted */ -+#define R_TILEPRO_IMM16_X1_HA 30 /* X1 pipe high 16-bit, adjusted */ -+#define R_TILEPRO_IMM16_X0_PCREL 31 /* X0 pipe PC relative 16 bit */ -+#define R_TILEPRO_IMM16_X1_PCREL 32 /* X1 pipe PC relative 16 bit */ -+#define R_TILEPRO_IMM16_X0_LO_PCREL 33 /* X0 pipe PC relative low 16 bit */ -+#define R_TILEPRO_IMM16_X1_LO_PCREL 34 /* X1 pipe PC relative low 16 bit */ -+#define R_TILEPRO_IMM16_X0_HI_PCREL 35 /* X0 pipe PC relative high 16 bit */ -+#define R_TILEPRO_IMM16_X1_HI_PCREL 36 /* X1 pipe PC relative high 16 bit */ -+#define R_TILEPRO_IMM16_X0_HA_PCREL 37 /* X0 pipe PC relative ha() 16 bit */ -+#define R_TILEPRO_IMM16_X1_HA_PCREL 38 /* X1 pipe PC relative ha() 16 bit */ -+#define R_TILEPRO_IMM16_X0_GOT 39 /* X0 pipe 16-bit GOT offset */ -+#define R_TILEPRO_IMM16_X1_GOT 40 /* X1 pipe 16-bit GOT offset */ -+#define R_TILEPRO_IMM16_X0_GOT_LO 41 /* X0 pipe low 16-bit GOT offset */ -+#define R_TILEPRO_IMM16_X1_GOT_LO 42 /* X1 pipe low 16-bit GOT offset */ -+#define R_TILEPRO_IMM16_X0_GOT_HI 43 /* X0 pipe high 16-bit GOT offset */ -+#define R_TILEPRO_IMM16_X1_GOT_HI 44 /* X1 pipe high 16-bit GOT offset */ -+#define R_TILEPRO_IMM16_X0_GOT_HA 45 /* X0 pipe ha() 16-bit GOT offset */ -+#define R_TILEPRO_IMM16_X1_GOT_HA 46 /* X1 pipe ha() 16-bit GOT offset */ -+#define R_TILEPRO_MMSTART_X0 47 /* X0 pipe mm "start" */ -+#define R_TILEPRO_MMEND_X0 48 /* X0 pipe mm "end" */ -+#define R_TILEPRO_MMSTART_X1 49 /* X1 pipe mm "start" */ -+#define R_TILEPRO_MMEND_X1 50 /* X1 pipe mm "end" */ -+#define R_TILEPRO_SHAMT_X0 51 /* X0 pipe shift amount */ -+#define R_TILEPRO_SHAMT_X1 52 /* X1 pipe shift amount */ -+#define R_TILEPRO_SHAMT_Y0 53 /* Y0 pipe shift amount */ -+#define R_TILEPRO_SHAMT_Y1 54 /* Y1 pipe shift amount */ -+#define R_TILEPRO_DEST_IMM8_X1 55 /* X1 pipe destination 8-bit */ -+/* Relocs 56-59 are currently not defined. */ -+#define R_TILEPRO_TLS_GD_CALL 60 /* "jal" for TLS GD */ -+#define R_TILEPRO_IMM8_X0_TLS_GD_ADD 61 /* X0 pipe "addi" for TLS GD */ -+#define R_TILEPRO_IMM8_X1_TLS_GD_ADD 62 /* X1 pipe "addi" for TLS GD */ -+#define R_TILEPRO_IMM8_Y0_TLS_GD_ADD 63 /* Y0 pipe "addi" for TLS GD */ -+#define R_TILEPRO_IMM8_Y1_TLS_GD_ADD 64 /* Y1 pipe "addi" for TLS GD */ -+#define R_TILEPRO_TLS_IE_LOAD 65 /* "lw_tls" for TLS IE */ -+#define R_TILEPRO_IMM16_X0_TLS_GD 66 /* X0 pipe 16-bit TLS GD offset */ -+#define R_TILEPRO_IMM16_X1_TLS_GD 67 /* X1 pipe 16-bit TLS GD offset */ -+#define R_TILEPRO_IMM16_X0_TLS_GD_LO 68 /* X0 pipe low 16-bit TLS GD offset */ -+#define R_TILEPRO_IMM16_X1_TLS_GD_LO 69 /* X1 pipe low 16-bit TLS GD offset */ -+#define R_TILEPRO_IMM16_X0_TLS_GD_HI 70 /* X0 pipe high 16-bit TLS GD offset */ -+#define R_TILEPRO_IMM16_X1_TLS_GD_HI 71 /* X1 pipe high 16-bit TLS GD offset */ -+#define R_TILEPRO_IMM16_X0_TLS_GD_HA 72 /* X0 pipe ha() 16-bit TLS GD offset */ -+#define R_TILEPRO_IMM16_X1_TLS_GD_HA 73 /* X1 pipe ha() 16-bit TLS GD offset */ -+#define R_TILEPRO_IMM16_X0_TLS_IE 74 /* X0 pipe 16-bit TLS IE offset */ -+#define R_TILEPRO_IMM16_X1_TLS_IE 75 /* X1 pipe 16-bit TLS IE offset */ -+#define R_TILEPRO_IMM16_X0_TLS_IE_LO 76 /* X0 pipe low 16-bit TLS IE offset */ -+#define R_TILEPRO_IMM16_X1_TLS_IE_LO 77 /* X1 pipe low 16-bit TLS IE offset */ -+#define R_TILEPRO_IMM16_X0_TLS_IE_HI 78 /* X0 pipe high 16-bit TLS IE offset */ -+#define R_TILEPRO_IMM16_X1_TLS_IE_HI 79 /* X1 pipe high 16-bit TLS IE offset */ -+#define R_TILEPRO_IMM16_X0_TLS_IE_HA 80 /* X0 pipe ha() 16-bit TLS IE offset */ -+#define R_TILEPRO_IMM16_X1_TLS_IE_HA 81 /* X1 pipe ha() 16-bit TLS IE offset */ -+#define R_TILEPRO_TLS_DTPMOD32 82 /* ID of module containing symbol */ -+#define R_TILEPRO_TLS_DTPOFF32 83 /* Offset in TLS block */ -+#define R_TILEPRO_TLS_TPOFF32 84 /* Offset in static TLS block */ -+#define R_TILEPRO_IMM16_X0_TLS_LE 85 /* X0 pipe 16-bit TLS LE offset */ -+#define R_TILEPRO_IMM16_X1_TLS_LE 86 /* X1 pipe 16-bit TLS LE offset */ -+#define R_TILEPRO_IMM16_X0_TLS_LE_LO 87 /* X0 pipe low 16-bit TLS LE offset */ -+#define R_TILEPRO_IMM16_X1_TLS_LE_LO 88 /* X1 pipe low 16-bit TLS LE offset */ -+#define R_TILEPRO_IMM16_X0_TLS_LE_HI 89 /* X0 pipe high 16-bit TLS LE offset */ -+#define R_TILEPRO_IMM16_X1_TLS_LE_HI 90 /* X1 pipe high 16-bit TLS LE offset */ -+#define R_TILEPRO_IMM16_X0_TLS_LE_HA 91 /* X0 pipe ha() 16-bit TLS LE offset */ -+#define R_TILEPRO_IMM16_X1_TLS_LE_HA 92 /* X1 pipe ha() 16-bit TLS LE offset */ -+ -+#define R_TILEPRO_GNU_VTINHERIT 128 /* GNU C++ vtable hierarchy */ -+#define R_TILEPRO_GNU_VTENTRY 129 /* GNU C++ vtable member usage */ -+ -+#define R_TILEPRO_NUM 130 -+ -+ -+/* TILE-Gx relocations. */ -+#define R_TILEGX_NONE 0 /* No reloc */ -+#define R_TILEGX_64 1 /* Direct 64 bit */ -+#define R_TILEGX_32 2 /* Direct 32 bit */ -+#define R_TILEGX_16 3 /* Direct 16 bit */ -+#define R_TILEGX_8 4 /* Direct 8 bit */ -+#define R_TILEGX_64_PCREL 5 /* PC relative 64 bit */ -+#define R_TILEGX_32_PCREL 6 /* PC relative 32 bit */ -+#define R_TILEGX_16_PCREL 7 /* PC relative 16 bit */ -+#define R_TILEGX_8_PCREL 8 /* PC relative 8 bit */ -+#define R_TILEGX_HW0 9 /* hword 0 16-bit */ -+#define R_TILEGX_HW1 10 /* hword 1 16-bit */ -+#define R_TILEGX_HW2 11 /* hword 2 16-bit */ -+#define R_TILEGX_HW3 12 /* hword 3 16-bit */ -+#define R_TILEGX_HW0_LAST 13 /* last hword 0 16-bit */ -+#define R_TILEGX_HW1_LAST 14 /* last hword 1 16-bit */ -+#define R_TILEGX_HW2_LAST 15 /* last hword 2 16-bit */ -+#define R_TILEGX_COPY 16 /* Copy relocation */ -+#define R_TILEGX_GLOB_DAT 17 /* Create GOT entry */ -+#define R_TILEGX_JMP_SLOT 18 /* Create PLT entry */ -+#define R_TILEGX_RELATIVE 19 /* Adjust by program base */ -+#define R_TILEGX_BROFF_X1 20 /* X1 pipe branch offset */ -+#define R_TILEGX_JUMPOFF_X1 21 /* X1 pipe jump offset */ -+#define R_TILEGX_JUMPOFF_X1_PLT 22 /* X1 pipe jump offset to PLT */ -+#define R_TILEGX_IMM8_X0 23 /* X0 pipe 8-bit */ -+#define R_TILEGX_IMM8_Y0 24 /* Y0 pipe 8-bit */ -+#define R_TILEGX_IMM8_X1 25 /* X1 pipe 8-bit */ -+#define R_TILEGX_IMM8_Y1 26 /* Y1 pipe 8-bit */ -+#define R_TILEGX_DEST_IMM8_X1 27 /* X1 pipe destination 8-bit */ -+#define R_TILEGX_MT_IMM14_X1 28 /* X1 pipe mtspr */ -+#define R_TILEGX_MF_IMM14_X1 29 /* X1 pipe mfspr */ -+#define R_TILEGX_MMSTART_X0 30 /* X0 pipe mm "start" */ -+#define R_TILEGX_MMEND_X0 31 /* X0 pipe mm "end" */ -+#define R_TILEGX_SHAMT_X0 32 /* X0 pipe shift amount */ -+#define R_TILEGX_SHAMT_X1 33 /* X1 pipe shift amount */ -+#define R_TILEGX_SHAMT_Y0 34 /* Y0 pipe shift amount */ -+#define R_TILEGX_SHAMT_Y1 35 /* Y1 pipe shift amount */ -+#define R_TILEGX_IMM16_X0_HW0 36 /* X0 pipe hword 0 */ -+#define R_TILEGX_IMM16_X1_HW0 37 /* X1 pipe hword 0 */ -+#define R_TILEGX_IMM16_X0_HW1 38 /* X0 pipe hword 1 */ -+#define R_TILEGX_IMM16_X1_HW1 39 /* X1 pipe hword 1 */ -+#define R_TILEGX_IMM16_X0_HW2 40 /* X0 pipe hword 2 */ -+#define R_TILEGX_IMM16_X1_HW2 41 /* X1 pipe hword 2 */ -+#define R_TILEGX_IMM16_X0_HW3 42 /* X0 pipe hword 3 */ -+#define R_TILEGX_IMM16_X1_HW3 43 /* X1 pipe hword 3 */ -+#define R_TILEGX_IMM16_X0_HW0_LAST 44 /* X0 pipe last hword 0 */ -+#define R_TILEGX_IMM16_X1_HW0_LAST 45 /* X1 pipe last hword 0 */ -+#define R_TILEGX_IMM16_X0_HW1_LAST 46 /* X0 pipe last hword 1 */ -+#define R_TILEGX_IMM16_X1_HW1_LAST 47 /* X1 pipe last hword 1 */ -+#define R_TILEGX_IMM16_X0_HW2_LAST 48 /* X0 pipe last hword 2 */ -+#define R_TILEGX_IMM16_X1_HW2_LAST 49 /* X1 pipe last hword 2 */ -+#define R_TILEGX_IMM16_X0_HW0_PCREL 50 /* X0 pipe PC relative hword 0 */ -+#define R_TILEGX_IMM16_X1_HW0_PCREL 51 /* X1 pipe PC relative hword 0 */ -+#define R_TILEGX_IMM16_X0_HW1_PCREL 52 /* X0 pipe PC relative hword 1 */ -+#define R_TILEGX_IMM16_X1_HW1_PCREL 53 /* X1 pipe PC relative hword 1 */ -+#define R_TILEGX_IMM16_X0_HW2_PCREL 54 /* X0 pipe PC relative hword 2 */ -+#define R_TILEGX_IMM16_X1_HW2_PCREL 55 /* X1 pipe PC relative hword 2 */ -+#define R_TILEGX_IMM16_X0_HW3_PCREL 56 /* X0 pipe PC relative hword 3 */ -+#define R_TILEGX_IMM16_X1_HW3_PCREL 57 /* X1 pipe PC relative hword 3 */ -+#define R_TILEGX_IMM16_X0_HW0_LAST_PCREL 58 /* X0 pipe PC-rel last hword 0 */ -+#define R_TILEGX_IMM16_X1_HW0_LAST_PCREL 59 /* X1 pipe PC-rel last hword 0 */ -+#define R_TILEGX_IMM16_X0_HW1_LAST_PCREL 60 /* X0 pipe PC-rel last hword 1 */ -+#define R_TILEGX_IMM16_X1_HW1_LAST_PCREL 61 /* X1 pipe PC-rel last hword 1 */ -+#define R_TILEGX_IMM16_X0_HW2_LAST_PCREL 62 /* X0 pipe PC-rel last hword 2 */ -+#define R_TILEGX_IMM16_X1_HW2_LAST_PCREL 63 /* X1 pipe PC-rel last hword 2 */ -+#define R_TILEGX_IMM16_X0_HW0_GOT 64 /* X0 pipe hword 0 GOT offset */ -+#define R_TILEGX_IMM16_X1_HW0_GOT 65 /* X1 pipe hword 0 GOT offset */ -+/* Relocs 66-71 are currently not defined. */ -+#define R_TILEGX_IMM16_X0_HW0_LAST_GOT 72 /* X0 pipe last hword 0 GOT offset */ -+#define R_TILEGX_IMM16_X1_HW0_LAST_GOT 73 /* X1 pipe last hword 0 GOT offset */ -+#define R_TILEGX_IMM16_X0_HW1_LAST_GOT 74 /* X0 pipe last hword 1 GOT offset */ -+#define R_TILEGX_IMM16_X1_HW1_LAST_GOT 75 /* X1 pipe last hword 1 GOT offset */ -+/* Relocs 76-77 are currently not defined. */ -+#define R_TILEGX_IMM16_X0_HW0_TLS_GD 78 /* X0 pipe hword 0 TLS GD offset */ -+#define R_TILEGX_IMM16_X1_HW0_TLS_GD 79 /* X1 pipe hword 0 TLS GD offset */ -+#define R_TILEGX_IMM16_X0_HW0_TLS_LE 80 /* X0 pipe hword 0 TLS LE offset */ -+#define R_TILEGX_IMM16_X1_HW0_TLS_LE 81 /* X1 pipe hword 0 TLS LE offset */ -+#define R_TILEGX_IMM16_X0_HW0_LAST_TLS_LE 82 /* X0 pipe last hword 0 LE off */ -+#define R_TILEGX_IMM16_X1_HW0_LAST_TLS_LE 83 /* X1 pipe last hword 0 LE off */ -+#define R_TILEGX_IMM16_X0_HW1_LAST_TLS_LE 84 /* X0 pipe last hword 1 LE off */ -+#define R_TILEGX_IMM16_X1_HW1_LAST_TLS_LE 85 /* X1 pipe last hword 1 LE off */ -+#define R_TILEGX_IMM16_X0_HW0_LAST_TLS_GD 86 /* X0 pipe last hword 0 GD off */ -+#define R_TILEGX_IMM16_X1_HW0_LAST_TLS_GD 87 /* X1 pipe last hword 0 GD off */ -+#define R_TILEGX_IMM16_X0_HW1_LAST_TLS_GD 88 /* X0 pipe last hword 1 GD off */ -+#define R_TILEGX_IMM16_X1_HW1_LAST_TLS_GD 89 /* X1 pipe last hword 1 GD off */ -+/* Relocs 90-91 are currently not defined. */ -+#define R_TILEGX_IMM16_X0_HW0_TLS_IE 92 /* X0 pipe hword 0 TLS IE offset */ -+#define R_TILEGX_IMM16_X1_HW0_TLS_IE 93 /* X1 pipe hword 0 TLS IE offset */ -+/* Relocs 94-99 are currently not defined. */ -+#define R_TILEGX_IMM16_X0_HW0_LAST_TLS_IE 100 /* X0 pipe last hword 0 IE off */ -+#define R_TILEGX_IMM16_X1_HW0_LAST_TLS_IE 101 /* X1 pipe last hword 0 IE off */ -+#define R_TILEGX_IMM16_X0_HW1_LAST_TLS_IE 102 /* X0 pipe last hword 1 IE off */ -+#define R_TILEGX_IMM16_X1_HW1_LAST_TLS_IE 103 /* X1 pipe last hword 1 IE off */ -+/* Relocs 104-105 are currently not defined. */ -+#define R_TILEGX_TLS_DTPMOD64 106 /* 64-bit ID of symbol's module */ -+#define R_TILEGX_TLS_DTPOFF64 107 /* 64-bit offset in TLS block */ -+#define R_TILEGX_TLS_TPOFF64 108 /* 64-bit offset in static TLS block */ -+#define R_TILEGX_TLS_DTPMOD32 109 /* 32-bit ID of symbol's module */ -+#define R_TILEGX_TLS_DTPOFF32 110 /* 32-bit offset in TLS block */ -+#define R_TILEGX_TLS_TPOFF32 111 /* 32-bit offset in static TLS block */ -+#define R_TILEGX_TLS_GD_CALL 112 /* "jal" for TLS GD */ -+#define R_TILEGX_IMM8_X0_TLS_GD_ADD 113 /* X0 pipe "addi" for TLS GD */ -+#define R_TILEGX_IMM8_X1_TLS_GD_ADD 114 /* X1 pipe "addi" for TLS GD */ -+#define R_TILEGX_IMM8_Y0_TLS_GD_ADD 115 /* Y0 pipe "addi" for TLS GD */ -+#define R_TILEGX_IMM8_Y1_TLS_GD_ADD 116 /* Y1 pipe "addi" for TLS GD */ -+#define R_TILEGX_TLS_IE_LOAD 117 /* "ld_tls" for TLS IE */ -+#define R_TILEGX_IMM8_X0_TLS_ADD 118 /* X0 pipe "addi" for TLS GD/IE */ -+#define R_TILEGX_IMM8_X1_TLS_ADD 119 /* X1 pipe "addi" for TLS GD/IE */ -+#define R_TILEGX_IMM8_Y0_TLS_ADD 120 /* Y0 pipe "addi" for TLS GD/IE */ -+#define R_TILEGX_IMM8_Y1_TLS_ADD 121 /* Y1 pipe "addi" for TLS GD/IE */ -+ -+#define R_TILEGX_GNU_VTINHERIT 128 /* GNU C++ vtable hierarchy */ -+#define R_TILEGX_GNU_VTENTRY 129 /* GNU C++ vtable member usage */ -+ -+#define R_TILEGX_NUM 130 -+ -+#endif /* elf.h */ ---- a/scripts/mod/mk_elfconfig.c -+++ b/scripts/mod/mk_elfconfig.c -@@ -2,7 +2,11 @@ - #include - #include - #include -+#ifndef __APPLE__ - #include -+#else -+#include "elf.h" -+#endif - - int - main(int argc, char **argv) ---- a/scripts/mod/modpost.h -+++ b/scripts/mod/modpost.h -@@ -8,7 +8,11 @@ - #include - #include - #include -+#if !(defined(__APPLE__) || defined(__CYGWIN__)) - #include -+#else -+#include "elf.h" -+#endif - - #include "elfconfig.h" - diff --git a/target/linux/generic/hack-5.18/211-darwin-uuid-typedef-clash.patch b/target/linux/generic/hack-5.18/211-darwin-uuid-typedef-clash.patch deleted file mode 100644 index 50a6227148f4ea..00000000000000 --- a/target/linux/generic/hack-5.18/211-darwin-uuid-typedef-clash.patch +++ /dev/null @@ -1,22 +0,0 @@ -From e44fc2af1ddc452b6659d08c16973d65c73b7d0a Mon Sep 17 00:00:00 2001 -From: Kevin Darbyshire-Bryant -Date: Wed, 5 Feb 2020 18:36:43 +0000 -Subject: [PATCH] file2alias: build on macos - -Signed-off-by: Kevin Darbyshire-Bryant ---- - scripts/mod/file2alias.c | 3 +++ - 1 file changed, 3 insertions(+) - ---- a/scripts/mod/file2alias.c -+++ b/scripts/mod/file2alias.c -@@ -38,6 +38,9 @@ typedef struct { - __u8 b[16]; - } guid_t; - -+#ifdef __APPLE__ -+#define uuid_t compat_uuid_t -+#endif - /* backwards compatibility, don't use in new code */ - typedef struct { - __u8 b[16]; diff --git a/target/linux/generic/hack-5.18/212-tools_portability.patch b/target/linux/generic/hack-5.18/212-tools_portability.patch deleted file mode 100644 index b488155f9425ad..00000000000000 --- a/target/linux/generic/hack-5.18/212-tools_portability.patch +++ /dev/null @@ -1,110 +0,0 @@ -From 48232d3d931c95953ce2ddfe7da7bb164aef6a73 Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Fri, 7 Jul 2017 17:03:16 +0200 -Subject: fix portability of some includes files in tools/ used on the host - -Signed-off-by: Felix Fietkau ---- - tools/include/tools/be_byteshift.h | 4 ++++ - tools/include/tools/le_byteshift.h | 4 ++++ - tools/include/tools/linux_types.h | 22 ++++++++++++++++++++++ - 3 files changed, 30 insertions(+) - create mode 100644 tools/include/tools/linux_types.h - ---- a/tools/include/tools/be_byteshift.h -+++ b/tools/include/tools/be_byteshift.h -@@ -2,6 +2,10 @@ - #ifndef _TOOLS_BE_BYTESHIFT_H - #define _TOOLS_BE_BYTESHIFT_H - -+#ifndef __linux__ -+#include "linux_types.h" -+#endif -+ - #include - - static inline uint16_t __get_unaligned_be16(const uint8_t *p) ---- a/tools/include/tools/le_byteshift.h -+++ b/tools/include/tools/le_byteshift.h -@@ -2,6 +2,10 @@ - #ifndef _TOOLS_LE_BYTESHIFT_H - #define _TOOLS_LE_BYTESHIFT_H - -+#ifndef __linux__ -+#include "linux_types.h" -+#endif -+ - #include - - static inline uint16_t __get_unaligned_le16(const uint8_t *p) ---- /dev/null -+++ b/tools/include/tools/linux_types.h -@@ -0,0 +1,26 @@ -+#ifndef __LINUX_TYPES_H -+#define __LINUX_TYPES_H -+ -+#include -+ -+typedef int8_t __s8; -+typedef uint8_t __u8; -+typedef uint8_t __be8; -+typedef uint8_t __le8; -+ -+typedef int16_t __s16; -+typedef uint16_t __u16; -+typedef uint16_t __be16; -+typedef uint16_t __le16; -+ -+typedef int32_t __s32; -+typedef uint32_t __u32; -+typedef uint32_t __be32; -+typedef uint32_t __le32; -+ -+typedef int64_t __s64; -+typedef uint64_t __u64; -+typedef uint64_t __be64; -+typedef uint64_t __le64; -+ -+#endif ---- a/tools/include/linux/types.h -+++ b/tools/include/linux/types.h -@@ -10,8 +10,12 @@ - #define __SANE_USERSPACE_TYPES__ /* For PPC64, to get LL64 types */ - #endif - -+#ifndef __linux__ -+#include -+#else - #include - #include -+#endif - - struct page; - struct kmem_cache; ---- a/tools/perf/pmu-events/jevents.c -+++ b/tools/perf/pmu-events/jevents.c -@@ -1,4 +1,6 @@ -+#ifdef __linux__ - #define _XOPEN_SOURCE 500 /* needed for nftw() */ -+#endif - #define _GNU_SOURCE /* needed for asprintf() */ - - /* Parse event JSON files */ -@@ -35,6 +37,7 @@ - #include - #include - #include -+#include - #include - #include - #include ---- a/tools/perf/pmu-events/json.c -+++ b/tools/perf/pmu-events/json.c -@@ -38,7 +38,6 @@ - #include - #include "jsmn.h" - #include "json.h" --#include - - - static char *mapfile(const char *fn, size_t *size) diff --git a/target/linux/generic/hack-5.18/214-spidev_h_portability.patch b/target/linux/generic/hack-5.18/214-spidev_h_portability.patch deleted file mode 100644 index db754a29033c06..00000000000000 --- a/target/linux/generic/hack-5.18/214-spidev_h_portability.patch +++ /dev/null @@ -1,24 +0,0 @@ -From be9be95ff10e16a5b4ad36f903978d0cc5747024 Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Fri, 7 Jul 2017 17:04:08 +0200 -Subject: kernel: fix linux/spi/spidev.h portability issues with musl - -Felix will try to get this define included into musl - -lede-commit: 795e7cf60de19e7a076a46874fab7bb88b43bbff -Signed-off-by: Felix Fietkau ---- - include/uapi/linux/spi/spidev.h | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/include/uapi/linux/spi/spidev.h -+++ b/include/uapi/linux/spi/spidev.h -@@ -93,7 +93,7 @@ struct spi_ioc_transfer { - - /* not all platforms use or _IOC_TYPECHECK() ... */ - #define SPI_MSGSIZE(N) \ -- ((((N)*(sizeof (struct spi_ioc_transfer))) < (1 << _IOC_SIZEBITS)) \ -+ ((((N)*(sizeof (struct spi_ioc_transfer))) < (1 << 13)) \ - ? ((N)*(sizeof (struct spi_ioc_transfer))) : 0) - #define SPI_IOC_MESSAGE(N) _IOW(SPI_IOC_MAGIC, 0, char[SPI_MSGSIZE(N)]) - diff --git a/target/linux/generic/hack-5.18/220-arm-gc_sections.patch b/target/linux/generic/hack-5.18/220-arm-gc_sections.patch deleted file mode 100644 index 6cfc3236b2c4fc..00000000000000 --- a/target/linux/generic/hack-5.18/220-arm-gc_sections.patch +++ /dev/null @@ -1,123 +0,0 @@ -From e3d8676f5722b7622685581e06e8f53e6138e3ab Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Sat, 15 Jul 2017 23:42:36 +0200 -Subject: use -ffunction-sections, -fdata-sections and --gc-sections - -In combination with kernel symbol export stripping this significantly reduces -the kernel image size. Used on both ARM and MIPS architectures. - -Signed-off-by: Felix Fietkau -Signed-off-by: Jonas Gorski -Signed-off-by: Gabor Juhos ---- ---- a/arch/arm/Kconfig -+++ b/arch/arm/Kconfig -@@ -121,6 +121,7 @@ config ARM - select HAVE_UID16 - select HAVE_VIRT_CPU_ACCOUNTING_GEN - select IRQ_FORCED_THREADING -+ select HAVE_LD_DEAD_CODE_DATA_ELIMINATION - select MODULES_USE_ELF_REL - select NEED_DMA_MAP_STATE - select OF_EARLY_FLATTREE if OF ---- a/arch/arm/boot/compressed/Makefile -+++ b/arch/arm/boot/compressed/Makefile -@@ -91,6 +91,7 @@ endif - ifeq ($(CONFIG_USE_OF),y) - OBJS += $(libfdt_objs) fdt_check_mem_start.o - endif -+KBUILD_CFLAGS_KERNEL := $(patsubst -f%-sections,,$(KBUILD_CFLAGS_KERNEL)) - - OBJS += lib1funcs.o ashldi3.o bswapsdi2.o - ---- a/arch/arm/kernel/vmlinux.lds.S -+++ b/arch/arm/kernel/vmlinux.lds.S -@@ -75,7 +75,7 @@ SECTIONS - . = ALIGN(4); - __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) { - __start___ex_table = .; -- ARM_MMU_KEEP(*(__ex_table)) -+ KEEP(*(__ex_table)) - __stop___ex_table = .; - } - -@@ -100,24 +100,24 @@ SECTIONS - } - .init.arch.info : { - __arch_info_begin = .; -- *(.arch.info.init) -+ KEEP(*(.arch.info.init)) - __arch_info_end = .; - } - .init.tagtable : { - __tagtable_begin = .; -- *(.taglist.init) -+ KEEP(*(.taglist.init)) - __tagtable_end = .; - } - #ifdef CONFIG_SMP_ON_UP - .init.smpalt : { - __smpalt_begin = .; -- *(.alt.smp.init) -+ KEEP(*(.alt.smp.init)) - __smpalt_end = .; - } - #endif - .init.pv_table : { - __pv_table_begin = .; -- *(.pv_table) -+ KEEP(*(.pv_table)) - __pv_table_end = .; - } - ---- a/arch/arm/include/asm/vmlinux.lds.h -+++ b/arch/arm/include/asm/vmlinux.lds.h -@@ -42,13 +42,13 @@ - #define PROC_INFO \ - . = ALIGN(4); \ - __proc_info_begin = .; \ -- *(.proc.info.init) \ -+ KEEP(*(.proc.info.init)) \ - __proc_info_end = .; - - #define IDMAP_TEXT \ - ALIGN_FUNCTION(); \ - __idmap_text_start = .; \ -- *(.idmap.text) \ -+ KEEP(*(.idmap.text)) \ - __idmap_text_end = .; \ - - #define ARM_DISCARD \ -@@ -109,12 +109,12 @@ - . = ALIGN(8); \ - .ARM.unwind_idx : { \ - __start_unwind_idx = .; \ -- *(.ARM.exidx*) \ -+ KEEP(*(.ARM.exidx*)) \ - __stop_unwind_idx = .; \ - } \ - .ARM.unwind_tab : { \ - __start_unwind_tab = .; \ -- *(.ARM.extab*) \ -+ KEEP(*(.ARM.extab*)) \ - __stop_unwind_tab = .; \ - } - -@@ -126,7 +126,7 @@ - __vectors_lma = .; \ - OVERLAY 0xffff0000 : NOCROSSREFS AT(__vectors_lma) { \ - .vectors { \ -- *(.vectors) \ -+ KEEP(*(.vectors)) \ - } \ - .vectors.bhb.loop8 { \ - *(.vectors.bhb.loop8) \ -@@ -144,7 +144,7 @@ - \ - __stubs_lma = .; \ - .stubs ADDR(.vectors) + 0x1000 : AT(__stubs_lma) { \ -- *(.stubs) \ -+ KEEP(*(.stubs)) \ - } \ - ARM_LMA(__stubs, .stubs); \ - . = __stubs_lma + SIZEOF(.stubs); \ diff --git a/target/linux/generic/hack-5.18/221-module_exports.patch b/target/linux/generic/hack-5.18/221-module_exports.patch deleted file mode 100644 index b69143b481a9f9..00000000000000 --- a/target/linux/generic/hack-5.18/221-module_exports.patch +++ /dev/null @@ -1,102 +0,0 @@ -From b14784e7883390c20ed3ff904892255404a5914b Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Fri, 7 Jul 2017 17:05:53 +0200 -Subject: add an optional config option for stripping all unnecessary symbol exports from the kernel image - -lede-commit: bb5a40c64b7c4f4848509fa0a6625055fc9e66cc -Signed-off-by: Felix Fietkau ---- - include/asm-generic/vmlinux.lds.h | 18 +++++++++++++++--- - include/linux/export.h | 9 ++++++++- - scripts/Makefile.build | 2 +- - 3 files changed, 24 insertions(+), 5 deletions(-) - ---- a/include/asm-generic/vmlinux.lds.h -+++ b/include/asm-generic/vmlinux.lds.h -@@ -81,6 +81,16 @@ - #define RO_EXCEPTION_TABLE - #endif - -+#ifndef SYMTAB_KEEP -+#define SYMTAB_KEEP KEEP(*(SORT(___ksymtab+*))) -+#define SYMTAB_KEEP_GPL KEEP(*(SORT(___ksymtab_gpl+*))) -+#endif -+ -+#ifndef SYMTAB_DISCARD -+#define SYMTAB_DISCARD -+#define SYMTAB_DISCARD_GPL -+#endif -+ - /* Align . to a 8 byte boundary equals to maximum function alignment. */ - #define ALIGN_FUNCTION() . = ALIGN(8) - -@@ -478,14 +488,14 @@ - /* Kernel symbol table: Normal symbols */ \ - __ksymtab : AT(ADDR(__ksymtab) - LOAD_OFFSET) { \ - __start___ksymtab = .; \ -- KEEP(*(SORT(___ksymtab+*))) \ -+ SYMTAB_KEEP \ - __stop___ksymtab = .; \ - } \ - \ - /* Kernel symbol table: GPL-only symbols */ \ - __ksymtab_gpl : AT(ADDR(__ksymtab_gpl) - LOAD_OFFSET) { \ - __start___ksymtab_gpl = .; \ -- KEEP(*(SORT(___ksymtab_gpl+*))) \ -+ SYMTAB_KEEP_GPL \ - __stop___ksymtab_gpl = .; \ - } \ - \ -@@ -505,7 +515,7 @@ - \ - /* Kernel symbol table: strings */ \ - __ksymtab_strings : AT(ADDR(__ksymtab_strings) - LOAD_OFFSET) { \ -- *(__ksymtab_strings) \ -+ *(__ksymtab_strings+*) \ - } \ - \ - /* __*init sections */ \ -@@ -1024,6 +1034,8 @@ - - #define COMMON_DISCARDS \ - SANITIZER_DISCARDS \ -+ SYMTAB_DISCARD \ -+ SYMTAB_DISCARD_GPL \ - *(.discard) \ - *(.discard.*) \ - *(.modinfo) \ ---- a/include/linux/export.h -+++ b/include/linux/export.h -@@ -84,6 +84,12 @@ struct kernel_symbol { - - #else - -+#ifdef MODULE -+#define __EXPORT_SUFFIX(sym) -+#else -+#define __EXPORT_SUFFIX(sym) "+" #sym -+#endif -+ - /* - * For every exported symbol, do the following: - * -@@ -101,7 +107,7 @@ struct kernel_symbol { - extern const char __kstrtab_##sym[]; \ - extern const char __kstrtabns_##sym[]; \ - __CRC_SYMBOL(sym, sec); \ -- asm(" .section \"__ksymtab_strings\",\"aMS\",%progbits,1 \n" \ -+ asm(" .section \"__ksymtab_strings" __EXPORT_SUFFIX(sym) "\",\"aMS\",%progbits,1 \n" \ - "__kstrtab_" #sym ": \n" \ - " .asciz \"" #sym "\" \n" \ - "__kstrtabns_" #sym ": \n" \ ---- a/scripts/Makefile.build -+++ b/scripts/Makefile.build -@@ -396,7 +396,7 @@ targets += $(real-dtb-y) $(lib-y) $(alwa - # Linker scripts preprocessor (.lds.S -> .lds) - # --------------------------------------------------------------------------- - quiet_cmd_cpp_lds_S = LDS $@ -- cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -U$(ARCH) \ -+ cmd_cpp_lds_S = $(CPP) $(EXTRA_LDSFLAGS) $(cpp_flags) -P -U$(ARCH) \ - -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $< - - $(obj)/%.lds: $(src)/%.lds.S FORCE diff --git a/target/linux/generic/hack-5.18/230-openwrt_lzma_options.patch b/target/linux/generic/hack-5.18/230-openwrt_lzma_options.patch deleted file mode 100644 index 7297496e4f98df..00000000000000 --- a/target/linux/generic/hack-5.18/230-openwrt_lzma_options.patch +++ /dev/null @@ -1,34 +0,0 @@ -From b3d00b452467f621317953d9e4c6f9ae8dcfd271 Mon Sep 17 00:00:00 2001 -From: Imre Kaloz -Date: Fri, 7 Jul 2017 17:06:55 +0200 -Subject: use the openwrt lzma options for now - -lede-commit: 548de949f392049420a6a1feeef118b30ab8ea8c -Signed-off-by: Imre Kaloz ---- - lib/decompress.c | 1 + - scripts/Makefile.lib | 2 +- - usr/gen_initramfs_list.sh | 10 +++++----- - 3 files changed, 7 insertions(+), 6 deletions(-) - ---- a/lib/decompress.c -+++ b/lib/decompress.c -@@ -53,6 +53,7 @@ static const struct compress_format comp - { {0x1f, 0x9e}, "gzip", gunzip }, - { {0x42, 0x5a}, "bzip2", bunzip2 }, - { {0x5d, 0x00}, "lzma", unlzma }, -+ { {0x6d, 0x00}, "lzma-openwrt", unlzma }, - { {0xfd, 0x37}, "xz", unxz }, - { {0x89, 0x4c}, "lzo", unlzo }, - { {0x02, 0x21}, "lz4", unlz4 }, ---- a/scripts/Makefile.lib -+++ b/scripts/Makefile.lib -@@ -401,7 +401,7 @@ quiet_cmd_bzip2_with_size = BZIP2 $@ - # --------------------------------------------------------------------------- - - quiet_cmd_lzma = LZMA $@ -- cmd_lzma = cat $(real-prereqs) | $(LZMA) -9 > $@ -+ cmd_lzma = { cat $(real-prereqs) | $(LZMA) e -d20 -lc1 -lp2 -pb2 -eos -si -so; $(size_append); } > $@ - - quiet_cmd_lzma_with_size = LZMA $@ - cmd_lzma_with_size = { cat $(real-prereqs) | $(LZMA) -9; $(size_append); } > $@ diff --git a/target/linux/generic/hack-5.18/249-udp-tunnel-selection.patch b/target/linux/generic/hack-5.18/249-udp-tunnel-selection.patch deleted file mode 100644 index 2c74298dfe99a2..00000000000000 --- a/target/linux/generic/hack-5.18/249-udp-tunnel-selection.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/net/ipv4/Kconfig -+++ b/net/ipv4/Kconfig -@@ -315,7 +315,7 @@ config NET_IPVTI - on top. - - config NET_UDP_TUNNEL -- tristate -+ tristate "IP: UDP tunneling support" - select NET_IP_TUNNEL - default n - diff --git a/target/linux/generic/hack-5.18/250-netfilter_depends.patch b/target/linux/generic/hack-5.18/250-netfilter_depends.patch deleted file mode 100644 index 4c358a73b4f060..00000000000000 --- a/target/linux/generic/hack-5.18/250-netfilter_depends.patch +++ /dev/null @@ -1,27 +0,0 @@ -From: Felix Fietkau -Subject: hack: net: remove bogus netfilter dependencies - -lede-commit: 589d2a377dee27d206fc3725325309cf649e4df6 -Signed-off-by: Felix Fietkau ---- - net/netfilter/Kconfig | 2 -- - 1 file changed, 2 deletions(-) - ---- a/net/netfilter/Kconfig -+++ b/net/netfilter/Kconfig -@@ -254,7 +254,6 @@ config NF_CONNTRACK_FTP - - config NF_CONNTRACK_H323 - tristate "H.323 protocol support" -- depends on IPV6 || IPV6=n - depends on NETFILTER_ADVANCED - help - H.323 is a VoIP signalling protocol from ITU-T. As one of the most -@@ -1111,7 +1110,6 @@ config NETFILTER_XT_TARGET_SECMARK - - config NETFILTER_XT_TARGET_TCPMSS - tristate '"TCPMSS" target support' -- depends on IPV6 || IPV6=n - default m if NETFILTER_ADVANCED=n - help - This option adds a `TCPMSS' target, which allows you to alter the diff --git a/target/linux/generic/hack-5.18/251-kconfig.patch b/target/linux/generic/hack-5.18/251-kconfig.patch deleted file mode 100644 index b53207ef1a41c7..00000000000000 --- a/target/linux/generic/hack-5.18/251-kconfig.patch +++ /dev/null @@ -1,199 +0,0 @@ -From da3c50704f14132f4adf80d48e9a4cd5d46e54c9 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Fri, 7 Jul 2017 17:09:21 +0200 -Subject: kconfig: owrt specifc dependencies - -Signed-off-by: John Crispin ---- - crypto/Kconfig | 10 +++++----- - drivers/bcma/Kconfig | 1 + - drivers/ssb/Kconfig | 3 ++- - lib/Kconfig | 8 ++++---- - net/netfilter/Kconfig | 2 +- - net/wireless/Kconfig | 17 ++++++++++------- - sound/core/Kconfig | 4 ++-- - 7 files changed, 25 insertions(+), 20 deletions(-) - ---- a/crypto/Kconfig -+++ b/crypto/Kconfig -@@ -34,7 +34,7 @@ config CRYPTO_FIPS - this is. - - config CRYPTO_ALGAPI -- tristate -+ tristate "ALGAPI" - select CRYPTO_ALGAPI2 - help - This option provides the API for cryptographic algorithms. -@@ -43,7 +43,7 @@ config CRYPTO_ALGAPI2 - tristate - - config CRYPTO_AEAD -- tristate -+ tristate "AEAD" - select CRYPTO_AEAD2 - select CRYPTO_ALGAPI - -@@ -54,7 +54,7 @@ config CRYPTO_AEAD2 - select CRYPTO_RNG2 - - config CRYPTO_SKCIPHER -- tristate -+ tristate "SKCIPHER" - select CRYPTO_SKCIPHER2 - select CRYPTO_ALGAPI - -@@ -64,7 +64,7 @@ config CRYPTO_SKCIPHER2 - select CRYPTO_RNG2 - - config CRYPTO_HASH -- tristate -+ tristate "HASH" - select CRYPTO_HASH2 - select CRYPTO_ALGAPI - -@@ -73,7 +73,7 @@ config CRYPTO_HASH2 - select CRYPTO_ALGAPI2 - - config CRYPTO_RNG -- tristate -+ tristate "RNG" - select CRYPTO_RNG2 - select CRYPTO_ALGAPI - ---- a/drivers/bcma/Kconfig -+++ b/drivers/bcma/Kconfig -@@ -16,6 +16,7 @@ if BCMA - # Support for Block-I/O. SELECT this from the driver that needs it. - config BCMA_BLOCKIO - bool -+ default y - - config BCMA_HOST_PCI_POSSIBLE - bool ---- a/drivers/ssb/Kconfig -+++ b/drivers/ssb/Kconfig -@@ -29,6 +29,7 @@ config SSB_SPROM - config SSB_BLOCKIO - bool - depends on SSB -+ default y - - config SSB_PCIHOST_POSSIBLE - bool -@@ -49,7 +50,7 @@ config SSB_PCIHOST - config SSB_B43_PCI_BRIDGE - bool - depends on SSB_PCIHOST -- default n -+ default y - - config SSB_PCMCIAHOST_POSSIBLE - bool ---- a/lib/Kconfig -+++ b/lib/Kconfig -@@ -449,16 +449,16 @@ config BCH_CONST_T - # Textsearch support is select'ed if needed - # - config TEXTSEARCH -- bool -+ bool "Textsearch support" - - config TEXTSEARCH_KMP -- tristate -+ tristate "Textsearch KMP" - - config TEXTSEARCH_BM -- tristate -+ tristate "Textsearch BM" - - config TEXTSEARCH_FSM -- tristate -+ tristate "Textsearch FSM" - - config BTREE - bool ---- a/net/netfilter/Kconfig -+++ b/net/netfilter/Kconfig -@@ -22,7 +22,7 @@ config NETFILTER_SKIP_EGRESS - def_bool NETFILTER_EGRESS && (NET_CLS_ACT || IFB) - - config NETFILTER_NETLINK -- tristate -+ tristate "Netfilter NFNETLINK interface" - - config NETFILTER_FAMILY_BRIDGE - bool ---- a/net/wireless/Kconfig -+++ b/net/wireless/Kconfig -@@ -1,6 +1,6 @@ - # SPDX-License-Identifier: GPL-2.0-only - config WIRELESS_EXT -- bool -+ bool "Wireless extensions" - - config WEXT_CORE - def_bool y -@@ -12,10 +12,10 @@ config WEXT_PROC - depends on WEXT_CORE - - config WEXT_SPY -- bool -+ bool "WEXT_SPY" - - config WEXT_PRIV -- bool -+ bool "WEXT_PRIV" - - config CFG80211 - tristate "cfg80211 - wireless configuration API" -@@ -204,7 +204,7 @@ config CFG80211_WEXT_EXPORT - endif # CFG80211 - - config LIB80211 -- tristate -+ tristate "LIB80211" - default n - help - This options enables a library of common routines used -@@ -213,17 +213,17 @@ config LIB80211 - Drivers should select this themselves if needed. - - config LIB80211_CRYPT_WEP -- tristate -+ tristate "LIB80211_CRYPT_WEP" - select CRYPTO_LIB_ARC4 - - config LIB80211_CRYPT_CCMP -- tristate -+ tristate "LIB80211_CRYPT_CCMP" - select CRYPTO - select CRYPTO_AES - select CRYPTO_CCM - - config LIB80211_CRYPT_TKIP -- tristate -+ tristate "LIB80211_CRYPT_TKIP" - select CRYPTO_LIB_ARC4 - - config LIB80211_DEBUG ---- a/sound/core/Kconfig -+++ b/sound/core/Kconfig -@@ -17,7 +17,7 @@ config SND_DMAENGINE_PCM - tristate - - config SND_HWDEP -- tristate -+ tristate "Sound hardware support" - - config SND_SEQ_DEVICE - tristate -@@ -27,7 +27,7 @@ config SND_RAWMIDI - select SND_SEQ_DEVICE if SND_SEQUENCER != n - - config SND_COMPRESS_OFFLOAD -- tristate -+ tristate "Compression offloading support" - - config SND_JACK - bool diff --git a/target/linux/generic/hack-5.18/252-SATA_PMP.patch b/target/linux/generic/hack-5.18/252-SATA_PMP.patch deleted file mode 100644 index 6502d1d6ed79d8..00000000000000 --- a/target/linux/generic/hack-5.18/252-SATA_PMP.patch +++ /dev/null @@ -1,23 +0,0 @@ -From 8c817e33be829c7249c2cfd59ff48ad5fac6a31d Mon Sep 17 00:00:00 2001 -From: Sungbo Eo -Date: Fri, 7 Jul 2017 17:09:21 +0200 -Subject: [PATCH] kconfig: solidify SATA_PMP config - -SATA_PMP option in kernel config file disappears for every kernel_oldconfig refresh. -To prevent this, SATA_HOST is now selected automatically when SATA_PMP is enabled. -This patch can be dropped if SATA_MV is ever re-added into the config. ---- - drivers/ata/Kconfig | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/ata/Kconfig -+++ b/drivers/ata/Kconfig -@@ -112,7 +112,7 @@ config SATA_ZPODD - - config SATA_PMP - bool "SATA Port Multiplier support" -- depends on SATA_HOST -+ select SATA_HOST - default y - help - This option adds support for SATA Port Multipliers diff --git a/target/linux/generic/hack-5.18/253-ksmbd-config.patch b/target/linux/generic/hack-5.18/253-ksmbd-config.patch deleted file mode 100644 index 4ec57c069a97e8..00000000000000 --- a/target/linux/generic/hack-5.18/253-ksmbd-config.patch +++ /dev/null @@ -1,22 +0,0 @@ ---- a/init/Kconfig -+++ b/init/Kconfig -@@ -2415,7 +2415,7 @@ config PADATA - bool - - config ASN1 -- tristate -+ tristate "ASN1" - help - Build a simple ASN.1 grammar compiler that produces a bytecode output - that can be interpreted by the ASN.1 stream decoder and used to ---- a/lib/Kconfig -+++ b/lib/Kconfig -@@ -620,7 +620,7 @@ config LIBFDT - bool - - config OID_REGISTRY -- tristate -+ tristate "OID" - help - Enable fast lookup object identifier registry. - diff --git a/target/linux/generic/hack-5.18/259-regmap_dynamic.patch b/target/linux/generic/hack-5.18/259-regmap_dynamic.patch deleted file mode 100644 index 98c8263c9fdee6..00000000000000 --- a/target/linux/generic/hack-5.18/259-regmap_dynamic.patch +++ /dev/null @@ -1,144 +0,0 @@ -From 811d9e2268a62b830cfe93cd8bc929afcb8b198b Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Sat, 15 Jul 2017 21:12:38 +0200 -Subject: kernel: move regmap bloat out of the kernel image if it is only being used in modules - -lede-commit: 96f39119815028073583e4fca3a9c5fe9141e998 -Signed-off-by: Felix Fietkau ---- - drivers/base/regmap/Kconfig | 15 ++++++++++----- - drivers/base/regmap/Makefile | 12 ++++++++---- - drivers/base/regmap/regmap.c | 3 +++ - include/linux/regmap.h | 2 +- - 4 files changed, 22 insertions(+), 10 deletions(-) - ---- a/drivers/base/regmap/Kconfig -+++ b/drivers/base/regmap/Kconfig -@@ -4,10 +4,9 @@ - # subsystems should select the appropriate symbols. - - config REGMAP -- default y if (REGMAP_I2C || REGMAP_SPI || REGMAP_SPMI || REGMAP_W1 || REGMAP_AC97 || REGMAP_MMIO || REGMAP_IRQ || REGMAP_SOUNDWIRE || REGMAP_SOUNDWIRE_MBQ || REGMAP_SCCB || REGMAP_I3C || REGMAP_SPI_AVMM || REGMAP_MDIO) - select IRQ_DOMAIN if REGMAP_IRQ - select MDIO_BUS if REGMAP_MDIO -- bool -+ tristate - - config REGCACHE_COMPRESSED - select LZO_COMPRESS -@@ -15,53 +14,67 @@ config REGCACHE_COMPRESSED - bool - - config REGMAP_AC97 -+ select REGMAP - tristate - - config REGMAP_I2C -+ select REGMAP - tristate - depends on I2C - - config REGMAP_SLIMBUS -+ select REGMAP - tristate - depends on SLIMBUS - - config REGMAP_SPI -+ select REGMAP - tristate - depends on SPI - - config REGMAP_SPMI -+ select REGMAP - tristate - depends on SPMI - - config REGMAP_W1 -+ select REGMAP - tristate - depends on W1 - - config REGMAP_MDIO -+ select REGMAP - tristate - - config REGMAP_MMIO -+ select REGMAP - tristate - - config REGMAP_IRQ -+ select REGMAP - bool - - config REGMAP_SOUNDWIRE -+ select REGMAP - tristate - depends on SOUNDWIRE - - config REGMAP_SOUNDWIRE_MBQ -+ select REGMAP - tristate - depends on SOUNDWIRE - - config REGMAP_SCCB -+ select REGMAP - tristate - depends on I2C - - config REGMAP_I3C -+ select REGMAP - tristate - depends on I3C - - config REGMAP_SPI_AVMM -+ select REGMAP - tristate - depends on SPI ---- a/drivers/base/regmap/Makefile -+++ b/drivers/base/regmap/Makefile -@@ -2,10 +2,14 @@ - # For include/trace/define_trace.h to include trace.h - CFLAGS_regmap.o := -I$(src) - --obj-$(CONFIG_REGMAP) += regmap.o regcache.o --obj-$(CONFIG_REGMAP) += regcache-rbtree.o regcache-flat.o --obj-$(CONFIG_REGCACHE_COMPRESSED) += regcache-lzo.o --obj-$(CONFIG_DEBUG_FS) += regmap-debugfs.o -+regmap-core-objs = regmap.o regcache.o regcache-rbtree.o regcache-flat.o -+ifdef CONFIG_DEBUG_FS -+regmap-core-objs += regmap-debugfs.o -+endif -+ifdef CONFIG_REGCACHE_COMPRESSED -+regmap-core-objs += regcache-lzo.o -+endif -+obj-$(CONFIG_REGMAP) += regmap-core.o - obj-$(CONFIG_REGMAP_AC97) += regmap-ac97.o - obj-$(CONFIG_REGMAP_I2C) += regmap-i2c.o - obj-$(CONFIG_REGMAP_SLIMBUS) += regmap-slimbus.o ---- a/drivers/base/regmap/regmap.c -+++ b/drivers/base/regmap/regmap.c -@@ -9,6 +9,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -3352,3 +3353,5 @@ static int __init regmap_initcall(void) - return 0; - } - postcore_initcall(regmap_initcall); -+ -+MODULE_LICENSE("GPL"); ---- a/include/linux/regmap.h -+++ b/include/linux/regmap.h -@@ -180,7 +180,7 @@ struct reg_sequence { - __ret ?: __tmp; \ - }) - --#ifdef CONFIG_REGMAP -+#if IS_REACHABLE(CONFIG_REGMAP) - - enum regmap_endian { - /* Unspecified -> 0 -> Backwards compatible default */ diff --git a/target/linux/generic/hack-5.18/260-crypto_test_dependencies.patch b/target/linux/generic/hack-5.18/260-crypto_test_dependencies.patch deleted file mode 100644 index 64daa8274390f7..00000000000000 --- a/target/linux/generic/hack-5.18/260-crypto_test_dependencies.patch +++ /dev/null @@ -1,52 +0,0 @@ -From fd1799b0bf5efa46dd3e6dfbbf3955564807e508 Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Fri, 7 Jul 2017 17:12:51 +0200 -Subject: kernel: prevent cryptomgr from pulling in useless extra dependencies for tests that are not run - -Reduces kernel size after LZMA by about 5k on MIPS - -lede-commit: 044c316167e076479a344c59905e5b435b84a77f -Signed-off-by: Felix Fietkau ---- - crypto/Kconfig | 13 ++++++------- - crypto/algboss.c | 4 ++++ - 2 files changed, 10 insertions(+), 7 deletions(-) - ---- a/crypto/Kconfig -+++ b/crypto/Kconfig -@@ -121,13 +121,13 @@ config CRYPTO_MANAGER - cbc(aes). - - config CRYPTO_MANAGER2 -- def_tristate CRYPTO_MANAGER || (CRYPTO_MANAGER!=n && CRYPTO_ALGAPI=y) -- select CRYPTO_AEAD2 -- select CRYPTO_HASH2 -- select CRYPTO_SKCIPHER2 -- select CRYPTO_AKCIPHER2 -- select CRYPTO_KPP2 -- select CRYPTO_ACOMP2 -+ def_tristate CRYPTO_MANAGER || (CRYPTO_MANAGER!=n && CRYPTO_ALGAPI=y && !CRYPTO_MANAGER_DISABLE_TESTS) -+ select CRYPTO_AEAD2 if !CRYPTO_MANAGER_DISABLE_TESTS -+ select CRYPTO_HASH2 if !CRYPTO_MANAGER_DISABLE_TESTS -+ select CRYPTO_SKCIPHER2 if !CRYPTO_MANAGER_DISABLE_TESTS -+ select CRYPTO_AKCIPHER2 if !CRYPTO_MANAGER_DISABLE_TESTS -+ select CRYPTO_KPP2 if !CRYPTO_MANAGER_DISABLE_TESTS -+ select CRYPTO_ACOMP2 if !CRYPTO_MANAGER_DISABLE_TESTS - - config CRYPTO_USER - tristate "Userspace cryptographic algorithm configuration" ---- a/crypto/algboss.c -+++ b/crypto/algboss.c -@@ -211,8 +211,12 @@ static int cryptomgr_schedule_test(struc - type = alg->cra_flags; - - /* Do not test internal algorithms. */ -+#ifdef CONFIG_CRYPTO_MANAGER_DISABLE_TESTS -+ type |= CRYPTO_ALG_TESTED; -+#else - if (type & CRYPTO_ALG_INTERNAL) - type |= CRYPTO_ALG_TESTED; -+#endif - - param->type = type; - diff --git a/target/linux/generic/hack-5.18/261-lib-arc4-unhide.patch b/target/linux/generic/hack-5.18/261-lib-arc4-unhide.patch deleted file mode 100644 index 4ffd8cfa37dd8e..00000000000000 --- a/target/linux/generic/hack-5.18/261-lib-arc4-unhide.patch +++ /dev/null @@ -1,15 +0,0 @@ -This makes it possible to select CONFIG_CRYPTO_LIB_ARC4 directly. We -need this to be able to compile this into the kernel and make use of it -from backports. - ---- a/lib/crypto/Kconfig -+++ b/lib/crypto/Kconfig -@@ -6,7 +6,7 @@ config CRYPTO_LIB_AES - tristate - - config CRYPTO_LIB_ARC4 -- tristate -+ tristate "ARC4 cipher library" - - config CRYPTO_ARCH_HAVE_LIB_BLAKE2S - bool diff --git a/target/linux/generic/hack-5.18/280-rfkill-stubs.patch b/target/linux/generic/hack-5.18/280-rfkill-stubs.patch deleted file mode 100644 index 7a650d132eb3ae..00000000000000 --- a/target/linux/generic/hack-5.18/280-rfkill-stubs.patch +++ /dev/null @@ -1,84 +0,0 @@ -From 236c1acdfef5958010ac9814a9872e0a46fd78ee Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Fri, 7 Jul 2017 17:13:44 +0200 -Subject: rfkill: add fake rfkill support - -allow building of modules depending on RFKILL even if RFKILL is not enabled. - -Signed-off-by: John Crispin ---- - include/linux/rfkill.h | 2 +- - net/Makefile | 2 +- - net/rfkill/Kconfig | 14 +++++++++----- - net/rfkill/Makefile | 2 +- - 4 files changed, 12 insertions(+), 8 deletions(-) - ---- a/include/linux/rfkill.h -+++ b/include/linux/rfkill.h -@@ -64,7 +64,7 @@ struct rfkill_ops { - int (*set_block)(void *data, bool blocked); - }; - --#if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE) -+#if defined(CONFIG_RFKILL_FULL) || defined(CONFIG_RFKILL_FULL_MODULE) - /** - * rfkill_alloc - Allocate rfkill structure - * @name: name of the struct -- the string is not copied internally ---- a/net/Makefile -+++ b/net/Makefile -@@ -52,7 +52,7 @@ obj-$(CONFIG_TIPC) += tipc/ - obj-$(CONFIG_NETLABEL) += netlabel/ - obj-$(CONFIG_IUCV) += iucv/ - obj-$(CONFIG_SMC) += smc/ --obj-$(CONFIG_RFKILL) += rfkill/ -+obj-$(CONFIG_RFKILL_FULL) += rfkill/ - obj-$(CONFIG_NET_9P) += 9p/ - obj-$(CONFIG_CAIF) += caif/ - obj-$(CONFIG_DCB) += dcb/ ---- a/net/rfkill/Kconfig -+++ b/net/rfkill/Kconfig -@@ -2,7 +2,11 @@ - # - # RF switch subsystem configuration - # --menuconfig RFKILL -+config RFKILL -+ bool -+ default y -+ -+menuconfig RFKILL_FULL - tristate "RF switch subsystem support" - help - Say Y here if you want to have control over RF switches -@@ -14,19 +18,19 @@ menuconfig RFKILL - # LED trigger support - config RFKILL_LEDS - bool -- depends on RFKILL -+ depends on RFKILL_FULL - depends on LEDS_TRIGGERS = y || RFKILL = LEDS_TRIGGERS - default y - - config RFKILL_INPUT - bool "RF switch input support" if EXPERT -- depends on RFKILL -+ depends on RFKILL_FULL - depends on INPUT = y || RFKILL = INPUT - default y if !EXPERT - - config RFKILL_GPIO - tristate "GPIO RFKILL driver" -- depends on RFKILL -+ depends on RFKILL_FULL - depends on GPIOLIB || COMPILE_TEST - default n - help ---- a/net/rfkill/Makefile -+++ b/net/rfkill/Makefile -@@ -5,5 +5,5 @@ - - rfkill-y += core.o - rfkill-$(CONFIG_RFKILL_INPUT) += input.o --obj-$(CONFIG_RFKILL) += rfkill.o -+obj-$(CONFIG_RFKILL_FULL) += rfkill.o - obj-$(CONFIG_RFKILL_GPIO) += rfkill-gpio.o diff --git a/target/linux/generic/hack-5.18/300-MIPS-r4k_cache-use-more-efficient-cache-blast.patch b/target/linux/generic/hack-5.18/300-MIPS-r4k_cache-use-more-efficient-cache-blast.patch deleted file mode 100644 index f21f200136f00b..00000000000000 --- a/target/linux/generic/hack-5.18/300-MIPS-r4k_cache-use-more-efficient-cache-blast.patch +++ /dev/null @@ -1,64 +0,0 @@ -From: Ben Menchaca -Date: Fri, 7 Jun 2013 18:35:22 -0500 -Subject: MIPS: r4k_cache: use more efficient cache blast - -Optimize the compiler output for larger cache blast cases that are -common for DMA-based networking. - -Signed-off-by: Ben Menchaca -Signed-off-by: Felix Fietkau ---- ---- a/arch/mips/include/asm/r4kcache.h -+++ b/arch/mips/include/asm/r4kcache.h -@@ -286,14 +286,46 @@ static inline void prot##extra##blast_## - unsigned long end) \ - { \ - unsigned long lsize = cpu_##desc##_line_size(); \ -+ unsigned long lsize_2 = lsize * 2; \ -+ unsigned long lsize_3 = lsize * 3; \ -+ unsigned long lsize_4 = lsize * 4; \ -+ unsigned long lsize_5 = lsize * 5; \ -+ unsigned long lsize_6 = lsize * 6; \ -+ unsigned long lsize_7 = lsize * 7; \ -+ unsigned long lsize_8 = lsize * 8; \ - unsigned long addr = start & ~(lsize - 1); \ -- unsigned long aend = (end - 1) & ~(lsize - 1); \ -+ unsigned long aend = (end + lsize - 1) & ~(lsize - 1); \ -+ int lines = (aend - addr) / lsize; \ - \ -- while (1) { \ -+ while (lines >= 8) { \ -+ prot##cache_op(hitop, addr); \ -+ prot##cache_op(hitop, addr + lsize); \ -+ prot##cache_op(hitop, addr + lsize_2); \ -+ prot##cache_op(hitop, addr + lsize_3); \ -+ prot##cache_op(hitop, addr + lsize_4); \ -+ prot##cache_op(hitop, addr + lsize_5); \ -+ prot##cache_op(hitop, addr + lsize_6); \ -+ prot##cache_op(hitop, addr + lsize_7); \ -+ addr += lsize_8; \ -+ lines -= 8; \ -+ } \ -+ \ -+ if (lines & 0x4) { \ -+ prot##cache_op(hitop, addr); \ -+ prot##cache_op(hitop, addr + lsize); \ -+ prot##cache_op(hitop, addr + lsize_2); \ -+ prot##cache_op(hitop, addr + lsize_3); \ -+ addr += lsize_4; \ -+ } \ -+ \ -+ if (lines & 0x2) { \ -+ prot##cache_op(hitop, addr); \ -+ prot##cache_op(hitop, addr + lsize); \ -+ addr += lsize_2; \ -+ } \ -+ \ -+ if (lines & 0x1) { \ - prot##cache_op(hitop, addr); \ -- if (addr == aend) \ -- break; \ -- addr += lsize; \ - } \ - } - diff --git a/target/linux/generic/hack-5.18/301-mips_image_cmdline_hack.patch b/target/linux/generic/hack-5.18/301-mips_image_cmdline_hack.patch deleted file mode 100644 index df0cfb2c0c4715..00000000000000 --- a/target/linux/generic/hack-5.18/301-mips_image_cmdline_hack.patch +++ /dev/null @@ -1,38 +0,0 @@ -From: John Crispin -Subject: hack: kernel: add generic image_cmdline hack to MIPS targets - -lede-commit: d59f5b3a987a48508257a0ddbaeadc7909f9f976 -Signed-off-by: Gabor Juhos ---- - arch/mips/Kconfig | 4 ++++ - arch/mips/kernel/head.S | 6 ++++++ - 2 files changed, 10 insertions(+) - ---- a/arch/mips/Kconfig -+++ b/arch/mips/Kconfig -@@ -1121,6 +1121,10 @@ config MIPS_MSC - config SYNC_R4K - bool - -+config IMAGE_CMDLINE_HACK -+ bool "OpenWrt specific image command line hack" -+ default n -+ - config NO_IOPORT_MAP - def_bool n - ---- a/arch/mips/kernel/head.S -+++ b/arch/mips/kernel/head.S -@@ -79,6 +79,12 @@ FEXPORT(__kernel_entry) - j kernel_entry - #endif /* CONFIG_BOOT_RAW */ - -+#ifdef CONFIG_IMAGE_CMDLINE_HACK -+ .ascii "CMDLINE:" -+EXPORT(__image_cmdline) -+ .fill 0x400 -+#endif /* CONFIG_IMAGE_CMDLINE_HACK */ -+ - __REF - - NESTED(kernel_entry, 16, sp) # kernel entry point diff --git a/target/linux/generic/hack-5.18/321-powerpc_crtsavres_prereq.patch b/target/linux/generic/hack-5.18/321-powerpc_crtsavres_prereq.patch deleted file mode 100644 index 40b2a51ed7e934..00000000000000 --- a/target/linux/generic/hack-5.18/321-powerpc_crtsavres_prereq.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 107c0964cb8db7ca28ac5199426414fdab3c274d Mon Sep 17 00:00:00 2001 -From: "Alexandros C. Couloumbis" -Date: Fri, 7 Jul 2017 17:14:51 +0200 -Subject: hack: arch: powerpc: drop register save/restore library from modules - -Upstream GCC uses a libgcc function for saving/restoring registers. This -makes the code bigger, and upstream kernels need to carry that function -for every single kernel module. Our GCC is patched to avoid those -references, so we can drop the extra bloat for modules. - -lede-commit: e8e1084654f50904e6bf77b70b2de3f137d7b3ec -Signed-off-by: Alexandros C. Couloumbis ---- - arch/powerpc/Makefile | 1 - - 1 file changed, 1 deletion(-) - ---- a/arch/powerpc/Makefile -+++ b/arch/powerpc/Makefile -@@ -59,19 +59,6 @@ machine-$(CONFIG_PPC64) += 64 - machine-$(CONFIG_CPU_LITTLE_ENDIAN) += le - UTS_MACHINE := $(subst $(space),,$(machine-y)) - --# XXX This needs to be before we override LD below --ifdef CONFIG_PPC32 --KBUILD_LDFLAGS_MODULE += arch/powerpc/lib/crtsavres.o --else --ifeq ($(call ld-ifversion, -ge, 22500, y),y) --# Have the linker provide sfpr if possible. --# There is a corresponding test in arch/powerpc/lib/Makefile --KBUILD_LDFLAGS_MODULE += --save-restore-funcs --else --KBUILD_LDFLAGS_MODULE += arch/powerpc/lib/crtsavres.o --endif --endif -- - ifdef CONFIG_CPU_LITTLE_ENDIAN - KBUILD_CFLAGS += -mlittle-endian - KBUILD_LDFLAGS += -EL diff --git a/target/linux/generic/hack-5.18/410-block-fit-partition-parser.patch b/target/linux/generic/hack-5.18/410-block-fit-partition-parser.patch deleted file mode 100644 index 46be44a9373c59..00000000000000 --- a/target/linux/generic/hack-5.18/410-block-fit-partition-parser.patch +++ /dev/null @@ -1,196 +0,0 @@ ---- a/block/blk.h -+++ b/block/blk.h -@@ -418,6 +418,8 @@ void blk_free_ext_minor(unsigned int min - #define ADDPART_FLAG_NONE 0 - #define ADDPART_FLAG_RAID 1 - #define ADDPART_FLAG_WHOLEDISK 2 -+#define ADDPART_FLAG_READONLY 4 -+#define ADDPART_FLAG_ROOTDEV 8 - int bdev_add_partition(struct gendisk *disk, int partno, sector_t start, - sector_t length); - int bdev_del_partition(struct gendisk *disk, int partno); ---- a/block/partitions/Kconfig -+++ b/block/partitions/Kconfig -@@ -103,6 +103,13 @@ config ATARI_PARTITION - Say Y here if you would like to use hard disks under Linux which - were partitioned under the Atari OS. - -+config FIT_PARTITION -+ bool "Flattened-Image-Tree (FIT) partition support" if PARTITION_ADVANCED -+ default n -+ help -+ Say Y here if your system needs to mount the filesystem part of -+ a Flattened-Image-Tree (FIT) image commonly used with Das U-Boot. -+ - config IBM_PARTITION - bool "IBM disk label and partition support" - depends on PARTITION_ADVANCED && S390 ---- a/block/partitions/Makefile -+++ b/block/partitions/Makefile -@@ -8,6 +8,7 @@ obj-$(CONFIG_ACORN_PARTITION) += acorn.o - obj-$(CONFIG_AMIGA_PARTITION) += amiga.o - obj-$(CONFIG_ATARI_PARTITION) += atari.o - obj-$(CONFIG_AIX_PARTITION) += aix.o -+obj-$(CONFIG_FIT_PARTITION) += fit.o - obj-$(CONFIG_CMDLINE_PARTITION) += cmdline.o - obj-$(CONFIG_MAC_PARTITION) += mac.o - obj-$(CONFIG_LDM_PARTITION) += ldm.o ---- a/block/partitions/check.h -+++ b/block/partitions/check.h -@@ -57,6 +57,7 @@ int amiga_partition(struct parsed_partit - int atari_partition(struct parsed_partitions *state); - int cmdline_partition(struct parsed_partitions *state); - int efi_partition(struct parsed_partitions *state); -+int fit_partition(struct parsed_partitions *state); - int ibm_partition(struct parsed_partitions *); - int karma_partition(struct parsed_partitions *state); - int ldm_partition(struct parsed_partitions *state); -@@ -67,3 +68,5 @@ int sgi_partition(struct parsed_partitio - int sun_partition(struct parsed_partitions *state); - int sysv68_partition(struct parsed_partitions *state); - int ultrix_partition(struct parsed_partitions *state); -+ -+int parse_fit_partitions(struct parsed_partitions *state, u64 start_sector, u64 nr_sectors, int *slot, int add_remain); ---- a/block/partitions/core.c -+++ b/block/partitions/core.c -@@ -11,6 +11,10 @@ - #include - #include - #include -+#ifdef CONFIG_FIT_PARTITION -+#include -+#endif -+ - #include "check.h" - - static int (*check_part[])(struct parsed_partitions *) = { -@@ -47,6 +51,9 @@ static int (*check_part[])(struct parsed - #ifdef CONFIG_EFI_PARTITION - efi_partition, /* this must come before msdos */ - #endif -+#ifdef CONFIG_FIT_PARTITION -+ fit_partition, -+#endif - #ifdef CONFIG_SGI_PARTITION - sgi_partition, - #endif -@@ -407,6 +414,11 @@ static struct block_device *add_partitio - goto out_del; - } - -+#ifdef CONFIG_FIT_PARTITION -+ if (flags & ADDPART_FLAG_READONLY) -+ bdev->bd_read_only = true; -+#endif -+ - /* everything is up and running, commence */ - err = xa_insert(&disk->part_tbl, partno, bdev, GFP_KERNEL); - if (err) -@@ -594,6 +606,11 @@ static bool blk_add_partition(struct gen - (state->parts[p].flags & ADDPART_FLAG_RAID)) - md_autodetect_dev(part->bd_dev); - -+#ifdef CONFIG_FIT_PARTITION -+ if ((state->parts[p].flags & ADDPART_FLAG_ROOTDEV) && ROOT_DEV == 0) -+ ROOT_DEV = part->bd_dev; -+#endif -+ - return true; - } - ---- a/drivers/mtd/ubi/block.c -+++ b/drivers/mtd/ubi/block.c -@@ -433,6 +433,9 @@ int ubiblock_create(struct ubi_volume_in - } - gd->flags |= GENHD_FL_NO_PART; - gd->private_data = dev; -+#ifdef CONFIG_FIT_PARTITION -+ gd->flags |= GENHD_FL_EXT_DEVT; -+#endif - sprintf(gd->disk_name, "ubiblock%d_%d", dev->ubi_num, dev->vol_id); - set_capacity(gd, disk_capacity); - dev->gd = gd; ---- a/drivers/mtd/mtd_blkdevs.c -+++ b/drivers/mtd/mtd_blkdevs.c -@@ -346,6 +346,9 @@ int add_mtd_blktrans_dev(struct mtd_blkt - gd->first_minor = (new->devnum) << tr->part_bits; - gd->minors = 1 << tr->part_bits; - gd->fops = &mtd_block_ops; -+#ifdef CONFIG_FIT_PARTITION -+ gd->flags |= GENHD_FL_EXT_DEVT; -+#endif - - if (tr->part_bits) { - if (new->devnum < 26) ---- a/block/partitions/efi.c -+++ b/block/partitions/efi.c -@@ -716,6 +716,9 @@ int efi_partition(struct parsed_partitio - gpt_entry *ptes = NULL; - u32 i; - unsigned ssz = queue_logical_block_size(state->disk->queue) / 512; -+#ifdef CONFIG_FIT_PARTITION -+ u32 extra_slot = 64; -+#endif - - if (!find_valid_gpt(state, &gpt, &ptes) || !gpt || !ptes) { - kfree(gpt); -@@ -749,6 +752,11 @@ int efi_partition(struct parsed_partitio - ARRAY_SIZE(ptes[i].partition_name)); - utf16_le_to_7bit(ptes[i].partition_name, label_max, info->volname); - state->parts[i + 1].has_info = true; -+#ifdef CONFIG_FIT_PARTITION -+ /* If this is a U-Boot FIT volume it may have subpartitions */ -+ if (!efi_guidcmp(ptes[i].partition_type_guid, PARTITION_LINUX_FIT_GUID)) -+ (void) parse_fit_partitions(state, start * ssz, size * ssz, &extra_slot, 1); -+#endif - } - kfree(ptes); - kfree(gpt); ---- a/block/partitions/efi.h -+++ b/block/partitions/efi.h -@@ -51,6 +51,9 @@ - #define PARTITION_LINUX_LVM_GUID \ - EFI_GUID( 0xe6d6d379, 0xf507, 0x44c2, \ - 0xa2, 0x3c, 0x23, 0x8f, 0x2a, 0x3d, 0xf9, 0x28) -+#define PARTITION_LINUX_FIT_GUID \ -+ EFI_GUID( 0xcae9be83, 0xb15f, 0x49cc, \ -+ 0x86, 0x3f, 0x08, 0x1b, 0x74, 0x4a, 0x2d, 0x93) - - typedef struct _gpt_header { - __le64 signature; ---- a/block/partitions/msdos.c -+++ b/block/partitions/msdos.c -@@ -564,6 +564,15 @@ static void parse_minix(struct parsed_pa - #endif /* CONFIG_MINIX_SUBPARTITION */ - } - -+static void parse_fit_mbr(struct parsed_partitions *state, -+ sector_t offset, sector_t size, int origin) -+{ -+#ifdef CONFIG_FIT_PARTITION -+ u32 extra_slot = 64; -+ (void) parse_fit_partitions(state, offset, size, &extra_slot, 1); -+#endif /* CONFIG_FIT_PARTITION */ -+} -+ - static struct { - unsigned char id; - void (*parse)(struct parsed_partitions *, sector_t, sector_t, int); -@@ -575,6 +584,7 @@ static struct { - {UNIXWARE_PARTITION, parse_unixware}, - {SOLARIS_X86_PARTITION, parse_solaris_x86}, - {NEW_SOLARIS_X86_PARTITION, parse_solaris_x86}, -+ {FIT_PARTITION, parse_fit_mbr}, - {0, NULL}, - }; - ---- a/include/linux/msdos_partition.h -+++ b/include/linux/msdos_partition.h -@@ -31,6 +31,7 @@ enum msdos_sys_ind { - LINUX_LVM_PARTITION = 0x8e, - LINUX_RAID_PARTITION = 0xfd, /* autodetect RAID partition */ - -+ FIT_PARTITION = 0x2e, /* U-Boot uImage.FIT */ - SOLARIS_X86_PARTITION = 0x82, /* also Linux swap partitions */ - NEW_SOLARIS_X86_PARTITION = 0xbf, - diff --git a/target/linux/generic/hack-5.18/420-mtd-set-rootfs-to-be-root-dev.patch b/target/linux/generic/hack-5.18/420-mtd-set-rootfs-to-be-root-dev.patch deleted file mode 100644 index addcf8e68f2db8..00000000000000 --- a/target/linux/generic/hack-5.18/420-mtd-set-rootfs-to-be-root-dev.patch +++ /dev/null @@ -1,39 +0,0 @@ -From: Gabor Juhos -Subject: kernel/3.1[02]: move MTD root device setup code to mtdcore - -The current code only allows to automatically set -root device on MTD partitions. Move the code to MTD -core to allow to use it with all MTD devices. - -Signed-off-by: Gabor Juhos ---- - drivers/mtd/mtdcore.c | 10 ++++++++++ - 1 file changed, 10 insertions(+) - ---- a/drivers/mtd/mtdcore.c -+++ b/drivers/mtd/mtdcore.c -@@ -27,6 +27,7 @@ - #include - #include - #include -+#include - #include - - #include -@@ -678,6 +679,16 @@ int add_mtd_device(struct mtd_info *mtd) - of this try_ nonsense, and no bitching about it - either. :) */ - __module_get(THIS_MODULE); -+ -+ if (!strcmp(mtd->name, "rootfs") && -+ IS_ENABLED(CONFIG_MTD_ROOTFS_ROOT_DEV) && -+ ROOT_DEV == 0) { -+ unsigned int index = mtd->index; -+ pr_notice("mtd: device %d (%s) set to be root filesystem\n", -+ mtd->index, mtd->name); -+ ROOT_DEV = MKDEV(MTD_BLOCK_MAJOR, index); -+ } -+ - return 0; - - fail_nvmem_add: diff --git a/target/linux/generic/hack-5.18/421-drivers-mtd-parsers-add-nvmem-support-to-cmdlinepart.patch b/target/linux/generic/hack-5.18/421-drivers-mtd-parsers-add-nvmem-support-to-cmdlinepart.patch deleted file mode 100644 index 965a331a1905bb..00000000000000 --- a/target/linux/generic/hack-5.18/421-drivers-mtd-parsers-add-nvmem-support-to-cmdlinepart.patch +++ /dev/null @@ -1,120 +0,0 @@ -From 6fa9e3678eb002246df1280322b6a024853950a5 Mon Sep 17 00:00:00 2001 -From: Ansuel Smith -Date: Mon, 11 Oct 2021 00:53:14 +0200 -Subject: [PATCH] drivers: mtd: parsers: add nvmem support to cmdlinepart - -Assuming cmdlinepart is only one level deep partition scheme and that -static partition are also defined in DTS, we can assign an of_node for -partition declared from bootargs. cmdlinepart have priority than -fiexed-partition parser so in this specific case the parser doesn't -assign an of_node. Fix this by searching a defined of_node using a -similar fixed_partition parser and if a partition is found with the same -label, check that it has the same offset and size and return the DT -of_node to correctly use NVMEM cells. - -Signed-off-by: Ansuel Smith ---- - drivers/mtd/parsers/cmdlinepart.c | 71 +++++++++++++++++++++++++++++++ - 1 file changed, 71 insertions(+) - ---- a/drivers/mtd/parsers/cmdlinepart.c -+++ b/drivers/mtd/parsers/cmdlinepart.c -@@ -43,6 +43,7 @@ - #include - #include - #include -+#include - - /* debug macro */ - #if 0 -@@ -323,6 +324,68 @@ static int mtdpart_setup_real(char *s) - return 0; - } - -+static int search_fixed_partition(struct mtd_info *master, -+ struct mtd_partition *target_part, -+ struct mtd_partition *fixed_part) -+{ -+ struct device_node *mtd_node; -+ struct device_node *ofpart_node; -+ struct device_node *pp; -+ struct mtd_partition part; -+ const char *partname; -+ -+ mtd_node = mtd_get_of_node(master); -+ if (!mtd_node) -+ return -EINVAL; -+ -+ ofpart_node = of_get_child_by_name(mtd_node, "partitions"); -+ -+ for_each_child_of_node(ofpart_node, pp) { -+ const __be32 *reg; -+ int len; -+ int a_cells, s_cells; -+ -+ reg = of_get_property(pp, "reg", &len); -+ if (!reg) { -+ pr_debug("%s: ofpart partition %pOF (%pOF) missing reg property.\n", -+ master->name, pp, -+ mtd_node); -+ continue; -+ } -+ -+ a_cells = of_n_addr_cells(pp); -+ s_cells = of_n_size_cells(pp); -+ if (len / 4 != a_cells + s_cells) { -+ pr_debug("%s: ofpart partition %pOF (%pOF) error parsing reg property.\n", -+ master->name, pp, -+ mtd_node); -+ continue; -+ } -+ -+ part.offset = of_read_number(reg, a_cells); -+ part.size = of_read_number(reg + a_cells, s_cells); -+ part.of_node = pp; -+ -+ partname = of_get_property(pp, "label", &len); -+ if (!partname) -+ partname = of_get_property(pp, "name", &len); -+ part.name = partname; -+ -+ if (!strncmp(target_part->name, part.name, len)) { -+ if (part.offset != target_part->offset) -+ return -EINVAL; -+ -+ if (part.size != target_part->size) -+ return -EINVAL; -+ -+ memcpy(fixed_part, &part, sizeof(struct mtd_partition)); -+ return 0; -+ } -+ } -+ -+ return -EINVAL; -+} -+ - /* - * Main function to be called from the MTD mapping driver/device to - * obtain the partitioning information. At this point the command line -@@ -338,6 +401,7 @@ static int parse_cmdline_partitions(stru - int i, err; - struct cmdline_mtd_partition *part; - const char *mtd_id = master->name; -+ struct mtd_partition fixed_part; - - /* parse command line */ - if (!cmdline_parsed) { -@@ -382,6 +446,13 @@ static int parse_cmdline_partitions(stru - sizeof(*part->parts) * (part->num_parts - i)); - i--; - } -+ -+ err = search_fixed_partition(master, &part->parts[i], &fixed_part); -+ if (!err) { -+ part->parts[i].of_node = fixed_part.of_node; -+ pr_info("Found partition defined in DT for %s. Assigning OF node to support nvmem.", -+ part->parts[i].name); -+ } - } - - *pparts = kmemdup(part->parts, sizeof(*part->parts) * part->num_parts, diff --git a/target/linux/generic/hack-5.18/430-mtk-bmt-support.patch b/target/linux/generic/hack-5.18/430-mtk-bmt-support.patch deleted file mode 100644 index c8e75f53e58aa0..00000000000000 --- a/target/linux/generic/hack-5.18/430-mtk-bmt-support.patch +++ /dev/null @@ -1,23 +0,0 @@ ---- a/drivers/mtd/nand/Kconfig -+++ b/drivers/mtd/nand/Kconfig -@@ -53,6 +53,10 @@ config MTD_NAND_ECC_MXIC - help - This enables support for the hardware ECC engine from Macronix. - -+config MTD_NAND_MTK_BMT -+ bool "Support MediaTek NAND Bad-block Management Table" -+ default n -+ - endmenu - - endmenu ---- a/drivers/mtd/nand/Makefile -+++ b/drivers/mtd/nand/Makefile -@@ -2,6 +2,7 @@ - - nandcore-objs := core.o bbt.o - obj-$(CONFIG_MTD_NAND_CORE) += nandcore.o -+obj-$(CONFIG_MTD_NAND_MTK_BMT) += mtk_bmt.o mtk_bmt_v2.o mtk_bmt_bbt.o mtk_bmt_nmbm.o - - obj-y += onenand/ - obj-y += raw/ diff --git a/target/linux/generic/hack-5.18/531-debloat_lzma.patch b/target/linux/generic/hack-5.18/531-debloat_lzma.patch deleted file mode 100644 index 2f70eee3e9040b..00000000000000 --- a/target/linux/generic/hack-5.18/531-debloat_lzma.patch +++ /dev/null @@ -1,1040 +0,0 @@ -From 3fd297761ac246c54d7723c57fca95c112b99465 Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Sat, 15 Jul 2017 21:15:44 +0200 -Subject: lzma: de-bloat the lzma library used by jffs2 - -lede-commit: 3fd1dd08fbcbb78b34efefd32c3032e5c99108d6 -Signed-off-by: Felix Fietkau ---- - include/linux/lzma/LzFind.h | 17 --- - include/linux/lzma/LzmaDec.h | 101 --------------- - include/linux/lzma/LzmaEnc.h | 20 --- - lib/lzma/LzFind.c | 287 ++++--------------------------------------- - lib/lzma/LzmaDec.c | 86 +------------ - lib/lzma/LzmaEnc.c | 172 ++------------------------ - 6 files changed, 42 insertions(+), 641 deletions(-) - ---- a/include/linux/lzma/LzFind.h -+++ b/include/linux/lzma/LzFind.h -@@ -55,11 +55,6 @@ typedef struct _CMatchFinder - - #define Inline_MatchFinder_GetNumAvailableBytes(p) ((p)->streamPos - (p)->pos) - --int MatchFinder_NeedMove(CMatchFinder *p); --Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p); --void MatchFinder_MoveBlock(CMatchFinder *p); --void MatchFinder_ReadIfRequired(CMatchFinder *p); -- - void MatchFinder_Construct(CMatchFinder *p); - - /* Conditions: -@@ -70,12 +65,6 @@ int MatchFinder_Create(CMatchFinder *p, - UInt32 keepAddBufferBefore, UInt32 matchMaxLen, UInt32 keepAddBufferAfter, - ISzAlloc *alloc); - void MatchFinder_Free(CMatchFinder *p, ISzAlloc *alloc); --void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems); --void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue); -- --UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *buffer, CLzRef *son, -- UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 _cutValue, -- UInt32 *distances, UInt32 maxLen); - - /* - Conditions: -@@ -102,12 +91,6 @@ typedef struct _IMatchFinder - - void MatchFinder_CreateVTable(CMatchFinder *p, IMatchFinder *vTable); - --void MatchFinder_Init(CMatchFinder *p); --UInt32 Bt3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances); --UInt32 Hc3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances); --void Bt3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num); --void Hc3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num); -- - #ifdef __cplusplus - } - #endif ---- a/include/linux/lzma/LzmaDec.h -+++ b/include/linux/lzma/LzmaDec.h -@@ -31,14 +31,6 @@ typedef struct _CLzmaProps - UInt32 dicSize; - } CLzmaProps; - --/* LzmaProps_Decode - decodes properties --Returns: -- SZ_OK -- SZ_ERROR_UNSUPPORTED - Unsupported properties --*/ -- --SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size); -- - - /* ---------- LZMA Decoder state ---------- */ - -@@ -70,8 +62,6 @@ typedef struct - - #define LzmaDec_Construct(p) { (p)->dic = 0; (p)->probs = 0; } - --void LzmaDec_Init(CLzmaDec *p); -- - /* There are two types of LZMA streams: - 0) Stream with end mark. That end mark adds about 6 bytes to compressed size. - 1) Stream without end mark. You must know exact uncompressed size to decompress such stream. */ -@@ -108,97 +98,6 @@ typedef enum - - /* ELzmaStatus is used only as output value for function call */ - -- --/* ---------- Interfaces ---------- */ -- --/* There are 3 levels of interfaces: -- 1) Dictionary Interface -- 2) Buffer Interface -- 3) One Call Interface -- You can select any of these interfaces, but don't mix functions from different -- groups for same object. */ -- -- --/* There are two variants to allocate state for Dictionary Interface: -- 1) LzmaDec_Allocate / LzmaDec_Free -- 2) LzmaDec_AllocateProbs / LzmaDec_FreeProbs -- You can use variant 2, if you set dictionary buffer manually. -- For Buffer Interface you must always use variant 1. -- --LzmaDec_Allocate* can return: -- SZ_OK -- SZ_ERROR_MEM - Memory allocation error -- SZ_ERROR_UNSUPPORTED - Unsupported properties --*/ -- --SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc); --void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc); -- --SRes LzmaDec_Allocate(CLzmaDec *state, const Byte *prop, unsigned propsSize, ISzAlloc *alloc); --void LzmaDec_Free(CLzmaDec *state, ISzAlloc *alloc); -- --/* ---------- Dictionary Interface ---------- */ -- --/* You can use it, if you want to eliminate the overhead for data copying from -- dictionary to some other external buffer. -- You must work with CLzmaDec variables directly in this interface. -- -- STEPS: -- LzmaDec_Constr() -- LzmaDec_Allocate() -- for (each new stream) -- { -- LzmaDec_Init() -- while (it needs more decompression) -- { -- LzmaDec_DecodeToDic() -- use data from CLzmaDec::dic and update CLzmaDec::dicPos -- } -- } -- LzmaDec_Free() --*/ -- --/* LzmaDec_DecodeToDic -- -- The decoding to internal dictionary buffer (CLzmaDec::dic). -- You must manually update CLzmaDec::dicPos, if it reaches CLzmaDec::dicBufSize !!! -- --finishMode: -- It has meaning only if the decoding reaches output limit (dicLimit). -- LZMA_FINISH_ANY - Decode just dicLimit bytes. -- LZMA_FINISH_END - Stream must be finished after dicLimit. -- --Returns: -- SZ_OK -- status: -- LZMA_STATUS_FINISHED_WITH_MARK -- LZMA_STATUS_NOT_FINISHED -- LZMA_STATUS_NEEDS_MORE_INPUT -- LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK -- SZ_ERROR_DATA - Data error --*/ -- --SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit, -- const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status); -- -- --/* ---------- Buffer Interface ---------- */ -- --/* It's zlib-like interface. -- See LzmaDec_DecodeToDic description for information about STEPS and return results, -- but you must use LzmaDec_DecodeToBuf instead of LzmaDec_DecodeToDic and you don't need -- to work with CLzmaDec variables manually. -- --finishMode: -- It has meaning only if the decoding reaches output limit (*destLen). -- LZMA_FINISH_ANY - Decode just destLen bytes. -- LZMA_FINISH_END - Stream must be finished after (*destLen). --*/ -- --SRes LzmaDec_DecodeToBuf(CLzmaDec *p, Byte *dest, SizeT *destLen, -- const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status); -- -- - /* ---------- One Call Interface ---------- */ - - /* LzmaDecode ---- a/include/linux/lzma/LzmaEnc.h -+++ b/include/linux/lzma/LzmaEnc.h -@@ -31,9 +31,6 @@ typedef struct _CLzmaEncProps - } CLzmaEncProps; - - void LzmaEncProps_Init(CLzmaEncProps *p); --void LzmaEncProps_Normalize(CLzmaEncProps *p); --UInt32 LzmaEncProps_GetDictSize(const CLzmaEncProps *props2); -- - - /* ---------- CLzmaEncHandle Interface ---------- */ - -@@ -53,26 +50,9 @@ CLzmaEncHandle LzmaEnc_Create(ISzAlloc * - void LzmaEnc_Destroy(CLzmaEncHandle p, ISzAlloc *alloc, ISzAlloc *allocBig); - SRes LzmaEnc_SetProps(CLzmaEncHandle p, const CLzmaEncProps *props); - SRes LzmaEnc_WriteProperties(CLzmaEncHandle p, Byte *properties, SizeT *size); --SRes LzmaEnc_Encode(CLzmaEncHandle p, ISeqOutStream *outStream, ISeqInStream *inStream, -- ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig); - SRes LzmaEnc_MemEncode(CLzmaEncHandle p, Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen, - int writeEndMark, ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig); - --/* ---------- One Call Interface ---------- */ -- --/* LzmaEncode --Return code: -- SZ_OK - OK -- SZ_ERROR_MEM - Memory allocation error -- SZ_ERROR_PARAM - Incorrect paramater -- SZ_ERROR_OUTPUT_EOF - output buffer overflow -- SZ_ERROR_THREAD - errors in multithreading functions (only for Mt version) --*/ -- --SRes LzmaEncode(Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen, -- const CLzmaEncProps *props, Byte *propsEncoded, SizeT *propsSize, int writeEndMark, -- ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig); -- - #ifdef __cplusplus - } - #endif ---- a/lib/lzma/LzFind.c -+++ b/lib/lzma/LzFind.c -@@ -14,9 +14,15 @@ - - #define kStartMaxLen 3 - -+#if 0 -+#define DIRECT_INPUT p->directInput -+#else -+#define DIRECT_INPUT 1 -+#endif -+ - static void LzInWindow_Free(CMatchFinder *p, ISzAlloc *alloc) - { -- if (!p->directInput) -+ if (!DIRECT_INPUT) - { - alloc->Free(alloc, p->bufferBase); - p->bufferBase = 0; -@@ -28,7 +34,7 @@ static void LzInWindow_Free(CMatchFinder - static int LzInWindow_Create(CMatchFinder *p, UInt32 keepSizeReserv, ISzAlloc *alloc) - { - UInt32 blockSize = p->keepSizeBefore + p->keepSizeAfter + keepSizeReserv; -- if (p->directInput) -+ if (DIRECT_INPUT) - { - p->blockSize = blockSize; - return 1; -@@ -42,12 +48,12 @@ static int LzInWindow_Create(CMatchFinde - return (p->bufferBase != 0); - } - --Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p) { return p->buffer; } --Byte MatchFinder_GetIndexByte(CMatchFinder *p, Int32 index) { return p->buffer[index]; } -+static Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p) { return p->buffer; } -+static Byte MatchFinder_GetIndexByte(CMatchFinder *p, Int32 index) { return p->buffer[index]; } - --UInt32 MatchFinder_GetNumAvailableBytes(CMatchFinder *p) { return p->streamPos - p->pos; } -+static UInt32 MatchFinder_GetNumAvailableBytes(CMatchFinder *p) { return p->streamPos - p->pos; } - --void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue) -+static void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue) - { - p->posLimit -= subValue; - p->pos -= subValue; -@@ -58,7 +64,7 @@ static void MatchFinder_ReadBlock(CMatch - { - if (p->streamEndWasReached || p->result != SZ_OK) - return; -- if (p->directInput) -+ if (DIRECT_INPUT) - { - UInt32 curSize = 0xFFFFFFFF - p->streamPos; - if (curSize > p->directInputRem) -@@ -89,7 +95,7 @@ static void MatchFinder_ReadBlock(CMatch - } - } - --void MatchFinder_MoveBlock(CMatchFinder *p) -+static void MatchFinder_MoveBlock(CMatchFinder *p) - { - memmove(p->bufferBase, - p->buffer - p->keepSizeBefore, -@@ -97,22 +103,14 @@ void MatchFinder_MoveBlock(CMatchFinder - p->buffer = p->bufferBase + p->keepSizeBefore; - } - --int MatchFinder_NeedMove(CMatchFinder *p) -+static int MatchFinder_NeedMove(CMatchFinder *p) - { -- if (p->directInput) -+ if (DIRECT_INPUT) - return 0; - /* if (p->streamEndWasReached) return 0; */ - return ((size_t)(p->bufferBase + p->blockSize - p->buffer) <= p->keepSizeAfter); - } - --void MatchFinder_ReadIfRequired(CMatchFinder *p) --{ -- if (p->streamEndWasReached) -- return; -- if (p->keepSizeAfter >= p->streamPos - p->pos) -- MatchFinder_ReadBlock(p); --} -- - static void MatchFinder_CheckAndMoveAndRead(CMatchFinder *p) - { - if (MatchFinder_NeedMove(p)) -@@ -268,7 +266,7 @@ static void MatchFinder_SetLimits(CMatch - p->posLimit = p->pos + limit; - } - --void MatchFinder_Init(CMatchFinder *p) -+static void MatchFinder_Init(CMatchFinder *p) - { - UInt32 i; - for (i = 0; i < p->hashSizeSum; i++) -@@ -287,7 +285,7 @@ static UInt32 MatchFinder_GetSubValue(CM - return (p->pos - p->historySize - 1) & kNormalizeMask; - } - --void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems) -+static void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems) - { - UInt32 i; - for (i = 0; i < numItems; i++) -@@ -319,38 +317,7 @@ static void MatchFinder_CheckLimits(CMat - MatchFinder_SetLimits(p); - } - --static UInt32 * Hc_GetMatchesSpec(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son, -- UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue, -- UInt32 *distances, UInt32 maxLen) --{ -- son[_cyclicBufferPos] = curMatch; -- for (;;) -- { -- UInt32 delta = pos - curMatch; -- if (cutValue-- == 0 || delta >= _cyclicBufferSize) -- return distances; -- { -- const Byte *pb = cur - delta; -- curMatch = son[_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)]; -- if (pb[maxLen] == cur[maxLen] && *pb == *cur) -- { -- UInt32 len = 0; -- while (++len != lenLimit) -- if (pb[len] != cur[len]) -- break; -- if (maxLen < len) -- { -- *distances++ = maxLen = len; -- *distances++ = delta - 1; -- if (len == lenLimit) -- return distances; -- } -- } -- } -- } --} -- --UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son, -+static UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son, - UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue, - UInt32 *distances, UInt32 maxLen) - { -@@ -460,10 +427,10 @@ static void SkipMatchesSpec(UInt32 lenLi - p->buffer++; \ - if (++p->pos == p->posLimit) MatchFinder_CheckLimits(p); - --#define MOVE_POS_RET MOVE_POS return offset; -- - static void MatchFinder_MovePos(CMatchFinder *p) { MOVE_POS; } - -+#define MOVE_POS_RET MatchFinder_MovePos(p); return offset; -+ - #define GET_MATCHES_HEADER2(minLen, ret_op) \ - UInt32 lenLimit; UInt32 hashValue; const Byte *cur; UInt32 curMatch; \ - lenLimit = p->lenLimit; { if (lenLimit < minLen) { MatchFinder_MovePos(p); ret_op; }} \ -@@ -479,62 +446,7 @@ static void MatchFinder_MovePos(CMatchFi - distances + offset, maxLen) - distances); MOVE_POS_RET; - - #define SKIP_FOOTER \ -- SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p)); MOVE_POS; -- --static UInt32 Bt2_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances) --{ -- UInt32 offset; -- GET_MATCHES_HEADER(2) -- HASH2_CALC; -- curMatch = p->hash[hashValue]; -- p->hash[hashValue] = p->pos; -- offset = 0; -- GET_MATCHES_FOOTER(offset, 1) --} -- --UInt32 Bt3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances) --{ -- UInt32 offset; -- GET_MATCHES_HEADER(3) -- HASH_ZIP_CALC; -- curMatch = p->hash[hashValue]; -- p->hash[hashValue] = p->pos; -- offset = 0; -- GET_MATCHES_FOOTER(offset, 2) --} -- --static UInt32 Bt3_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances) --{ -- UInt32 hash2Value, delta2, maxLen, offset; -- GET_MATCHES_HEADER(3) -- -- HASH3_CALC; -- -- delta2 = p->pos - p->hash[hash2Value]; -- curMatch = p->hash[kFix3HashSize + hashValue]; -- -- p->hash[hash2Value] = -- p->hash[kFix3HashSize + hashValue] = p->pos; -- -- -- maxLen = 2; -- offset = 0; -- if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur) -- { -- for (; maxLen != lenLimit; maxLen++) -- if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen]) -- break; -- distances[0] = maxLen; -- distances[1] = delta2 - 1; -- offset = 2; -- if (maxLen == lenLimit) -- { -- SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p)); -- MOVE_POS_RET; -- } -- } -- GET_MATCHES_FOOTER(offset, maxLen) --} -+ SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p)); MatchFinder_MovePos(p); - - static UInt32 Bt4_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances) - { -@@ -583,108 +495,6 @@ static UInt32 Bt4_MatchFinder_GetMatches - GET_MATCHES_FOOTER(offset, maxLen) - } - --static UInt32 Hc4_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances) --{ -- UInt32 hash2Value, hash3Value, delta2, delta3, maxLen, offset; -- GET_MATCHES_HEADER(4) -- -- HASH4_CALC; -- -- delta2 = p->pos - p->hash[ hash2Value]; -- delta3 = p->pos - p->hash[kFix3HashSize + hash3Value]; -- curMatch = p->hash[kFix4HashSize + hashValue]; -- -- p->hash[ hash2Value] = -- p->hash[kFix3HashSize + hash3Value] = -- p->hash[kFix4HashSize + hashValue] = p->pos; -- -- maxLen = 1; -- offset = 0; -- if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur) -- { -- distances[0] = maxLen = 2; -- distances[1] = delta2 - 1; -- offset = 2; -- } -- if (delta2 != delta3 && delta3 < p->cyclicBufferSize && *(cur - delta3) == *cur) -- { -- maxLen = 3; -- distances[offset + 1] = delta3 - 1; -- offset += 2; -- delta2 = delta3; -- } -- if (offset != 0) -- { -- for (; maxLen != lenLimit; maxLen++) -- if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen]) -- break; -- distances[offset - 2] = maxLen; -- if (maxLen == lenLimit) -- { -- p->son[p->cyclicBufferPos] = curMatch; -- MOVE_POS_RET; -- } -- } -- if (maxLen < 3) -- maxLen = 3; -- offset = (UInt32)(Hc_GetMatchesSpec(lenLimit, curMatch, MF_PARAMS(p), -- distances + offset, maxLen) - (distances)); -- MOVE_POS_RET --} -- --UInt32 Hc3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances) --{ -- UInt32 offset; -- GET_MATCHES_HEADER(3) -- HASH_ZIP_CALC; -- curMatch = p->hash[hashValue]; -- p->hash[hashValue] = p->pos; -- offset = (UInt32)(Hc_GetMatchesSpec(lenLimit, curMatch, MF_PARAMS(p), -- distances, 2) - (distances)); -- MOVE_POS_RET --} -- --static void Bt2_MatchFinder_Skip(CMatchFinder *p, UInt32 num) --{ -- do -- { -- SKIP_HEADER(2) -- HASH2_CALC; -- curMatch = p->hash[hashValue]; -- p->hash[hashValue] = p->pos; -- SKIP_FOOTER -- } -- while (--num != 0); --} -- --void Bt3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num) --{ -- do -- { -- SKIP_HEADER(3) -- HASH_ZIP_CALC; -- curMatch = p->hash[hashValue]; -- p->hash[hashValue] = p->pos; -- SKIP_FOOTER -- } -- while (--num != 0); --} -- --static void Bt3_MatchFinder_Skip(CMatchFinder *p, UInt32 num) --{ -- do -- { -- UInt32 hash2Value; -- SKIP_HEADER(3) -- HASH3_CALC; -- curMatch = p->hash[kFix3HashSize + hashValue]; -- p->hash[hash2Value] = -- p->hash[kFix3HashSize + hashValue] = p->pos; -- SKIP_FOOTER -- } -- while (--num != 0); --} -- - static void Bt4_MatchFinder_Skip(CMatchFinder *p, UInt32 num) - { - do -@@ -701,61 +511,12 @@ static void Bt4_MatchFinder_Skip(CMatchF - while (--num != 0); - } - --static void Hc4_MatchFinder_Skip(CMatchFinder *p, UInt32 num) --{ -- do -- { -- UInt32 hash2Value, hash3Value; -- SKIP_HEADER(4) -- HASH4_CALC; -- curMatch = p->hash[kFix4HashSize + hashValue]; -- p->hash[ hash2Value] = -- p->hash[kFix3HashSize + hash3Value] = -- p->hash[kFix4HashSize + hashValue] = p->pos; -- p->son[p->cyclicBufferPos] = curMatch; -- MOVE_POS -- } -- while (--num != 0); --} -- --void Hc3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num) --{ -- do -- { -- SKIP_HEADER(3) -- HASH_ZIP_CALC; -- curMatch = p->hash[hashValue]; -- p->hash[hashValue] = p->pos; -- p->son[p->cyclicBufferPos] = curMatch; -- MOVE_POS -- } -- while (--num != 0); --} -- - void MatchFinder_CreateVTable(CMatchFinder *p, IMatchFinder *vTable) - { - vTable->Init = (Mf_Init_Func)MatchFinder_Init; - vTable->GetIndexByte = (Mf_GetIndexByte_Func)MatchFinder_GetIndexByte; - vTable->GetNumAvailableBytes = (Mf_GetNumAvailableBytes_Func)MatchFinder_GetNumAvailableBytes; - vTable->GetPointerToCurrentPos = (Mf_GetPointerToCurrentPos_Func)MatchFinder_GetPointerToCurrentPos; -- if (!p->btMode) -- { -- vTable->GetMatches = (Mf_GetMatches_Func)Hc4_MatchFinder_GetMatches; -- vTable->Skip = (Mf_Skip_Func)Hc4_MatchFinder_Skip; -- } -- else if (p->numHashBytes == 2) -- { -- vTable->GetMatches = (Mf_GetMatches_Func)Bt2_MatchFinder_GetMatches; -- vTable->Skip = (Mf_Skip_Func)Bt2_MatchFinder_Skip; -- } -- else if (p->numHashBytes == 3) -- { -- vTable->GetMatches = (Mf_GetMatches_Func)Bt3_MatchFinder_GetMatches; -- vTable->Skip = (Mf_Skip_Func)Bt3_MatchFinder_Skip; -- } -- else -- { -- vTable->GetMatches = (Mf_GetMatches_Func)Bt4_MatchFinder_GetMatches; -- vTable->Skip = (Mf_Skip_Func)Bt4_MatchFinder_Skip; -- } -+ vTable->GetMatches = (Mf_GetMatches_Func)Bt4_MatchFinder_GetMatches; -+ vTable->Skip = (Mf_Skip_Func)Bt4_MatchFinder_Skip; - } ---- a/lib/lzma/LzmaDec.c -+++ b/lib/lzma/LzmaDec.c -@@ -682,7 +682,7 @@ static void LzmaDec_InitRc(CLzmaDec *p, - p->needFlush = 0; - } - --void LzmaDec_InitDicAndState(CLzmaDec *p, Bool initDic, Bool initState) -+static void LzmaDec_InitDicAndState(CLzmaDec *p, Bool initDic, Bool initState) - { - p->needFlush = 1; - p->remainLen = 0; -@@ -698,7 +698,7 @@ void LzmaDec_InitDicAndState(CLzmaDec *p - p->needInitState = 1; - } - --void LzmaDec_Init(CLzmaDec *p) -+static void LzmaDec_Init(CLzmaDec *p) - { - p->dicPos = 0; - LzmaDec_InitDicAndState(p, True, True); -@@ -716,7 +716,7 @@ static void LzmaDec_InitStateReal(CLzmaD - p->needInitState = 0; - } - --SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit, const Byte *src, SizeT *srcLen, -+static SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit, const Byte *src, SizeT *srcLen, - ELzmaFinishMode finishMode, ELzmaStatus *status) - { - SizeT inSize = *srcLen; -@@ -837,65 +837,13 @@ SRes LzmaDec_DecodeToDic(CLzmaDec *p, Si - return (p->code == 0) ? SZ_OK : SZ_ERROR_DATA; - } - --SRes LzmaDec_DecodeToBuf(CLzmaDec *p, Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status) --{ -- SizeT outSize = *destLen; -- SizeT inSize = *srcLen; -- *srcLen = *destLen = 0; -- for (;;) -- { -- SizeT inSizeCur = inSize, outSizeCur, dicPos; -- ELzmaFinishMode curFinishMode; -- SRes res; -- if (p->dicPos == p->dicBufSize) -- p->dicPos = 0; -- dicPos = p->dicPos; -- if (outSize > p->dicBufSize - dicPos) -- { -- outSizeCur = p->dicBufSize; -- curFinishMode = LZMA_FINISH_ANY; -- } -- else -- { -- outSizeCur = dicPos + outSize; -- curFinishMode = finishMode; -- } -- -- res = LzmaDec_DecodeToDic(p, outSizeCur, src, &inSizeCur, curFinishMode, status); -- src += inSizeCur; -- inSize -= inSizeCur; -- *srcLen += inSizeCur; -- outSizeCur = p->dicPos - dicPos; -- memcpy(dest, p->dic + dicPos, outSizeCur); -- dest += outSizeCur; -- outSize -= outSizeCur; -- *destLen += outSizeCur; -- if (res != 0) -- return res; -- if (outSizeCur == 0 || outSize == 0) -- return SZ_OK; -- } --} -- --void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc) -+static void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc) - { - alloc->Free(alloc, p->probs); - p->probs = 0; - } - --static void LzmaDec_FreeDict(CLzmaDec *p, ISzAlloc *alloc) --{ -- alloc->Free(alloc, p->dic); -- p->dic = 0; --} -- --void LzmaDec_Free(CLzmaDec *p, ISzAlloc *alloc) --{ -- LzmaDec_FreeProbs(p, alloc); -- LzmaDec_FreeDict(p, alloc); --} -- --SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size) -+static SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size) - { - UInt32 dicSize; - Byte d; -@@ -935,7 +883,7 @@ static SRes LzmaDec_AllocateProbs2(CLzma - return SZ_OK; - } - --SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc) -+static SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc) - { - CLzmaProps propNew; - RINOK(LzmaProps_Decode(&propNew, props, propsSize)); -@@ -943,28 +891,6 @@ SRes LzmaDec_AllocateProbs(CLzmaDec *p, - p->prop = propNew; - return SZ_OK; - } -- --SRes LzmaDec_Allocate(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc) --{ -- CLzmaProps propNew; -- SizeT dicBufSize; -- RINOK(LzmaProps_Decode(&propNew, props, propsSize)); -- RINOK(LzmaDec_AllocateProbs2(p, &propNew, alloc)); -- dicBufSize = propNew.dicSize; -- if (p->dic == 0 || dicBufSize != p->dicBufSize) -- { -- LzmaDec_FreeDict(p, alloc); -- p->dic = (Byte *)alloc->Alloc(alloc, dicBufSize); -- if (p->dic == 0) -- { -- LzmaDec_FreeProbs(p, alloc); -- return SZ_ERROR_MEM; -- } -- } -- p->dicBufSize = dicBufSize; -- p->prop = propNew; -- return SZ_OK; --} - - SRes LzmaDecode(Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen, - const Byte *propData, unsigned propSize, ELzmaFinishMode finishMode, ---- a/lib/lzma/LzmaEnc.c -+++ b/lib/lzma/LzmaEnc.c -@@ -53,7 +53,7 @@ void LzmaEncProps_Init(CLzmaEncProps *p) - p->writeEndMark = 0; - } - --void LzmaEncProps_Normalize(CLzmaEncProps *p) -+static void LzmaEncProps_Normalize(CLzmaEncProps *p) - { - int level = p->level; - if (level < 0) level = 5; -@@ -76,7 +76,7 @@ void LzmaEncProps_Normalize(CLzmaEncProp - #endif - } - --UInt32 LzmaEncProps_GetDictSize(const CLzmaEncProps *props2) -+static UInt32 __maybe_unused LzmaEncProps_GetDictSize(const CLzmaEncProps *props2) - { - CLzmaEncProps props = *props2; - LzmaEncProps_Normalize(&props); -@@ -93,7 +93,7 @@ UInt32 LzmaEncProps_GetDictSize(const CL - - #define BSR2_RET(pos, res) { unsigned long i; _BitScanReverse(&i, (pos)); res = (i + i) + ((pos >> (i - 1)) & 1); } - --UInt32 GetPosSlot1(UInt32 pos) -+static UInt32 GetPosSlot1(UInt32 pos) - { - UInt32 res; - BSR2_RET(pos, res); -@@ -107,7 +107,7 @@ UInt32 GetPosSlot1(UInt32 pos) - #define kNumLogBits (9 + (int)sizeof(size_t) / 2) - #define kDicLogSizeMaxCompress ((kNumLogBits - 1) * 2 + 7) - --void LzmaEnc_FastPosInit(Byte *g_FastPos) -+static void LzmaEnc_FastPosInit(Byte *g_FastPos) - { - int c = 2, slotFast; - g_FastPos[0] = 0; -@@ -339,58 +339,6 @@ typedef struct - CSaveState saveState; - } CLzmaEnc; - --void LzmaEnc_SaveState(CLzmaEncHandle pp) --{ -- CLzmaEnc *p = (CLzmaEnc *)pp; -- CSaveState *dest = &p->saveState; -- int i; -- dest->lenEnc = p->lenEnc; -- dest->repLenEnc = p->repLenEnc; -- dest->state = p->state; -- -- for (i = 0; i < kNumStates; i++) -- { -- memcpy(dest->isMatch[i], p->isMatch[i], sizeof(p->isMatch[i])); -- memcpy(dest->isRep0Long[i], p->isRep0Long[i], sizeof(p->isRep0Long[i])); -- } -- for (i = 0; i < kNumLenToPosStates; i++) -- memcpy(dest->posSlotEncoder[i], p->posSlotEncoder[i], sizeof(p->posSlotEncoder[i])); -- memcpy(dest->isRep, p->isRep, sizeof(p->isRep)); -- memcpy(dest->isRepG0, p->isRepG0, sizeof(p->isRepG0)); -- memcpy(dest->isRepG1, p->isRepG1, sizeof(p->isRepG1)); -- memcpy(dest->isRepG2, p->isRepG2, sizeof(p->isRepG2)); -- memcpy(dest->posEncoders, p->posEncoders, sizeof(p->posEncoders)); -- memcpy(dest->posAlignEncoder, p->posAlignEncoder, sizeof(p->posAlignEncoder)); -- memcpy(dest->reps, p->reps, sizeof(p->reps)); -- memcpy(dest->litProbs, p->litProbs, (0x300 << p->lclp) * sizeof(CLzmaProb)); --} -- --void LzmaEnc_RestoreState(CLzmaEncHandle pp) --{ -- CLzmaEnc *dest = (CLzmaEnc *)pp; -- const CSaveState *p = &dest->saveState; -- int i; -- dest->lenEnc = p->lenEnc; -- dest->repLenEnc = p->repLenEnc; -- dest->state = p->state; -- -- for (i = 0; i < kNumStates; i++) -- { -- memcpy(dest->isMatch[i], p->isMatch[i], sizeof(p->isMatch[i])); -- memcpy(dest->isRep0Long[i], p->isRep0Long[i], sizeof(p->isRep0Long[i])); -- } -- for (i = 0; i < kNumLenToPosStates; i++) -- memcpy(dest->posSlotEncoder[i], p->posSlotEncoder[i], sizeof(p->posSlotEncoder[i])); -- memcpy(dest->isRep, p->isRep, sizeof(p->isRep)); -- memcpy(dest->isRepG0, p->isRepG0, sizeof(p->isRepG0)); -- memcpy(dest->isRepG1, p->isRepG1, sizeof(p->isRepG1)); -- memcpy(dest->isRepG2, p->isRepG2, sizeof(p->isRepG2)); -- memcpy(dest->posEncoders, p->posEncoders, sizeof(p->posEncoders)); -- memcpy(dest->posAlignEncoder, p->posAlignEncoder, sizeof(p->posAlignEncoder)); -- memcpy(dest->reps, p->reps, sizeof(p->reps)); -- memcpy(dest->litProbs, p->litProbs, (0x300 << dest->lclp) * sizeof(CLzmaProb)); --} -- - SRes LzmaEnc_SetProps(CLzmaEncHandle pp, const CLzmaEncProps *props2) - { - CLzmaEnc *p = (CLzmaEnc *)pp; -@@ -600,7 +548,7 @@ static void LitEnc_EncodeMatched(CRangeE - while (symbol < 0x10000); - } - --void LzmaEnc_InitPriceTables(UInt32 *ProbPrices) -+static void LzmaEnc_InitPriceTables(UInt32 *ProbPrices) - { - UInt32 i; - for (i = (1 << kNumMoveReducingBits) / 2; i < kBitModelTotal; i += (1 << kNumMoveReducingBits)) -@@ -1676,7 +1624,7 @@ static void FillDistancesPrices(CLzmaEnc - p->matchPriceCount = 0; - } - --void LzmaEnc_Construct(CLzmaEnc *p) -+static void LzmaEnc_Construct(CLzmaEnc *p) - { - RangeEnc_Construct(&p->rc); - MatchFinder_Construct(&p->matchFinderBase); -@@ -1709,7 +1657,7 @@ CLzmaEncHandle LzmaEnc_Create(ISzAlloc * - return p; - } - --void LzmaEnc_FreeLits(CLzmaEnc *p, ISzAlloc *alloc) -+static void LzmaEnc_FreeLits(CLzmaEnc *p, ISzAlloc *alloc) - { - alloc->Free(alloc, p->litProbs); - alloc->Free(alloc, p->saveState.litProbs); -@@ -1717,7 +1665,7 @@ void LzmaEnc_FreeLits(CLzmaEnc *p, ISzAl - p->saveState.litProbs = 0; - } - --void LzmaEnc_Destruct(CLzmaEnc *p, ISzAlloc *alloc, ISzAlloc *allocBig) -+static void LzmaEnc_Destruct(CLzmaEnc *p, ISzAlloc *alloc, ISzAlloc *allocBig) - { - #ifndef _7ZIP_ST - MatchFinderMt_Destruct(&p->matchFinderMt, allocBig); -@@ -1947,7 +1895,7 @@ static SRes LzmaEnc_Alloc(CLzmaEnc *p, U - return SZ_OK; - } - --void LzmaEnc_Init(CLzmaEnc *p) -+static void LzmaEnc_Init(CLzmaEnc *p) - { - UInt32 i; - p->state = 0; -@@ -2005,7 +1953,7 @@ void LzmaEnc_Init(CLzmaEnc *p) - p->lpMask = (1 << p->lp) - 1; - } - --void LzmaEnc_InitPrices(CLzmaEnc *p) -+static void LzmaEnc_InitPrices(CLzmaEnc *p) - { - if (!p->fastMode) - { -@@ -2037,26 +1985,6 @@ static SRes LzmaEnc_AllocAndInit(CLzmaEn - return SZ_OK; - } - --static SRes LzmaEnc_Prepare(CLzmaEncHandle pp, ISeqOutStream *outStream, ISeqInStream *inStream, -- ISzAlloc *alloc, ISzAlloc *allocBig) --{ -- CLzmaEnc *p = (CLzmaEnc *)pp; -- p->matchFinderBase.stream = inStream; -- p->needInit = 1; -- p->rc.outStream = outStream; -- return LzmaEnc_AllocAndInit(p, 0, alloc, allocBig); --} -- --SRes LzmaEnc_PrepareForLzma2(CLzmaEncHandle pp, -- ISeqInStream *inStream, UInt32 keepWindowSize, -- ISzAlloc *alloc, ISzAlloc *allocBig) --{ -- CLzmaEnc *p = (CLzmaEnc *)pp; -- p->matchFinderBase.stream = inStream; -- p->needInit = 1; -- return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig); --} -- - static void LzmaEnc_SetInputBuf(CLzmaEnc *p, const Byte *src, SizeT srcLen) - { - p->matchFinderBase.directInput = 1; -@@ -2064,7 +1992,7 @@ static void LzmaEnc_SetInputBuf(CLzmaEnc - p->matchFinderBase.directInputRem = srcLen; - } - --SRes LzmaEnc_MemPrepare(CLzmaEncHandle pp, const Byte *src, SizeT srcLen, -+static SRes LzmaEnc_MemPrepare(CLzmaEncHandle pp, const Byte *src, SizeT srcLen, - UInt32 keepWindowSize, ISzAlloc *alloc, ISzAlloc *allocBig) - { - CLzmaEnc *p = (CLzmaEnc *)pp; -@@ -2074,7 +2002,7 @@ SRes LzmaEnc_MemPrepare(CLzmaEncHandle p - return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig); - } - --void LzmaEnc_Finish(CLzmaEncHandle pp) -+static void LzmaEnc_Finish(CLzmaEncHandle pp) - { - #ifndef _7ZIP_ST - CLzmaEnc *p = (CLzmaEnc *)pp; -@@ -2107,53 +2035,6 @@ static size_t MyWrite(void *pp, const vo - return size; - } - -- --UInt32 LzmaEnc_GetNumAvailableBytes(CLzmaEncHandle pp) --{ -- const CLzmaEnc *p = (CLzmaEnc *)pp; -- return p->matchFinder.GetNumAvailableBytes(p->matchFinderObj); --} -- --const Byte *LzmaEnc_GetCurBuf(CLzmaEncHandle pp) --{ -- const CLzmaEnc *p = (CLzmaEnc *)pp; -- return p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - p->additionalOffset; --} -- --SRes LzmaEnc_CodeOneMemBlock(CLzmaEncHandle pp, Bool reInit, -- Byte *dest, size_t *destLen, UInt32 desiredPackSize, UInt32 *unpackSize) --{ -- CLzmaEnc *p = (CLzmaEnc *)pp; -- UInt64 nowPos64; -- SRes res; -- CSeqOutStreamBuf outStream; -- -- outStream.funcTable.Write = MyWrite; -- outStream.data = dest; -- outStream.rem = *destLen; -- outStream.overflow = False; -- -- p->writeEndMark = False; -- p->finished = False; -- p->result = SZ_OK; -- -- if (reInit) -- LzmaEnc_Init(p); -- LzmaEnc_InitPrices(p); -- nowPos64 = p->nowPos64; -- RangeEnc_Init(&p->rc); -- p->rc.outStream = &outStream.funcTable; -- -- res = LzmaEnc_CodeOneBlock(p, True, desiredPackSize, *unpackSize); -- -- *unpackSize = (UInt32)(p->nowPos64 - nowPos64); -- *destLen -= outStream.rem; -- if (outStream.overflow) -- return SZ_ERROR_OUTPUT_EOF; -- -- return res; --} -- - static SRes LzmaEnc_Encode2(CLzmaEnc *p, ICompressProgress *progress) - { - SRes res = SZ_OK; -@@ -2184,13 +2065,6 @@ static SRes LzmaEnc_Encode2(CLzmaEnc *p, - return res; - } - --SRes LzmaEnc_Encode(CLzmaEncHandle pp, ISeqOutStream *outStream, ISeqInStream *inStream, ICompressProgress *progress, -- ISzAlloc *alloc, ISzAlloc *allocBig) --{ -- RINOK(LzmaEnc_Prepare(pp, outStream, inStream, alloc, allocBig)); -- return LzmaEnc_Encode2((CLzmaEnc *)pp, progress); --} -- - SRes LzmaEnc_WriteProperties(CLzmaEncHandle pp, Byte *props, SizeT *size) - { - CLzmaEnc *p = (CLzmaEnc *)pp; -@@ -2247,25 +2121,3 @@ SRes LzmaEnc_MemEncode(CLzmaEncHandle pp - return SZ_ERROR_OUTPUT_EOF; - return res; - } -- --SRes LzmaEncode(Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen, -- const CLzmaEncProps *props, Byte *propsEncoded, SizeT *propsSize, int writeEndMark, -- ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig) --{ -- CLzmaEnc *p = (CLzmaEnc *)LzmaEnc_Create(alloc); -- SRes res; -- if (p == 0) -- return SZ_ERROR_MEM; -- -- res = LzmaEnc_SetProps(p, props); -- if (res == SZ_OK) -- { -- res = LzmaEnc_WriteProperties(p, propsEncoded, propsSize); -- if (res == SZ_OK) -- res = LzmaEnc_MemEncode(p, dest, destLen, src, srcLen, -- writeEndMark, progress, alloc, allocBig); -- } -- -- LzmaEnc_Destroy(p, alloc, allocBig); -- return res; --} diff --git a/target/linux/generic/hack-5.18/640-bridge-only-accept-EAP-locally.patch b/target/linux/generic/hack-5.18/640-bridge-only-accept-EAP-locally.patch deleted file mode 100644 index 769c07b0f30180..00000000000000 --- a/target/linux/generic/hack-5.18/640-bridge-only-accept-EAP-locally.patch +++ /dev/null @@ -1,41 +0,0 @@ -From: Felix Fietkau -Date: Fri, 7 Jul 2017 17:18:54 +0200 -Subject: bridge: only accept EAP locally - -When bridging, do not forward EAP frames to other ports, only deliver -them locally, regardless of the state. - -Signed-off-by: Felix Fietkau -[add disable_eap_hack sysfs attribute] -Signed-off-by: Etienne Champetier ---- - ---- a/net/bridge/br_input.c -+++ b/net/bridge/br_input.c -@@ -133,10 +133,14 @@ int br_handle_frame_finish(struct net *n - } - } - -+ BR_INPUT_SKB_CB(skb)->brdev = br->dev; -+ -+ if (skb->protocol == htons(ETH_P_PAE) && !br->disable_eap_hack) -+ return br_pass_frame_up(skb); -+ - if (state == BR_STATE_LEARNING) - goto drop; - -- BR_INPUT_SKB_CB(skb)->brdev = br->dev; - BR_INPUT_SKB_CB(skb)->src_port_isolated = !!(p->flags & BR_ISOLATED); - - if (IS_ENABLED(CONFIG_INET) && ---- a/net/bridge/br_private.h -+++ b/net/bridge/br_private.h -@@ -475,6 +475,8 @@ struct net_bridge { - u16 group_fwd_mask; - u16 group_fwd_mask_required; - -+ bool disable_eap_hack; -+ - /* STP */ - bridge_id designated_root; - bridge_id bridge_id; diff --git a/target/linux/generic/hack-5.18/645-netfilter-connmark-introduce-set-dscpmark.patch b/target/linux/generic/hack-5.18/645-netfilter-connmark-introduce-set-dscpmark.patch deleted file mode 100644 index 2d3fe01a755b9e..00000000000000 --- a/target/linux/generic/hack-5.18/645-netfilter-connmark-introduce-set-dscpmark.patch +++ /dev/null @@ -1,212 +0,0 @@ -From eda40b8c8c82e0f2789d6bc8bf63846dce2e8f32 Mon Sep 17 00:00:00 2001 -From: Kevin Darbyshire-Bryant -Date: Sat, 23 Mar 2019 09:29:49 +0000 -Subject: [PATCH] netfilter: connmark: introduce set-dscpmark - -set-dscpmark is a method of storing the DSCP of an ip packet into -conntrack mark. In combination with a suitable tc filter action -(act_ctinfo) DSCP values are able to be stored in the mark on egress and -restored on ingress across links that otherwise alter or bleach DSCP. - -This is useful for qdiscs such as CAKE which are able to shape according -to policies based on DSCP. - -Ingress classification is traditionally a challenging task since -iptables rules haven't yet run and tc filter/eBPF programs are pre-NAT -lookups, hence are unable to see internal IPv4 addresses as used on the -typical home masquerading gateway. - -x_tables CONNMARK set-dscpmark target solves the problem of storing the -DSCP to the conntrack mark in a way suitable for the new act_ctinfo tc -action to restore. - -The set-dscpmark option accepts 2 parameters, a 32bit 'dscpmask' and a -32bit 'statemask'. The dscp mask must be 6 contiguous bits and -represents the area where the DSCP will be stored in the connmark. The -state mask is a minimum 1 bit length mask that must not overlap with the -dscpmask. It represents a flag which is set when the DSCP has been -stored in the conntrack mark. This is useful to implement a 'one shot' -iptables based classification where the 'complicated' iptables rules are -only run once to classify the connection on initial (egress) packet and -subsequent packets are all marked/restored with the same DSCP. A state -mask of zero disables the setting of a status bit/s. - -example syntax with a suitably modified iptables user space application: - -iptables -A QOS_MARK_eth0 -t mangle -j CONNMARK --set-dscpmark 0xfc000000/0x01000000 - -Would store the DSCP in the top 6 bits of the 32bit mark field, and use -the LSB of the top byte as the 'DSCP has been stored' marker. - -|----0xFC----conntrack mark----000000---| -| Bits 31-26 | bit 25 | bit24 |~~~ Bit 0| -| DSCP | unused | flag |unused | -|-----------------------0x01---000000---| - ^ ^ - | | - ---| Conditional flag - | set this when dscp -|-ip diffserv-| stored in mark -| 6 bits | -|-------------| - -an identically configured tc action to restore looks like: - -tc filter show dev eth0 ingress -filter parent ffff: protocol all pref 10 u32 chain 0 -filter parent ffff: protocol all pref 10 u32 chain 0 fh 800: ht divisor 1 -filter parent ffff: protocol all pref 10 u32 chain 0 fh 800::800 order 2048 key ht 800 bkt 0 flowid 1: not_in_hw - match 00000000/00000000 at 0 - action order 1: ctinfo zone 0 pipe - index 2 ref 1 bind 1 dscp 0xfc000000/0x1000000 - - action order 2: mirred (Egress Redirect to device ifb4eth0) stolen - index 1 ref 1 bind 1 - -|----0xFC----conntrack mark----000000---| -| Bits 31-26 | bit 25 | bit24 |~~~ Bit 0| -| DSCP | unused | flag |unused | -|-----------------------0x01---000000---| - | | - | | - ---| Conditional flag - v only restore if set -|-ip diffserv-| -| 6 bits | -|-------------| - -Signed-off-by: Kevin Darbyshire-Bryant ---- - include/uapi/linux/netfilter/xt_connmark.h | 10 ++++ - net/netfilter/xt_connmark.c | 55 ++++++++++++++++++---- - 2 files changed, 57 insertions(+), 8 deletions(-) - ---- a/include/uapi/linux/netfilter/xt_connmark.h -+++ b/include/uapi/linux/netfilter/xt_connmark.h -@@ -20,6 +20,11 @@ enum { - }; - - enum { -+ XT_CONNMARK_VALUE = (1 << 0), -+ XT_CONNMARK_DSCP = (1 << 1) -+}; -+ -+enum { - D_SHIFT_LEFT = 0, - D_SHIFT_RIGHT, - }; -@@ -34,6 +39,11 @@ struct xt_connmark_tginfo2 { - __u8 shift_dir, shift_bits, mode; - }; - -+struct xt_connmark_tginfo3 { -+ __u32 ctmark, ctmask, nfmask; -+ __u8 shift_dir, shift_bits, mode, func; -+}; -+ - struct xt_connmark_mtinfo1 { - __u32 mark, mask; - __u8 invert; ---- a/net/netfilter/xt_connmark.c -+++ b/net/netfilter/xt_connmark.c -@@ -24,12 +24,13 @@ MODULE_ALIAS("ipt_connmark"); - MODULE_ALIAS("ip6t_connmark"); - - static unsigned int --connmark_tg_shift(struct sk_buff *skb, const struct xt_connmark_tginfo2 *info) -+connmark_tg_shift(struct sk_buff *skb, const struct xt_connmark_tginfo3 *info) - { - enum ip_conntrack_info ctinfo; - u_int32_t new_targetmark; - struct nf_conn *ct; - u_int32_t newmark; -+ u_int8_t dscp; - - ct = nf_ct_get(skb, &ctinfo); - if (ct == NULL) -@@ -37,12 +38,24 @@ connmark_tg_shift(struct sk_buff *skb, c - - switch (info->mode) { - case XT_CONNMARK_SET: -- newmark = (ct->mark & ~info->ctmask) ^ info->ctmark; -- if (info->shift_dir == D_SHIFT_RIGHT) -- newmark >>= info->shift_bits; -- else -- newmark <<= info->shift_bits; -+ newmark = ct->mark; -+ if (info->func & XT_CONNMARK_VALUE) { -+ newmark = (newmark & ~info->ctmask) ^ info->ctmark; -+ if (info->shift_dir == D_SHIFT_RIGHT) -+ newmark >>= info->shift_bits; -+ else -+ newmark <<= info->shift_bits; -+ } else if (info->func & XT_CONNMARK_DSCP) { -+ if (skb->protocol == htons(ETH_P_IP)) -+ dscp = ipv4_get_dsfield(ip_hdr(skb)) >> 2; -+ else if (skb->protocol == htons(ETH_P_IPV6)) -+ dscp = ipv6_get_dsfield(ipv6_hdr(skb)) >> 2; -+ else /* protocol doesn't have diffserv */ -+ break; - -+ newmark = (newmark & ~info->ctmark) | -+ (info->ctmask | (dscp << info->shift_bits)); -+ } - if (ct->mark != newmark) { - ct->mark = newmark; - nf_conntrack_event_cache(IPCT_MARK, ct); -@@ -81,20 +94,36 @@ static unsigned int - connmark_tg(struct sk_buff *skb, const struct xt_action_param *par) - { - const struct xt_connmark_tginfo1 *info = par->targinfo; -- const struct xt_connmark_tginfo2 info2 = { -+ const struct xt_connmark_tginfo3 info3 = { - .ctmark = info->ctmark, - .ctmask = info->ctmask, - .nfmask = info->nfmask, - .mode = info->mode, -+ .func = XT_CONNMARK_VALUE - }; - -- return connmark_tg_shift(skb, &info2); -+ return connmark_tg_shift(skb, &info3); - } - - static unsigned int - connmark_tg_v2(struct sk_buff *skb, const struct xt_action_param *par) - { - const struct xt_connmark_tginfo2 *info = par->targinfo; -+ const struct xt_connmark_tginfo3 info3 = { -+ .ctmark = info->ctmark, -+ .ctmask = info->ctmask, -+ .nfmask = info->nfmask, -+ .mode = info->mode, -+ .func = XT_CONNMARK_VALUE -+ }; -+ -+ return connmark_tg_shift(skb, &info3); -+} -+ -+static unsigned int -+connmark_tg_v3(struct sk_buff *skb, const struct xt_action_param *par) -+{ -+ const struct xt_connmark_tginfo3 *info = par->targinfo; - - return connmark_tg_shift(skb, info); - } -@@ -165,6 +194,16 @@ static struct xt_target connmark_tg_reg[ - .targetsize = sizeof(struct xt_connmark_tginfo2), - .destroy = connmark_tg_destroy, - .me = THIS_MODULE, -+ }, -+ { -+ .name = "CONNMARK", -+ .revision = 3, -+ .family = NFPROTO_UNSPEC, -+ .checkentry = connmark_tg_check, -+ .target = connmark_tg_v3, -+ .targetsize = sizeof(struct xt_connmark_tginfo3), -+ .destroy = connmark_tg_destroy, -+ .me = THIS_MODULE, - } - }; - diff --git a/target/linux/generic/hack-5.18/650-netfilter-add-xt_FLOWOFFLOAD-target.patch b/target/linux/generic/hack-5.18/650-netfilter-add-xt_FLOWOFFLOAD-target.patch deleted file mode 100644 index 2bc1dab5fce4ad..00000000000000 --- a/target/linux/generic/hack-5.18/650-netfilter-add-xt_FLOWOFFLOAD-target.patch +++ /dev/null @@ -1,776 +0,0 @@ -From: Felix Fietkau -Date: Tue, 20 Feb 2018 15:56:02 +0100 -Subject: [PATCH] netfilter: add xt_FLOWOFFLOAD target - -Signed-off-by: Felix Fietkau ---- - create mode 100644 net/netfilter/xt_OFFLOAD.c - ---- a/net/netfilter/Kconfig -+++ b/net/netfilter/Kconfig -@@ -713,8 +713,6 @@ config NFT_REJECT_NETDEV - - endif # NF_TABLES_NETDEV - --endif # NF_TABLES -- - config NF_FLOW_TABLE_INET - tristate "Netfilter flow table mixed IPv4/IPv6 module" - depends on NF_FLOW_TABLE -@@ -723,11 +721,12 @@ config NF_FLOW_TABLE_INET - - To compile it as a module, choose M here. - -+endif # NF_TABLES -+ - config NF_FLOW_TABLE - tristate "Netfilter flow table module" - depends on NETFILTER_INGRESS - depends on NF_CONNTRACK -- depends on NF_TABLES - help - This option adds the flow table core infrastructure. - -@@ -1016,6 +1015,15 @@ config NETFILTER_XT_TARGET_NOTRACK - depends on NETFILTER_ADVANCED - select NETFILTER_XT_TARGET_CT - -+config NETFILTER_XT_TARGET_FLOWOFFLOAD -+ tristate '"FLOWOFFLOAD" target support' -+ depends on NF_FLOW_TABLE -+ depends on NETFILTER_INGRESS -+ help -+ This option adds a `FLOWOFFLOAD' target, which uses the nf_flow_offload -+ module to speed up processing of packets by bypassing the usual -+ netfilter chains -+ - config NETFILTER_XT_TARGET_RATEEST - tristate '"RATEEST" target support' - depends on NETFILTER_ADVANCED ---- a/net/netfilter/Makefile -+++ b/net/netfilter/Makefile -@@ -147,6 +147,7 @@ obj-$(CONFIG_NETFILTER_XT_TARGET_CLASSIF - obj-$(CONFIG_NETFILTER_XT_TARGET_CONNSECMARK) += xt_CONNSECMARK.o - obj-$(CONFIG_NETFILTER_XT_TARGET_CT) += xt_CT.o - obj-$(CONFIG_NETFILTER_XT_TARGET_DSCP) += xt_DSCP.o -+obj-$(CONFIG_NETFILTER_XT_TARGET_FLOWOFFLOAD) += xt_FLOWOFFLOAD.o - obj-$(CONFIG_NETFILTER_XT_TARGET_HL) += xt_HL.o - obj-$(CONFIG_NETFILTER_XT_TARGET_HMARK) += xt_HMARK.o - obj-$(CONFIG_NETFILTER_XT_TARGET_LED) += xt_LED.o ---- /dev/null -+++ b/net/netfilter/xt_FLOWOFFLOAD.c -@@ -0,0 +1,694 @@ -+/* -+ * Copyright (C) 2018-2021 Felix Fietkau -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+struct xt_flowoffload_hook { -+ struct hlist_node list; -+ struct nf_hook_ops ops; -+ struct net *net; -+ bool registered; -+ bool used; -+}; -+ -+struct xt_flowoffload_table { -+ struct nf_flowtable ft; -+ struct hlist_head hooks; -+ struct delayed_work work; -+}; -+ -+struct nf_forward_info { -+ const struct net_device *indev; -+ const struct net_device *outdev; -+ const struct net_device *hw_outdev; -+ struct id { -+ __u16 id; -+ __be16 proto; -+ } encap[NF_FLOW_TABLE_ENCAP_MAX]; -+ u8 num_encaps; -+ u8 ingress_vlans; -+ u8 h_source[ETH_ALEN]; -+ u8 h_dest[ETH_ALEN]; -+ enum flow_offload_xmit_type xmit_type; -+}; -+ -+static DEFINE_SPINLOCK(hooks_lock); -+ -+struct xt_flowoffload_table flowtable[2]; -+ -+static unsigned int -+xt_flowoffload_net_hook(void *priv, struct sk_buff *skb, -+ const struct nf_hook_state *state) -+{ -+ struct vlan_ethhdr *veth; -+ __be16 proto; -+ -+ switch (skb->protocol) { -+ case htons(ETH_P_8021Q): -+ veth = (struct vlan_ethhdr *)skb_mac_header(skb); -+ proto = veth->h_vlan_encapsulated_proto; -+ break; -+ case htons(ETH_P_PPP_SES): -+ proto = nf_flow_pppoe_proto(skb); -+ break; -+ default: -+ proto = skb->protocol; -+ break; -+ } -+ -+ switch (proto) { -+ case htons(ETH_P_IP): -+ return nf_flow_offload_ip_hook(priv, skb, state); -+ case htons(ETH_P_IPV6): -+ return nf_flow_offload_ipv6_hook(priv, skb, state); -+ } -+ -+ return NF_ACCEPT; -+} -+ -+static int -+xt_flowoffload_create_hook(struct xt_flowoffload_table *table, -+ struct net_device *dev) -+{ -+ struct xt_flowoffload_hook *hook; -+ struct nf_hook_ops *ops; -+ -+ hook = kzalloc(sizeof(*hook), GFP_ATOMIC); -+ if (!hook) -+ return -ENOMEM; -+ -+ ops = &hook->ops; -+ ops->pf = NFPROTO_NETDEV; -+ ops->hooknum = NF_NETDEV_INGRESS; -+ ops->priority = 10; -+ ops->priv = &table->ft; -+ ops->hook = xt_flowoffload_net_hook; -+ ops->dev = dev; -+ -+ hlist_add_head(&hook->list, &table->hooks); -+ mod_delayed_work(system_power_efficient_wq, &table->work, 0); -+ -+ return 0; -+} -+ -+static struct xt_flowoffload_hook * -+flow_offload_lookup_hook(struct xt_flowoffload_table *table, -+ struct net_device *dev) -+{ -+ struct xt_flowoffload_hook *hook; -+ -+ hlist_for_each_entry(hook, &table->hooks, list) { -+ if (hook->ops.dev == dev) -+ return hook; -+ } -+ -+ return NULL; -+} -+ -+static void -+xt_flowoffload_check_device(struct xt_flowoffload_table *table, -+ struct net_device *dev) -+{ -+ struct xt_flowoffload_hook *hook; -+ -+ if (!dev) -+ return; -+ -+ spin_lock_bh(&hooks_lock); -+ hook = flow_offload_lookup_hook(table, dev); -+ if (hook) -+ hook->used = true; -+ else -+ xt_flowoffload_create_hook(table, dev); -+ spin_unlock_bh(&hooks_lock); -+} -+ -+static void -+xt_flowoffload_register_hooks(struct xt_flowoffload_table *table) -+{ -+ struct xt_flowoffload_hook *hook; -+ -+restart: -+ hlist_for_each_entry(hook, &table->hooks, list) { -+ if (hook->registered) -+ continue; -+ -+ hook->registered = true; -+ hook->net = dev_net(hook->ops.dev); -+ spin_unlock_bh(&hooks_lock); -+ nf_register_net_hook(hook->net, &hook->ops); -+ if (table->ft.flags & NF_FLOWTABLE_HW_OFFLOAD) -+ table->ft.type->setup(&table->ft, hook->ops.dev, -+ FLOW_BLOCK_BIND); -+ spin_lock_bh(&hooks_lock); -+ goto restart; -+ } -+ -+} -+ -+static bool -+xt_flowoffload_cleanup_hooks(struct xt_flowoffload_table *table) -+{ -+ struct xt_flowoffload_hook *hook; -+ bool active = false; -+ -+restart: -+ spin_lock_bh(&hooks_lock); -+ hlist_for_each_entry(hook, &table->hooks, list) { -+ if (hook->used || !hook->registered) { -+ active = true; -+ continue; -+ } -+ -+ hlist_del(&hook->list); -+ spin_unlock_bh(&hooks_lock); -+ if (table->ft.flags & NF_FLOWTABLE_HW_OFFLOAD) -+ table->ft.type->setup(&table->ft, hook->ops.dev, -+ FLOW_BLOCK_UNBIND); -+ nf_unregister_net_hook(hook->net, &hook->ops); -+ kfree(hook); -+ goto restart; -+ } -+ spin_unlock_bh(&hooks_lock); -+ -+ return active; -+} -+ -+static void -+xt_flowoffload_check_hook(struct flow_offload *flow, void *data) -+{ -+ struct xt_flowoffload_table *table = data; -+ struct flow_offload_tuple *tuple0 = &flow->tuplehash[0].tuple; -+ struct flow_offload_tuple *tuple1 = &flow->tuplehash[1].tuple; -+ struct xt_flowoffload_hook *hook; -+ -+ spin_lock_bh(&hooks_lock); -+ hlist_for_each_entry(hook, &table->hooks, list) { -+ if (hook->ops.dev->ifindex != tuple0->iifidx && -+ hook->ops.dev->ifindex != tuple1->iifidx) -+ continue; -+ -+ hook->used = true; -+ } -+ spin_unlock_bh(&hooks_lock); -+} -+ -+static void -+xt_flowoffload_hook_work(struct work_struct *work) -+{ -+ struct xt_flowoffload_table *table; -+ struct xt_flowoffload_hook *hook; -+ int err; -+ -+ table = container_of(work, struct xt_flowoffload_table, work.work); -+ -+ spin_lock_bh(&hooks_lock); -+ xt_flowoffload_register_hooks(table); -+ hlist_for_each_entry(hook, &table->hooks, list) -+ hook->used = false; -+ spin_unlock_bh(&hooks_lock); -+ -+ -+ -+ if (err && err != -EAGAIN) -+ goto out; -+ -+ if (!xt_flowoffload_cleanup_hooks(table)) -+ return; -+ -+out: -+ queue_delayed_work(system_power_efficient_wq, &table->work, HZ); -+} -+ -+static bool -+xt_flowoffload_skip(struct sk_buff *skb, int family) -+{ -+ if (skb_sec_path(skb)) -+ return true; -+ -+ if (family == NFPROTO_IPV4) { -+ const struct ip_options *opt = &(IPCB(skb)->opt); -+ -+ if (unlikely(opt->optlen)) -+ return true; -+ } -+ -+ return false; -+} -+ -+static enum flow_offload_xmit_type nf_xmit_type(struct dst_entry *dst) -+{ -+ if (dst_xfrm(dst)) -+ return FLOW_OFFLOAD_XMIT_XFRM; -+ -+ return FLOW_OFFLOAD_XMIT_NEIGH; -+} -+ -+static void nf_default_forward_path(struct nf_flow_route *route, -+ struct dst_entry *dst_cache, -+ enum ip_conntrack_dir dir, -+ struct net_device **dev) -+{ -+ dev[!dir] = dst_cache->dev; -+ route->tuple[!dir].in.ifindex = dst_cache->dev->ifindex; -+ route->tuple[dir].dst = dst_cache; -+ route->tuple[dir].xmit_type = nf_xmit_type(dst_cache); -+} -+ -+static bool nf_is_valid_ether_device(const struct net_device *dev) -+{ -+ if (!dev || (dev->flags & IFF_LOOPBACK) || dev->type != ARPHRD_ETHER || -+ dev->addr_len != ETH_ALEN || !is_valid_ether_addr(dev->dev_addr)) -+ return false; -+ -+ return true; -+} -+ -+static void nf_dev_path_info(const struct net_device_path_stack *stack, -+ struct nf_forward_info *info, -+ unsigned char *ha) -+{ -+ const struct net_device_path *path; -+ int i; -+ -+ memcpy(info->h_dest, ha, ETH_ALEN); -+ -+ for (i = 0; i < stack->num_paths; i++) { -+ path = &stack->path[i]; -+ switch (path->type) { -+ case DEV_PATH_ETHERNET: -+ case DEV_PATH_DSA: -+ case DEV_PATH_VLAN: -+ case DEV_PATH_PPPOE: -+ info->indev = path->dev; -+ if (is_zero_ether_addr(info->h_source)) -+ memcpy(info->h_source, path->dev->dev_addr, ETH_ALEN); -+ -+ if (path->type == DEV_PATH_ETHERNET) -+ break; -+ if (path->type == DEV_PATH_DSA) { -+ i = stack->num_paths; -+ break; -+ } -+ -+ /* DEV_PATH_VLAN and DEV_PATH_PPPOE */ -+ if (info->num_encaps >= NF_FLOW_TABLE_ENCAP_MAX) { -+ info->indev = NULL; -+ break; -+ } -+ if (!info->outdev) -+ info->outdev = path->dev; -+ info->encap[info->num_encaps].id = path->encap.id; -+ info->encap[info->num_encaps].proto = path->encap.proto; -+ info->num_encaps++; -+ if (path->type == DEV_PATH_PPPOE) -+ memcpy(info->h_dest, path->encap.h_dest, ETH_ALEN); -+ break; -+ case DEV_PATH_BRIDGE: -+ if (is_zero_ether_addr(info->h_source)) -+ memcpy(info->h_source, path->dev->dev_addr, ETH_ALEN); -+ -+ switch (path->bridge.vlan_mode) { -+ case DEV_PATH_BR_VLAN_UNTAG_HW: -+ info->ingress_vlans |= BIT(info->num_encaps - 1); -+ break; -+ case DEV_PATH_BR_VLAN_TAG: -+ info->encap[info->num_encaps].id = path->bridge.vlan_id; -+ info->encap[info->num_encaps].proto = path->bridge.vlan_proto; -+ info->num_encaps++; -+ break; -+ case DEV_PATH_BR_VLAN_UNTAG: -+ info->num_encaps--; -+ break; -+ case DEV_PATH_BR_VLAN_KEEP: -+ break; -+ } -+ break; -+ default: -+ info->indev = NULL; -+ break; -+ } -+ } -+ if (!info->outdev) -+ info->outdev = info->indev; -+ -+ info->hw_outdev = info->indev; -+ -+ if (nf_is_valid_ether_device(info->indev)) -+ info->xmit_type = FLOW_OFFLOAD_XMIT_DIRECT; -+} -+ -+static int nf_dev_fill_forward_path(const struct nf_flow_route *route, -+ const struct dst_entry *dst_cache, -+ const struct nf_conn *ct, -+ enum ip_conntrack_dir dir, u8 *ha, -+ struct net_device_path_stack *stack) -+{ -+ const void *daddr = &ct->tuplehash[!dir].tuple.src.u3; -+ struct net_device *dev = dst_cache->dev; -+ struct neighbour *n; -+ u8 nud_state; -+ -+ if (!nf_is_valid_ether_device(dev)) -+ goto out; -+ -+ n = dst_neigh_lookup(dst_cache, daddr); -+ if (!n) -+ return -1; -+ -+ read_lock_bh(&n->lock); -+ nud_state = n->nud_state; -+ ether_addr_copy(ha, n->ha); -+ read_unlock_bh(&n->lock); -+ neigh_release(n); -+ -+ if (!(nud_state & NUD_VALID)) -+ return -1; -+ -+out: -+ return dev_fill_forward_path(dev, ha, stack); -+} -+ -+static void nf_dev_forward_path(struct nf_flow_route *route, -+ const struct nf_conn *ct, -+ enum ip_conntrack_dir dir, -+ struct net_device **devs) -+{ -+ const struct dst_entry *dst = route->tuple[dir].dst; -+ struct net_device_path_stack stack; -+ struct nf_forward_info info = {}; -+ unsigned char ha[ETH_ALEN]; -+ int i; -+ -+ if (nf_dev_fill_forward_path(route, dst, ct, dir, ha, &stack) >= 0) -+ nf_dev_path_info(&stack, &info, ha); -+ -+ devs[!dir] = (struct net_device *)info.indev; -+ if (!info.indev) -+ return; -+ -+ route->tuple[!dir].in.ifindex = info.indev->ifindex; -+ for (i = 0; i < info.num_encaps; i++) { -+ route->tuple[!dir].in.encap[i].id = info.encap[i].id; -+ route->tuple[!dir].in.encap[i].proto = info.encap[i].proto; -+ } -+ route->tuple[!dir].in.num_encaps = info.num_encaps; -+ route->tuple[!dir].in.ingress_vlans = info.ingress_vlans; -+ -+ if (info.xmit_type == FLOW_OFFLOAD_XMIT_DIRECT) { -+ memcpy(route->tuple[dir].out.h_source, info.h_source, ETH_ALEN); -+ memcpy(route->tuple[dir].out.h_dest, info.h_dest, ETH_ALEN); -+ route->tuple[dir].out.ifindex = info.outdev->ifindex; -+ route->tuple[dir].out.hw_ifindex = info.hw_outdev->ifindex; -+ route->tuple[dir].xmit_type = info.xmit_type; -+ } -+} -+ -+static int -+xt_flowoffload_route(struct sk_buff *skb, const struct nf_conn *ct, -+ const struct xt_action_param *par, -+ struct nf_flow_route *route, enum ip_conntrack_dir dir, -+ struct net_device **devs) -+{ -+ struct dst_entry *this_dst = skb_dst(skb); -+ struct dst_entry *other_dst = NULL; -+ struct flowi fl; -+ -+ memset(&fl, 0, sizeof(fl)); -+ switch (xt_family(par)) { -+ case NFPROTO_IPV4: -+ fl.u.ip4.daddr = ct->tuplehash[dir].tuple.src.u3.ip; -+ fl.u.ip4.flowi4_oif = xt_in(par)->ifindex; -+ break; -+ case NFPROTO_IPV6: -+ fl.u.ip6.saddr = ct->tuplehash[!dir].tuple.dst.u3.in6; -+ fl.u.ip6.daddr = ct->tuplehash[dir].tuple.src.u3.in6; -+ fl.u.ip6.flowi6_oif = xt_in(par)->ifindex; -+ break; -+ } -+ -+ nf_route(xt_net(par), &other_dst, &fl, false, xt_family(par)); -+ if (!other_dst) -+ return -ENOENT; -+ -+ nf_default_forward_path(route, this_dst, dir, devs); -+ nf_default_forward_path(route, other_dst, !dir, devs); -+ -+ if (route->tuple[dir].xmit_type == FLOW_OFFLOAD_XMIT_NEIGH && -+ route->tuple[!dir].xmit_type == FLOW_OFFLOAD_XMIT_NEIGH) { -+ nf_dev_forward_path(route, ct, dir, devs); -+ nf_dev_forward_path(route, ct, !dir, devs); -+ } -+ -+ return 0; -+} -+ -+static unsigned int -+flowoffload_tg(struct sk_buff *skb, const struct xt_action_param *par) -+{ -+ struct xt_flowoffload_table *table; -+ const struct xt_flowoffload_target_info *info = par->targinfo; -+ struct tcphdr _tcph, *tcph = NULL; -+ enum ip_conntrack_info ctinfo; -+ enum ip_conntrack_dir dir; -+ struct nf_flow_route route = {}; -+ struct flow_offload *flow = NULL; -+ struct net_device *devs[2] = {}; -+ struct nf_conn *ct; -+ struct net *net; -+ -+ if (xt_flowoffload_skip(skb, xt_family(par))) -+ return XT_CONTINUE; -+ -+ ct = nf_ct_get(skb, &ctinfo); -+ if (ct == NULL) -+ return XT_CONTINUE; -+ -+ switch (ct->tuplehash[IP_CT_DIR_ORIGINAL].tuple.dst.protonum) { -+ case IPPROTO_TCP: -+ if (ct->proto.tcp.state != TCP_CONNTRACK_ESTABLISHED) -+ return XT_CONTINUE; -+ -+ tcph = skb_header_pointer(skb, par->thoff, -+ sizeof(_tcph), &_tcph); -+ if (unlikely(!tcph || tcph->fin || tcph->rst)) -+ return XT_CONTINUE; -+ break; -+ case IPPROTO_UDP: -+ break; -+ default: -+ return XT_CONTINUE; -+ } -+ -+ if (nf_ct_ext_exist(ct, NF_CT_EXT_HELPER) || -+ ct->status & (IPS_SEQ_ADJUST | IPS_NAT_CLASH)) -+ return XT_CONTINUE; -+ -+ if (!nf_ct_is_confirmed(ct)) -+ return XT_CONTINUE; -+ -+ devs[dir] = xt_out(par); -+ devs[!dir] = xt_in(par); -+ -+ if (!devs[dir] || !devs[!dir]) -+ return XT_CONTINUE; -+ -+ if (test_and_set_bit(IPS_OFFLOAD_BIT, &ct->status)) -+ return XT_CONTINUE; -+ -+ dir = CTINFO2DIR(ctinfo); -+ -+ if (xt_flowoffload_route(skb, ct, par, &route, dir, devs) < 0) -+ goto err_flow_route; -+ -+ flow = flow_offload_alloc(ct); -+ if (!flow) -+ goto err_flow_alloc; -+ -+ if (flow_offload_route_init(flow, &route) < 0) -+ goto err_flow_add; -+ -+ if (tcph) { -+ ct->proto.tcp.seen[0].flags |= IP_CT_TCP_FLAG_BE_LIBERAL; -+ ct->proto.tcp.seen[1].flags |= IP_CT_TCP_FLAG_BE_LIBERAL; -+ } -+ -+ table = &flowtable[!!(info->flags & XT_FLOWOFFLOAD_HW)]; -+ -+ net = read_pnet(&table->ft.net); -+ if (!net) -+ write_pnet(&table->ft.net, xt_net(par)); -+ -+ if (flow_offload_add(&table->ft, flow) < 0) -+ goto err_flow_add; -+ -+ xt_flowoffload_check_device(table, devs[0]); -+ xt_flowoffload_check_device(table, devs[1]); -+ -+ dst_release(route.tuple[!dir].dst); -+ -+ return XT_CONTINUE; -+ -+err_flow_add: -+ flow_offload_free(flow); -+err_flow_alloc: -+ dst_release(route.tuple[!dir].dst); -+err_flow_route: -+ clear_bit(IPS_OFFLOAD_BIT, &ct->status); -+ -+ return XT_CONTINUE; -+} -+ -+static int flowoffload_chk(const struct xt_tgchk_param *par) -+{ -+ struct xt_flowoffload_target_info *info = par->targinfo; -+ -+ if (info->flags & ~XT_FLOWOFFLOAD_MASK) -+ return -EINVAL; -+ -+ return 0; -+} -+ -+static struct xt_target offload_tg_reg __read_mostly = { -+ .family = NFPROTO_UNSPEC, -+ .name = "FLOWOFFLOAD", -+ .revision = 0, -+ .targetsize = sizeof(struct xt_flowoffload_target_info), -+ .usersize = sizeof(struct xt_flowoffload_target_info), -+ .checkentry = flowoffload_chk, -+ .target = flowoffload_tg, -+ .me = THIS_MODULE, -+}; -+ -+static int flow_offload_netdev_event(struct notifier_block *this, -+ unsigned long event, void *ptr) -+{ -+ struct xt_flowoffload_hook *hook0, *hook1; -+ struct net_device *dev = netdev_notifier_info_to_dev(ptr); -+ -+ if (event != NETDEV_UNREGISTER) -+ return NOTIFY_DONE; -+ -+ spin_lock_bh(&hooks_lock); -+ hook0 = flow_offload_lookup_hook(&flowtable[0], dev); -+ if (hook0) -+ hlist_del(&hook0->list); -+ -+ hook1 = flow_offload_lookup_hook(&flowtable[1], dev); -+ if (hook1) -+ hlist_del(&hook1->list); -+ spin_unlock_bh(&hooks_lock); -+ -+ if (hook0) { -+ nf_unregister_net_hook(hook0->net, &hook0->ops); -+ kfree(hook0); -+ } -+ -+ if (hook1) { -+ nf_unregister_net_hook(hook1->net, &hook1->ops); -+ kfree(hook1); -+ } -+ -+ nf_flow_table_cleanup(dev); -+ -+ return NOTIFY_DONE; -+} -+ -+static struct notifier_block flow_offload_netdev_notifier = { -+ .notifier_call = flow_offload_netdev_event, -+}; -+ -+static int nf_flow_rule_route_inet(struct net *net, -+ const struct flow_offload *flow, -+ enum flow_offload_tuple_dir dir, -+ struct nf_flow_rule *flow_rule) -+{ -+ const struct flow_offload_tuple *flow_tuple = &flow->tuplehash[dir].tuple; -+ int err; -+ -+ switch (flow_tuple->l3proto) { -+ case NFPROTO_IPV4: -+ err = nf_flow_rule_route_ipv4(net, flow, dir, flow_rule); -+ break; -+ case NFPROTO_IPV6: -+ err = nf_flow_rule_route_ipv6(net, flow, dir, flow_rule); -+ break; -+ default: -+ err = -1; -+ break; -+ } -+ -+ return err; -+} -+ -+static struct nf_flowtable_type flowtable_inet = { -+ .family = NFPROTO_INET, -+ .init = nf_flow_table_init, -+ .setup = nf_flow_table_offload_setup, -+ .action = nf_flow_rule_route_inet, -+ .free = nf_flow_table_free, -+ .hook = xt_flowoffload_net_hook, -+ .owner = THIS_MODULE, -+}; -+ -+static int init_flowtable(struct xt_flowoffload_table *tbl) -+{ -+ INIT_DELAYED_WORK(&tbl->work, xt_flowoffload_hook_work); -+ tbl->ft.type = &flowtable_inet; -+ -+ return nf_flow_table_init(&tbl->ft); -+} -+ -+static int __init xt_flowoffload_tg_init(void) -+{ -+ int ret; -+ -+ register_netdevice_notifier(&flow_offload_netdev_notifier); -+ -+ ret = init_flowtable(&flowtable[0]); -+ if (ret) -+ return ret; -+ -+ ret = init_flowtable(&flowtable[1]); -+ if (ret) -+ goto cleanup; -+ -+ flowtable[1].ft.flags = NF_FLOWTABLE_HW_OFFLOAD; -+ -+ ret = xt_register_target(&offload_tg_reg); -+ if (ret) -+ goto cleanup2; -+ -+ return 0; -+ -+cleanup2: -+ nf_flow_table_free(&flowtable[1].ft); -+cleanup: -+ nf_flow_table_free(&flowtable[0].ft); -+ return ret; -+} -+ -+static void __exit xt_flowoffload_tg_exit(void) -+{ -+ xt_unregister_target(&offload_tg_reg); -+ unregister_netdevice_notifier(&flow_offload_netdev_notifier); -+ nf_flow_table_free(&flowtable[0].ft); -+ nf_flow_table_free(&flowtable[1].ft); -+} -+ -+MODULE_LICENSE("GPL"); -+module_init(xt_flowoffload_tg_init); -+module_exit(xt_flowoffload_tg_exit); ---- /dev/null -+++ b/include/uapi/linux/netfilter/xt_FLOWOFFLOAD.h -@@ -0,0 +1,17 @@ -+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ -+#ifndef _XT_FLOWOFFLOAD_H -+#define _XT_FLOWOFFLOAD_H -+ -+#include -+ -+enum { -+ XT_FLOWOFFLOAD_HW = 1 << 0, -+ -+ XT_FLOWOFFLOAD_MASK = XT_FLOWOFFLOAD_HW -+}; -+ -+struct xt_flowoffload_target_info { -+ __u32 flags; -+}; -+ -+#endif /* _XT_FLOWOFFLOAD_H */ diff --git a/target/linux/generic/hack-5.18/651-wireless_mesh_header.patch b/target/linux/generic/hack-5.18/651-wireless_mesh_header.patch deleted file mode 100644 index b0f5f29ad4fc8c..00000000000000 --- a/target/linux/generic/hack-5.18/651-wireless_mesh_header.patch +++ /dev/null @@ -1,24 +0,0 @@ -From 6d3bc769657b0ee7c7506dad9911111c4226a7ea Mon Sep 17 00:00:00 2001 -From: Imre Kaloz -Date: Fri, 7 Jul 2017 17:21:05 +0200 -Subject: mac80211: increase wireless mesh header size - -lede-commit 3d4466cfd8f75f717efdb1f96fdde3c70d865fc1 -Signed-off-by: Imre Kaloz ---- - include/linux/netdevice.h | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - ---- a/include/linux/netdevice.h -+++ b/include/linux/netdevice.h -@@ -147,8 +147,8 @@ static inline bool dev_xmit_complete(int - - #if defined(CONFIG_HYPERV_NET) - # define LL_MAX_HEADER 128 --#elif defined(CONFIG_WLAN) || IS_ENABLED(CONFIG_AX25) --# if defined(CONFIG_MAC80211_MESH) -+#elif defined(CONFIG_WLAN) || IS_ENABLED(CONFIG_AX25) || 1 -+# if defined(CONFIG_MAC80211_MESH) || 1 - # define LL_MAX_HEADER 128 - # else - # define LL_MAX_HEADER 96 diff --git a/target/linux/generic/hack-5.18/660-fq_codel_defaults.patch b/target/linux/generic/hack-5.18/660-fq_codel_defaults.patch deleted file mode 100644 index ba21555a043392..00000000000000 --- a/target/linux/generic/hack-5.18/660-fq_codel_defaults.patch +++ /dev/null @@ -1,27 +0,0 @@ -From a6ccb238939b25851474a279b20367fd24a0e816 Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Fri, 7 Jul 2017 17:21:53 +0200 -Subject: hack: net: fq_codel: tune defaults for small devices - -Assume that x86_64 devices always have a big memory and do not need this -optimization compared to devices with only 32 MB or 64 MB RAM. - -Signed-off-by: Felix Fietkau ---- - net/sched/sch_fq_codel.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/net/sched/sch_fq_codel.c -+++ b/net/sched/sch_fq_codel.c -@@ -476,7 +476,11 @@ static int fq_codel_init(struct Qdisc *s - - sch->limit = 10*1024; - q->flows_cnt = 1024; -+#ifdef CONFIG_X86_64 - q->memory_limit = 32 << 20; /* 32 MBytes */ -+#else -+ q->memory_limit = 4 << 20; /* 4 MBytes */ -+#endif - q->drop_batch_size = 64; - q->quantum = psched_mtu(qdisc_dev(sch)); - INIT_LIST_HEAD(&q->new_flows); diff --git a/target/linux/generic/hack-5.18/661-use_fq_codel_by_default.patch b/target/linux/generic/hack-5.18/661-use_fq_codel_by_default.patch deleted file mode 100644 index 9424cae98a93f1..00000000000000 --- a/target/linux/generic/hack-5.18/661-use_fq_codel_by_default.patch +++ /dev/null @@ -1,100 +0,0 @@ -From 1d418f7e88035ed7a94073f6354246c66e9193e9 Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Fri, 7 Jul 2017 17:22:58 +0200 -Subject: fq_codel: switch default qdisc from pfifo_fast to fq_codel and remove pfifo_fast - -Signed-off-by: Felix Fietkau ---- - include/net/sch_generic.h | 3 ++- - net/sched/Kconfig | 3 ++- - net/sched/sch_api.c | 2 +- - net/sched/sch_fq_codel.c | 3 ++- - net/sched/sch_generic.c | 4 ++-- - 5 files changed, 9 insertions(+), 6 deletions(-) - ---- a/include/net/sch_generic.h -+++ b/include/net/sch_generic.h -@@ -604,12 +604,13 @@ extern struct Qdisc_ops noop_qdisc_ops; - extern struct Qdisc_ops pfifo_fast_ops; - extern struct Qdisc_ops mq_qdisc_ops; - extern struct Qdisc_ops noqueue_qdisc_ops; -+extern struct Qdisc_ops fq_codel_qdisc_ops; - extern const struct Qdisc_ops *default_qdisc_ops; - static inline const struct Qdisc_ops * - get_default_qdisc_ops(const struct net_device *dev, int ntx) - { - return ntx < dev->real_num_tx_queues ? -- default_qdisc_ops : &pfifo_fast_ops; -+ default_qdisc_ops : &fq_codel_qdisc_ops; - } - - struct Qdisc_class_common { ---- a/net/sched/Kconfig -+++ b/net/sched/Kconfig -@@ -4,8 +4,9 @@ - # - - menuconfig NET_SCHED -- bool "QoS and/or fair queueing" -+ def_bool y - select NET_SCH_FIFO -+ select NET_SCH_FQ_CODEL - help - When the kernel has several packets to send out over a network - device, it has to decide which ones to send first, which ones to ---- a/net/sched/sch_api.c -+++ b/net/sched/sch_api.c -@@ -2276,7 +2276,7 @@ static int __init pktsched_init(void) - return err; - } - -- register_qdisc(&pfifo_fast_ops); -+ register_qdisc(&fq_codel_qdisc_ops); - register_qdisc(&pfifo_qdisc_ops); - register_qdisc(&bfifo_qdisc_ops); - register_qdisc(&pfifo_head_drop_qdisc_ops); ---- a/net/sched/sch_fq_codel.c -+++ b/net/sched/sch_fq_codel.c -@@ -721,7 +721,7 @@ static const struct Qdisc_class_ops fq_c - .walk = fq_codel_walk, - }; - --static struct Qdisc_ops fq_codel_qdisc_ops __read_mostly = { -+struct Qdisc_ops fq_codel_qdisc_ops __read_mostly = { - .cl_ops = &fq_codel_class_ops, - .id = "fq_codel", - .priv_size = sizeof(struct fq_codel_sched_data), -@@ -736,6 +736,7 @@ static struct Qdisc_ops fq_codel_qdisc_o - .dump_stats = fq_codel_dump_stats, - .owner = THIS_MODULE, - }; -+EXPORT_SYMBOL(fq_codel_qdisc_ops); - - static int __init fq_codel_module_init(void) - { ---- a/net/sched/sch_generic.c -+++ b/net/sched/sch_generic.c -@@ -32,7 +32,7 @@ - #include - - /* Qdisc to use by default */ --const struct Qdisc_ops *default_qdisc_ops = &pfifo_fast_ops; -+const struct Qdisc_ops *default_qdisc_ops = &fq_codel_qdisc_ops; - EXPORT_SYMBOL(default_qdisc_ops); - - static void qdisc_maybe_clear_missed(struct Qdisc *q, -@@ -1138,12 +1138,12 @@ static void attach_one_default_qdisc(str - void *_unused) - { - struct Qdisc *qdisc; -- const struct Qdisc_ops *ops = default_qdisc_ops; -+ const struct Qdisc_ops *ops = &fq_codel_qdisc_ops; - - if (dev->priv_flags & IFF_NO_QUEUE) - ops = &noqueue_qdisc_ops; - else if(dev->type == ARPHRD_CAN) -- ops = &pfifo_fast_ops; -+ ops = &fq_codel_qdisc_ops; - - qdisc = qdisc_create_dflt(dev_queue, ops, TC_H_ROOT, NULL); - if (!qdisc) diff --git a/target/linux/generic/hack-5.18/700-swconfig_switch_drivers.patch b/target/linux/generic/hack-5.18/700-swconfig_switch_drivers.patch deleted file mode 100644 index 560937a7c16ec8..00000000000000 --- a/target/linux/generic/hack-5.18/700-swconfig_switch_drivers.patch +++ /dev/null @@ -1,129 +0,0 @@ -From 36e516290611e613aa92996cb4339561452695b4 Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Fri, 7 Jul 2017 17:24:23 +0200 -Subject: net: swconfig: adds openwrt switch layer - -Signed-off-by: Felix Fietkau ---- - drivers/net/phy/Kconfig | 83 +++++++++++++++++++++++++++++++++++++++++++++++ - drivers/net/phy/Makefile | 15 +++++++++ - include/uapi/linux/Kbuild | 1 + - 3 files changed, 99 insertions(+) - ---- a/drivers/net/phy/Kconfig -+++ b/drivers/net/phy/Kconfig -@@ -61,6 +61,80 @@ config SFP - depends on HWMON || HWMON=n - select MDIO_I2C - -+comment "Switch configuration API + drivers" -+ -+config SWCONFIG -+ tristate "Switch configuration API" -+ help -+ Switch configuration API using netlink. This allows -+ you to configure the VLAN features of certain switches. -+ -+config SWCONFIG_LEDS -+ bool "Switch LED trigger support" -+ depends on (SWCONFIG && LEDS_TRIGGERS) -+ -+config ADM6996_PHY -+ tristate "Driver for ADM6996 switches" -+ select SWCONFIG -+ help -+ Currently supports the ADM6996FC and ADM6996M switches. -+ Support for FC is very limited. -+ -+config AR8216_PHY -+ tristate "Driver for Atheros AR8216 switches" -+ select SWCONFIG -+ -+config AR8216_PHY_LEDS -+ bool "Atheros AR8216 switch LED support" -+ depends on (AR8216_PHY && LEDS_CLASS) -+ -+source "drivers/net/phy/b53/Kconfig" -+ -+config IP17XX_PHY -+ tristate "Driver for IC+ IP17xx switches" -+ select SWCONFIG -+ -+config PSB6970_PHY -+ tristate "Lantiq XWAY Tantos (PSB6970) Ethernet switch" -+ select SWCONFIG -+ select ETHERNET_PACKET_MANGLE -+ -+config RTL8306_PHY -+ tristate "Driver for Realtek RTL8306S switches" -+ select SWCONFIG -+ -+config RTL8366_SMI -+ tristate "Driver for the RTL8366 SMI interface" -+ depends on GPIOLIB -+ help -+ This module implements the SMI interface protocol which is used -+ by some RTL8366 ethernet switch devices via the generic GPIO API. -+ -+if RTL8366_SMI -+ -+config RTL8366_SMI_DEBUG_FS -+ bool "RTL8366 SMI interface debugfs support" -+ depends on DEBUG_FS -+ default n -+ -+config RTL8366S_PHY -+ tristate "Driver for the Realtek RTL8366S switch" -+ select SWCONFIG -+ -+config RTL8366RB_PHY -+ tristate "Driver for the Realtek RTL8366RB switch" -+ select SWCONFIG -+ -+config RTL8367_PHY -+ tristate "Driver for the Realtek RTL8367R/M switches" -+ select SWCONFIG -+ -+config RTL8367B_PHY -+ tristate "Driver fot the Realtek RTL8367R-VB switch" -+ select SWCONFIG -+ -+endif # RTL8366_SMI -+ - comment "MII PHY device drivers" - - config AMD_PHY ---- a/drivers/net/phy/Makefile -+++ b/drivers/net/phy/Makefile -@@ -24,6 +24,19 @@ libphy-$(CONFIG_LED_TRIGGER_PHY) += phy_ - obj-$(CONFIG_PHYLINK) += phylink.o - obj-$(CONFIG_PHYLIB) += libphy.o - -+obj-$(CONFIG_SWCONFIG) += swconfig.o -+obj-$(CONFIG_ADM6996_PHY) += adm6996.o -+obj-$(CONFIG_AR8216_PHY) += ar8216.o ar8327.o -+obj-$(CONFIG_SWCONFIG_B53) += b53/ -+obj-$(CONFIG_IP17XX_PHY) += ip17xx.o -+obj-$(CONFIG_PSB6970_PHY) += psb6970.o -+obj-$(CONFIG_RTL8306_PHY) += rtl8306.o -+obj-$(CONFIG_RTL8366_SMI) += rtl8366_smi.o -+obj-$(CONFIG_RTL8366S_PHY) += rtl8366s.o -+obj-$(CONFIG_RTL8366RB_PHY) += rtl8366rb.o -+obj-$(CONFIG_RTL8367_PHY) += rtl8367.o -+obj-$(CONFIG_RTL8367B_PHY) += rtl8367b.o -+ - obj-$(CONFIG_NETWORK_PHY_TIMESTAMPING) += mii_timestamper.o - - obj-$(CONFIG_SFP) += sfp.o ---- a/include/linux/platform_data/b53.h -+++ b/include/linux/platform_data/b53.h -@@ -29,6 +29,9 @@ struct b53_platform_data { - u32 chip_id; - u16 enabled_ports; - -+ /* allow to specify an ethX alias */ -+ const char *alias; -+ - /* only used by MMAP'd driver */ - unsigned big_endian:1; - void __iomem *regs; diff --git a/target/linux/generic/hack-5.18/760-net-usb-r8152-add-LED-configuration-from-OF.patch b/target/linux/generic/hack-5.18/760-net-usb-r8152-add-LED-configuration-from-OF.patch deleted file mode 100644 index c315dcf8ff4822..00000000000000 --- a/target/linux/generic/hack-5.18/760-net-usb-r8152-add-LED-configuration-from-OF.patch +++ /dev/null @@ -1,74 +0,0 @@ -From 82985725e071f2a5735052f18e109a32aeac3a0b Mon Sep 17 00:00:00 2001 -From: David Bauer -Date: Sun, 26 Jul 2020 02:38:31 +0200 -Subject: [PATCH] net: usb: r8152: add LED configuration from OF - -This adds the ability to configure the LED configuration register using -OF. This way, the correct value for board specific LED configuration can -be determined. - -Signed-off-by: David Bauer ---- - drivers/net/usb/r8152.c | 23 +++++++++++++++++++++++ - 1 file changed, 23 insertions(+) - ---- a/drivers/net/usb/r8152.c -+++ b/drivers/net/usb/r8152.c -@@ -11,6 +11,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -6864,6 +6865,22 @@ static void rtl_tally_reset(struct r8152 - ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data); - } - -+static int r8152_led_configuration(struct r8152 *tp) -+{ -+ u32 led_data; -+ int ret; -+ -+ ret = of_property_read_u32(tp->udev->dev.of_node, "realtek,led-data", -+ &led_data); -+ -+ if (ret) -+ return ret; -+ -+ ocp_write_word(tp, MCU_TYPE_PLA, PLA_LEDSEL, led_data); -+ -+ return 0; -+} -+ - static void r8152b_init(struct r8152 *tp) - { - u32 ocp_data; -@@ -6905,6 +6922,8 @@ static void r8152b_init(struct r8152 *tp - ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL); - ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN); - ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data); -+ -+ r8152_led_configuration(tp); - } - - static void r8153_init(struct r8152 *tp) -@@ -7045,6 +7064,8 @@ static void r8153_init(struct r8152 *tp) - tp->coalesce = COALESCE_SLOW; - break; - } -+ -+ r8152_led_configuration(tp); - } - - static void r8153b_init(struct r8152 *tp) -@@ -7127,6 +7148,8 @@ static void r8153b_init(struct r8152 *tp - rtl_tally_reset(tp); - - tp->coalesce = 15000; /* 15 us */ -+ -+ r8152_led_configuration(tp); - } - - static void r8153c_init(struct r8152 *tp) diff --git a/target/linux/generic/hack-5.18/761-dt-bindings-net-add-RTL8152-binding-documentation.patch b/target/linux/generic/hack-5.18/761-dt-bindings-net-add-RTL8152-binding-documentation.patch deleted file mode 100644 index be262b993cd5d4..00000000000000 --- a/target/linux/generic/hack-5.18/761-dt-bindings-net-add-RTL8152-binding-documentation.patch +++ /dev/null @@ -1,54 +0,0 @@ -From 3ee05f4aa64fc86af3be5bc176ba5808de9260a7 Mon Sep 17 00:00:00 2001 -From: David Bauer -Date: Sun, 26 Jul 2020 15:30:33 +0200 -Subject: [PATCH] dt-bindings: net: add RTL8152 binding documentation - -Add binding documentation for the Realtek RTL8152 / RTL8153 USB ethernet -adapters. - -Signed-off-by: David Bauer ---- - .../bindings/net/realtek,rtl8152.yaml | 36 +++++++++++++++++++ - 1 file changed, 36 insertions(+) - create mode 100644 Documentation/devicetree/bindings/net/realtek,rtl8152.yaml - ---- /dev/null -+++ b/Documentation/devicetree/bindings/net/realtek,rtl8152.yaml -@@ -0,0 +1,36 @@ -+# SPDX-License-Identifier: GPL-2.0 -+%YAML 1.2 -+--- -+$id: http://devicetree.org/schemas/net/realtek,rtl8152.yaml# -+$schema: http://devicetree.org/meta-schemas/core.yaml# -+ -+title: Realtek RTL8152/RTL8153 series USB ethernet -+ -+maintainers: -+ - David Bauer -+ -+properties: -+ compatible: -+ oneOf: -+ - items: -+ - enum: -+ - realtek,rtl8152 -+ - realtek,rtl8153 -+ -+ reg: -+ description: The device number on the USB bus -+ -+ realtek,led-data: -+ description: Value to be written to the LED configuration register. -+ -+required: -+ - compatible -+ - reg -+ -+examples: -+ - | -+ usb-eth@2 { -+ compatible = "realtek,rtl8153"; -+ reg = <2>; -+ realtek,led-data = <0x87>; -+ }; -\ No newline at end of file diff --git a/target/linux/generic/hack-5.18/773-bgmac-add-srab-switch.patch b/target/linux/generic/hack-5.18/773-bgmac-add-srab-switch.patch deleted file mode 100644 index dfb139327bbbe9..00000000000000 --- a/target/linux/generic/hack-5.18/773-bgmac-add-srab-switch.patch +++ /dev/null @@ -1,98 +0,0 @@ -From 3cb240533ab787899dc7f17aa7d6c5b4810e2e58 Mon Sep 17 00:00:00 2001 -From: Hauke Mehrtens -Date: Fri, 7 Jul 2017 17:26:01 +0200 -Subject: bcm53xx: bgmac: use srab switch driver - -use the srab switch driver on these SoCs. - -Signed-off-by: Hauke Mehrtens ---- - drivers/net/ethernet/broadcom/bgmac-bcma.c | 1 + - drivers/net/ethernet/broadcom/bgmac.c | 24 ++++++++++++++++++++++++ - drivers/net/ethernet/broadcom/bgmac.h | 4 ++++ - 3 files changed, 29 insertions(+) - ---- a/drivers/net/ethernet/broadcom/bgmac-bcma.c -+++ b/drivers/net/ethernet/broadcom/bgmac-bcma.c -@@ -280,6 +280,7 @@ static int bgmac_probe(struct bcma_devic - bgmac->feature_flags |= BGMAC_FEAT_CLKCTLST; - bgmac->feature_flags |= BGMAC_FEAT_NO_RESET; - bgmac->feature_flags |= BGMAC_FEAT_FORCE_SPEED_2500; -+ bgmac->feature_flags |= BGMAC_FEAT_SRAB; - break; - default: - bgmac->feature_flags |= BGMAC_FEAT_CLKCTLST; ---- a/drivers/net/ethernet/broadcom/bgmac.c -+++ b/drivers/net/ethernet/broadcom/bgmac.c -@@ -12,6 +12,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -1408,6 +1409,17 @@ static const struct ethtool_ops bgmac_et - .set_link_ksettings = phy_ethtool_set_link_ksettings, - }; - -+static struct b53_platform_data bgmac_b53_pdata = { -+}; -+ -+static struct platform_device bgmac_b53_dev = { -+ .name = "b53-srab-switch", -+ .id = -1, -+ .dev = { -+ .platform_data = &bgmac_b53_pdata, -+ }, -+}; -+ - /************************************************** - * MII - **************************************************/ -@@ -1542,6 +1554,14 @@ int bgmac_enet_probe(struct bgmac *bgmac - /* Omit FCS from max MTU size */ - net_dev->max_mtu = BGMAC_RX_MAX_FRAME_SIZE - ETH_FCS_LEN; - -+ if ((bgmac->feature_flags & BGMAC_FEAT_SRAB) && !bgmac_b53_pdata.regs) { -+ bgmac_b53_pdata.regs = ioremap_nocache(0x18007000, 0x1000); -+ -+ err = platform_device_register(&bgmac_b53_dev); -+ if (!err) -+ bgmac->b53_device = &bgmac_b53_dev; -+ } -+ - err = register_netdev(bgmac->net_dev); - if (err) { - dev_err(bgmac->dev, "Cannot register net device\n"); -@@ -1564,6 +1584,10 @@ EXPORT_SYMBOL_GPL(bgmac_enet_probe); - - void bgmac_enet_remove(struct bgmac *bgmac) - { -+ if (bgmac->b53_device) -+ platform_device_unregister(&bgmac_b53_dev); -+ bgmac->b53_device = NULL; -+ - unregister_netdev(bgmac->net_dev); - phy_disconnect(bgmac->net_dev->phydev); - netif_napi_del(&bgmac->napi); ---- a/drivers/net/ethernet/broadcom/bgmac.h -+++ b/drivers/net/ethernet/broadcom/bgmac.h -@@ -390,6 +390,7 @@ - #define BGMAC_FEAT_CC4_IF_SW_TYPE_RGMII BIT(18) - #define BGMAC_FEAT_CC7_IF_TYPE_RGMII BIT(19) - #define BGMAC_FEAT_IDM_MASK BIT(20) -+#define BGMAC_FEAT_SRAB BIT(21) - - struct bgmac_slot_info { - union { -@@ -495,6 +496,9 @@ struct bgmac { - void (*cmn_maskset32)(struct bgmac *bgmac, u16 offset, u32 mask, - u32 set); - int (*phy_connect)(struct bgmac *bgmac); -+ -+ /* platform device for associated switch */ -+ struct platform_device *b53_device; - }; - - struct bgmac *bgmac_alloc(struct device *dev); diff --git a/target/linux/generic/hack-5.18/780-usb-net-MeigLink_modem_support.patch b/target/linux/generic/hack-5.18/780-usb-net-MeigLink_modem_support.patch deleted file mode 100644 index a92246e3825f47..00000000000000 --- a/target/linux/generic/hack-5.18/780-usb-net-MeigLink_modem_support.patch +++ /dev/null @@ -1,33 +0,0 @@ ---- a/drivers/net/usb/qmi_wwan.c -+++ b/drivers/net/usb/qmi_wwan.c -@@ -1088,6 +1088,7 @@ static const struct usb_device_id produc - {QMI_MATCH_FF_FF_FF(0x2c7c, 0x0512)}, /* Quectel EG12/EM12 */ - {QMI_MATCH_FF_FF_FF(0x2c7c, 0x0620)}, /* Quectel EM160R-GL */ - {QMI_MATCH_FF_FF_FF(0x2c7c, 0x0800)}, /* Quectel RM500Q-GL */ -+ {QMI_MATCH_FF_FF_FF(0x05c6, 0xf601)}, /* MeigLink SLM750 */ - - /* 3. Combined interface devices matching on interface number */ - {QMI_FIXED_INTF(0x0408, 0xea42, 4)}, /* Yota / Megafon M100-1 */ ---- a/drivers/usb/serial/option.c -+++ b/drivers/usb/serial/option.c -@@ -243,6 +243,8 @@ static void option_instat_callback(struc - #define UBLOX_PRODUCT_R6XX 0x90fa - /* These Yuga products use Qualcomm's vendor ID */ - #define YUGA_PRODUCT_CLM920_NC5 0x9625 -+/* These MeigLink products use Qualcomm's vendor ID */ -+#define MEIGLINK_PRODUCT_SLM750 0xf601 - - #define QUECTEL_VENDOR_ID 0x2c7c - /* These Quectel products use Quectel's vendor ID */ -@@ -1133,6 +1135,11 @@ static const struct usb_device_id option - { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EG95, 0xff, 0, 0) }, - { USB_DEVICE(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_BG96), - .driver_info = RSVD(4) }, -+ /* Meiglink products using Qualcomm vendor ID */ -+ // Works OK. In case of some issues check macros that are used by Quectel Products -+ { USB_DEVICE_AND_INTERFACE_INFO(QUALCOMM_VENDOR_ID, MEIGLINK_PRODUCT_SLM750, 0xff, 0xff, 0xff), -+ .driver_info = NUMEP2 }, -+ { USB_DEVICE_AND_INTERFACE_INFO(QUALCOMM_VENDOR_ID, MEIGLINK_PRODUCT_SLM750, 0xff, 0, 0) }, - { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EP06, 0xff, 0xff, 0xff), - .driver_info = RSVD(1) | RSVD(2) | RSVD(3) | RSVD(4) | NUMEP2 }, - { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EP06, 0xff, 0, 0) }, diff --git a/target/linux/generic/hack-5.18/800-GPIO-add-named-gpio-exports.patch b/target/linux/generic/hack-5.18/800-GPIO-add-named-gpio-exports.patch deleted file mode 100644 index f0be8f438784ab..00000000000000 --- a/target/linux/generic/hack-5.18/800-GPIO-add-named-gpio-exports.patch +++ /dev/null @@ -1,162 +0,0 @@ -From cc809a441d8f2924f785eb863dfa6aef47a25b0b Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Tue, 12 Aug 2014 20:49:27 +0200 -Subject: [PATCH 30/36] GPIO: add named gpio exports - -Signed-off-by: John Crispin ---- a/drivers/gpio/gpiolib-of.c -+++ b/drivers/gpio/gpiolib-of.c -@@ -19,6 +19,8 @@ - #include - #include - #include -+#include -+#include - - #include "gpiolib.h" - #include "gpiolib-of.h" -@@ -1058,3 +1060,72 @@ void of_gpio_dev_init(struct gpio_chip * - else - gc->of_node = gdev->dev.of_node; - } -+ -+#ifdef CONFIG_GPIO_SYSFS -+ -+static struct of_device_id gpio_export_ids[] = { -+ { .compatible = "gpio-export" }, -+ { /* sentinel */ } -+}; -+ -+static int of_gpio_export_probe(struct platform_device *pdev) -+{ -+ struct device_node *np = pdev->dev.of_node; -+ struct device_node *cnp; -+ u32 val; -+ int nb = 0; -+ -+ for_each_child_of_node(np, cnp) { -+ const char *name = NULL; -+ int gpio; -+ bool dmc; -+ int max_gpio = 1; -+ int i; -+ -+ of_property_read_string(cnp, "gpio-export,name", &name); -+ -+ if (!name) -+ max_gpio = of_gpio_count(cnp); -+ -+ for (i = 0; i < max_gpio; i++) { -+ unsigned flags = 0; -+ enum of_gpio_flags of_flags; -+ -+ gpio = of_get_gpio_flags(cnp, i, &of_flags); -+ if (!gpio_is_valid(gpio)) -+ return gpio; -+ -+ if (of_flags == OF_GPIO_ACTIVE_LOW) -+ flags |= GPIOF_ACTIVE_LOW; -+ -+ if (!of_property_read_u32(cnp, "gpio-export,output", &val)) -+ flags |= val ? GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW; -+ else -+ flags |= GPIOF_IN; -+ -+ if (devm_gpio_request_one(&pdev->dev, gpio, flags, name ? name : of_node_full_name(np))) -+ continue; -+ -+ dmc = of_property_read_bool(cnp, "gpio-export,direction_may_change"); -+ gpio_export_with_name(gpio, dmc, name); -+ nb++; -+ } -+ } -+ -+ dev_info(&pdev->dev, "%d gpio(s) exported\n", nb); -+ -+ return 0; -+} -+ -+static struct platform_driver gpio_export_driver = { -+ .driver = { -+ .name = "gpio-export", -+ .owner = THIS_MODULE, -+ .of_match_table = of_match_ptr(gpio_export_ids), -+ }, -+ .probe = of_gpio_export_probe, -+}; -+ -+module_platform_driver(gpio_export_driver); -+ -+#endif ---- a/include/asm-generic/gpio.h -+++ b/include/asm-generic/gpio.h -@@ -125,6 +125,12 @@ static inline int gpio_export(unsigned g - return gpiod_export(gpio_to_desc(gpio), direction_may_change); - } - -+int __gpiod_export(struct gpio_desc *desc, bool direction_may_change, const char *name); -+static inline int gpio_export_with_name(unsigned gpio, bool direction_may_change, const char *name) -+{ -+ return __gpiod_export(gpio_to_desc(gpio), direction_may_change, name); -+} -+ - static inline int gpio_export_link(struct device *dev, const char *name, - unsigned gpio) - { ---- a/include/linux/gpio/consumer.h -+++ b/include/linux/gpio/consumer.h -@@ -716,6 +716,7 @@ static inline struct gpio_desc *acpi_get - - #if IS_ENABLED(CONFIG_GPIOLIB) && IS_ENABLED(CONFIG_GPIO_SYSFS) - -+int _gpiod_export(struct gpio_desc *desc, bool direction_may_change, const char *name); - int gpiod_export(struct gpio_desc *desc, bool direction_may_change); - int gpiod_export_link(struct device *dev, const char *name, - struct gpio_desc *desc); -@@ -723,6 +724,13 @@ void gpiod_unexport(struct gpio_desc *de - - #else /* CONFIG_GPIOLIB && CONFIG_GPIO_SYSFS */ - -+static inline int _gpiod_export(struct gpio_desc *desc, -+ bool direction_may_change, -+ const char *name) -+{ -+ return -ENOSYS; -+} -+ - static inline int gpiod_export(struct gpio_desc *desc, - bool direction_may_change) - { ---- a/drivers/gpio/gpiolib-sysfs.c -+++ b/drivers/gpio/gpiolib-sysfs.c -@@ -544,7 +544,7 @@ static struct class gpio_class = { - * - * Returns zero on success, else an error. - */ --int gpiod_export(struct gpio_desc *desc, bool direction_may_change) -+int __gpiod_export(struct gpio_desc *desc, bool direction_may_change, const char *name) - { - struct gpio_chip *chip; - struct gpio_device *gdev; -@@ -606,6 +606,8 @@ int gpiod_export(struct gpio_desc *desc, - offset = gpio_chip_hwgpio(desc); - if (chip->names && chip->names[offset]) - ioname = chip->names[offset]; -+ if (name) -+ ioname = name; - - dev = device_create_with_groups(&gpio_class, &gdev->dev, - MKDEV(0, 0), data, gpio_groups, -@@ -627,6 +629,12 @@ err_unlock: - gpiod_dbg(desc, "%s: status %d\n", __func__, status); - return status; - } -+EXPORT_SYMBOL_GPL(__gpiod_export); -+ -+int gpiod_export(struct gpio_desc *desc, bool direction_may_change) -+{ -+ return __gpiod_export(desc, direction_may_change, NULL); -+} - EXPORT_SYMBOL_GPL(gpiod_export); - - static int match_export(struct device *dev, const void *desc) diff --git a/target/linux/generic/hack-5.18/901-soc-qcom-Make-QMI-Helpers-user-selectable.patch b/target/linux/generic/hack-5.18/901-soc-qcom-Make-QMI-Helpers-user-selectable.patch deleted file mode 100644 index a5ed332ff1d23b..00000000000000 --- a/target/linux/generic/hack-5.18/901-soc-qcom-Make-QMI-Helpers-user-selectable.patch +++ /dev/null @@ -1,28 +0,0 @@ -From b9b94712847f8fa6ca8dc03422ba9e0332b6997d Mon Sep 17 00:00:00 2001 -From: Robert Marko -Date: Thu, 13 May 2021 14:54:43 +0200 -Subject: [PATCH] soc: qcom: Make QMI Helpers user selectable - -Wireless backports for ath11k have a different logic -then upstream as they depend on QMI helpers instead -of selecting them. - -So, to make it possible to select QMI helpers -through KConfig add text to tristate. - -Signed-off-by: Robert Marko ---- - drivers/soc/qcom/Kconfig | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/soc/qcom/Kconfig -+++ b/drivers/soc/qcom/Kconfig -@@ -92,7 +92,7 @@ config QCOM_PDR_HELPERS - select QCOM_QMI_HELPERS - - config QCOM_QMI_HELPERS -- tristate -+ tristate "Qualcomm QMI helpers" - depends on NET - - config QCOM_RMTFS_MEM diff --git a/target/linux/generic/hack-5.18/902-debloat_proc.patch b/target/linux/generic/hack-5.18/902-debloat_proc.patch deleted file mode 100644 index f9ddf5a093bef1..00000000000000 --- a/target/linux/generic/hack-5.18/902-debloat_proc.patch +++ /dev/null @@ -1,408 +0,0 @@ -From 9e3f1d0805b2d919904dd9a4ff0d956314cc3cba Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Sat, 8 Jul 2017 08:20:09 +0200 -Subject: debloat: procfs - -Signed-off-by: Felix Fietkau ---- - fs/locks.c | 2 ++ - fs/proc/Kconfig | 5 +++++ - fs/proc/consoles.c | 3 +++ - fs/proc/proc_tty.c | 11 ++++++++++- - include/net/snmp.h | 18 +++++++++++++++++- - ipc/msg.c | 3 +++ - ipc/sem.c | 2 ++ - ipc/shm.c | 2 ++ - ipc/util.c | 3 +++ - kernel/exec_domain.c | 2 ++ - kernel/irq/proc.c | 9 +++++++++ - kernel/time/timer_list.c | 2 ++ - mm/vmalloc.c | 2 ++ - mm/vmstat.c | 8 +++++--- - net/8021q/vlanproc.c | 6 ++++++ - net/core/net-procfs.c | 18 ++++++++++++------ - net/core/sock.c | 2 ++ - net/ipv4/fib_trie.c | 18 ++++++++++++------ - net/ipv4/proc.c | 3 +++ - net/ipv4/route.c | 3 +++ - 20 files changed, 105 insertions(+), 17 deletions(-) - ---- a/fs/locks.c -+++ b/fs/locks.c -@@ -2850,6 +2850,8 @@ static const struct seq_operations locks - - static int __init proc_locks_init(void) - { -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ return 0; - proc_create_seq_private("locks", 0, NULL, &locks_seq_operations, - sizeof(struct locks_iterator), NULL); - return 0; ---- a/fs/proc/Kconfig -+++ b/fs/proc/Kconfig -@@ -100,6 +100,11 @@ config PROC_CHILDREN - Say Y if you are running any user-space software which takes benefit from - this interface. For example, rkt is such a piece of software. - -+config PROC_STRIPPED -+ default n -+ depends on EXPERT -+ bool "Strip non-essential /proc functionality to reduce code size" -+ - config PROC_PID_ARCH_STATUS - def_bool n - depends on PROC_FS ---- a/fs/proc/consoles.c -+++ b/fs/proc/consoles.c -@@ -92,6 +92,9 @@ static const struct seq_operations conso - - static int __init proc_consoles_init(void) - { -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ return 0; -+ - proc_create_seq("consoles", 0, NULL, &consoles_op); - return 0; - } ---- a/fs/proc/proc_tty.c -+++ b/fs/proc/proc_tty.c -@@ -133,7 +133,10 @@ static const struct seq_operations tty_d - void proc_tty_register_driver(struct tty_driver *driver) - { - struct proc_dir_entry *ent; -- -+ -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ return; -+ - if (!driver->driver_name || driver->proc_entry || - !driver->ops->proc_show) - return; -@@ -150,6 +153,9 @@ void proc_tty_unregister_driver(struct t - { - struct proc_dir_entry *ent; - -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ return; -+ - ent = driver->proc_entry; - if (!ent) - return; -@@ -164,6 +170,9 @@ void proc_tty_unregister_driver(struct t - */ - void __init proc_tty_init(void) - { -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ return; -+ - if (!proc_mkdir("tty", NULL)) - return; - proc_mkdir("tty/ldisc", NULL); /* Preserved: it's userspace visible */ ---- a/include/net/snmp.h -+++ b/include/net/snmp.h -@@ -124,6 +124,21 @@ struct linux_tls_mib { - #define DECLARE_SNMP_STAT(type, name) \ - extern __typeof__(type) __percpu *name - -+#ifdef CONFIG_PROC_STRIPPED -+#define __SNMP_STATS_DUMMY(mib) \ -+ do { (void) mib->mibs[0]; } while(0) -+ -+#define __SNMP_INC_STATS(mib, field) __SNMP_STATS_DUMMY(mib) -+#define SNMP_INC_STATS_ATOMIC_LONG(mib, field) __SNMP_STATS_DUMMY(mib) -+#define SNMP_INC_STATS(mib, field) __SNMP_STATS_DUMMY(mib) -+#define SNMP_DEC_STATS(mib, field) __SNMP_STATS_DUMMY(mib) -+#define __SNMP_ADD_STATS(mib, field, addend) __SNMP_STATS_DUMMY(mib) -+#define SNMP_ADD_STATS(mib, field, addend) __SNMP_STATS_DUMMY(mib) -+#define SNMP_UPD_PO_STATS(mib, basefield, addend) __SNMP_STATS_DUMMY(mib) -+#define __SNMP_UPD_PO_STATS(mib, basefield, addend) __SNMP_STATS_DUMMY(mib) -+ -+#else -+ - #define __SNMP_INC_STATS(mib, field) \ - __this_cpu_inc(mib->mibs[field]) - -@@ -154,8 +169,9 @@ struct linux_tls_mib { - __this_cpu_add(ptr[basefield##OCTETS], addend); \ - } while (0) - -+#endif - --#if BITS_PER_LONG==32 -+#if (BITS_PER_LONG==32) && !defined(CONFIG_PROC_STRIPPED) - - #define __SNMP_ADD_STATS64(mib, field, addend) \ - do { \ ---- a/ipc/msg.c -+++ b/ipc/msg.c -@@ -1350,6 +1350,9 @@ void __init msg_init(void) - { - msg_init_ns(&init_ipc_ns); - -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ return; -+ - ipc_init_proc_interface("sysvipc/msg", - " key msqid perms cbytes qnum lspid lrpid uid gid cuid cgid stime rtime ctime\n", - IPC_MSG_IDS, sysvipc_msg_proc_show); ---- a/ipc/sem.c -+++ b/ipc/sem.c -@@ -268,6 +268,8 @@ void sem_exit_ns(struct ipc_namespace *n - void __init sem_init(void) - { - sem_init_ns(&init_ipc_ns); -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ return; - ipc_init_proc_interface("sysvipc/sem", - " key semid perms nsems uid gid cuid cgid otime ctime\n", - IPC_SEM_IDS, sysvipc_sem_proc_show); ---- a/ipc/shm.c -+++ b/ipc/shm.c -@@ -154,6 +154,8 @@ pure_initcall(ipc_ns_init); - - void __init shm_init(void) - { -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ return; - ipc_init_proc_interface("sysvipc/shm", - #if BITS_PER_LONG <= 32 - " key shmid perms size cpid lpid nattch uid gid cuid cgid atime dtime ctime rss swap\n", ---- a/ipc/util.c -+++ b/ipc/util.c -@@ -141,6 +141,9 @@ void __init ipc_init_proc_interface(cons - struct proc_dir_entry *pde; - struct ipc_proc_iface *iface; - -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ return; -+ - iface = kmalloc(sizeof(*iface), GFP_KERNEL); - if (!iface) - return; ---- a/kernel/exec_domain.c -+++ b/kernel/exec_domain.c -@@ -29,6 +29,8 @@ static int execdomains_proc_show(struct - - static int __init proc_execdomains_init(void) - { -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ return 0; - proc_create_single("execdomains", 0, NULL, execdomains_proc_show); - return 0; - } ---- a/kernel/irq/proc.c -+++ b/kernel/irq/proc.c -@@ -341,6 +341,9 @@ void register_irq_proc(unsigned int irq, - void __maybe_unused *irqp = (void *)(unsigned long) irq; - char name [MAX_NAMELEN]; - -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED) && !IS_ENABLED(CONFIG_SMP)) -+ return; -+ - if (!root_irq_dir || (desc->irq_data.chip == &no_irq_chip)) - return; - -@@ -394,6 +397,9 @@ void unregister_irq_proc(unsigned int ir - { - char name [MAX_NAMELEN]; - -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED) && !IS_ENABLED(CONFIG_SMP)) -+ return; -+ - if (!root_irq_dir || !desc->dir) - return; - #ifdef CONFIG_SMP -@@ -432,6 +438,9 @@ void init_irq_proc(void) - unsigned int irq; - struct irq_desc *desc; - -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED) && !IS_ENABLED(CONFIG_SMP)) -+ return; -+ - /* create /proc/irq */ - root_irq_dir = proc_mkdir("irq", NULL); - if (!root_irq_dir) ---- a/kernel/time/timer_list.c -+++ b/kernel/time/timer_list.c -@@ -350,6 +350,8 @@ static int __init init_timer_list_procfs - { - struct proc_dir_entry *pe; - -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ return 0; - pe = proc_create_seq_private("timer_list", 0400, NULL, &timer_list_sops, - sizeof(struct timer_list_iter), NULL); - if (!pe) ---- a/mm/vmalloc.c -+++ b/mm/vmalloc.c -@@ -4134,6 +4134,8 @@ static const struct seq_operations vmall - - static int __init proc_vmalloc_init(void) - { -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ return 0; - if (IS_ENABLED(CONFIG_NUMA)) - proc_create_seq_private("vmallocinfo", 0400, NULL, - &vmalloc_op, ---- a/mm/vmstat.c -+++ b/mm/vmstat.c -@@ -2115,10 +2115,12 @@ void __init init_mm_internals(void) - migrate_on_reclaim_init(); - #endif - #ifdef CONFIG_PROC_FS -- proc_create_seq("buddyinfo", 0444, NULL, &fragmentation_op); -- proc_create_seq("pagetypeinfo", 0400, NULL, &pagetypeinfo_op); -+ if (!IS_ENABLED(CONFIG_PROC_STRIPPED)) { -+ proc_create_seq("buddyinfo", 0444, NULL, &fragmentation_op); -+ proc_create_seq("pagetypeinfo", 0400, NULL, &pagetypeinfo_op); -+ proc_create_seq("zoneinfo", 0444, NULL, &zoneinfo_op); -+ } - proc_create_seq("vmstat", 0444, NULL, &vmstat_op); -- proc_create_seq("zoneinfo", 0444, NULL, &zoneinfo_op); - #endif - } - ---- a/net/8021q/vlanproc.c -+++ b/net/8021q/vlanproc.c -@@ -93,6 +93,9 @@ void vlan_proc_cleanup(struct net *net) - { - struct vlan_net *vn = net_generic(net, vlan_net_id); - -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ return; -+ - if (vn->proc_vlan_conf) - remove_proc_entry(name_conf, vn->proc_vlan_dir); - -@@ -112,6 +115,9 @@ int __net_init vlan_proc_init(struct net - { - struct vlan_net *vn = net_generic(net, vlan_net_id); - -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ return 0; -+ - vn->proc_vlan_dir = proc_net_mkdir(net, name_root, net->proc_net); - if (!vn->proc_vlan_dir) - goto err; ---- a/net/core/net-procfs.c -+++ b/net/core/net-procfs.c -@@ -317,10 +317,12 @@ static int __net_init dev_proc_net_init( - if (!proc_create_net("dev", 0444, net->proc_net, &dev_seq_ops, - sizeof(struct seq_net_private))) - goto out; -- if (!proc_create_seq("softnet_stat", 0444, net->proc_net, -+ if (!IS_ENABLED(CONFIG_PROC_STRIPPED) && -+ !proc_create_seq("softnet_stat", 0444, net->proc_net, - &softnet_seq_ops)) - goto out_dev; -- if (!proc_create_net("ptype", 0444, net->proc_net, &ptype_seq_ops, -+ if (!IS_ENABLED(CONFIG_PROC_STRIPPED) && -+ !proc_create_net("ptype", 0444, net->proc_net, &ptype_seq_ops, - sizeof(struct seq_net_private))) - goto out_softnet; - -@@ -330,9 +332,11 @@ static int __net_init dev_proc_net_init( - out: - return rc; - out_ptype: -- remove_proc_entry("ptype", net->proc_net); -+ if (!IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ remove_proc_entry("ptype", net->proc_net); - out_softnet: -- remove_proc_entry("softnet_stat", net->proc_net); -+ if (!IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ remove_proc_entry("softnet_stat", net->proc_net); - out_dev: - remove_proc_entry("dev", net->proc_net); - goto out; -@@ -342,8 +346,10 @@ static void __net_exit dev_proc_net_exit - { - wext_proc_exit(net); - -- remove_proc_entry("ptype", net->proc_net); -- remove_proc_entry("softnet_stat", net->proc_net); -+ if (!IS_ENABLED(CONFIG_PROC_STRIPPED)) { -+ remove_proc_entry("ptype", net->proc_net); -+ remove_proc_entry("softnet_stat", net->proc_net); -+ } - remove_proc_entry("dev", net->proc_net); - } - ---- a/net/core/sock.c -+++ b/net/core/sock.c -@@ -3921,6 +3921,8 @@ static __net_initdata struct pernet_oper - - static int __init proto_init(void) - { -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ return 0; - return register_pernet_subsys(&proto_net_ops); - } - ---- a/net/ipv4/fib_trie.c -+++ b/net/ipv4/fib_trie.c -@@ -3029,11 +3029,13 @@ static const struct seq_operations fib_r - - int __net_init fib_proc_init(struct net *net) - { -- if (!proc_create_net("fib_trie", 0444, net->proc_net, &fib_trie_seq_ops, -+ if (!IS_ENABLED(CONFIG_PROC_STRIPPED) && -+ !proc_create_net("fib_trie", 0444, net->proc_net, &fib_trie_seq_ops, - sizeof(struct fib_trie_iter))) - goto out1; - -- if (!proc_create_net_single("fib_triestat", 0444, net->proc_net, -+ if (!IS_ENABLED(CONFIG_PROC_STRIPPED) && -+ !proc_create_net_single("fib_triestat", 0444, net->proc_net, - fib_triestat_seq_show, NULL)) - goto out2; - -@@ -3044,17 +3046,21 @@ int __net_init fib_proc_init(struct net - return 0; - - out3: -- remove_proc_entry("fib_triestat", net->proc_net); -+ if (!IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ remove_proc_entry("fib_triestat", net->proc_net); - out2: -- remove_proc_entry("fib_trie", net->proc_net); -+ if (!IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ remove_proc_entry("fib_trie", net->proc_net); - out1: - return -ENOMEM; - } - - void __net_exit fib_proc_exit(struct net *net) - { -- remove_proc_entry("fib_trie", net->proc_net); -- remove_proc_entry("fib_triestat", net->proc_net); -+ if (!IS_ENABLED(CONFIG_PROC_STRIPPED)) { -+ remove_proc_entry("fib_trie", net->proc_net); -+ remove_proc_entry("fib_triestat", net->proc_net); -+ } - remove_proc_entry("route", net->proc_net); - } - ---- a/net/ipv4/proc.c -+++ b/net/ipv4/proc.c -@@ -553,5 +553,8 @@ static __net_initdata struct pernet_oper - - int __init ip_misc_proc_init(void) - { -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ return 0; -+ - return register_pernet_subsys(&ip_proc_ops); - } ---- a/net/ipv4/route.c -+++ b/net/ipv4/route.c -@@ -380,6 +380,9 @@ static struct pernet_operations ip_rt_pr - - static int __init ip_rt_proc_init(void) - { -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ return 0; -+ - return register_pernet_subsys(&ip_rt_proc_ops); - } - diff --git a/target/linux/generic/hack-5.18/904-debloat_dma_buf.patch b/target/linux/generic/hack-5.18/904-debloat_dma_buf.patch deleted file mode 100644 index e2803e15a209c2..00000000000000 --- a/target/linux/generic/hack-5.18/904-debloat_dma_buf.patch +++ /dev/null @@ -1,93 +0,0 @@ -From e3692cb2fcd5ba1244512a0f43b8118f65f1c375 Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Sat, 8 Jul 2017 08:20:43 +0200 -Subject: debloat: dmabuf - -Signed-off-by: Felix Fietkau ---- - drivers/base/Kconfig | 2 +- - drivers/dma-buf/Makefile | 10 +++++++--- - drivers/dma-buf/dma-buf.c | 4 +++- - kernel/sched/core.c | 1 + - 4 files changed, 12 insertions(+), 5 deletions(-) - ---- a/drivers/base/Kconfig -+++ b/drivers/base/Kconfig -@@ -198,7 +198,7 @@ config SOC_BUS - source "drivers/base/regmap/Kconfig" - - config DMA_SHARED_BUFFER -- bool -+ tristate - default n - select IRQ_WORK - help ---- a/drivers/dma-buf/heaps/Makefile -+++ b/drivers/dma-buf/heaps/Makefile -@@ -1,3 +1,3 @@ - # SPDX-License-Identifier: GPL-2.0 --obj-$(CONFIG_DMABUF_HEAPS_SYSTEM) += system_heap.o --obj-$(CONFIG_DMABUF_HEAPS_CMA) += cma_heap.o -+dma-buf-objs-$(CONFIG_DMABUF_HEAPS_SYSTEM) += system_heap.o -+dma-buf-objs-$(CONFIG_DMABUF_HEAPS_CMA) += cma_heap.o ---- a/drivers/dma-buf/Makefile -+++ b/drivers/dma-buf/Makefile -@@ -1,12 +1,14 @@ - # SPDX-License-Identifier: GPL-2.0-only --obj-y := dma-buf.o dma-fence.o dma-fence-array.o dma-fence-chain.o \ -+obj-$(CONFIG_DMA_SHARED_BUFFER) := dma-shared-buffer.o -+ -+dma-buf-objs-y := dma-buf.o dma-fence.o dma-fence-array.o dma-fence-chain.o \ - dma-resv.o --obj-$(CONFIG_DMABUF_HEAPS) += dma-heap.o --obj-$(CONFIG_DMABUF_HEAPS) += heaps/ --obj-$(CONFIG_SYNC_FILE) += sync_file.o --obj-$(CONFIG_SW_SYNC) += sw_sync.o sync_debug.o --obj-$(CONFIG_UDMABUF) += udmabuf.o --obj-$(CONFIG_DMABUF_SYSFS_STATS) += dma-buf-sysfs-stats.o -+dma-buf-objs-$(CONFIG_DMABUF_HEAPS) += dma-heap.o -+obj-$(CONFIG_DMABUF_HEAPS) += heaps/ -+dma-buf-objs-$(CONFIG_SYNC_FILE) += sync_file.o -+dma-buf-objs-$(CONFIG_SW_SYNC) += sw_sync.o sync_debug.o -+dma-buf-objs-$(CONFIG_UDMABUF) += udmabuf.o -+dma-buf-objs-$(CONFIG_DMABUF_SYSFS_STATS) += udmabuf.o - - dmabuf_selftests-y := \ - selftest.o \ -@@ -15,4 +17,6 @@ dmabuf_selftests-y := \ - st-dma-fence-unwrap.o \ - st-dma-resv.o - --obj-$(CONFIG_DMABUF_SELFTESTS) += dmabuf_selftests.o -+dma-buf-objs-$(CONFIG_DMABUF_SELFTESTS) += dmabuf_selftests.o -+ -+dma-shared-buffer-objs := $(dma-buf-objs-y) ---- a/drivers/dma-buf/dma-buf.c -+++ b/drivers/dma-buf/dma-buf.c -@@ -1459,4 +1459,5 @@ static void __exit dma_buf_deinit(void) - kern_unmount(dma_buf_mnt); - dma_buf_uninit_sysfs_statistics(); - } --__exitcall(dma_buf_deinit); -+module_exit(dma_buf_deinit); -+MODULE_LICENSE("GPL"); ---- a/kernel/sched/core.c -+++ b/kernel/sched/core.c -@@ -4287,6 +4287,7 @@ int wake_up_state(struct task_struct *p, - { - return try_to_wake_up(p, state, 0); - } -+EXPORT_SYMBOL_GPL(wake_up_state); - - /* - * Perform scheduler related setup for a newly forked process p. ---- a/fs/d_path.c -+++ b/fs/d_path.c -@@ -314,6 +314,7 @@ char *dynamic_dname(struct dentry *dentr - buffer += buflen - sz; - return memcpy(buffer, temp, sz); - } -+EXPORT_SYMBOL_GPL(dynamic_dname); - - char *simple_dname(struct dentry *dentry, char *buffer, int buflen) - { diff --git a/target/linux/generic/hack-5.18/910-kobject_uevent.patch b/target/linux/generic/hack-5.18/910-kobject_uevent.patch deleted file mode 100644 index c4c41ca400ae32..00000000000000 --- a/target/linux/generic/hack-5.18/910-kobject_uevent.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 0d37e6edc09c99e683dd91ca0e83bbc0df8477b3 Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Sun, 16 Jul 2017 16:56:10 +0200 -Subject: lib: add uevent_next_seqnum() - -Signed-off-by: Felix Fietkau ---- - include/linux/kobject.h | 5 +++++ - lib/kobject_uevent.c | 37 +++++++++++++++++++++++++++++++++++++ - 2 files changed, 42 insertions(+) - ---- a/lib/kobject_uevent.c -+++ b/lib/kobject_uevent.c -@@ -179,6 +179,18 @@ out: - return r; - } - -+u64 uevent_next_seqnum(void) -+{ -+ u64 seq; -+ -+ mutex_lock(&uevent_sock_mutex); -+ seq = ++uevent_seqnum; -+ mutex_unlock(&uevent_sock_mutex); -+ -+ return seq; -+} -+EXPORT_SYMBOL_GPL(uevent_next_seqnum); -+ - /** - * kobject_synth_uevent - send synthetic uevent with arguments - * diff --git a/target/linux/generic/hack-5.18/911-kobject_add_broadcast_uevent.patch b/target/linux/generic/hack-5.18/911-kobject_add_broadcast_uevent.patch deleted file mode 100644 index 9854585d25913d..00000000000000 --- a/target/linux/generic/hack-5.18/911-kobject_add_broadcast_uevent.patch +++ /dev/null @@ -1,76 +0,0 @@ -From 0d37e6edc09c99e683dd91ca0e83bbc0df8477b3 Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Sun, 16 Jul 2017 16:56:10 +0200 -Subject: lib: add uevent_next_seqnum() - -Signed-off-by: Felix Fietkau ---- - include/linux/kobject.h | 5 +++++ - lib/kobject_uevent.c | 37 +++++++++++++++++++++++++++++++++++++ - 2 files changed, 42 insertions(+) - ---- a/include/linux/kobject.h -+++ b/include/linux/kobject.h -@@ -32,6 +32,8 @@ - #define UEVENT_NUM_ENVP 64 /* number of env pointers */ - #define UEVENT_BUFFER_SIZE 2048 /* buffer for the variables */ - -+struct sk_buff; -+ - #ifdef CONFIG_UEVENT_HELPER - /* path to the userspace helper executed on an event */ - extern char uevent_helper[]; -@@ -224,4 +226,7 @@ int kobject_synth_uevent(struct kobject - __printf(2, 3) - int add_uevent_var(struct kobj_uevent_env *env, const char *format, ...); - -+int broadcast_uevent(struct sk_buff *skb, __u32 pid, __u32 group, -+ gfp_t allocation); -+ - #endif /* _KOBJECT_H_ */ ---- a/lib/kobject_uevent.c -+++ b/lib/kobject_uevent.c -@@ -691,6 +691,43 @@ int add_uevent_var(struct kobj_uevent_en - EXPORT_SYMBOL_GPL(add_uevent_var); - - #if defined(CONFIG_NET) -+int broadcast_uevent(struct sk_buff *skb, __u32 pid, __u32 group, -+ gfp_t allocation) -+{ -+ struct uevent_sock *ue_sk; -+ int err = 0; -+ -+ /* send netlink message */ -+ mutex_lock(&uevent_sock_mutex); -+ list_for_each_entry(ue_sk, &uevent_sock_list, list) { -+ struct sock *uevent_sock = ue_sk->sk; -+ struct sk_buff *skb2; -+ -+ skb2 = skb_clone(skb, allocation); -+ if (!skb2) -+ break; -+ -+ err = netlink_broadcast(uevent_sock, skb2, pid, group, -+ allocation); -+ if (err) -+ break; -+ } -+ mutex_unlock(&uevent_sock_mutex); -+ -+ kfree_skb(skb); -+ return err; -+} -+#else -+int broadcast_uevent(struct sk_buff *skb, __u32 pid, __u32 group, -+ gfp_t allocation) -+{ -+ kfree_skb(skb); -+ return 0; -+} -+#endif -+EXPORT_SYMBOL_GPL(broadcast_uevent); -+ -+#if defined(CONFIG_NET) - static int uevent_net_broadcast(struct sock *usk, struct sk_buff *skb, - struct netlink_ext_ack *extack) - { diff --git a/target/linux/generic/hack-5.18/920-device_tree_cmdline.patch b/target/linux/generic/hack-5.18/920-device_tree_cmdline.patch deleted file mode 100644 index 40c77b18b82eed..00000000000000 --- a/target/linux/generic/hack-5.18/920-device_tree_cmdline.patch +++ /dev/null @@ -1,12 +0,0 @@ ---- a/drivers/of/fdt.c -+++ b/drivers/of/fdt.c -@@ -1165,6 +1165,9 @@ int __init early_init_dt_scan_chosen(cha - p = of_get_flat_dt_prop(node, "bootargs", &l); - if (p != NULL && l > 0) - strlcpy(cmdline, p, min(l, COMMAND_LINE_SIZE)); -+ p = of_get_flat_dt_prop(node, "bootargs-append", &l); -+ if (p != NULL && l > 0) -+ strlcat(cmdline, p, min_t(int, strlen(cmdline) + (int)l, COMMAND_LINE_SIZE)); - - /* - * CONFIG_CMDLINE is meant to be a default in case nothing else diff --git a/target/linux/generic/hack-5.18/952-add-net-conntrack-events-support-multiple-registrant.patch b/target/linux/generic/hack-5.18/952-add-net-conntrack-events-support-multiple-registrant.patch deleted file mode 100644 index 71d304ef0cd63e..00000000000000 --- a/target/linux/generic/hack-5.18/952-add-net-conntrack-events-support-multiple-registrant.patch +++ /dev/null @@ -1,339 +0,0 @@ -From 42824d4b753f84ccf885eca602c5037338b546c8 Mon Sep 17 00:00:00 2001 -From: Zhi Chen -Date: Tue, 13 Jan 2015 14:28:18 -0800 -Subject: [PATCH 3/3] net: conntrack events, support multiple registrant - -Merging this patch from kernel 3.4: -This was supported by old (.28) kernel versions but removed -because of it's overhead. -But we need this feature for NA connection manager. Both ipv4 -and ipv6 modules needs to register themselves to ct events. - -Change-Id: Iebfb254590fb594f5baf232f849d1b7ae45ef757 -Signed-off-by: Zhi Chen ---- - include/net/netfilter/nf_conntrack_ecache.h | 15 ++- - include/net/netns/conntrack.h | 3 + - net/netfilter/Kconfig | 8 ++ - net/netfilter/nf_conntrack_core.c | 4 + - net/netfilter/nf_conntrack_ecache.c | 103 +++++++++++++++++++- - net/netfilter/nf_conntrack_netlink.c | 17 ++++ - 6 files changed, 146 insertions(+), 4 deletions(-) - ---- a/include/net/netfilter/nf_conntrack_ecache.h -+++ b/include/net/netfilter/nf_conntrack_ecache.h -@@ -81,9 +81,14 @@ struct nf_ct_event_notifier { - int (*exp_event)(unsigned int events, const struct nf_exp_event *item); - }; - --void nf_conntrack_register_notifier(struct net *net, -+#ifdef CONFIG_NF_CONNTRACK_CHAIN_EVENTS -+extern int nf_conntrack_register_notifier(struct net *net, struct notifier_block *nb); -+extern int nf_conntrack_unregister_notifier(struct net *net, struct notifier_block *nb); -+#else -+int nf_conntrack_register_notifier(struct net *net, - const struct nf_ct_event_notifier *nb); - void nf_conntrack_unregister_notifier(struct net *net); -+#endif - - void nf_ct_deliver_cached_events(struct nf_conn *ct); - int nf_conntrack_eventmask_report(unsigned int eventmask, struct nf_conn *ct, -@@ -109,11 +114,13 @@ static inline void - nf_conntrack_event_cache(enum ip_conntrack_events event, struct nf_conn *ct) - { - #ifdef CONFIG_NF_CONNTRACK_EVENTS -- struct net *net = nf_ct_net(ct); - struct nf_conntrack_ecache *e; -+#ifndef CONFIG_NF_CONNTRACK_CHAIN_EVENTS -+ struct net *net = nf_ct_net(ct); - - if (!rcu_access_pointer(net->ct.nf_conntrack_event_cb)) - return; -+#endif - - e = nf_ct_ecache_find(ct); - if (e == NULL) -@@ -128,10 +135,12 @@ nf_conntrack_event_report(enum ip_conntr - u32 portid, int report) - { - #ifdef CONFIG_NF_CONNTRACK_EVENTS -+#ifndef CONFIG_NF_CONNTRACK_CHAIN_EVENTS - const struct net *net = nf_ct_net(ct); - - if (!rcu_access_pointer(net->ct.nf_conntrack_event_cb)) - return 0; -+#endif - - return nf_conntrack_eventmask_report(1 << event, ct, portid, report); - #else -@@ -143,10 +152,12 @@ static inline int - nf_conntrack_event(enum ip_conntrack_events event, struct nf_conn *ct) - { - #ifdef CONFIG_NF_CONNTRACK_EVENTS -+#ifndef CONFIG_NF_CONNTRACK_CHAIN_EVENTS - const struct net *net = nf_ct_net(ct); - - if (!rcu_access_pointer(net->ct.nf_conntrack_event_cb)) - return 0; -+#endif - - return nf_conntrack_eventmask_report(1 << event, ct, 0, 0); - #else ---- a/include/net/netns/conntrack.h -+++ b/include/net/netns/conntrack.h -@@ -112,6 +112,9 @@ struct netns_ct { - - struct ct_pcpu __percpu *pcpu_lists; - struct ip_conntrack_stat __percpu *stat; -+#ifdef CONFIG_NF_CONNTRACK_CHAIN_EVENTS -+ struct atomic_notifier_head nf_conntrack_chain; -+#endif - struct nf_ct_event_notifier __rcu *nf_conntrack_event_cb; - struct nf_ip_net nf_ct_proto; - #if defined(CONFIG_NF_CONNTRACK_LABELS) ---- a/net/netfilter/Kconfig -+++ b/net/netfilter/Kconfig -@@ -162,6 +162,14 @@ config NF_CONNTRACK_EVENTS - - If unsure, say `N'. - -+config NF_CONNTRACK_CHAIN_EVENTS -+ bool "Register multiple callbacks to ct events" -+ depends on NF_CONNTRACK_EVENTS -+ help -+ Support multiple registrations. -+ -+ If unsure, say `N'. -+ - config NF_CONNTRACK_TIMEOUT - bool 'Connection tracking timeout' - depends on NETFILTER_ADVANCED ---- a/net/netfilter/nf_conntrack_core.c -+++ b/net/netfilter/nf_conntrack_core.c -@@ -2837,6 +2837,10 @@ int nf_conntrack_init_net(struct net *ne - nf_conntrack_helper_pernet_init(net); - nf_conntrack_proto_pernet_init(net); - -+#ifdef CONFIG_NF_CONNTRACK_CHAIN_EVENTS -+ ATOMIC_INIT_NOTIFIER_HEAD(&net->ct.nf_conntrack_chain); -+#endif -+ - return 0; - - err_expect: ---- a/net/netfilter/nf_conntrack_ecache.c -+++ b/net/netfilter/nf_conntrack_ecache.c -@@ -17,6 +17,9 @@ - #include - #include - #include -+#ifdef CONFIG_NF_CONNTRACK_CHAIN_EVENTS -+#include -+#endif - #include - #include - #include -@@ -162,6 +165,35 @@ static int __nf_conntrack_eventmask_repo - return ret; - } - -+#ifdef CONFIG_NF_CONNTRACK_CHAIN_EVENTS -+int nf_conntrack_eventmask_report(unsigned int eventmask, struct nf_conn *ct, -+ u32 portid, int report) -+{ -+ struct nf_conntrack_ecache *e; -+ struct net *net = nf_ct_net(ct); -+ -+ e = nf_ct_ecache_find(ct); -+ if (e == NULL) -+ return 0; -+ -+ if (nf_ct_is_confirmed(ct)) { -+ struct nf_ct_event item = { -+ .ct = ct, -+ .portid = e->portid ? e->portid : portid, -+ .report = report -+ }; -+ /* This is a resent of a destroy event? If so, skip missed */ -+ unsigned long missed = e->portid ? 0 : e->missed; -+ -+ if (!((eventmask | missed) & e->ctmask)) -+ return 0; -+ -+ atomic_notifier_call_chain(&net->ct.nf_conntrack_chain, eventmask | missed, &item); -+ } -+ -+ return 0; -+} -+#else - int nf_conntrack_eventmask_report(unsigned int events, struct nf_conn *ct, - u32 portid, int report) - { -@@ -197,10 +229,52 @@ int nf_conntrack_eventmask_report(unsign - - return ret; - } -+#endif - EXPORT_SYMBOL_GPL(nf_conntrack_eventmask_report); - - /* deliver cached events and clear cache entry - must be called with locally - * disabled softirqs */ -+#ifdef CONFIG_NF_CONNTRACK_CHAIN_EVENTS -+void nf_ct_deliver_cached_events(struct nf_conn *ct) -+{ -+ unsigned long events, missed; -+ struct nf_conntrack_ecache *e; -+ struct nf_ct_event item; -+ struct net *net = nf_ct_net(ct); -+ -+ e = nf_ct_ecache_find(ct); -+ if (e == NULL) -+ return; -+ -+ events = xchg(&e->cache, 0); -+ -+ if (!nf_ct_is_confirmed(ct) || nf_ct_is_dying(ct) || !events) -+ return; -+ -+ /* We make a copy of the missed event cache without taking -+ * the lock, thus we may send missed events twice. However, -+ * this does not harm and it happens very rarely. */ -+ missed = e->missed; -+ -+ if (!((events | missed) & e->ctmask)) -+ return; -+ -+ item.ct = ct; -+ item.portid = 0; -+ item.report = 0; -+ -+ atomic_notifier_call_chain(&net->ct.nf_conntrack_chain, -+ events | missed, -+ &item); -+ -+ if (likely(!missed)) -+ return; -+ -+ spin_lock_bh(&ct->lock); -+ e->missed &= ~missed; -+ spin_unlock_bh(&ct->lock); -+} -+#else - void nf_ct_deliver_cached_events(struct nf_conn *ct) - { - struct nf_conntrack_ecache *e; -@@ -226,6 +300,7 @@ void nf_ct_deliver_cached_events(struct - */ - __nf_conntrack_eventmask_report(e, events, e->missed, &item); - } -+#endif - EXPORT_SYMBOL_GPL(nf_ct_deliver_cached_events); - - void nf_ct_expect_event_report(enum ip_conntrack_expect_events event, -@@ -258,20 +333,43 @@ out_unlock: - rcu_read_unlock(); - } - --void nf_conntrack_register_notifier(struct net *net, -+#ifdef CONFIG_NF_CONNTRACK_CHAIN_EVENTS -+int nf_conntrack_register_notifier(struct net *net, -+ struct notifier_block *nb) -+{ -+ return atomic_notifier_chain_register(&net->ct.nf_conntrack_chain, nb); -+} -+#else -+int nf_conntrack_register_notifier(struct net *net, - const struct nf_ct_event_notifier *new) - { -+ int ret; - struct nf_ct_event_notifier *notify; - - mutex_lock(&nf_ct_ecache_mutex); - notify = rcu_dereference_protected(net->ct.nf_conntrack_event_cb, - lockdep_is_held(&nf_ct_ecache_mutex)); - WARN_ON_ONCE(notify); -+ if (notify != NULL) { -+ ret = -EBUSY; -+ goto out_unlock; -+ } -+ - rcu_assign_pointer(net->ct.nf_conntrack_event_cb, new); -- mutex_unlock(&nf_ct_ecache_mutex); -+ ret = 0; -+out_unlock: -+ mutex_unlock(&nf_ct_ecache_mutex); -+ return ret; - } -+#endif - EXPORT_SYMBOL_GPL(nf_conntrack_register_notifier); - -+#ifdef CONFIG_NF_CONNTRACK_CHAIN_EVENTS -+int nf_conntrack_unregister_notifier(struct net *net, struct notifier_block *nb) -+{ -+ return atomic_notifier_chain_unregister(&net->ct.nf_conntrack_chain, nb); -+} -+#else - void nf_conntrack_unregister_notifier(struct net *net) - { - mutex_lock(&nf_ct_ecache_mutex); -@@ -279,6 +377,7 @@ void nf_conntrack_unregister_notifier(st - mutex_unlock(&nf_ct_ecache_mutex); - /* synchronize_rcu() is called after netns pre_exit */ - } -+#endif - EXPORT_SYMBOL_GPL(nf_conntrack_unregister_notifier); - - void nf_conntrack_ecache_work(struct net *net, enum nf_ct_ecache_state state) ---- a/net/netfilter/nf_conntrack_netlink.c -+++ b/net/netfilter/nf_conntrack_netlink.c -@@ -712,12 +712,19 @@ static size_t ctnetlink_nlmsg_size(const - } - - static int -+#ifdef CONFIG_NF_CONNTRACK_CHAIN_EVENTS -+ctnetlink_conntrack_event(struct notifier_block *this, unsigned long events, void *ptr) -+#else - ctnetlink_conntrack_event(unsigned int events, const struct nf_ct_event *item) -+#endif - { - const struct nf_conntrack_zone *zone; - struct net *net; - struct nlmsghdr *nlh; - struct nlattr *nest_parms; -+#ifdef CONFIG_NF_CONNTRACK_CHAIN_EVENTS -+ struct nf_ct_event *item = (struct nf_ct_event *)ptr; -+#endif - struct nf_conn *ct = item->ct; - struct sk_buff *skb; - unsigned int type; -@@ -3825,11 +3832,17 @@ static int ctnetlink_stat_exp_cpu(struct - } - - #ifdef CONFIG_NF_CONNTRACK_EVENTS -+#ifdef CONFIG_NF_CONNTRACK_CHAIN_EVENTS -+static struct notifier_block ctnl_notifier = { -+ .notifier_call = ctnetlink_conntrack_event -+}; -+#else - static struct nf_ct_event_notifier ctnl_notifier = { - .ct_event = ctnetlink_conntrack_event, - .exp_event = ctnetlink_expect_event, - }; - #endif -+#endif - - static const struct nfnl_callback ctnl_cb[IPCTNL_MSG_MAX] = { - [IPCTNL_MSG_CT_NEW] = { -@@ -3928,8 +3941,12 @@ static int __net_init ctnetlink_net_init - static void ctnetlink_net_pre_exit(struct net *net) - { - #ifdef CONFIG_NF_CONNTRACK_EVENTS -+#ifdef CONFIG_NF_CONNTRACK_CHAIN_EVENTS -+ nf_conntrack_unregister_notifier(net,&ctnl_notifier); -+#else - nf_conntrack_unregister_notifier(net); - #endif -+#endif - } - - static struct pernet_operations ctnetlink_net_ops = { diff --git a/target/linux/generic/hack-5.18/953-net-patch-linux-kernel-to-support-shortcut-fe.patch b/target/linux/generic/hack-5.18/953-net-patch-linux-kernel-to-support-shortcut-fe.patch deleted file mode 100644 index c7346c36a84f49..00000000000000 --- a/target/linux/generic/hack-5.18/953-net-patch-linux-kernel-to-support-shortcut-fe.patch +++ /dev/null @@ -1,204 +0,0 @@ ---- a/include/linux/if_bridge.h -+++ b/include/linux/if_bridge.h -@@ -69,6 +69,9 @@ void brioctl_set(int (*hook)(struct net - int br_ioctl_call(struct net *net, struct net_bridge *br, unsigned int cmd, - struct ifreq *ifr, void __user *uarg); - -+extern void br_dev_update_stats(struct net_device *dev, -+ struct rtnl_link_stats64 *nlstats); -+ - #if IS_ENABLED(CONFIG_BRIDGE) && IS_ENABLED(CONFIG_BRIDGE_IGMP_SNOOPING) - int br_multicast_list_adjacent(struct net_device *dev, - struct list_head *br_ip_list); ---- a/include/linux/skbuff.h -+++ b/include/linux/skbuff.h -@@ -1022,6 +1022,10 @@ struct sk_buff { - __u8 slow_gro:1; - __u8 csum_not_inet:1; - -+#ifdef CONFIG_SHORTCUT_FE -+ __u8 fast_forwarded:1; -+#endif -+ - #ifdef CONFIG_NET_SCHED - __u16 tc_index; /* traffic control index */ - #endif ---- a/include/linux/timer.h -+++ b/include/linux/timer.h -@@ -18,6 +18,10 @@ struct timer_list { - void (*function)(struct timer_list *); - u32 flags; - -+#ifdef CONFIG_SHORTCUT_FE -+ unsigned long cust_data; -+#endif -+ - #ifdef CONFIG_LOCKDEP - struct lockdep_map lockdep_map; - #endif ---- a/include/net/netfilter/nf_conntrack_ecache.h -+++ b/include/net/netfilter/nf_conntrack_ecache.h -@@ -84,6 +84,8 @@ struct nf_ct_event_notifier { - #ifdef CONFIG_NF_CONNTRACK_CHAIN_EVENTS - extern int nf_conntrack_register_notifier(struct net *net, struct notifier_block *nb); - extern int nf_conntrack_unregister_notifier(struct net *net, struct notifier_block *nb); -+extern int nf_conntrack_register_chain_notifier(struct net *net, struct notifier_block *nb); -+extern int nf_conntrack_unregister_chain_notifier(struct net *net, struct notifier_block *nb); - #else - int nf_conntrack_register_notifier(struct net *net, - const struct nf_ct_event_notifier *nb); ---- a/net/Kconfig -+++ b/net/Kconfig -@@ -460,6 +460,9 @@ config FAILOVER - migration of VMs with direct attached VFs by failing over to the - paravirtual datapath when the VF is unplugged. - -+config SHORTCUT_FE -+ bool "Enables kernel network stack path for Shortcut Forwarding Engine" -+ - config ETHTOOL_NETLINK - bool "Netlink interface for ethtool" - default y ---- a/net/bridge/br_if.c -+++ b/net/bridge/br_if.c -@@ -774,6 +774,28 @@ void br_port_flags_change(struct net_bri - br_recalculate_neigh_suppress_enabled(br); - } - -+void br_dev_update_stats(struct net_device *dev, -+ struct rtnl_link_stats64 *nlstats) -+{ -+ -+ struct pcpu_sw_netstats *stats; -+ -+ /* Is this a bridge? */ -+ if (!(dev->priv_flags & IFF_EBRIDGE)) -+ return; -+ -+ -+ stats = this_cpu_ptr(dev->tstats); -+ -+ u64_stats_update_begin(&stats->syncp); -+ stats->rx_packets += nlstats->rx_packets; -+ stats->rx_bytes += nlstats->rx_bytes; -+ stats->tx_packets += nlstats->tx_packets; -+ stats->tx_bytes += nlstats->tx_bytes; -+ u64_stats_update_end(&stats->syncp); -+} -+EXPORT_SYMBOL_GPL(br_dev_update_stats); -+ - bool br_port_flag_is_set(const struct net_device *dev, unsigned long flag) - { - struct net_bridge_port *p; ---- a/net/core/dev.c -+++ b/net/core/dev.c -@@ -3532,9 +3532,17 @@ static int xmit_one(struct sk_buff *skb, - { - unsigned int len; - int rc; -- -+#ifdef CONFIG_SHORTCUT_FE -+ /* If this skb has been fast forwarded then we don't want it to -+ * go to any taps (by definition we're trying to bypass them). -+ */ -+ if (!skb->fast_forwarded) { -+#endif - if (dev_nit_active(dev)) - dev_queue_xmit_nit(skb, dev); -+#ifdef CONFIG_SHORTCUT_FE -+ } -+#endif - - len = skb->len; - PRANDOM_ADD_NOISE(skb, dev, txq, len + jiffies); -@@ -5161,6 +5169,11 @@ void netdev_rx_handler_unregister(struct - } - EXPORT_SYMBOL_GPL(netdev_rx_handler_unregister); - -+#ifdef CONFIG_SHORTCUT_FE -+int (*athrs_fast_nat_recv)(struct sk_buff *skb) __rcu __read_mostly; -+EXPORT_SYMBOL_GPL(athrs_fast_nat_recv); -+#endif -+ - /* - * Limit the use of PFMEMALLOC reserves to those protocols that implement - * the special handling of PFMEMALLOC skbs. -@@ -5209,6 +5222,10 @@ static int __netif_receive_skb_core(stru - int ret = NET_RX_DROP; - __be16 type; - -+#ifdef CONFIG_SHORTCUT_FE -+ int (*fast_recv)(struct sk_buff *skb); -+#endif -+ - net_timestamp_check(!netdev_tstamp_prequeue, skb); - - trace_netif_receive_skb(skb); -@@ -5246,6 +5263,15 @@ another_round: - goto out; - } - -+#ifdef CONFIG_SHORTCUT_FE -+ fast_recv = rcu_dereference(athrs_fast_nat_recv); -+ if (fast_recv) { -+ if (fast_recv(skb)) { -+ ret = NET_RX_SUCCESS; -+ goto out; -+ } -+ } -+#endif - if (skb_skip_tc_classify(skb)) - goto skip_classify; - ---- a/net/netfilter/nf_conntrack_ecache.c -+++ b/net/netfilter/nf_conntrack_ecache.c -@@ -143,12 +143,23 @@ static int __nf_conntrack_eventmask_repo - rcu_read_lock(); - - notify = rcu_dereference(net->ct.nf_conntrack_event_cb); -- if (!notify) { -+#ifdef CONFIG_NF_CONNTRACK_CHAIN_EVENTS -+ if (!notify && !rcu_dereference_raw(net->ct.nf_conntrack_chain.head)) -+#else -+ if (!notify) -+#endif -+ { - rcu_read_unlock(); - return 0; - } -- -+#ifdef CONFIG_NF_CONNTRACK_CHAIN_EVENTS -+ ret = atomic_notifier_call_chain(&net->ct.nf_conntrack_chain, -+ events | missed, &item); -+ if (notify) -+ ret = notify->ct_event(events | missed, item); -+#else - ret = notify->ct_event(events | missed, item); -+#endif - rcu_read_unlock(); - - if (likely(ret >= 0 && missed == 0)) -@@ -339,6 +350,11 @@ int nf_conntrack_register_notifier(struc - { - return atomic_notifier_chain_register(&net->ct.nf_conntrack_chain, nb); - } -+int nf_conntrack_register_chain_notifier(struct net *net, struct notifier_block *nb) -+{ -+ return atomic_notifier_chain_register(&net->ct.nf_conntrack_chain, nb); -+} -+EXPORT_SYMBOL_GPL(nf_conntrack_register_chain_notifier); - #else - int nf_conntrack_register_notifier(struct net *net, - const struct nf_ct_event_notifier *new) -@@ -369,6 +385,11 @@ int nf_conntrack_unregister_notifier(str - { - return atomic_notifier_chain_unregister(&net->ct.nf_conntrack_chain, nb); - } -+int nf_conntrack_unregister_chain_notifier(struct net *net, struct notifier_block *nb) -+{ -+ return atomic_notifier_chain_unregister(&net->ct.nf_conntrack_chain, nb); -+} -+EXPORT_SYMBOL_GPL(nf_conntrack_unregister_chain_notifier); - #else - void nf_conntrack_unregister_notifier(struct net *net) - { diff --git a/target/linux/generic/hack-5.18/992-add-ndo-do-ioctl.patch b/target/linux/generic/hack-5.18/992-add-ndo-do-ioctl.patch deleted file mode 100644 index da206e4b46120e..00000000000000 --- a/target/linux/generic/hack-5.18/992-add-ndo-do-ioctl.patch +++ /dev/null @@ -1,12 +0,0 @@ ---- a/net/wireless/wext-core.c -+++ b/net/wireless/wext-core.c -@@ -956,6 +956,9 @@ static int wireless_process_ioctl(struct - else if (private) - return private(dev, iwr, cmd, info, handler); - } -+ /* Old driver API : call driver ioctl handler */ -+ if (dev->netdev_ops->ndo_do_ioctl) -+ return dev->netdev_ops->ndo_do_ioctl(dev, (struct ifreq *) iwr, cmd); - return -EOPNOTSUPP; - } - diff --git a/target/linux/generic/pending-5.18/100-compiler.h-only-include-asm-rwonce.h-for-kernel-code.patch b/target/linux/generic/pending-5.18/100-compiler.h-only-include-asm-rwonce.h-for-kernel-code.patch deleted file mode 100644 index 92bf8420c47415..00000000000000 --- a/target/linux/generic/pending-5.18/100-compiler.h-only-include-asm-rwonce.h-for-kernel-code.patch +++ /dev/null @@ -1,29 +0,0 @@ -From: Felix Fietkau -Date: Thu, 22 Oct 2020 22:00:03 +0200 -Subject: [PATCH] compiler.h: only include asm/rwonce.h for kernel code - -This header file is not in uapi, which makes any user space code that includes -linux/compiler.h to fail with the error 'asm/rwonce.h: No such file or directory' - -Fixes: e506ea451254 ("compiler.h: Split {READ,WRITE}_ONCE definitions out into rwonce.h") -Signed-off-by: Felix Fietkau ---- - ---- a/include/linux/compiler.h -+++ b/include/linux/compiler.h -@@ -213,6 +213,8 @@ void ftrace_likely_update(struct ftrace_ - #define function_nocfi(x) (x) - #endif - -+#include -+ - #endif /* __KERNEL__ */ - - /* -@@ -245,6 +247,4 @@ static inline void *offset_to_ptr(const - */ - #define prevent_tail_call_optimization() mb() - --#include -- - #endif /* __LINUX_COMPILER_H */ diff --git a/target/linux/generic/pending-5.18/101-Use-stddefs.h-instead-of-compiler.h.patch b/target/linux/generic/pending-5.18/101-Use-stddefs.h-instead-of-compiler.h.patch deleted file mode 100644 index 824b9444eea030..00000000000000 --- a/target/linux/generic/pending-5.18/101-Use-stddefs.h-instead-of-compiler.h.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/include/uapi/linux/swab.h -+++ b/include/uapi/linux/swab.h -@@ -3,7 +3,7 @@ - #define _UAPI_LINUX_SWAB_H - - #include --#include -+#include - #include - #include - diff --git a/target/linux/generic/pending-5.18/102-MIPS-only-process-negative-stack-offsets-on-stack-tr.patch b/target/linux/generic/pending-5.18/102-MIPS-only-process-negative-stack-offsets-on-stack-tr.patch deleted file mode 100644 index 95a9656d268d2d..00000000000000 --- a/target/linux/generic/pending-5.18/102-MIPS-only-process-negative-stack-offsets-on-stack-tr.patch +++ /dev/null @@ -1,57 +0,0 @@ -From: Felix Fietkau -Date: Wed, 18 Apr 2018 10:50:05 +0200 -Subject: [PATCH] MIPS: only process negative stack offsets on stack traces - -Fixes endless back traces in cases where the compiler emits a stack -pointer increase in a branch delay slot (probably for some form of -function return). - -[ 3.475442] BUG: MAX_STACK_TRACE_ENTRIES too low! -[ 3.480070] turning off the locking correctness validator. -[ 3.485521] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.14.34 #0 -[ 3.491475] Stack : 00000000 00000000 00000000 00000000 80e0fce2 00000034 00000000 00000000 -[ 3.499764] 87c3838c 80696377 8061047c 00000000 00000001 00000001 87c2d850 6534689f -[ 3.508059] 00000000 00000000 80e10000 00000000 00000000 000000cf 0000000f 00000000 -[ 3.516353] 00000000 806a0000 00076891 00000000 00000000 00000000 ffffffff 00000000 -[ 3.524648] 806c0000 00000004 80e10000 806a0000 00000003 80690000 00000000 80700000 -[ 3.532942] ... -[ 3.535362] Call Trace: -[ 3.537818] [<80010a48>] show_stack+0x58/0x100 -[ 3.542207] [<804c2f78>] dump_stack+0xe8/0x170 -[ 3.546613] [<80079f90>] save_trace+0xf0/0x110 -[ 3.551010] [<8007b1ec>] mark_lock+0x33c/0x78c -[ 3.555413] [<8007bf48>] __lock_acquire+0x2ac/0x1a08 -[ 3.560337] [<8007de60>] lock_acquire+0x64/0x8c -[ 3.564846] [<804e1570>] _raw_spin_lock_irqsave+0x54/0x78 -[ 3.570186] [<801b618c>] kernfs_notify+0x94/0xac -[ 3.574770] [<801b7b10>] sysfs_notify+0x74/0xa0 -[ 3.579257] [<801b618c>] kernfs_notify+0x94/0xac -[ 3.583839] [<801b7b10>] sysfs_notify+0x74/0xa0 -[ 3.588329] [<801b618c>] kernfs_notify+0x94/0xac -[ 3.592911] [<801b7b10>] sysfs_notify+0x74/0xa0 -[ 3.597401] [<801b618c>] kernfs_notify+0x94/0xac -[ 3.601983] [<801b7b10>] sysfs_notify+0x74/0xa0 -[ 3.606473] [<801b618c>] kernfs_notify+0x94/0xac -[ 3.611055] [<801b7b10>] sysfs_notify+0x74/0xa0 -[ 3.615545] [<801b618c>] kernfs_notify+0x94/0xac -[ 3.620125] [<801b7b10>] sysfs_notify+0x74/0xa0 -[ 3.624619] [<801b618c>] kernfs_notify+0x94/0xac -[ 3.629197] [<801b7b10>] sysfs_notify+0x74/0xa0 -[ 3.633691] [<801b618c>] kernfs_notify+0x94/0xac -[ 3.638269] [<801b7b10>] sysfs_notify+0x74/0xa0 -[ 3.642763] [<801b618c>] kernfs_notify+0x94/0xac - -Signed-off-by: Felix Fietkau ---- - ---- a/arch/mips/kernel/process.c -+++ b/arch/mips/kernel/process.c -@@ -393,6 +393,8 @@ static inline int is_sp_move_ins(union m - - if (ip->i_format.opcode == addiu_op || - ip->i_format.opcode == daddiu_op) { -+ if (ip->i_format.simmediate > 0) -+ return 0; - *frame_size = -ip->i_format.simmediate; - return 1; - } diff --git a/target/linux/generic/pending-5.18/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch b/target/linux/generic/pending-5.18/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch deleted file mode 100644 index 0d36a85926c770..00000000000000 --- a/target/linux/generic/pending-5.18/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch +++ /dev/null @@ -1,82 +0,0 @@ -From: Tobias Wolf -Subject: mm: Fix alloc_node_mem_map with ARCH_PFN_OFFSET calculation - -An rt288x (ralink) based router (Belkin F5D8235 v1) does not boot with any -kernel beyond version 4.3 resulting in: - -BUG: Bad page state in process swapper pfn:086ac - -bisect resulted in: - -a1c34a3bf00af2cede839879502e12dc68491ad5 is the first bad commit -commit a1c34a3bf00af2cede839879502e12dc68491ad5 -Author: Laura Abbott -Date: Thu Nov 5 18:48:46 2015 -0800 - - mm: Don't offset memmap for flatmem - - Srinivas Kandagatla reported bad page messages when trying to remove the - bottom 2MB on an ARM based IFC6410 board - - BUG: Bad page state in process swapper pfn:fffa8 - page:ef7fb500 count:0 mapcount:0 mapping: (null) index:0x0 - flags: 0x96640253(locked|error|dirty|active|arch_1|reclaim|mlocked) - page dumped because: PAGE_FLAGS_CHECK_AT_FREE flag(s) set - bad because of flags: - flags: 0x200041(locked|active|mlocked) - Modules linked in: - CPU: 0 PID: 0 Comm: swapper Not tainted 3.19.0-rc3-00007-g412f9ba-dirty -#816 - Hardware name: Qualcomm (Flattened Device Tree) - unwind_backtrace - show_stack - dump_stack - bad_page - free_pages_prepare - free_hot_cold_page - __free_pages - free_highmem_page - mem_init - start_kernel - Disabling lock debugging due to kernel taint - [...] -:040000 040000 2de013c372345fd471cd58f0553c9b38b0ef1cc4 -0a8156f848733dfa21e16c196dfb6c0a76290709 M mm - -This fix for ARM does not account ARCH_PFN_OFFSET for mem_map as later used by -page_to_pfn anymore. - -The following output was generated with two hacked in printk statements: - -printk("before %p vs. %p or %p\n", mem_map, mem_map - offset, mem_map - -(pgdat->node_start_pfn - ARCH_PFN_OFFSET)); - if (page_to_pfn(mem_map) != pgdat->node_start_pfn) - mem_map -= offset + (pgdat->node_start_pfn - ARCH_PFN_OFFSET); -printk("after %p\n", mem_map); - -Output: - -[ 0.000000] before 8861b280 vs. 8861b280 or 8851b280 -[ 0.000000] after 8851b280 - -As seen in the first line mem_map with subtraction of offset does not equal the -mem_map after subtraction of ARCH_PFN_OFFSET. - -After adding the offset of ARCH_PFN_OFFSET as well to mem_map as the -previously calculated offset is zero for the named platform it is able to boot -4.4 and 4.9-rc7 again. - -Signed-off-by: Tobias Wolf ---- - ---- a/mm/page_alloc.c -+++ b/mm/page_alloc.c -@@ -7672,7 +7672,7 @@ static void __init alloc_node_mem_map(st - if (pgdat == NODE_DATA(0)) { - mem_map = NODE_DATA(0)->node_mem_map; - if (page_to_pfn(mem_map) != pgdat->node_start_pfn) -- mem_map -= offset; -+ mem_map -= offset + (pgdat->node_start_pfn - ARCH_PFN_OFFSET); - } - #endif - } diff --git a/target/linux/generic/pending-5.18/130-add-linux-spidev-compatible-si3210.patch b/target/linux/generic/pending-5.18/130-add-linux-spidev-compatible-si3210.patch deleted file mode 100644 index 84c9728ed6a94e..00000000000000 --- a/target/linux/generic/pending-5.18/130-add-linux-spidev-compatible-si3210.patch +++ /dev/null @@ -1,18 +0,0 @@ -From: Giuseppe Lippolis -Subject: Add the linux,spidev compatible in spidev Several device in ramips have this binding in the dts - -Signed-off-by: Giuseppe Lippolis ---- - drivers/spi/spidev.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/drivers/spi/spidev.c -+++ b/drivers/spi/spidev.c -@@ -701,6 +701,7 @@ static const struct of_device_id spidev_ - { .compatible = "lwn,bk4" }, - { .compatible = "dh,dhcom-board" }, - { .compatible = "menlo,m53cpld" }, -+ { .compatible = "siliconlabs,si3210" }, - { .compatible = "cisco,spi-petra" }, - { .compatible = "micron,spi-authenta" }, - {}, diff --git a/target/linux/generic/pending-5.18/140-jffs2-use-.rename2-and-add-RENAME_WHITEOUT-support.patch b/target/linux/generic/pending-5.18/140-jffs2-use-.rename2-and-add-RENAME_WHITEOUT-support.patch deleted file mode 100644 index 8f40ae3ba2400d..00000000000000 --- a/target/linux/generic/pending-5.18/140-jffs2-use-.rename2-and-add-RENAME_WHITEOUT-support.patch +++ /dev/null @@ -1,81 +0,0 @@ -From: Felix Fietkau -Subject: jffs2: use .rename2 and add RENAME_WHITEOUT support - -It is required for renames on overlayfs - -Signed-off-by: Felix Fietkau ---- - ---- a/fs/jffs2/dir.c -+++ b/fs/jffs2/dir.c -@@ -614,8 +614,8 @@ static int jffs2_rmdir (struct inode *di - return ret; - } - --static int jffs2_mknod (struct user_namespace *mnt_userns, struct inode *dir_i, -- struct dentry *dentry, umode_t mode, dev_t rdev) -+static int __jffs2_mknod (struct user_namespace *mnt_userns, struct inode *dir_i, -+ struct dentry *dentry, umode_t mode, dev_t rdev, bool whiteout) - { - struct jffs2_inode_info *f, *dir_f; - struct jffs2_sb_info *c; -@@ -754,7 +754,11 @@ static int jffs2_mknod (struct user_name - mutex_unlock(&dir_f->sem); - jffs2_complete_reservation(c); - -- d_instantiate_new(dentry, inode); -+ if (!whiteout) -+ d_instantiate_new(dentry, inode); -+ else -+ unlock_new_inode(inode); -+ - return 0; - - fail: -@@ -762,6 +766,19 @@ static int jffs2_mknod (struct user_name - return ret; - } - -+static int jffs2_mknod (struct user_namespace *mnt_userns, struct inode *dir_i, -+ struct dentry *dentry, umode_t mode, dev_t rdev) -+{ -+ return __jffs2_mknod(mnt_userns, dir_i, dentry, mode, rdev, false); -+} -+ -+static int jffs2_whiteout (struct user_namespace *mnt_userns, struct inode *old_dir, -+ struct dentry *old_dentry) -+{ -+ return __jffs2_mknod(mnt_userns, old_dir, old_dentry, S_IFCHR | WHITEOUT_MODE, -+ WHITEOUT_DEV, true); -+} -+ - static int jffs2_rename (struct user_namespace *mnt_userns, - struct inode *old_dir_i, struct dentry *old_dentry, - struct inode *new_dir_i, struct dentry *new_dentry, -@@ -773,7 +790,7 @@ static int jffs2_rename (struct user_nam - uint8_t type; - uint32_t now; - -- if (flags & ~RENAME_NOREPLACE) -+ if (flags & ~(RENAME_NOREPLACE|RENAME_WHITEOUT)) - return -EINVAL; - - /* The VFS will check for us and prevent trying to rename a -@@ -839,9 +856,14 @@ static int jffs2_rename (struct user_nam - if (d_is_dir(old_dentry) && !victim_f) - inc_nlink(new_dir_i); - -- /* Unlink the original */ -- ret = jffs2_do_unlink(c, JFFS2_INODE_INFO(old_dir_i), -- old_dentry->d_name.name, old_dentry->d_name.len, NULL, now); -+ if (flags & RENAME_WHITEOUT) -+ /* Replace with whiteout */ -+ ret = jffs2_whiteout(mnt_userns, old_dir_i, old_dentry); -+ else -+ /* Unlink the original */ -+ ret = jffs2_do_unlink(c, JFFS2_INODE_INFO(old_dir_i), -+ old_dentry->d_name.name, -+ old_dentry->d_name.len, NULL, now); - - /* We don't touch inode->i_nlink */ - diff --git a/target/linux/generic/pending-5.18/141-jffs2-add-RENAME_EXCHANGE-support.patch b/target/linux/generic/pending-5.18/141-jffs2-add-RENAME_EXCHANGE-support.patch deleted file mode 100644 index f58fc791d28157..00000000000000 --- a/target/linux/generic/pending-5.18/141-jffs2-add-RENAME_EXCHANGE-support.patch +++ /dev/null @@ -1,73 +0,0 @@ -From: Felix Fietkau -Subject: jffs2: add RENAME_EXCHANGE support - -Signed-off-by: Felix Fietkau ---- - ---- a/fs/jffs2/dir.c -+++ b/fs/jffs2/dir.c -@@ -787,18 +787,31 @@ static int jffs2_rename (struct user_nam - int ret; - struct jffs2_sb_info *c = JFFS2_SB_INFO(old_dir_i->i_sb); - struct jffs2_inode_info *victim_f = NULL; -+ struct inode *fst_inode = d_inode(old_dentry); -+ struct inode *snd_inode = d_inode(new_dentry); - uint8_t type; - uint32_t now; - -- if (flags & ~(RENAME_NOREPLACE|RENAME_WHITEOUT)) -+ if (flags & ~(RENAME_NOREPLACE|RENAME_WHITEOUT|RENAME_EXCHANGE)) - return -EINVAL; - -+ if ((flags & RENAME_EXCHANGE) && (old_dir_i != new_dir_i)) { -+ if (S_ISDIR(fst_inode->i_mode) && !S_ISDIR(snd_inode->i_mode)) { -+ inc_nlink(new_dir_i); -+ drop_nlink(old_dir_i); -+ } -+ else if (!S_ISDIR(fst_inode->i_mode) && S_ISDIR(snd_inode->i_mode)) { -+ drop_nlink(new_dir_i); -+ inc_nlink(old_dir_i); -+ } -+ } -+ - /* The VFS will check for us and prevent trying to rename a - * file over a directory and vice versa, but if it's a directory, - * the VFS can't check whether the victim is empty. The filesystem - * needs to do that for itself. - */ -- if (d_really_is_positive(new_dentry)) { -+ if (d_really_is_positive(new_dentry) && !(flags & RENAME_EXCHANGE)) { - victim_f = JFFS2_INODE_INFO(d_inode(new_dentry)); - if (d_is_dir(new_dentry)) { - struct jffs2_full_dirent *fd; -@@ -833,7 +846,7 @@ static int jffs2_rename (struct user_nam - if (ret) - return ret; - -- if (victim_f) { -+ if (victim_f && !(flags & RENAME_EXCHANGE)) { - /* There was a victim. Kill it off nicely */ - if (d_is_dir(new_dentry)) - clear_nlink(d_inode(new_dentry)); -@@ -859,6 +872,12 @@ static int jffs2_rename (struct user_nam - if (flags & RENAME_WHITEOUT) - /* Replace with whiteout */ - ret = jffs2_whiteout(mnt_userns, old_dir_i, old_dentry); -+ else if (flags & RENAME_EXCHANGE) -+ /* Replace the original */ -+ ret = jffs2_do_link(c, JFFS2_INODE_INFO(old_dir_i), -+ d_inode(new_dentry)->i_ino, type, -+ old_dentry->d_name.name, old_dentry->d_name.len, -+ now); - else - /* Unlink the original */ - ret = jffs2_do_unlink(c, JFFS2_INODE_INFO(old_dir_i), -@@ -890,7 +909,7 @@ static int jffs2_rename (struct user_nam - return ret; - } - -- if (d_is_dir(old_dentry)) -+ if (d_is_dir(old_dentry) && !(flags & RENAME_EXCHANGE)) - drop_nlink(old_dir_i); - - new_dir_i->i_mtime = new_dir_i->i_ctime = old_dir_i->i_mtime = old_dir_i->i_ctime = ITIME(now); diff --git a/target/linux/generic/pending-5.18/142-jffs2-add-splice-ops.patch b/target/linux/generic/pending-5.18/142-jffs2-add-splice-ops.patch deleted file mode 100644 index de847a1f5cd1fc..00000000000000 --- a/target/linux/generic/pending-5.18/142-jffs2-add-splice-ops.patch +++ /dev/null @@ -1,20 +0,0 @@ -From: Felix Fietkau -Subject: jffs2: add splice ops - -Add splice_read using generic_file_splice_read. -Add splice_write using iter_file_splice_write - -Signed-off-by: Felix Fietkau ---- - ---- a/fs/jffs2/file.c -+++ b/fs/jffs2/file.c -@@ -53,6 +53,8 @@ const struct file_operations jffs2_file_ - .open = generic_file_open, - .read_iter = generic_file_read_iter, - .write_iter = generic_file_write_iter, -+ .splice_read = generic_file_splice_read, -+ .splice_write = iter_file_splice_write, - .unlocked_ioctl=jffs2_ioctl, - .mmap = generic_file_readonly_mmap, - .fsync = jffs2_fsync, diff --git a/target/linux/generic/pending-5.18/150-bridge_allow_receiption_on_disabled_port.patch b/target/linux/generic/pending-5.18/150-bridge_allow_receiption_on_disabled_port.patch deleted file mode 100644 index 93a2d146b5ad84..00000000000000 --- a/target/linux/generic/pending-5.18/150-bridge_allow_receiption_on_disabled_port.patch +++ /dev/null @@ -1,45 +0,0 @@ -From: Stephen Hemminger -Subject: bridge: allow receiption on disabled port - -When an ethernet device is enslaved to a bridge, and the bridge STP -detects loss of carrier (or operational state down), then normally -packet receiption is blocked. - -This breaks control applications like WPA which maybe expecting to -receive packets to negotiate to bring link up. The bridge needs to -block forwarding packets from these disabled ports, but there is no -hard requirement to not allow local packet delivery. - -Signed-off-by: Stephen Hemminger -Signed-off-by: Felix Fietkau - ---- a/net/bridge/br_input.c -+++ b/net/bridge/br_input.c -@@ -222,6 +222,9 @@ static void __br_handle_local_finish(str - /* note: already called with rcu_read_lock */ - static int br_handle_local_finish(struct net *net, struct sock *sk, struct sk_buff *skb) - { -+ struct net_bridge_port *p = br_port_get_rcu(skb->dev); -+ -+ if (p->state != BR_STATE_DISABLED) - __br_handle_local_finish(skb); - - /* return 1 to signal the okfn() was called so it's ok to use the skb */ -@@ -390,6 +393,17 @@ forward: - goto defer_stp_filtering; - - switch (p->state) { -+ case BR_STATE_DISABLED: -+ if (ether_addr_equal(p->br->dev->dev_addr, dest)) -+ skb->pkt_type = PACKET_HOST; -+ -+ if (NF_HOOK(NFPROTO_BRIDGE, NF_BR_PRE_ROUTING, -+ dev_net(skb->dev), NULL, skb, skb->dev, NULL, -+ br_handle_local_finish) == 1) { -+ return RX_HANDLER_PASS; -+ } -+ break; -+ - case BR_STATE_FORWARDING: - case BR_STATE_LEARNING: - defer_stp_filtering: diff --git a/target/linux/generic/pending-5.18/190-rtc-rs5c372-support_alarms_up_to_1_week.patch b/target/linux/generic/pending-5.18/190-rtc-rs5c372-support_alarms_up_to_1_week.patch deleted file mode 100644 index 2f5c2228c7a4e2..00000000000000 --- a/target/linux/generic/pending-5.18/190-rtc-rs5c372-support_alarms_up_to_1_week.patch +++ /dev/null @@ -1,94 +0,0 @@ -From: Daniel González Cabanelas -Subject: [PATCH 1/2] rtc: rs5c372: support alarms up to 1 week - -The Ricoh R2221x, R2223x, RS5C372, RV5C387A chips can handle 1 week -alarms. - -Read the "wday" alarm register and convert it to a date to support up 1 -week in our driver. - -Signed-off-by: Daniel González Cabanelas ---- - drivers/rtc/rtc-rs5c372.c | 48 ++++++++++++++++++++++++++++++++++----- - 1 file changed, 42 insertions(+), 6 deletions(-) - ---- a/drivers/rtc/rtc-rs5c372.c -+++ b/drivers/rtc/rtc-rs5c372.c -@@ -399,7 +399,9 @@ static int rs5c_read_alarm(struct device - { - struct i2c_client *client = to_i2c_client(dev); - struct rs5c372 *rs5c = i2c_get_clientdata(client); -- int status; -+ int status, wday_offs; -+ struct rtc_time rtc; -+ unsigned long alarm_secs; - - status = rs5c_get_regs(rs5c); - if (status < 0) -@@ -409,6 +411,30 @@ static int rs5c_read_alarm(struct device - t->time.tm_sec = 0; - t->time.tm_min = bcd2bin(rs5c->regs[RS5C_REG_ALARM_A_MIN] & 0x7f); - t->time.tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C_REG_ALARM_A_HOURS]); -+ t->time.tm_wday = ffs(rs5c->regs[RS5C_REG_ALARM_A_WDAY] & 0x7f) - 1; -+ -+ /* determine the day, month and year based on alarm wday, taking as a -+ * reference the current time from the rtc -+ */ -+ status = rs5c372_rtc_read_time(dev, &rtc); -+ if (status < 0) -+ return status; -+ -+ wday_offs = t->time.tm_wday - rtc.tm_wday; -+ alarm_secs = mktime64(rtc.tm_year + 1900, -+ rtc.tm_mon + 1, -+ rtc.tm_mday + wday_offs, -+ t->time.tm_hour, -+ t->time.tm_min, -+ t->time.tm_sec); -+ -+ if (wday_offs < 0 || (wday_offs == 0 && -+ (t->time.tm_hour < rtc.tm_hour || -+ (t->time.tm_hour == rtc.tm_hour && -+ t->time.tm_min <= rtc.tm_min)))) -+ alarm_secs += 7 * 86400; -+ -+ rtc_time64_to_tm(alarm_secs, &t->time); - - /* ... and status */ - t->enabled = !!(rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE); -@@ -423,12 +449,20 @@ static int rs5c_set_alarm(struct device - struct rs5c372 *rs5c = i2c_get_clientdata(client); - int status, addr, i; - unsigned char buf[3]; -+ struct rtc_time rtc_tm; -+ unsigned long rtc_secs, alarm_secs; - -- /* only handle up to 24 hours in the future, like RTC_ALM_SET */ -- if (t->time.tm_mday != -1 -- || t->time.tm_mon != -1 -- || t->time.tm_year != -1) -+ /* chip only can handle alarms up to one week in the future*/ -+ status = rs5c372_rtc_read_time(dev, &rtc_tm); -+ if (status) -+ return status; -+ rtc_secs = rtc_tm_to_time64(&rtc_tm); -+ alarm_secs = rtc_tm_to_time64(&t->time); -+ if (alarm_secs >= rtc_secs + 7 * 86400) { -+ dev_err(dev, "%s: alarm maximum is one week in the future (%d)\n", -+ __func__, status); - return -EINVAL; -+ } - - /* REVISIT: round up tm_sec */ - -@@ -449,7 +483,9 @@ static int rs5c_set_alarm(struct device - /* set alarm */ - buf[0] = bin2bcd(t->time.tm_min); - buf[1] = rs5c_hr2reg(rs5c, t->time.tm_hour); -- buf[2] = 0x7f; /* any/all days */ -+ /* each bit is the day of the week, 0x7f means all days */ -+ buf[2] = (t->time.tm_wday >= 0 && t->time.tm_wday < 7) ? -+ BIT(t->time.tm_wday) : 0x7f; - - for (i = 0; i < sizeof(buf); i++) { - addr = RS5C_ADDR(RS5C_REG_ALARM_A_MIN + i); diff --git a/target/linux/generic/pending-5.18/191-rtc-rs5c372-let_the_alarm_to_be_used_as_wakeup_source.patch b/target/linux/generic/pending-5.18/191-rtc-rs5c372-let_the_alarm_to_be_used_as_wakeup_source.patch deleted file mode 100644 index 0ed070bc5b1254..00000000000000 --- a/target/linux/generic/pending-5.18/191-rtc-rs5c372-let_the_alarm_to_be_used_as_wakeup_source.patch +++ /dev/null @@ -1,70 +0,0 @@ -From: Daniel González Cabanelas -Subject: [PATCH 2/2] rtc: rs5c372: let the alarm to be used as wakeup source - -Currently there is no use for the interrupts on the rs5c372 RTC and the -wakealarm isn't enabled. There are some devices like NASes which use this -RTC to wake up from the power off state when the INTR pin is activated by -the alarm clock. - -Enable the alarm and let to be used as a wakeup source. - -Tested on a Buffalo LS421DE NAS. - -Signed-off-by: Daniel González Cabanelas ---- - drivers/rtc/rtc-rs5c372.c | 16 ++++++++++++++++ - 1 file changed, 16 insertions(+) - ---- a/drivers/rtc/rtc-rs5c372.c -+++ b/drivers/rtc/rtc-rs5c372.c -@@ -833,6 +833,7 @@ static int rs5c372_probe(struct i2c_clie - int err = 0; - int smbus_mode = 0; - struct rs5c372 *rs5c372; -+ bool rs5c372_can_wakeup_device = false; - - dev_dbg(&client->dev, "%s\n", __func__); - -@@ -868,6 +869,12 @@ static int rs5c372_probe(struct i2c_clie - else - rs5c372->type = id->driver_data; - -+#ifdef CONFIG_OF -+ if(of_property_read_bool(client->dev.of_node, -+ "wakeup-source")) -+ rs5c372_can_wakeup_device = true; -+#endif -+ - /* we read registers 0x0f then 0x00-0x0f; skip the first one */ - rs5c372->regs = &rs5c372->buf[1]; - rs5c372->smbus = smbus_mode; -@@ -901,6 +908,8 @@ static int rs5c372_probe(struct i2c_clie - goto exit; - } - -+ rs5c372->has_irq = 1; -+ - /* if the oscillator lost power and no other software (like - * the bootloader) set it up, do it here. - * -@@ -927,6 +936,10 @@ static int rs5c372_probe(struct i2c_clie - ); - - /* REVISIT use client->irq to register alarm irq ... */ -+ if (rs5c372_can_wakeup_device) { -+ device_init_wakeup(&client->dev, true); -+ } -+ - rs5c372->rtc = devm_rtc_device_register(&client->dev, - rs5c372_driver.driver.name, - &rs5c372_rtc_ops, THIS_MODULE); -@@ -940,6 +953,9 @@ static int rs5c372_probe(struct i2c_clie - if (err) - goto exit; - -+ /* the rs5c372 alarm only supports a minute accuracy */ -+ -+ - return 0; - - exit: diff --git a/target/linux/generic/pending-5.18/201-extra_optimization.patch b/target/linux/generic/pending-5.18/201-extra_optimization.patch deleted file mode 100644 index d0b4b9eb7f4de0..00000000000000 --- a/target/linux/generic/pending-5.18/201-extra_optimization.patch +++ /dev/null @@ -1,31 +0,0 @@ -From: Felix Fietkau -Subject: Upgrade to Linux 2.6.19 - -- Includes large parts of the patch from #1021 by dpalffy -- Includes RB532 NAND driver changes by n0-1 - -[john@phrozen.org: feix will add this to his upstream queue] - -lede-commit: bff468813f78f81e36ebb2a3f4354de7365e640f -Signed-off-by: Felix Fietkau ---- - Makefile | 6 +++--- - 1 file changed, 3 insertions(+), 3 deletions(-) - ---- a/Makefile -+++ b/Makefile -@@ -753,11 +753,11 @@ KBUILD_CFLAGS += $(call cc-disable-warni - KBUILD_CFLAGS += $(call cc-disable-warning, address-of-packed-member) - - ifdef CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE --KBUILD_CFLAGS += -O2 -+KBUILD_CFLAGS += -O2 $(EXTRA_OPTIMIZATION) - else ifdef CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE_O3 --KBUILD_CFLAGS += -O3 -+KBUILD_CFLAGS += -O3 $(EXTRA_OPTIMIZATION) - else ifdef CONFIG_CC_OPTIMIZE_FOR_SIZE --KBUILD_CFLAGS += -Os -+KBUILD_CFLAGS += -Os -fno-reorder-blocks -fno-tree-ch $(EXTRA_OPTIMIZATION) - endif - - # Tell gcc to never replace conditional load with a non-conditional one diff --git a/target/linux/generic/pending-5.18/203-kallsyms_uncompressed.patch b/target/linux/generic/pending-5.18/203-kallsyms_uncompressed.patch deleted file mode 100644 index 1412a80148b034..00000000000000 --- a/target/linux/generic/pending-5.18/203-kallsyms_uncompressed.patch +++ /dev/null @@ -1,119 +0,0 @@ -From: Felix Fietkau -Subject: kernel: add a config option for keeping the kallsyms table uncompressed, saving ~9kb kernel size after lzma on ar71xx - -[john@phrozen.org: added to my upstream queue 30.12.2016] -lede-commit: e0e3509b5ce2ccf93d4d67ea907613f5f7ec2eed -Signed-off-by: Felix Fietkau ---- - init/Kconfig | 11 +++++++++++ - kernel/kallsyms.c | 8 ++++++++ - scripts/kallsyms.c | 12 ++++++++++++ - scripts/link-vmlinux.sh | 4 ++++ - 4 files changed, 35 insertions(+) - ---- a/init/Kconfig -+++ b/init/Kconfig -@@ -1460,6 +1460,17 @@ config SYSCTL_ARCH_UNALIGN_ALLOW - the unaligned access emulation. - see arch/parisc/kernel/unaligned.c for reference - -+config KALLSYMS_UNCOMPRESSED -+ bool "Keep kallsyms uncompressed" -+ depends on KALLSYMS -+ help -+ Normally kallsyms contains compressed symbols (using a token table), -+ reducing the uncompressed kernel image size. Keeping the symbol table -+ uncompressed significantly improves the size of this part in compressed -+ kernel images. -+ -+ Say N unless you need compressed kernel images to be small. -+ - config HAVE_PCSPKR_PLATFORM - bool - ---- a/kernel/kallsyms.c -+++ b/kernel/kallsyms.c -@@ -80,6 +80,11 @@ static unsigned int kallsyms_expand_symb - * For every byte on the compressed symbol data, copy the table - * entry for that byte. - */ -+#ifdef CONFIG_KALLSYMS_UNCOMPRESSED -+ memcpy(result, data + 1, len - 1); -+ result += len - 1; -+ len = 0; -+#endif - while (len) { - tptr = &kallsyms_token_table[kallsyms_token_index[*data]]; - data++; -@@ -112,6 +117,9 @@ tail: - */ - static char kallsyms_get_symbol_type(unsigned int off) - { -+#ifdef CONFIG_KALLSYMS_UNCOMPRESSED -+ return kallsyms_names[off + 1]; -+#endif - /* - * Get just the first code, look it up in the token table, - * and return the first char from this token. ---- a/scripts/kallsyms.c -+++ b/scripts/kallsyms.c -@@ -58,6 +58,7 @@ static struct addr_range percpu_range = - static struct sym_entry **table; - static unsigned int table_size, table_cnt; - static int all_symbols; -+static int uncompressed; - static int absolute_percpu; - static int base_relative; - -@@ -486,6 +487,9 @@ static void write_src(void) - - free(markers); - -+ if (uncompressed) -+ return; -+ - output_label("kallsyms_token_table"); - off = 0; - for (i = 0; i < 256; i++) { -@@ -537,6 +541,9 @@ static unsigned char *find_token(unsigne - { - int i; - -+ if (uncompressed) -+ return NULL; -+ - for (i = 0; i < len - 1; i++) { - if (str[i] == token[0] && str[i+1] == token[1]) - return &str[i]; -@@ -609,6 +616,9 @@ static void optimize_result(void) - { - int i, best; - -+ if (uncompressed) -+ return; -+ - /* using the '\0' symbol last allows compress_symbols to use standard - * fast string functions */ - for (i = 255; i >= 0; i--) { -@@ -773,6 +783,8 @@ int main(int argc, char **argv) - absolute_percpu = 1; - else if (strcmp(argv[i], "--base-relative") == 0) - base_relative = 1; -+ else if (strcmp(argv[i], "--uncompressed") == 0) -+ uncompressed = 1; - else - usage(); - } ---- a/scripts/link-vmlinux.sh -+++ b/scripts/link-vmlinux.sh -@@ -267,6 +267,10 @@ kallsyms() - kallsymopt="${kallsymopt} --base-relative" - fi - -+ if [ -n "${CONFIG_KALLSYMS_UNCOMPRESSED}" ]; then -+ kallsymopt="${kallsymopt} --uncompressed" -+ fi -+ - info KSYMS ${2} - ${NM} -n ${1} | scripts/kallsyms ${kallsymopt} > ${2} - } diff --git a/target/linux/generic/pending-5.18/205-backtrace_module_info.patch b/target/linux/generic/pending-5.18/205-backtrace_module_info.patch deleted file mode 100644 index 94cb4717fdc5d6..00000000000000 --- a/target/linux/generic/pending-5.18/205-backtrace_module_info.patch +++ /dev/null @@ -1,41 +0,0 @@ -From: Felix Fietkau -Subject: kernel: when KALLSYMS is disabled, print module address + size for matching backtrace entries - -[john@phrozen.org: felix will add this to his upstream queue] - -lede-commit 53827cdc824556cda910b23ce5030c363b8f1461 -Signed-off-by: Felix Fietkau ---- - lib/vsprintf.c | 15 +++++++++++---- - 1 file changed, 11 insertions(+), 4 deletions(-) - ---- a/lib/vsprintf.c -+++ b/lib/vsprintf.c -@@ -1004,8 +1004,10 @@ char *symbol_string(char *buf, char *end - struct printf_spec spec, const char *fmt) - { - unsigned long value; --#ifdef CONFIG_KALLSYMS - char sym[KSYM_SYMBOL_LEN]; -+#ifndef CONFIG_KALLSYMS -+ struct module *mod; -+ int len; - #endif - - if (fmt[1] == 'R') -@@ -1026,8 +1028,14 @@ char *symbol_string(char *buf, char *end - - return string_nocheck(buf, end, sym, spec); - #else -- return special_hex_number(buf, end, value, sizeof(void *)); -+ len = snprintf(sym, sizeof(sym), "0x%lx", value); -+ mod = __module_address(value); -+ if (mod) -+ snprintf(sym + len, sizeof(sym) - len, " [%s@%p+0x%x]", -+ mod->name, mod->core_layout.base, -+ mod->core_layout.size); - #endif -+ return string(buf, end, sym, spec); - } - - static const struct printf_spec default_str_spec = { diff --git a/target/linux/generic/pending-5.18/240-remove-unsane-filenames-from-deps_initramfs-list.patch b/target/linux/generic/pending-5.18/240-remove-unsane-filenames-from-deps_initramfs-list.patch deleted file mode 100644 index 9e78284ecf707b..00000000000000 --- a/target/linux/generic/pending-5.18/240-remove-unsane-filenames-from-deps_initramfs-list.patch +++ /dev/null @@ -1,30 +0,0 @@ -From: Gabor Juhos -Subject: usr: sanitize deps_initramfs list - -If any filename in the intramfs dependency -list contains a colon, that causes a kernel -build error like this: - -/devel/openwrt/build_dir/linux-ar71xx_generic/linux-3.6.6/usr/Makefile:58: *** multiple target patterns. Stop. -make[5]: *** [usr] Error 2 - -Fix it by removing such filenames from the -deps_initramfs list. - -Signed-off-by: Gabor Juhos -Signed-off-by: Felix Fietkau ---- - usr/Makefile | 8 +++++--- - 1 file changed, 5 insertions(+), 3 deletions(-) - ---- a/usr/Makefile -+++ b/usr/Makefile -@@ -56,6 +56,8 @@ hostprogs := gen_init_cpio - # The dependency list is generated by gen_initramfs.sh -l - -include $(obj)/.initramfs_data.cpio.d - -+deps_initramfs := $(foreach v,$(deps_initramfs),$(if $(findstring :,$(v)),,$(v))) -+ - # do not try to update files included in initramfs - $(deps_initramfs): ; - diff --git a/target/linux/generic/pending-5.18/261-enable_wilink_platform_without_drivers.patch b/target/linux/generic/pending-5.18/261-enable_wilink_platform_without_drivers.patch deleted file mode 100644 index cd31f9d9342925..00000000000000 --- a/target/linux/generic/pending-5.18/261-enable_wilink_platform_without_drivers.patch +++ /dev/null @@ -1,20 +0,0 @@ -From: Imre Kaloz -Subject: [PATCH] hack: net: wireless: make the wl12xx glue code available with - compat-wireless, too - -Signed-off-by: Imre Kaloz ---- - drivers/net/wireless/ti/Kconfig | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/net/wireless/ti/Kconfig -+++ b/drivers/net/wireless/ti/Kconfig -@@ -20,7 +20,7 @@ source "drivers/net/wireless/ti/wlcore/K - - config WILINK_PLATFORM_DATA - bool "TI WiLink platform data" -- depends on WLCORE_SDIO || WL1251_SDIO -+ depends on WLCORE_SDIO || WL1251_SDIO || ARCH_OMAP2PLUS - default y - help - Small platform data bit needed to pass data to the sdio modules. diff --git a/target/linux/generic/pending-5.18/270-platform-mikrotik-build-bits.patch b/target/linux/generic/pending-5.18/270-platform-mikrotik-build-bits.patch deleted file mode 100644 index 31f86f4aacd53d..00000000000000 --- a/target/linux/generic/pending-5.18/270-platform-mikrotik-build-bits.patch +++ /dev/null @@ -1,35 +0,0 @@ -From c2deb5ef01a0ef09088832744cbace9e239a6ee0 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Thibaut=20VAR=C3=88NE?= -Date: Sat, 28 Mar 2020 12:11:50 +0100 -Subject: [PATCH] generic: platform/mikrotik build bits (5.4) -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This patch adds platform/mikrotik kernel build bits - -Signed-off-by: Thibaut VARÈNE ---- - drivers/platform/Kconfig | 2 ++ - drivers/platform/Makefile | 1 + - 2 files changed, 3 insertions(+) - ---- a/drivers/platform/Kconfig -+++ b/drivers/platform/Kconfig -@@ -12,6 +12,8 @@ source "drivers/platform/chrome/Kconfig" - - source "drivers/platform/mellanox/Kconfig" - -+source "drivers/platform/mikrotik/Kconfig" -+ - source "drivers/platform/olpc/Kconfig" - - source "drivers/platform/surface/Kconfig" ---- a/drivers/platform/Makefile -+++ b/drivers/platform/Makefile -@@ -9,4 +9,5 @@ obj-$(CONFIG_MIPS) += mips/ - obj-$(CONFIG_OLPC_EC) += olpc/ - obj-$(CONFIG_GOLDFISH) += goldfish/ - obj-$(CONFIG_CHROME_PLATFORMS) += chrome/ -+obj-$(CONFIG_MIKROTIK) += mikrotik/ - obj-$(CONFIG_SURFACE_PLATFORMS) += surface/ diff --git a/target/linux/generic/pending-5.18/300-mips_expose_boot_raw.patch b/target/linux/generic/pending-5.18/300-mips_expose_boot_raw.patch deleted file mode 100644 index fd3f2187647a04..00000000000000 --- a/target/linux/generic/pending-5.18/300-mips_expose_boot_raw.patch +++ /dev/null @@ -1,40 +0,0 @@ -From: Mark Miller -Subject: mips: expose CONFIG_BOOT_RAW - -This exposes the CONFIG_BOOT_RAW symbol in Kconfig. This is needed on -certain Broadcom chipsets running CFE in order to load the kernel. - -Signed-off-by: Mark Miller -Acked-by: Rob Landley ---- ---- a/arch/mips/Kconfig -+++ b/arch/mips/Kconfig -@@ -1041,9 +1041,6 @@ config FW_ARC - config ARCH_MAY_HAVE_PC_FDC - bool - --config BOOT_RAW -- bool -- - config CEVT_BCM1480 - bool - -@@ -3113,6 +3110,18 @@ choice - bool "Extend builtin kernel arguments with bootloader arguments" - endchoice - -+config BOOT_RAW -+ bool "Enable the kernel to be executed from the load address" -+ default n -+ help -+ Allow the kernel to be executed from the load address for -+ bootloaders which cannot read the ELF format. This places -+ a jump to start_kernel at the load address. -+ -+ If unsure, say N. -+ -+ -+ - endmenu - - config LOCKDEP_SUPPORT diff --git a/target/linux/generic/pending-5.18/302-mips_no_branch_likely.patch b/target/linux/generic/pending-5.18/302-mips_no_branch_likely.patch deleted file mode 100644 index 542fba651f29db..00000000000000 --- a/target/linux/generic/pending-5.18/302-mips_no_branch_likely.patch +++ /dev/null @@ -1,22 +0,0 @@ -From: Felix Fietkau -Subject: mips: use -mno-branch-likely for kernel and userspace - -saves ~11k kernel size after lzma and ~12k squashfs size in the - -lede-commit: 41a039f46450ffae9483d6216422098669da2900 -Signed-off-by: Felix Fietkau ---- - arch/mips/Makefile | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/mips/Makefile -+++ b/arch/mips/Makefile -@@ -94,7 +94,7 @@ all-$(CONFIG_SYS_SUPPORTS_ZBOOT)+= vmlin - # machines may also. Since BFD is incredibly buggy with respect to - # crossformat linking we rely on the elf2ecoff tool for format conversion. - # --cflags-y += -G 0 -mno-abicalls -fno-pic -pipe -+cflags-y += -G 0 -mno-abicalls -fno-pic -pipe -mno-branch-likely - cflags-y += -msoft-float - LDFLAGS_vmlinux += -G 0 -static -n -nostdlib - KBUILD_AFLAGS_MODULE += -mlong-calls diff --git a/target/linux/generic/pending-5.18/305-mips_module_reloc.patch b/target/linux/generic/pending-5.18/305-mips_module_reloc.patch deleted file mode 100644 index 5ced02871bc041..00000000000000 --- a/target/linux/generic/pending-5.18/305-mips_module_reloc.patch +++ /dev/null @@ -1,370 +0,0 @@ -From: Felix Fietkau -Subject: mips: replace -mlong-calls with -mno-long-calls to make function calls faster in kernel modules to achieve this, try to - -lede-commit: 3b3d64743ba2a874df9d70cd19e242205b0a788c -Signed-off-by: Felix Fietkau ---- - arch/mips/Makefile | 5 + - arch/mips/include/asm/module.h | 5 + - arch/mips/kernel/module.c | 279 ++++++++++++++++++++++++++++++++++++++++- - 3 files changed, 284 insertions(+), 5 deletions(-) - ---- a/arch/mips/Makefile -+++ b/arch/mips/Makefile -@@ -97,8 +97,18 @@ all-$(CONFIG_SYS_SUPPORTS_ZBOOT)+= vmlin - cflags-y += -G 0 -mno-abicalls -fno-pic -pipe -mno-branch-likely - cflags-y += -msoft-float - LDFLAGS_vmlinux += -G 0 -static -n -nostdlib -+ifdef CONFIG_64BIT - KBUILD_AFLAGS_MODULE += -mlong-calls - KBUILD_CFLAGS_MODULE += -mlong-calls -+else -+ ifdef CONFIG_DYNAMIC_FTRACE -+ KBUILD_AFLAGS_MODULE += -mlong-calls -+ KBUILD_CFLAGS_MODULE += -mlong-calls -+ else -+ KBUILD_AFLAGS_MODULE += -mno-long-calls -+ KBUILD_CFLAGS_MODULE += -mno-long-calls -+ endif -+endif - - ifeq ($(CONFIG_RELOCATABLE),y) - LDFLAGS_vmlinux += --emit-relocs ---- a/arch/mips/include/asm/module.h -+++ b/arch/mips/include/asm/module.h -@@ -12,6 +12,11 @@ struct mod_arch_specific { - const struct exception_table_entry *dbe_start; - const struct exception_table_entry *dbe_end; - struct mips_hi16 *r_mips_hi16_list; -+ -+ void *phys_plt_tbl; -+ void *virt_plt_tbl; -+ unsigned int phys_plt_offset; -+ unsigned int virt_plt_offset; - }; - - typedef uint8_t Elf64_Byte; /* Type for a 8-bit quantity. */ ---- a/arch/mips/kernel/module.c -+++ b/arch/mips/kernel/module.c -@@ -31,23 +31,261 @@ struct mips_hi16 { - static LIST_HEAD(dbe_list); - static DEFINE_SPINLOCK(dbe_lock); - --#ifdef MODULE_START -+/* -+ * Get the potential max trampolines size required of the init and -+ * non-init sections. Only used if we cannot find enough contiguous -+ * physically mapped memory to put the module into. -+ */ -+static unsigned int -+get_plt_size(const Elf_Ehdr *hdr, const Elf_Shdr *sechdrs, -+ const char *secstrings, unsigned int symindex, bool is_init) -+{ -+ unsigned long ret = 0; -+ unsigned int i, j; -+ Elf_Sym *syms; -+ -+ /* Everything marked ALLOC (this includes the exported symbols) */ -+ for (i = 1; i < hdr->e_shnum; ++i) { -+ unsigned int info = sechdrs[i].sh_info; -+ -+ if (sechdrs[i].sh_type != SHT_REL -+ && sechdrs[i].sh_type != SHT_RELA) -+ continue; -+ -+ /* Not a valid relocation section? */ -+ if (info >= hdr->e_shnum) -+ continue; -+ -+ /* Don't bother with non-allocated sections */ -+ if (!(sechdrs[info].sh_flags & SHF_ALLOC)) -+ continue; -+ -+ /* If it's called *.init*, and we're not init, we're -+ not interested */ -+ if ((strstr(secstrings + sechdrs[i].sh_name, ".init") != 0) -+ != is_init) -+ continue; -+ -+ syms = (Elf_Sym *) sechdrs[symindex].sh_addr; -+ if (sechdrs[i].sh_type == SHT_REL) { -+ Elf_Mips_Rel *rel = (void *) sechdrs[i].sh_addr; -+ unsigned int size = sechdrs[i].sh_size / sizeof(*rel); -+ -+ for (j = 0; j < size; ++j) { -+ Elf_Sym *sym; -+ -+ if (ELF_MIPS_R_TYPE(rel[j]) != R_MIPS_26) -+ continue; -+ -+ sym = syms + ELF_MIPS_R_SYM(rel[j]); -+ if (!is_init && sym->st_shndx != SHN_UNDEF) -+ continue; -+ -+ ret += 4 * sizeof(int); -+ } -+ } else { -+ Elf_Mips_Rela *rela = (void *) sechdrs[i].sh_addr; -+ unsigned int size = sechdrs[i].sh_size / sizeof(*rela); -+ -+ for (j = 0; j < size; ++j) { -+ Elf_Sym *sym; -+ -+ if (ELF_MIPS_R_TYPE(rela[j]) != R_MIPS_26) -+ continue; -+ -+ sym = syms + ELF_MIPS_R_SYM(rela[j]); -+ if (!is_init && sym->st_shndx != SHN_UNDEF) -+ continue; -+ -+ ret += 4 * sizeof(int); -+ } -+ } -+ } -+ -+ return ret; -+} -+ -+#ifndef MODULE_START -+static void *alloc_phys(unsigned long size) -+{ -+ unsigned order; -+ struct page *page; -+ struct page *p; -+ -+ size = PAGE_ALIGN(size); -+ order = get_order(size); -+ -+ page = alloc_pages(GFP_KERNEL | __GFP_NORETRY | __GFP_NOWARN | -+ __GFP_THISNODE, order); -+ if (!page) -+ return NULL; -+ -+ split_page(page, order); -+ -+ /* mark all pages except for the last one */ -+ for (p = page; p + 1 < page + (size >> PAGE_SHIFT); ++p) -+ set_bit(PG_owner_priv_1, &p->flags); -+ -+ for (p = page + (size >> PAGE_SHIFT); p < page + (1 << order); ++p) -+ __free_page(p); -+ -+ return page_address(page); -+} -+#endif -+ -+static void free_phys(void *ptr) -+{ -+ struct page *page; -+ bool free; -+ -+ page = virt_to_page(ptr); -+ do { -+ free = test_and_clear_bit(PG_owner_priv_1, &page->flags); -+ __free_page(page); -+ page++; -+ } while (free); -+} -+ - void *module_alloc(unsigned long size) - { -+#ifdef MODULE_START - return __vmalloc_node_range(size, 1, MODULE_START, MODULE_END, - GFP_KERNEL, PAGE_KERNEL, 0, NUMA_NO_NODE, - __builtin_return_address(0)); -+#else -+ void *ptr; -+ -+ if (size == 0) -+ return NULL; -+ -+ ptr = alloc_phys(size); -+ -+ /* If we failed to allocate physically contiguous memory, -+ * fall back to regular vmalloc. The module loader code will -+ * create jump tables to handle long jumps */ -+ if (!ptr) -+ return vmalloc(size); -+ -+ return ptr; -+#endif - } -+ -+static inline bool is_phys_addr(void *ptr) -+{ -+#ifdef CONFIG_64BIT -+ return (KSEGX((unsigned long)ptr) == CKSEG0); -+#else -+ return (KSEGX(ptr) == KSEG0); - #endif -+} -+ -+/* Free memory returned from module_alloc */ -+void module_memfree(void *module_region) -+{ -+ if (is_phys_addr(module_region)) -+ free_phys(module_region); -+ else -+ vfree(module_region); -+} -+ -+static void *__module_alloc(int size, bool phys) -+{ -+ void *ptr; -+ -+ if (phys) -+ ptr = kmalloc(size, GFP_KERNEL); -+ else -+ ptr = vmalloc(size); -+ return ptr; -+} -+ -+static void __module_free(void *ptr) -+{ -+ if (is_phys_addr(ptr)) -+ kfree(ptr); -+ else -+ vfree(ptr); -+} -+ -+int module_frob_arch_sections(Elf_Ehdr *hdr, Elf_Shdr *sechdrs, -+ char *secstrings, struct module *mod) -+{ -+ unsigned int symindex = 0; -+ unsigned int core_size, init_size; -+ int i; -+ -+ mod->arch.phys_plt_offset = 0; -+ mod->arch.virt_plt_offset = 0; -+ mod->arch.phys_plt_tbl = NULL; -+ mod->arch.virt_plt_tbl = NULL; -+ -+ if (IS_ENABLED(CONFIG_64BIT)) -+ return 0; -+ -+ for (i = 1; i < hdr->e_shnum; i++) -+ if (sechdrs[i].sh_type == SHT_SYMTAB) -+ symindex = i; -+ -+ core_size = get_plt_size(hdr, sechdrs, secstrings, symindex, false); -+ init_size = get_plt_size(hdr, sechdrs, secstrings, symindex, true); -+ -+ if ((core_size + init_size) == 0) -+ return 0; -+ -+ mod->arch.phys_plt_tbl = __module_alloc(core_size + init_size, 1); -+ if (!mod->arch.phys_plt_tbl) -+ return -ENOMEM; -+ -+ mod->arch.virt_plt_tbl = __module_alloc(core_size + init_size, 0); -+ if (!mod->arch.virt_plt_tbl) { -+ __module_free(mod->arch.phys_plt_tbl); -+ mod->arch.phys_plt_tbl = NULL; -+ return -ENOMEM; -+ } -+ -+ return 0; -+} - - static void apply_r_mips_32(u32 *location, u32 base, Elf_Addr v) - { - *location = base + v; - } - -+static Elf_Addr add_plt_entry_to(unsigned *plt_offset, -+ void *start, Elf_Addr v) -+{ -+ unsigned *tramp = start + *plt_offset; -+ *plt_offset += 4 * sizeof(int); -+ -+ /* adjust carry for addiu */ -+ if (v & 0x00008000) -+ v += 0x10000; -+ -+ tramp[0] = 0x3c190000 | (v >> 16); /* lui t9, hi16 */ -+ tramp[1] = 0x27390000 | (v & 0xffff); /* addiu t9, t9, lo16 */ -+ tramp[2] = 0x03200008; /* jr t9 */ -+ tramp[3] = 0x00000000; /* nop */ -+ -+ return (Elf_Addr) tramp; -+} -+ -+static Elf_Addr add_plt_entry(struct module *me, void *location, Elf_Addr v) -+{ -+ if (is_phys_addr(location)) -+ return add_plt_entry_to(&me->arch.phys_plt_offset, -+ me->arch.phys_plt_tbl, v); -+ else -+ return add_plt_entry_to(&me->arch.virt_plt_offset, -+ me->arch.virt_plt_tbl, v); -+ -+} -+ -+ - static int apply_r_mips_26(struct module *me, u32 *location, u32 base, - Elf_Addr v) - { -+ u32 ofs = base & 0x03ffffff; -+ - if (v % 4) { - pr_err("module %s: dangerous R_MIPS_26 relocation\n", - me->name); -@@ -55,13 +293,17 @@ static int apply_r_mips_26(struct module - } - - if ((v & 0xf0000000) != (((unsigned long)location + 4) & 0xf0000000)) { -- pr_err("module %s: relocation overflow\n", -- me->name); -- return -ENOEXEC; -+ v = add_plt_entry(me, location, v + (ofs << 2)); -+ if (!v) { -+ pr_err("module %s: relocation overflow\n", -+ me->name); -+ return -ENOEXEC; -+ } -+ ofs = 0; - } - - *location = (*location & ~0x03ffffff) | -- ((base + (v >> 2)) & 0x03ffffff); -+ ((ofs + (v >> 2)) & 0x03ffffff); - - return 0; - } -@@ -441,9 +683,36 @@ int module_finalize(const Elf_Ehdr *hdr, - list_add(&me->arch.dbe_list, &dbe_list); - spin_unlock_irq(&dbe_lock); - } -+ -+ /* Get rid of the fixup trampoline if we're running the module -+ * from physically mapped address space */ -+ if (me->arch.phys_plt_offset == 0) { -+ __module_free(me->arch.phys_plt_tbl); -+ me->arch.phys_plt_tbl = NULL; -+ } -+ if (me->arch.virt_plt_offset == 0) { -+ __module_free(me->arch.virt_plt_tbl); -+ me->arch.virt_plt_tbl = NULL; -+ } -+ - return 0; - } - -+void module_arch_freeing_init(struct module *mod) -+{ -+ if (mod->state == MODULE_STATE_LIVE) -+ return; -+ -+ if (mod->arch.phys_plt_tbl) { -+ __module_free(mod->arch.phys_plt_tbl); -+ mod->arch.phys_plt_tbl = NULL; -+ } -+ if (mod->arch.virt_plt_tbl) { -+ __module_free(mod->arch.virt_plt_tbl); -+ mod->arch.virt_plt_tbl = NULL; -+ } -+} -+ - void module_arch_cleanup(struct module *mod) - { - spin_lock_irq(&dbe_lock); diff --git a/target/linux/generic/pending-5.18/307-mips_highmem_offset.patch b/target/linux/generic/pending-5.18/307-mips_highmem_offset.patch deleted file mode 100644 index 0529b0c5c8aa88..00000000000000 --- a/target/linux/generic/pending-5.18/307-mips_highmem_offset.patch +++ /dev/null @@ -1,19 +0,0 @@ -From: Felix Fietkau -Subject: kernel: adjust mips highmem offset to avoid the need for -mlong-calls on systems with >256M RAM - -Signed-off-by: Felix Fietkau ---- - arch/mips/include/asm/mach-generic/spaces.h | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/mips/include/asm/mach-generic/spaces.h -+++ b/arch/mips/include/asm/mach-generic/spaces.h -@@ -46,7 +46,7 @@ - * Memory above this physical address will be considered highmem. - */ - #ifndef HIGHMEM_START --#define HIGHMEM_START _AC(0x20000000, UL) -+#define HIGHMEM_START _AC(0x10000000, UL) - #endif - - #endif /* CONFIG_32BIT */ diff --git a/target/linux/generic/pending-5.18/308-mips32r2_tune.patch b/target/linux/generic/pending-5.18/308-mips32r2_tune.patch deleted file mode 100644 index 932d72624d9b4f..00000000000000 --- a/target/linux/generic/pending-5.18/308-mips32r2_tune.patch +++ /dev/null @@ -1,22 +0,0 @@ -From: Felix Fietkau -Subject: kernel: add -mtune=34kc to MIPS CFLAGS when building for mips32r2 - -This provides a good tradeoff across at least 24Kc-74Kc, while also -producing smaller code. - -Signed-off-by: Felix Fietkau ---- - arch/mips/Makefile | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/mips/Makefile -+++ b/arch/mips/Makefile -@@ -173,7 +173,7 @@ cflags-$(CONFIG_CPU_VR41XX) += -march=r4 - cflags-$(CONFIG_CPU_R4X00) += -march=r4600 -Wa,--trap - cflags-$(CONFIG_CPU_TX49XX) += -march=r4600 -Wa,--trap - cflags-$(CONFIG_CPU_MIPS32_R1) += -march=mips32 -Wa,--trap --cflags-$(CONFIG_CPU_MIPS32_R2) += -march=mips32r2 -Wa,--trap -+cflags-$(CONFIG_CPU_MIPS32_R2) += -march=mips32r2 -mtune=34kc -Wa,--trap - cflags-$(CONFIG_CPU_MIPS32_R5) += -march=mips32r5 -Wa,--trap -modd-spreg - cflags-$(CONFIG_CPU_MIPS32_R6) += -march=mips32r6 -Wa,--trap -modd-spreg - cflags-$(CONFIG_CPU_MIPS64_R1) += -march=mips64 -Wa,--trap diff --git a/target/linux/generic/pending-5.18/310-arm_module_unresolved_weak_sym.patch b/target/linux/generic/pending-5.18/310-arm_module_unresolved_weak_sym.patch deleted file mode 100644 index 54cc9ba64767d8..00000000000000 --- a/target/linux/generic/pending-5.18/310-arm_module_unresolved_weak_sym.patch +++ /dev/null @@ -1,22 +0,0 @@ -From: Felix Fietkau -Subject: fix errors in unresolved weak symbols on arm - -lede-commit: 570699d4838a907c3ef9f2819bf19eb72997b32f -Signed-off-by: Felix Fietkau ---- - arch/arm/kernel/module.c | 4 ++++ - 1 file changed, 4 insertions(+) - ---- a/arch/arm/kernel/module.c -+++ b/arch/arm/kernel/module.c -@@ -146,6 +146,10 @@ apply_relocate(Elf32_Shdr *sechdrs, cons - return -ENOEXEC; - } - -+ if ((IS_ERR_VALUE(sym->st_value) || !sym->st_value) && -+ ELF_ST_BIND(sym->st_info) == STB_WEAK) -+ continue; -+ - loc = dstsec->sh_addr + rel->r_offset; - - switch (ELF32_R_TYPE(rel->r_info)) { diff --git a/target/linux/generic/pending-5.18/330-MIPS-kexec-Accept-command-line-parameters-from-users.patch b/target/linux/generic/pending-5.18/330-MIPS-kexec-Accept-command-line-parameters-from-users.patch deleted file mode 100644 index 8d2a9b144b9239..00000000000000 --- a/target/linux/generic/pending-5.18/330-MIPS-kexec-Accept-command-line-parameters-from-users.patch +++ /dev/null @@ -1,284 +0,0 @@ -From: Yousong Zhou -Subject: MIPS: kexec: Accept command line parameters from userspace. - -Signed-off-by: Yousong Zhou ---- - arch/mips/kernel/machine_kexec.c | 153 +++++++++++++++++++++++++++++++----- - arch/mips/kernel/machine_kexec.h | 20 +++++ - arch/mips/kernel/relocate_kernel.S | 21 +++-- - 3 files changed, 167 insertions(+), 27 deletions(-) - create mode 100644 arch/mips/kernel/machine_kexec.h - ---- a/arch/mips/kernel/machine_kexec.c -+++ b/arch/mips/kernel/machine_kexec.c -@@ -9,14 +9,11 @@ - #include - #include - -+#include - #include - #include -- --extern const unsigned char relocate_new_kernel[]; --extern const size_t relocate_new_kernel_size; -- --extern unsigned long kexec_start_address; --extern unsigned long kexec_indirection_page; -+#include -+#include "machine_kexec.h" - - static unsigned long reboot_code_buffer; - -@@ -30,6 +27,101 @@ void (*_crash_smp_send_stop)(void) = NUL - void (*_machine_kexec_shutdown)(void) = NULL; - void (*_machine_crash_shutdown)(struct pt_regs *regs) = NULL; - -+static void machine_kexec_print_args(void) -+{ -+ unsigned long argc = (int)kexec_args[0]; -+ int i; -+ -+ pr_info("kexec_args[0] (argc): %lu\n", argc); -+ pr_info("kexec_args[1] (argv): %p\n", (void *)kexec_args[1]); -+ pr_info("kexec_args[2] (env ): %p\n", (void *)kexec_args[2]); -+ pr_info("kexec_args[3] (desc): %p\n", (void *)kexec_args[3]); -+ -+ for (i = 0; i < argc; i++) { -+ pr_info("kexec_argv[%d] = %p, %s\n", -+ i, kexec_argv[i], kexec_argv[i]); -+ } -+} -+ -+static void machine_kexec_init_argv(struct kimage *image) -+{ -+ void __user *buf = NULL; -+ size_t bufsz; -+ size_t size; -+ int i; -+ -+ bufsz = 0; -+ for (i = 0; i < image->nr_segments; i++) { -+ struct kexec_segment *seg; -+ -+ seg = &image->segment[i]; -+ if (seg->bufsz < 6) -+ continue; -+ -+ if (strncmp((char *) seg->buf, "kexec ", 6)) -+ continue; -+ -+ buf = seg->buf; -+ bufsz = seg->bufsz; -+ break; -+ } -+ -+ if (!buf) -+ return; -+ -+ size = KEXEC_COMMAND_LINE_SIZE; -+ size = min(size, bufsz); -+ if (size < bufsz) -+ pr_warn("kexec command line truncated to %zd bytes\n", size); -+ -+ /* Copy to kernel space */ -+ if (copy_from_user(kexec_argv_buf, buf, size)) -+ pr_warn("kexec command line copy to kernel space failed\n"); -+ -+ kexec_argv_buf[size - 1] = 0; -+} -+ -+static void machine_kexec_parse_argv(struct kimage *image) -+{ -+ char *reboot_code_buffer; -+ int reloc_delta; -+ char *ptr; -+ int argc; -+ int i; -+ -+ ptr = kexec_argv_buf; -+ argc = 0; -+ -+ /* -+ * convert command line string to array of parameters -+ * (as bootloader does). -+ */ -+ while (ptr && *ptr && (KEXEC_MAX_ARGC > argc)) { -+ if (*ptr == ' ') { -+ *ptr++ = '\0'; -+ continue; -+ } -+ -+ kexec_argv[argc++] = ptr; -+ ptr = strchr(ptr, ' '); -+ } -+ -+ if (!argc) -+ return; -+ -+ kexec_args[0] = argc; -+ kexec_args[1] = (unsigned long)kexec_argv; -+ kexec_args[2] = 0; -+ kexec_args[3] = 0; -+ -+ reboot_code_buffer = page_address(image->control_code_page); -+ reloc_delta = reboot_code_buffer - (char *)kexec_relocate_new_kernel; -+ -+ kexec_args[1] += reloc_delta; -+ for (i = 0; i < argc; i++) -+ kexec_argv[i] += reloc_delta; -+} -+ - static void kexec_image_info(const struct kimage *kimage) - { - unsigned long i; -@@ -99,6 +191,18 @@ machine_kexec_prepare(struct kimage *kim - #endif - - kexec_image_info(kimage); -+ /* -+ * Whenever arguments passed from kexec-tools, Init the arguments as -+ * the original ones to try avoiding booting failure. -+ */ -+ -+ kexec_args[0] = fw_arg0; -+ kexec_args[1] = fw_arg1; -+ kexec_args[2] = fw_arg2; -+ kexec_args[3] = fw_arg3; -+ -+ machine_kexec_init_argv(kimage); -+ machine_kexec_parse_argv(kimage); - - if (_machine_kexec_prepare) - return _machine_kexec_prepare(kimage); -@@ -161,7 +265,7 @@ machine_crash_shutdown(struct pt_regs *r - void kexec_nonboot_cpu_jump(void) - { - local_flush_icache_range((unsigned long)relocated_kexec_smp_wait, -- reboot_code_buffer + relocate_new_kernel_size); -+ reboot_code_buffer + KEXEC_RELOCATE_NEW_KERNEL_SIZE); - - relocated_kexec_smp_wait(NULL); - } -@@ -199,7 +303,7 @@ void kexec_reboot(void) - * machine_kexec() CPU. - */ - local_flush_icache_range(reboot_code_buffer, -- reboot_code_buffer + relocate_new_kernel_size); -+ reboot_code_buffer + KEXEC_RELOCATE_NEW_KERNEL_SIZE); - - do_kexec = (void *)reboot_code_buffer; - do_kexec(); -@@ -212,10 +316,12 @@ machine_kexec(struct kimage *image) - unsigned long *ptr; - - reboot_code_buffer = -- (unsigned long)page_address(image->control_code_page); -+ (unsigned long)page_address(image->control_code_page); -+ pr_info("reboot_code_buffer = %p\n", (void *)reboot_code_buffer); - - kexec_start_address = - (unsigned long) phys_to_virt(image->start); -+ pr_info("kexec_start_address = %p\n", (void *)kexec_start_address); - - if (image->type == KEXEC_TYPE_DEFAULT) { - kexec_indirection_page = -@@ -223,9 +329,19 @@ machine_kexec(struct kimage *image) - } else { - kexec_indirection_page = (unsigned long)&image->head; - } -+ pr_info("kexec_indirection_page = %p\n", (void *)kexec_indirection_page); - -- memcpy((void*)reboot_code_buffer, relocate_new_kernel, -- relocate_new_kernel_size); -+ pr_info("Where is memcpy: %p\n", memcpy); -+ pr_info("kexec_relocate_new_kernel = %p, kexec_relocate_new_kernel_end = %p\n", -+ (void *)kexec_relocate_new_kernel, &kexec_relocate_new_kernel_end); -+ pr_info("Copy %lu bytes from %p to %p\n", KEXEC_RELOCATE_NEW_KERNEL_SIZE, -+ (void *)kexec_relocate_new_kernel, (void *)reboot_code_buffer); -+ memcpy((void*)reboot_code_buffer, kexec_relocate_new_kernel, -+ KEXEC_RELOCATE_NEW_KERNEL_SIZE); -+ -+ pr_info("Before _print_args().\n"); -+ machine_kexec_print_args(); -+ pr_info("Before eval loop.\n"); - - /* - * The generic kexec code builds a page list with physical -@@ -256,7 +372,7 @@ machine_kexec(struct kimage *image) - #ifdef CONFIG_SMP - /* All secondary cpus now may jump to kexec_wait cycle */ - relocated_kexec_smp_wait = reboot_code_buffer + -- (void *)(kexec_smp_wait - relocate_new_kernel); -+ (void *)(kexec_smp_wait - kexec_relocate_new_kernel); - smp_wmb(); - atomic_set(&kexec_ready_to_reboot, 1); - #endif ---- /dev/null -+++ b/arch/mips/kernel/machine_kexec.h -@@ -0,0 +1,20 @@ -+#ifndef _MACHINE_KEXEC_H -+#define _MACHINE_KEXEC_H -+ -+#ifndef __ASSEMBLY__ -+extern const unsigned char kexec_relocate_new_kernel[]; -+extern unsigned long kexec_relocate_new_kernel_end; -+extern unsigned long kexec_start_address; -+extern unsigned long kexec_indirection_page; -+ -+extern char kexec_argv_buf[]; -+extern char *kexec_argv[]; -+ -+#define KEXEC_RELOCATE_NEW_KERNEL_SIZE ((unsigned long)&kexec_relocate_new_kernel_end - (unsigned long)kexec_relocate_new_kernel) -+#endif /* !__ASSEMBLY__ */ -+ -+#define KEXEC_COMMAND_LINE_SIZE 256 -+#define KEXEC_ARGV_SIZE (KEXEC_COMMAND_LINE_SIZE / 16) -+#define KEXEC_MAX_ARGC (KEXEC_ARGV_SIZE / sizeof(long)) -+ -+#endif ---- a/arch/mips/kernel/relocate_kernel.S -+++ b/arch/mips/kernel/relocate_kernel.S -@@ -10,10 +10,12 @@ - #include - #include - #include -+#include "machine_kexec.h" - - #include - --LEAF(relocate_new_kernel) -+LEAF(kexec_relocate_new_kernel) -+ - PTR_L a0, arg0 - PTR_L a1, arg1 - PTR_L a2, arg2 -@@ -98,7 +100,7 @@ done: - #endif - /* jump to kexec_start_address */ - j s1 -- END(relocate_new_kernel) -+ END(kexec_relocate_new_kernel) - - #ifdef CONFIG_SMP - /* -@@ -181,9 +183,15 @@ kexec_indirection_page: - PTR_WD 0 - .size kexec_indirection_page, PTRSIZE - --relocate_new_kernel_end: -+kexec_argv_buf: -+ EXPORT(kexec_argv_buf) -+ .skip KEXEC_COMMAND_LINE_SIZE -+ .size kexec_argv_buf, KEXEC_COMMAND_LINE_SIZE -+ -+kexec_argv: -+ EXPORT(kexec_argv) -+ .skip KEXEC_ARGV_SIZE -+ .size kexec_argv, KEXEC_ARGV_SIZE - --relocate_new_kernel_size: -- EXPORT(relocate_new_kernel_size) -- PTR_WD relocate_new_kernel_end - relocate_new_kernel -- .size relocate_new_kernel_size, PTRSIZE -+kexec_relocate_new_kernel_end: -+ EXPORT(kexec_relocate_new_kernel_end) diff --git a/target/linux/generic/pending-5.18/332-arc-add-OWRTDTB-section.patch b/target/linux/generic/pending-5.18/332-arc-add-OWRTDTB-section.patch deleted file mode 100644 index 30158cf399b1f2..00000000000000 --- a/target/linux/generic/pending-5.18/332-arc-add-OWRTDTB-section.patch +++ /dev/null @@ -1,84 +0,0 @@ -From bb0c3b0175240bf152fd7c644821a0cf9f77c37c Mon Sep 17 00:00:00 2001 -From: Evgeniy Didin -Date: Fri, 15 Mar 2019 18:53:38 +0300 -Subject: [PATCH] arc add OWRTDTB section - -This change allows OpenWRT to patch resulting kernel binary with -external .dtb. - -That allows us to re-use exactky the same vmlinux on different boards -given its ARC core configurations match (at least cache line sizes etc). - -""patch-dtb" searches for ASCII "OWRTDTB:" strign and copies external -.dtb right after it, keeping the string in place. - -Signed-off-by: Eugeniy Paltsev -Signed-off-by: Alexey Brodkin -Signed-off-by: Evgeniy Didin ---- - arch/arc/kernel/head.S | 10 ++++++++++ - arch/arc/kernel/setup.c | 4 +++- - arch/arc/kernel/vmlinux.lds.S | 13 +++++++++++++ - 3 files changed, 26 insertions(+), 1 deletion(-) - ---- a/arch/arc/kernel/head.S -+++ b/arch/arc/kernel/head.S -@@ -88,6 +88,16 @@ - DSP_EARLY_INIT - .endm - -+ ; Here "patch-dtb" will embed external .dtb -+ ; Note "patch-dtb" searches for ASCII "OWRTDTB:" string -+ ; and pastes .dtb right after it, hense the string precedes -+ ; __image_dtb symbol. -+ .section .owrt, "aw",@progbits -+ .ascii "OWRTDTB:" -+ENTRY(__image_dtb) -+ .fill 0x4000 -+END(__image_dtb) -+ - .section .init.text, "ax",@progbits - - ;---------------------------------------------------------------- ---- a/arch/arc/kernel/setup.c -+++ b/arch/arc/kernel/setup.c -@@ -495,6 +495,8 @@ static inline bool uboot_arg_invalid(uns - /* We always pass 0 as magic from U-boot */ - #define UBOOT_MAGIC_VALUE 0 - -+extern struct boot_param_header __image_dtb; -+ - void __init handle_uboot_args(void) - { - bool use_embedded_dtb = true; -@@ -533,7 +535,7 @@ void __init handle_uboot_args(void) - ignore_uboot_args: - - if (use_embedded_dtb) { -- machine_desc = setup_machine_fdt(__dtb_start); -+ machine_desc = setup_machine_fdt(&__image_dtb); - if (!machine_desc) - panic("Embedded DT invalid\n"); - } ---- a/arch/arc/kernel/vmlinux.lds.S -+++ b/arch/arc/kernel/vmlinux.lds.S -@@ -27,6 +27,19 @@ SECTIONS - - . = CONFIG_LINUX_LINK_BASE; - -+ /* -+ * In OpenWRT we want to patch built binary embedding .dtb of choice. -+ * This is implemented with "patch-dtb" utility which searches for -+ * "OWRTDTB:" string in first 16k of image and if it is found -+ * copies .dtb right after mentioned string. -+ * -+ * Note: "OWRTDTB:" won't be overwritten with .dtb, .dtb will follow it. -+ */ -+ .owrt : { -+ *(.owrt) -+ . = ALIGN(PAGE_SIZE); -+ } -+ - _int_vec_base_lds = .; - .vector : { - *(.vector) diff --git a/target/linux/generic/pending-5.18/333-arc-enable-unaligned-access-in-kernel-mode.patch b/target/linux/generic/pending-5.18/333-arc-enable-unaligned-access-in-kernel-mode.patch deleted file mode 100644 index 1848a84cc4970f..00000000000000 --- a/target/linux/generic/pending-5.18/333-arc-enable-unaligned-access-in-kernel-mode.patch +++ /dev/null @@ -1,24 +0,0 @@ -From: Alexey Brodkin -Subject: arc: enable unaligned access in kernel mode - -This enables misaligned access handling even in kernel mode. -Some wireless drivers (ath9k-htc and mt7601u) use misaligned accesses -here and there and to cope with that without fixing stuff in the drivers -we're just gracefully handling it on ARC. - -Signed-off-by: Alexey Brodkin ---- - arch/arc/kernel/unaligned.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/arc/kernel/unaligned.c -+++ b/arch/arc/kernel/unaligned.c -@@ -202,7 +202,7 @@ int misaligned_fixup(unsigned long addre - char buf[TASK_COMM_LEN]; - - /* handle user mode only and only if enabled by sysadmin */ -- if (!user_mode(regs) || !unaligned_enabled) -+ if (!unaligned_enabled) - return 1; - - if (no_unaligned_warning) { diff --git a/target/linux/generic/pending-5.18/342-powerpc-Enable-kernel-XZ-compression-option-on-PPC_8.patch b/target/linux/generic/pending-5.18/342-powerpc-Enable-kernel-XZ-compression-option-on-PPC_8.patch deleted file mode 100644 index cb9f295288b9b5..00000000000000 --- a/target/linux/generic/pending-5.18/342-powerpc-Enable-kernel-XZ-compression-option-on-PPC_8.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 66770a004afe10df11d3902e16eaa0c2c39436bb Mon Sep 17 00:00:00 2001 -From: Pawel Dembicki -Date: Fri, 24 May 2019 17:56:19 +0200 -Subject: [PATCH] powerpc: Enable kernel XZ compression option on PPC_85xx - -Enable kernel XZ compression option on PPC_85xx. Tested with -simpleImage on TP-Link TL-WDR4900 (Freescale P1014 processor). - -Suggested-by: Christian Lamparter -Signed-off-by: Pawel Dembicki ---- - arch/powerpc/Kconfig | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/powerpc/Kconfig -+++ b/arch/powerpc/Kconfig -@@ -222,7 +222,7 @@ config PPC - select HAVE_KERNEL_GZIP - select HAVE_KERNEL_LZMA if DEFAULT_UIMAGE - select HAVE_KERNEL_LZO if DEFAULT_UIMAGE -- select HAVE_KERNEL_XZ if PPC_BOOK3S || 44x -+ select HAVE_KERNEL_XZ if PPC_BOOK3S || 44x || PPC_85xx - select HAVE_KPROBES - select HAVE_KPROBES_ON_FTRACE - select HAVE_KRETPROBES diff --git a/target/linux/generic/pending-5.18/400-mtd-mtdsplit-support.patch b/target/linux/generic/pending-5.18/400-mtd-mtdsplit-support.patch deleted file mode 100644 index c7799809963ea2..00000000000000 --- a/target/linux/generic/pending-5.18/400-mtd-mtdsplit-support.patch +++ /dev/null @@ -1,313 +0,0 @@ ---- a/drivers/mtd/Kconfig -+++ b/drivers/mtd/Kconfig -@@ -12,6 +12,25 @@ menuconfig MTD - - if MTD - -+menu "OpenWrt specific MTD options" -+ -+config MTD_ROOTFS_ROOT_DEV -+ bool "Automatically set 'rootfs' partition to be root filesystem" -+ default y -+ -+config MTD_SPLIT_FIRMWARE -+ bool "Automatically split firmware partition for kernel+rootfs" -+ default y -+ -+config MTD_SPLIT_FIRMWARE_NAME -+ string "Firmware partition name" -+ depends on MTD_SPLIT_FIRMWARE -+ default "firmware" -+ -+source "drivers/mtd/mtdsplit/Kconfig" -+ -+endmenu -+ - config MTD_TESTS - tristate "MTD tests support (DANGEROUS)" - depends on m ---- a/drivers/mtd/mtdpart.c -+++ b/drivers/mtd/mtdpart.c -@@ -15,10 +15,12 @@ - #include - #include - #include -+#include - #include - #include - - #include "mtdcore.h" -+#include "mtdsplit/mtdsplit.h" - - /* - * MTD methods which simply translate the effective address and pass through -@@ -235,6 +237,146 @@ static int mtd_add_partition_attrs(struc - return ret; - } - -+static DEFINE_SPINLOCK(part_parser_lock); -+static LIST_HEAD(part_parsers); -+ -+static struct mtd_part_parser *mtd_part_parser_get(const char *name) -+{ -+ struct mtd_part_parser *p, *ret = NULL; -+ -+ spin_lock(&part_parser_lock); -+ -+ list_for_each_entry(p, &part_parsers, list) -+ if (!strcmp(p->name, name) && try_module_get(p->owner)) { -+ ret = p; -+ break; -+ } -+ -+ spin_unlock(&part_parser_lock); -+ -+ return ret; -+} -+ -+static inline void mtd_part_parser_put(const struct mtd_part_parser *p) -+{ -+ module_put(p->owner); -+} -+ -+static struct mtd_part_parser * -+get_partition_parser_by_type(enum mtd_parser_type type, -+ struct mtd_part_parser *start) -+{ -+ struct mtd_part_parser *p, *ret = NULL; -+ -+ spin_lock(&part_parser_lock); -+ -+ p = list_prepare_entry(start, &part_parsers, list); -+ if (start) -+ mtd_part_parser_put(start); -+ -+ list_for_each_entry_continue(p, &part_parsers, list) { -+ if (p->type == type && try_module_get(p->owner)) { -+ ret = p; -+ break; -+ } -+ } -+ -+ spin_unlock(&part_parser_lock); -+ -+ return ret; -+} -+ -+static int parse_mtd_partitions_by_type(struct mtd_info *master, -+ enum mtd_parser_type type, -+ const struct mtd_partition **pparts, -+ struct mtd_part_parser_data *data) -+{ -+ struct mtd_part_parser *prev = NULL; -+ int ret = 0; -+ -+ while (1) { -+ struct mtd_part_parser *parser; -+ -+ parser = get_partition_parser_by_type(type, prev); -+ if (!parser) -+ break; -+ -+ ret = (*parser->parse_fn)(master, pparts, data); -+ -+ if (ret > 0) { -+ mtd_part_parser_put(parser); -+ printk(KERN_NOTICE -+ "%d %s partitions found on MTD device %s\n", -+ ret, parser->name, master->name); -+ break; -+ } -+ -+ prev = parser; -+ } -+ -+ return ret; -+} -+ -+static int -+run_parsers_by_type(struct mtd_info *child, enum mtd_parser_type type) -+{ -+ struct mtd_partition *parts; -+ int nr_parts; -+ int i; -+ -+ nr_parts = parse_mtd_partitions_by_type(child, type, (const struct mtd_partition **)&parts, -+ NULL); -+ if (nr_parts <= 0) -+ return nr_parts; -+ -+ if (WARN_ON(!parts)) -+ return 0; -+ -+ for (i = 0; i < nr_parts; i++) { -+ /* adjust partition offsets */ -+ parts[i].offset += child->part.offset; -+ -+ mtd_add_partition(child->parent, -+ parts[i].name, -+ parts[i].offset, -+ parts[i].size); -+ } -+ -+ kfree(parts); -+ -+ return nr_parts; -+} -+ -+#ifdef CONFIG_MTD_SPLIT_FIRMWARE_NAME -+#define SPLIT_FIRMWARE_NAME CONFIG_MTD_SPLIT_FIRMWARE_NAME -+#else -+#define SPLIT_FIRMWARE_NAME "unused" -+#endif -+ -+static void split_firmware(struct mtd_info *master, struct mtd_info *part) -+{ -+ run_parsers_by_type(part, MTD_PARSER_TYPE_FIRMWARE); -+} -+ -+static void mtd_partition_split(struct mtd_info *master, struct mtd_info *part) -+{ -+ static int rootfs_found = 0; -+ -+ if (rootfs_found) -+ return; -+ -+ if (!strcmp(part->name, "rootfs")) { -+ run_parsers_by_type(part, MTD_PARSER_TYPE_ROOTFS); -+ -+ rootfs_found = 1; -+ } -+ -+ if (IS_ENABLED(CONFIG_MTD_SPLIT_FIRMWARE) && -+ !strcmp(part->name, SPLIT_FIRMWARE_NAME) && -+ !of_find_property(mtd_get_of_node(part), "compatible", NULL)) -+ split_firmware(master, part); -+} -+ - int mtd_add_partition(struct mtd_info *parent, const char *name, - long long offset, long long length) - { -@@ -273,6 +415,7 @@ int mtd_add_partition(struct mtd_info *p - if (ret) - goto err_remove_part; - -+ mtd_partition_split(parent, child); - mtd_add_partition_attrs(child); - - return 0; -@@ -421,6 +564,7 @@ int add_mtd_partitions(struct mtd_info * - goto err_del_partitions; - } - -+ mtd_partition_split(master, child); - mtd_add_partition_attrs(child); - - /* Look for subpartitions */ -@@ -437,31 +581,6 @@ err_del_partitions: - return ret; - } - --static DEFINE_SPINLOCK(part_parser_lock); --static LIST_HEAD(part_parsers); -- --static struct mtd_part_parser *mtd_part_parser_get(const char *name) --{ -- struct mtd_part_parser *p, *ret = NULL; -- -- spin_lock(&part_parser_lock); -- -- list_for_each_entry(p, &part_parsers, list) -- if (!strcmp(p->name, name) && try_module_get(p->owner)) { -- ret = p; -- break; -- } -- -- spin_unlock(&part_parser_lock); -- -- return ret; --} -- --static inline void mtd_part_parser_put(const struct mtd_part_parser *p) --{ -- module_put(p->owner); --} -- - /* - * Many partition parsers just expected the core to kfree() all their data in - * one chunk. Do that by default. ---- a/include/linux/mtd/partitions.h -+++ b/include/linux/mtd/partitions.h -@@ -75,6 +75,12 @@ struct mtd_part_parser_data { - * Functions dealing with the various ways of partitioning the space - */ - -+enum mtd_parser_type { -+ MTD_PARSER_TYPE_DEVICE = 0, -+ MTD_PARSER_TYPE_ROOTFS, -+ MTD_PARSER_TYPE_FIRMWARE, -+}; -+ - struct mtd_part_parser { - struct list_head list; - struct module *owner; -@@ -83,6 +89,7 @@ struct mtd_part_parser { - int (*parse_fn)(struct mtd_info *, const struct mtd_partition **, - struct mtd_part_parser_data *); - void (*cleanup)(const struct mtd_partition *pparts, int nr_parts); -+ enum mtd_parser_type type; - }; - - /* Container for passing around a set of parsed partitions */ ---- a/drivers/mtd/Makefile -+++ b/drivers/mtd/Makefile -@@ -9,6 +9,8 @@ mtd-y := mtdcore.o mtdsuper.o mtdconc - - obj-y += parsers/ - -+obj-$(CONFIG_MTD_SPLIT) += mtdsplit/ -+ - # 'Users' - code which presents functionality to userspace. - obj-$(CONFIG_MTD_BLKDEVS) += mtd_blkdevs.o - obj-$(CONFIG_MTD_BLOCK) += mtdblock.o ---- a/include/linux/mtd/mtd.h -+++ b/include/linux/mtd/mtd.h -@@ -608,6 +608,24 @@ static inline void mtd_align_erase_req(s - req->len += mtd->erasesize - mod; - } - -+static inline uint64_t mtd_roundup_to_eb(uint64_t sz, struct mtd_info *mtd) -+{ -+ if (mtd_mod_by_eb(sz, mtd) == 0) -+ return sz; -+ -+ /* Round up to next erase block */ -+ return (mtd_div_by_eb(sz, mtd) + 1) * mtd->erasesize; -+} -+ -+static inline uint64_t mtd_rounddown_to_eb(uint64_t sz, struct mtd_info *mtd) -+{ -+ if (mtd_mod_by_eb(sz, mtd) == 0) -+ return sz; -+ -+ /* Round down to the start of the current erase block */ -+ return (mtd_div_by_eb(sz, mtd)) * mtd->erasesize; -+} -+ - static inline uint32_t mtd_div_by_ws(uint64_t sz, struct mtd_info *mtd) - { - if (mtd->writesize_shift) -@@ -680,6 +698,13 @@ extern void __put_mtd_device(struct mtd_ - extern struct mtd_info *get_mtd_device_nm(const char *name); - extern void put_mtd_device(struct mtd_info *mtd); - -+static inline uint64_t mtdpart_get_offset(const struct mtd_info *mtd) -+{ -+ if (!mtd_is_partition(mtd)) -+ return 0; -+ -+ return mtd->part.offset; -+} - - struct mtd_notifier { - void (*add)(struct mtd_info *mtd); diff --git a/target/linux/generic/pending-5.18/402-mtd-spi-nor-write-support-for-minor-aligned-partitions.patch b/target/linux/generic/pending-5.18/402-mtd-spi-nor-write-support-for-minor-aligned-partitions.patch deleted file mode 100644 index 5c3794e1a46d77..00000000000000 --- a/target/linux/generic/pending-5.18/402-mtd-spi-nor-write-support-for-minor-aligned-partitions.patch +++ /dev/null @@ -1,389 +0,0 @@ -From patchwork Tue Jun 8 04:07:19 2021 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: John Thomson -X-Patchwork-Id: 1489105 -X-Patchwork-Delegate: tudor.ambarus@gmail.com -Return-Path: - -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=none (no SPF record) smtp.mailfrom=lists.infradead.org - (client-ip=2607:7c80:54:e::133; helo=bombadil.infradead.org; - envelope-from=linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; 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Tue, - 8 Jun 2021 00:07:35 -0400 (EDT) -From: John Thomson -To: Miquel Raynal , - Richard Weinberger , Vignesh Raghavendra , - Tudor Ambarus , - Michael Walle , Pratyush Yadav , - linux-mtd@lists.infradead.org -Cc: linux-kernel@vger.kernel.org, - John Thomson , - kernel test robot , Dan Carpenter -Subject: [PATCH] mtd: spi-nor: write support for minor aligned partitions -Date: Tue, 8 Jun 2021 14:07:19 +1000 -Message-Id: <20210608040719.14431-1-git@johnthomson.fastmail.com.au> -X-Mailer: git-send-email 2.31.1 -MIME-Version: 1.0 -X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 -X-CRM114-CacheID: sfid-20210607_210745_712053_67A7D864 -X-CRM114-Status: GOOD ( 26.99 ) -X-Spam-Score: -0.8 (/) -X-Spam-Report: Spam detection software, - running on the system "bombadil.infradead.org", - has NOT identified this incoming email as spam. The original - message has been attached to this so you can view it or label - similar future email. If you have any questions, see - the administrator of that system for details. - Content preview: Do not prevent writing to mtd partitions where a partition - boundary sits on a minor erasesize boundary. This addresses a FIXME that - has been present since the start of the linux git history: /* Doesn' [...] - Content analysis details: (-0.8 points, 5.0 required) - pts rule name description - ---- ---------------------- - -------------------------------------------------- - -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at https://www.dnswl.org/, - low trust [66.111.4.221 listed in list.dnswl.org] - -0.0 SPF_PASS SPF: sender matches SPF record - -0.0 SPF_HELO_PASS SPF: HELO matches SPF record - 0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) - [66.111.4.221 listed in wl.mailspike.net] - -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature - 0.1 DKIM_SIGNED Message has a DKIM or DK signature, - not necessarily - valid - -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from - envelope-from domain - 0.0 RCVD_IN_MSPIKE_WL Mailspike good senders -X-BeenThere: linux-mtd@lists.infradead.org -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: Linux MTD discussion mailing list -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Sender: "linux-mtd" -Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org - -Do not prevent writing to mtd partitions where a partition boundary sits -on a minor erasesize boundary. -This addresses a FIXME that has been present since the start of the -linux git history: -/* Doesn't start on a boundary of major erase size */ -/* FIXME: Let it be writable if it is on a boundary of - * _minor_ erase size though */ - -Allow a uniform erase region spi-nor device to be configured -to use the non-uniform erase regions code path for an erase with: -CONFIG_MTD_SPI_NOR_USE_VARIABLE_ERASE=y - -On supporting hardware (SECT_4K: majority of current SPI-NOR device) -provide the facility for an erase to use the least number -of SPI-NOR operations, as well as access to 4K erase without -requiring CONFIG_MTD_SPI_NOR_USE_4K_SECTORS - -Introduce erasesize_minor to the mtd struct, -the smallest erasesize supported by the device - -On existing devices, this is useful where write support is wanted -for data on a 4K partition, such as some u-boot-env partitions, -or RouterBoot soft_config, while still netting the performance -benefits of using 64K sectors - -Performance: -time mtd erase firmware -OpenWrt 5.10 ramips MT7621 w25q128jv 0xfc0000 partition length - -Without this patch -MTD_SPI_NOR_USE_4K_SECTORS=y |n -real 2m 11.66s |0m 50.86s -user 0m 0.00s |0m 0.00s -sys 1m 56.20s |0m 50.80s - -With this patch -MTD_SPI_NOR_USE_VARIABLE_ERASE=n|y |4K_SECTORS=y -real 0m 51.68s |0m 50.85s |2m 12.89s -user 0m 0.00s |0m 0.00s |0m 0.01s -sys 0m 46.94s |0m 50.38s |2m 12.46s - -Signed-off-by: John Thomson ---- -Have not tested on variable erase regions device. - -checkpatch does not like the printk(KERN_WARNING -these should be changed separately beforehand? - -Changes RFC -> v1: -Fix uninitialized variable smatch warning -Reported-by: kernel test robot -Reported-by: Dan Carpenter ---- - drivers/mtd/mtdpart.c | 52 ++++++++++++++++++++++++++++--------- - drivers/mtd/spi-nor/Kconfig | 10 +++++++ - drivers/mtd/spi-nor/core.c | 10 +++++-- - include/linux/mtd/mtd.h | 2 ++ - 4 files changed, 60 insertions(+), 14 deletions(-) - ---- a/drivers/mtd/mtdpart.c -+++ b/drivers/mtd/mtdpart.c -@@ -40,10 +40,11 @@ static struct mtd_info *allocate_partiti - struct mtd_info *master = mtd_get_master(parent); - int wr_alignment = (parent->flags & MTD_NO_ERASE) ? - master->writesize : master->erasesize; -+ int wr_alignment_minor = 0; - u64 parent_size = mtd_is_partition(parent) ? - parent->part.size : parent->size; - struct mtd_info *child; -- u32 remainder; -+ u32 remainder, remainder_minor; - char *name; - u64 tmp; - -@@ -145,6 +146,7 @@ static struct mtd_info *allocate_partiti - int i, max = parent->numeraseregions; - u64 end = child->part.offset + child->part.size; - struct mtd_erase_region_info *regions = parent->eraseregions; -+ uint32_t erasesize_minor = child->erasesize; - - /* Find the first erase regions which is part of this - * partition. */ -@@ -155,15 +157,24 @@ static struct mtd_info *allocate_partiti - if (i > 0) - i--; - -- /* Pick biggest erasesize */ - for (; i < max && regions[i].offset < end; i++) { -+ /* Pick biggest erasesize */ - if (child->erasesize < regions[i].erasesize) - child->erasesize = regions[i].erasesize; -+ /* Pick smallest non-zero erasesize */ -+ if ((erasesize_minor > regions[i].erasesize) && (regions[i].erasesize > 0)) -+ erasesize_minor = regions[i].erasesize; - } -+ -+ if (erasesize_minor < child->erasesize) -+ child->erasesize_minor = erasesize_minor; -+ - BUG_ON(child->erasesize == 0); - } else { - /* Single erase size */ - child->erasesize = master->erasesize; -+ if (master->erasesize_minor) -+ child->erasesize_minor = master->erasesize_minor; - } - - /* -@@ -171,26 +182,43 @@ static struct mtd_info *allocate_partiti - * exposes several regions with different erasesize. Adjust - * wr_alignment accordingly. - */ -- if (!(child->flags & MTD_NO_ERASE)) -+ if (!(child->flags & MTD_NO_ERASE)) { - wr_alignment = child->erasesize; -+ if (IS_ENABLED(CONFIG_MTD_SPI_NOR_USE_VARIABLE_ERASE) && child->erasesize_minor) -+ wr_alignment_minor = child->erasesize_minor; -+ } - - tmp = mtd_get_master_ofs(child, 0); - remainder = do_div(tmp, wr_alignment); - if ((child->flags & MTD_WRITEABLE) && remainder) { -- /* Doesn't start on a boundary of major erase size */ -- /* FIXME: Let it be writable if it is on a boundary of -- * _minor_ erase size though */ -- child->flags &= ~MTD_WRITEABLE; -- printk(KERN_WARNING"mtd: partition \"%s\" doesn't start on an erase/write block boundary -- force read-only\n", -- part->name); -+ if (wr_alignment_minor) { -+ tmp = mtd_get_master_ofs(child, 0); -+ remainder_minor = do_div(tmp, wr_alignment_minor); -+ if (remainder_minor == 0) -+ child->erasesize = child->erasesize_minor; -+ } -+ -+ if ((!wr_alignment_minor) || (wr_alignment_minor && remainder_minor != 0)) { -+ child->flags &= ~MTD_WRITEABLE; -+ printk(KERN_WARNING"mtd: partition \"%s\" doesn't start on an erase/write block boundary -- force read-only\n", -+ part->name); -+ } - } - - tmp = mtd_get_master_ofs(child, 0) + child->part.size; - remainder = do_div(tmp, wr_alignment); - if ((child->flags & MTD_WRITEABLE) && remainder) { -- child->flags &= ~MTD_WRITEABLE; -- printk(KERN_WARNING"mtd: partition \"%s\" doesn't end on an erase/write block -- force read-only\n", -- part->name); -+ if (wr_alignment_minor) { -+ tmp = mtd_get_master_ofs(child, 0) + child->part.size; -+ remainder_minor = do_div(tmp, wr_alignment_minor); -+ if (remainder_minor == 0) -+ child->erasesize = child->erasesize_minor; -+ } -+ if ((!wr_alignment_minor) || (wr_alignment_minor && remainder_minor != 0)) { -+ child->flags &= ~MTD_WRITEABLE; -+ printk(KERN_WARNING"mtd: partition \"%s\" doesn't end on an erase/write block -- force read-only\n", -+ part->name); -+ } - } - - child->size = child->part.size; ---- a/drivers/mtd/spi-nor/Kconfig -+++ b/drivers/mtd/spi-nor/Kconfig -@@ -10,6 +10,16 @@ menuconfig MTD_SPI_NOR - - if MTD_SPI_NOR - -+config MTD_SPI_NOR_USE_VARIABLE_ERASE -+ bool "Disable uniform_erase to allow use of all hardware supported erasesizes" -+ depends on !MTD_SPI_NOR_USE_4K_SECTORS -+ default n -+ help -+ Allow mixed use of all hardware supported erasesizes, -+ by forcing spi_nor to use the multiple eraseregions code path. -+ For example: A 68K erase will use one 64K erase, and one 4K erase -+ on supporting hardware. -+ - config MTD_SPI_NOR_USE_4K_SECTORS - bool "Use small 4096 B erase sectors" - default y ---- a/drivers/mtd/spi-nor/core.c -+++ b/drivers/mtd/spi-nor/core.c -@@ -1052,6 +1052,8 @@ static u8 spi_nor_convert_3to4_erase(u8 - - static bool spi_nor_has_uniform_erase(const struct spi_nor *nor) - { -+ if (IS_ENABLED(CONFIG_MTD_SPI_NOR_USE_VARIABLE_ERASE)) -+ return false; - return !!nor->params->erase_map.uniform_erase_type; - } - -@@ -2169,6 +2171,7 @@ static int spi_nor_select_erase(struct s - { - struct spi_nor_erase_map *map = &nor->params->erase_map; - const struct spi_nor_erase_type *erase = NULL; -+ const struct spi_nor_erase_type *erase_minor = NULL; - struct mtd_info *mtd = &nor->mtd; - u32 wanted_size = nor->info->sector_size; - int i; -@@ -2201,8 +2204,9 @@ static int spi_nor_select_erase(struct s - */ - for (i = SNOR_ERASE_TYPE_MAX - 1; i >= 0; i--) { - if (map->erase_type[i].size) { -- erase = &map->erase_type[i]; -- break; -+ if (!erase) -+ erase = &map->erase_type[i]; -+ erase_minor = &map->erase_type[i]; - } - } - -@@ -2210,6 +2214,8 @@ static int spi_nor_select_erase(struct s - return -EINVAL; - - mtd->erasesize = erase->size; -+ if (erase_minor && erase_minor->size < erase->size) -+ mtd->erasesize_minor = erase_minor->size; - return 0; - } - ---- a/include/linux/mtd/mtd.h -+++ b/include/linux/mtd/mtd.h -@@ -238,6 +238,8 @@ struct mtd_info { - * information below if they desire - */ - uint32_t erasesize; -+ /* "Minor" (smallest) erase size supported by the whole device */ -+ uint32_t erasesize_minor; - /* Minimal writable flash unit size. In case of NOR flash it is 1 (even - * though individual bits can be cleared), in case of NAND flash it is - * one NAND page (or half, or one-fourths of it), in case of ECC-ed NOR diff --git a/target/linux/generic/pending-5.18/419-mtd-redboot-add-of_match_table-with-DT-binding.patch b/target/linux/generic/pending-5.18/419-mtd-redboot-add-of_match_table-with-DT-binding.patch deleted file mode 100644 index 3d176f85635dee..00000000000000 --- a/target/linux/generic/pending-5.18/419-mtd-redboot-add-of_match_table-with-DT-binding.patch +++ /dev/null @@ -1,22 +0,0 @@ -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Subject: [PATCH] mtd: redboot: add of_match_table with DT binding -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This allows parsing RedBoot compatible partitions for properly described -flash device in DT. - -Signed-off-by: Rafał Miłecki ---- - ---- a/drivers/mtd/parsers/redboot.c -+++ b/drivers/mtd/parsers/redboot.c -@@ -304,6 +304,7 @@ nogood: - - static const struct of_device_id mtd_parser_redboot_of_match_table[] = { - { .compatible = "redboot-fis" }, -+ { .compatible = "ecoscentric,redboot-fis-partitions" }, - {}, - }; - MODULE_DEVICE_TABLE(of, mtd_parser_redboot_of_match_table); diff --git a/target/linux/generic/pending-5.18/420-mtd-redboot_space.patch b/target/linux/generic/pending-5.18/420-mtd-redboot_space.patch deleted file mode 100644 index fee193659334a1..00000000000000 --- a/target/linux/generic/pending-5.18/420-mtd-redboot_space.patch +++ /dev/null @@ -1,41 +0,0 @@ -From: Felix Fietkau -Subject: add patch for including unpartitioned space in the rootfs partition for redboot devices (if applicable) - -[john@phrozen.org: used by ixp and others] - -lede-commit: 394918851f84e4d00fa16eb900e7700e95091f00 -Signed-off-by: Felix Fietkau ---- - drivers/mtd/redboot.c | 19 +++++++++++++------ - 1 file changed, 13 insertions(+), 6 deletions(-) - ---- a/drivers/mtd/parsers/redboot.c -+++ b/drivers/mtd/parsers/redboot.c -@@ -277,14 +277,21 @@ nogood: - #endif - names += strlen(names) + 1; - --#ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED - if (fl->next && fl->img->flash_base + fl->img->size + master->erasesize <= fl->next->img->flash_base) { -- i++; -- parts[i].offset = parts[i - 1].size + parts[i - 1].offset; -- parts[i].size = fl->next->img->flash_base - parts[i].offset; -- parts[i].name = nullname; -- } -+ if (!strcmp(parts[i].name, "rootfs")) { -+ parts[i].size = fl->next->img->flash_base; -+ parts[i].size &= ~(master->erasesize - 1); -+ parts[i].size -= parts[i].offset; -+#ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED -+ nrparts--; -+ } else { -+ i++; -+ parts[i].offset = parts[i-1].size + parts[i-1].offset; -+ parts[i].size = fl->next->img->flash_base - parts[i].offset; -+ parts[i].name = nullname; - #endif -+ } -+ } - tmp_fl = fl; - fl = fl->next; - kfree(tmp_fl); diff --git a/target/linux/generic/pending-5.18/430-mtd-add-myloader-partition-parser.patch b/target/linux/generic/pending-5.18/430-mtd-add-myloader-partition-parser.patch deleted file mode 100644 index 0889c9a3434110..00000000000000 --- a/target/linux/generic/pending-5.18/430-mtd-add-myloader-partition-parser.patch +++ /dev/null @@ -1,229 +0,0 @@ -From: Florian Fainelli -Subject: Add myloader partition table parser - -[john@phozen.org: shoud be upstreamable] - -lede-commit: d8bf22859b51faa09d22c056fe221a45d2f7a3b8 -Signed-off-by: Florian Fainelli -[adjust for kernel 5.4, add myloader.c to patch] -Signed-off-by: Adrian Schmutzler - ---- a/drivers/mtd/parsers/Kconfig -+++ b/drivers/mtd/parsers/Kconfig -@@ -57,6 +57,22 @@ config MTD_CMDLINE_PARTS - - If unsure, say 'N'. - -+config MTD_MYLOADER_PARTS -+ tristate "MyLoader partition parsing" -+ depends on ADM5120 || ATH25 || ATH79 -+ help -+ MyLoader is a bootloader which allows the user to define partitions -+ in flash devices, by putting a table in the second erase block -+ on the device, similar to a partition table. This table gives the -+ offsets and lengths of the user defined partitions. -+ -+ If you need code which can detect and parse these tables, and -+ register MTD 'partitions' corresponding to each image detected, -+ enable this option. -+ -+ You will still need the parsing functions to be called by the driver -+ for your particular device. It won't happen automatically. -+ - config MTD_OF_PARTS - tristate "OpenFirmware (device tree) partitioning parser" - default y ---- a/drivers/mtd/parsers/Makefile -+++ b/drivers/mtd/parsers/Makefile -@@ -3,6 +3,7 @@ obj-$(CONFIG_MTD_AR7_PARTS) += ar7part. - obj-$(CONFIG_MTD_BCM47XX_PARTS) += bcm47xxpart.o - obj-$(CONFIG_MTD_BCM63XX_PARTS) += bcm63xxpart.o - obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o -+obj-$(CONFIG_MTD_MYLOADER_PARTS) += myloader.o - obj-$(CONFIG_MTD_OF_PARTS) += ofpart.o - ofpart-y += ofpart_core.o - ofpart-$(CONFIG_MTD_OF_PARTS_BCM4908) += ofpart_bcm4908.o ---- /dev/null -+++ b/drivers/mtd/parsers/myloader.c -@@ -0,0 +1,181 @@ -+/* -+ * Parse MyLoader-style flash partition tables and produce a Linux partition -+ * array to match. -+ * -+ * Copyright (C) 2007-2009 Gabor Juhos -+ * -+ * This file was based on drivers/mtd/redboot.c -+ * Author: Red Hat, Inc. - David Woodhouse -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define BLOCK_LEN_MIN 0x10000 -+#define PART_NAME_LEN 32 -+ -+struct part_data { -+ struct mylo_partition_table tab; -+ char names[MYLO_MAX_PARTITIONS][PART_NAME_LEN]; -+}; -+ -+static int myloader_parse_partitions(struct mtd_info *master, -+ const struct mtd_partition **pparts, -+ struct mtd_part_parser_data *data) -+{ -+ struct part_data *buf; -+ struct mylo_partition_table *tab; -+ struct mylo_partition *part; -+ struct mtd_partition *mtd_parts; -+ struct mtd_partition *mtd_part; -+ int num_parts; -+ int ret, i; -+ size_t retlen; -+ char *names; -+ unsigned long offset; -+ unsigned long blocklen; -+ -+ buf = vmalloc(sizeof(*buf)); -+ if (!buf) { -+ return -ENOMEM; -+ goto out; -+ } -+ tab = &buf->tab; -+ -+ blocklen = master->erasesize; -+ if (blocklen < BLOCK_LEN_MIN) -+ blocklen = BLOCK_LEN_MIN; -+ -+ offset = blocklen; -+ -+ /* Find the partition table */ -+ for (i = 0; i < 4; i++, offset += blocklen) { -+ printk(KERN_DEBUG "%s: searching for MyLoader partition table" -+ " at offset 0x%lx\n", master->name, offset); -+ -+ ret = mtd_read(master, offset, sizeof(*buf), &retlen, -+ (void *)buf); -+ if (ret) -+ goto out_free_buf; -+ -+ if (retlen != sizeof(*buf)) { -+ ret = -EIO; -+ goto out_free_buf; -+ } -+ -+ /* Check for Partition Table magic number */ -+ if (tab->magic == le32_to_cpu(MYLO_MAGIC_PARTITIONS)) -+ break; -+ -+ } -+ -+ if (tab->magic != le32_to_cpu(MYLO_MAGIC_PARTITIONS)) { -+ printk(KERN_DEBUG "%s: no MyLoader partition table found\n", -+ master->name); -+ ret = 0; -+ goto out_free_buf; -+ } -+ -+ /* The MyLoader and the Partition Table is always present */ -+ num_parts = 2; -+ -+ /* Detect number of used partitions */ -+ for (i = 0; i < MYLO_MAX_PARTITIONS; i++) { -+ part = &tab->partitions[i]; -+ -+ if (le16_to_cpu(part->type) == PARTITION_TYPE_FREE) -+ continue; -+ -+ num_parts++; -+ } -+ -+ mtd_parts = kzalloc((num_parts * sizeof(*mtd_part) + -+ num_parts * PART_NAME_LEN), GFP_KERNEL); -+ -+ if (!mtd_parts) { -+ ret = -ENOMEM; -+ goto out_free_buf; -+ } -+ -+ mtd_part = mtd_parts; -+ names = (char *)&mtd_parts[num_parts]; -+ -+ strncpy(names, "myloader", PART_NAME_LEN); -+ mtd_part->name = names; -+ mtd_part->offset = 0; -+ mtd_part->size = offset; -+ mtd_part->mask_flags = MTD_WRITEABLE; -+ mtd_part++; -+ names += PART_NAME_LEN; -+ -+ strncpy(names, "partition_table", PART_NAME_LEN); -+ mtd_part->name = names; -+ mtd_part->offset = offset; -+ mtd_part->size = blocklen; -+ mtd_part->mask_flags = MTD_WRITEABLE; -+ mtd_part++; -+ names += PART_NAME_LEN; -+ -+ for (i = 0; i < MYLO_MAX_PARTITIONS; i++) { -+ part = &tab->partitions[i]; -+ -+ if (le16_to_cpu(part->type) == PARTITION_TYPE_FREE) -+ continue; -+ -+ if ((buf->names[i][0]) && (buf->names[i][0] != '\xff')) -+ strncpy(names, buf->names[i], PART_NAME_LEN); -+ else -+ snprintf(names, PART_NAME_LEN, "partition%d", i); -+ -+ mtd_part->offset = le32_to_cpu(part->addr); -+ mtd_part->size = le32_to_cpu(part->size); -+ mtd_part->name = names; -+ mtd_part++; -+ names += PART_NAME_LEN; -+ } -+ -+ *pparts = mtd_parts; -+ ret = num_parts; -+ -+ out_free_buf: -+ vfree(buf); -+ out: -+ return ret; -+} -+ -+static struct mtd_part_parser myloader_mtd_parser = { -+ .owner = THIS_MODULE, -+ .parse_fn = myloader_parse_partitions, -+ .name = "MyLoader", -+}; -+ -+static int __init myloader_mtd_parser_init(void) -+{ -+ register_mtd_parser(&myloader_mtd_parser); -+ -+ return 0; -+} -+ -+static void __exit myloader_mtd_parser_exit(void) -+{ -+ deregister_mtd_parser(&myloader_mtd_parser); -+} -+ -+module_init(myloader_mtd_parser_init); -+module_exit(myloader_mtd_parser_exit); -+ -+MODULE_AUTHOR("Gabor Juhos "); -+MODULE_DESCRIPTION("Parsing code for MyLoader partition tables"); -+MODULE_LICENSE("GPL v2"); diff --git a/target/linux/generic/pending-5.18/431-mtd-bcm47xxpart-check-for-bad-blocks-when-calculatin.patch b/target/linux/generic/pending-5.18/431-mtd-bcm47xxpart-check-for-bad-blocks-when-calculatin.patch deleted file mode 100644 index bcea45d009bb11..00000000000000 --- a/target/linux/generic/pending-5.18/431-mtd-bcm47xxpart-check-for-bad-blocks-when-calculatin.patch +++ /dev/null @@ -1,68 +0,0 @@ -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Subject: [PATCH] mtd: bcm47xxpart: check for bad blocks when calculating offsets - -Signed-off-by: Rafał Miłecki ---- - ---- a/drivers/mtd/parsers/parser_trx.c -+++ b/drivers/mtd/parsers/parser_trx.c -@@ -25,6 +25,33 @@ struct trx_header { - uint32_t offset[3]; - } __packed; - -+/* -+ * Calculate real end offset (address) for a given amount of data. It checks -+ * all blocks skipping bad ones. -+ */ -+static size_t parser_trx_real_offset(struct mtd_info *mtd, size_t bytes) -+{ -+ size_t real_offset = 0; -+ -+ if (mtd_block_isbad(mtd, real_offset)) -+ pr_warn("Base offset shouldn't be at bad block"); -+ -+ while (bytes >= mtd->erasesize) { -+ bytes -= mtd->erasesize; -+ real_offset += mtd->erasesize; -+ while (mtd_block_isbad(mtd, real_offset)) { -+ real_offset += mtd->erasesize; -+ -+ if (real_offset >= mtd->size) -+ return real_offset - mtd->erasesize; -+ } -+ } -+ -+ real_offset += bytes; -+ -+ return real_offset; -+} -+ - static const char *parser_trx_data_part_name(struct mtd_info *master, - size_t offset) - { -@@ -86,21 +113,21 @@ static int parser_trx_parse(struct mtd_i - if (trx.offset[2]) { - part = &parts[curr_part++]; - part->name = "loader"; -- part->offset = trx.offset[i]; -+ part->offset = parser_trx_real_offset(mtd, trx.offset[i]); - i++; - } - - if (trx.offset[i]) { - part = &parts[curr_part++]; - part->name = "linux"; -- part->offset = trx.offset[i]; -+ part->offset = parser_trx_real_offset(mtd, trx.offset[i]); - i++; - } - - if (trx.offset[i]) { - part = &parts[curr_part++]; -- part->name = parser_trx_data_part_name(mtd, trx.offset[i]); -- part->offset = trx.offset[i]; -+ part->offset = parser_trx_real_offset(mtd, trx.offset[i]); -+ part->name = parser_trx_data_part_name(mtd, part->offset); - i++; - } - diff --git a/target/linux/generic/pending-5.18/432-mtd-bcm47xxpart-detect-T_Meter-partition.patch b/target/linux/generic/pending-5.18/432-mtd-bcm47xxpart-detect-T_Meter-partition.patch deleted file mode 100644 index 852654d924a8ce..00000000000000 --- a/target/linux/generic/pending-5.18/432-mtd-bcm47xxpart-detect-T_Meter-partition.patch +++ /dev/null @@ -1,37 +0,0 @@ -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Subject: mtd: bcm47xxpart: detect T_Meter partition - -It can be found on many Netgear devices. It consists of many 0x30 blocks -starting with 4D 54. - -Signed-off-by: Rafał Miłecki ---- - drivers/mtd/bcm47xxpart.c | 10 ++++++++++ - 1 file changed, 10 insertions(+) - ---- a/drivers/mtd/parsers/bcm47xxpart.c -+++ b/drivers/mtd/parsers/bcm47xxpart.c -@@ -35,6 +35,7 @@ - #define NVRAM_HEADER 0x48534C46 /* FLSH */ - #define POT_MAGIC1 0x54544f50 /* POTT */ - #define POT_MAGIC2 0x504f /* OP */ -+#define T_METER_MAGIC 0x4D540000 /* MT */ - #define ML_MAGIC1 0x39685a42 - #define ML_MAGIC2 0x26594131 - #define TRX_MAGIC 0x30524448 -@@ -178,6 +179,15 @@ static int bcm47xxpart_parse(struct mtd_ - MTD_WRITEABLE); - continue; - } -+ -+ /* T_Meter */ -+ if ((le32_to_cpu(buf[0x000 / 4]) & 0xFFFF0000) == T_METER_MAGIC && -+ (le32_to_cpu(buf[0x030 / 4]) & 0xFFFF0000) == T_METER_MAGIC && -+ (le32_to_cpu(buf[0x060 / 4]) & 0xFFFF0000) == T_METER_MAGIC) { -+ bcm47xxpart_add_part(&parts[curr_part++], "T_Meter", offset, -+ MTD_WRITEABLE); -+ continue; -+ } - - /* TRX */ - if (buf[0x000 / 4] == TRX_MAGIC) { diff --git a/target/linux/generic/pending-5.18/435-mtd-add-routerbootpart-parser-config.patch b/target/linux/generic/pending-5.18/435-mtd-add-routerbootpart-parser-config.patch deleted file mode 100644 index 721a4d3a5dd79e..00000000000000 --- a/target/linux/generic/pending-5.18/435-mtd-add-routerbootpart-parser-config.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 4437e01fb6bca63fccdba5d6c44888b0935885c2 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Thibaut=20VAR=C3=88NE?= -Date: Tue, 24 Mar 2020 11:45:07 +0100 -Subject: [PATCH] generic: routerboot partition build bits (5.4) -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This patch adds routerbootpart kernel build bits - -Signed-off-by: Thibaut VARÈNE ---- - drivers/mtd/parsers/Kconfig | 9 +++++++++ - drivers/mtd/parsers/Makefile | 1 + - 2 files changed, 10 insertions(+) - ---- a/drivers/mtd/parsers/Kconfig -+++ b/drivers/mtd/parsers/Kconfig -@@ -202,3 +202,12 @@ config MTD_QCOMSMEM_PARTS - help - This provides support for parsing partitions from Shared Memory (SMEM) - for NAND and SPI flash on Qualcomm platforms. -+ -+config MTD_ROUTERBOOT_PARTS -+ tristate "RouterBoot flash partition parser" -+ depends on MTD && OF -+ help -+ MikroTik RouterBoot is implemented as a multi segment system on the -+ flash, some of which are fixed and some of which are located at -+ variable offsets. This parser handles both cases via properly -+ formatted DTS. ---- a/drivers/mtd/parsers/Makefile -+++ b/drivers/mtd/parsers/Makefile -@@ -14,3 +14,4 @@ obj-$(CONFIG_MTD_PARSER_TRX) += parser_ - obj-$(CONFIG_MTD_SHARPSL_PARTS) += sharpslpart.o - obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o - obj-$(CONFIG_MTD_QCOMSMEM_PARTS) += qcomsmempart.o -+obj-$(CONFIG_MTD_ROUTERBOOT_PARTS) += routerbootpart.o diff --git a/target/linux/generic/pending-5.18/460-mtd-cfi_cmdset_0002-no-erase_suspend.patch b/target/linux/generic/pending-5.18/460-mtd-cfi_cmdset_0002-no-erase_suspend.patch deleted file mode 100644 index 0be74a59777a79..00000000000000 --- a/target/linux/generic/pending-5.18/460-mtd-cfi_cmdset_0002-no-erase_suspend.patch +++ /dev/null @@ -1,25 +0,0 @@ -From: Felix Fietkau -Subject: kernel: disable cfi cmdset 0002 erase suspend - -on some platforms, erase suspend leads to data corruption and lockups when write -ops collide with erase ops. this has been observed on the buffalo wzr-hp-g300nh. -rather than play whack-a-mole with a hard to reproduce issue on a variety of devices, -simply disable erase suspend, as it will usually not produce any useful gain on -the small filesystems used on embedded hardware. - -Signed-off-by: Felix Fietkau ---- - drivers/mtd/chips/cfi_cmdset_0002.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/mtd/chips/cfi_cmdset_0002.c -+++ b/drivers/mtd/chips/cfi_cmdset_0002.c -@@ -907,7 +907,7 @@ static int get_chip(struct map_info *map - return 0; - - case FL_ERASING: -- if (!cfip || !(cfip->EraseSuspend & (0x1|0x2)) || -+ if (1 /* no suspend */ || !cfip || !(cfip->EraseSuspend & (0x1|0x2)) || - !(mode == FL_READY || mode == FL_POINT || - (mode == FL_WRITING && (cfip->EraseSuspend & 0x2)))) - goto sleep; diff --git a/target/linux/generic/pending-5.18/461-mtd-cfi_cmdset_0002-add-buffer-write-cmd-timeout.patch b/target/linux/generic/pending-5.18/461-mtd-cfi_cmdset_0002-add-buffer-write-cmd-timeout.patch deleted file mode 100644 index ca56de82711711..00000000000000 --- a/target/linux/generic/pending-5.18/461-mtd-cfi_cmdset_0002-add-buffer-write-cmd-timeout.patch +++ /dev/null @@ -1,17 +0,0 @@ -From: George Kashperko -Subject: Issue map read after Write Buffer Load command to ensure chip is ready to receive data. - -Signed-off-by: George Kashperko ---- - drivers/mtd/chips/cfi_cmdset_0002.c | 1 + - 1 file changed, 1 insertion(+) ---- a/drivers/mtd/chips/cfi_cmdset_0002.c -+++ b/drivers/mtd/chips/cfi_cmdset_0002.c -@@ -2051,6 +2051,7 @@ static int __xipram do_write_buffer(stru - - /* Write Buffer Load */ - map_write(map, CMD(0x25), cmd_adr); -+ (void) map_read(map, cmd_adr); - - chip->state = FL_WRITING_TO_BUFFER; - diff --git a/target/linux/generic/pending-5.18/465-m25p80-mx-disable-software-protection.patch b/target/linux/generic/pending-5.18/465-m25p80-mx-disable-software-protection.patch deleted file mode 100644 index 1e280773381cc1..00000000000000 --- a/target/linux/generic/pending-5.18/465-m25p80-mx-disable-software-protection.patch +++ /dev/null @@ -1,18 +0,0 @@ -From: Felix Fietkau -Subject: Disable software protection bits for Macronix flashes. - -Signed-off-by: Felix Fietkau ---- - drivers/mtd/spi-nor/spi-nor.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/drivers/mtd/spi-nor/macronix.c -+++ b/drivers/mtd/spi-nor/macronix.c -@@ -106,6 +106,7 @@ static void macronix_nor_default_init(st - { - nor->params->quad_enable = spi_nor_sr1_bit6_quad_enable; - nor->params->set_4byte_addr_mode = spi_nor_set_4byte_addr_mode; -+ nor->flags |= SNOR_F_HAS_LOCK; - } - - static const struct spi_nor_fixups macronix_nor_fixups = { diff --git a/target/linux/generic/pending-5.18/490-ubi-auto-attach-mtd-device-named-ubi-or-data-on-boot.patch b/target/linux/generic/pending-5.18/490-ubi-auto-attach-mtd-device-named-ubi-or-data-on-boot.patch deleted file mode 100644 index b120548d2e77f9..00000000000000 --- a/target/linux/generic/pending-5.18/490-ubi-auto-attach-mtd-device-named-ubi-or-data-on-boot.patch +++ /dev/null @@ -1,97 +0,0 @@ -From: Daniel Golle -Subject: ubi: auto-attach mtd device named "ubi" or "data" on boot - -Signed-off-by: Daniel Golle ---- - drivers/mtd/ubi/build.c | 36 ++++++++++++++++++++++++++++++++++++ - 1 file changed, 36 insertions(+) - ---- a/drivers/mtd/ubi/build.c -+++ b/drivers/mtd/ubi/build.c -@@ -1184,6 +1184,73 @@ static struct mtd_info * __init open_mtd - return mtd; - } - -+/* -+ * This function tries attaching mtd partitions named either "ubi" or "data" -+ * during boot. -+ */ -+static void __init ubi_auto_attach(void) -+{ -+ int err; -+ struct mtd_info *mtd; -+ loff_t offset = 0; -+ size_t len; -+ char magic[4]; -+ -+ /* try attaching mtd device named "ubi" or "data" */ -+ mtd = open_mtd_device("ubi"); -+ if (IS_ERR(mtd)) -+ mtd = open_mtd_device("data"); -+ -+ if (IS_ERR(mtd)) -+ return; -+ -+ /* get the first not bad block */ -+ if (mtd_can_have_bb(mtd)) -+ while (mtd_block_isbad(mtd, offset)) { -+ offset += mtd->erasesize; -+ -+ if (offset > mtd->size) { -+ pr_err("UBI error: Failed to find a non-bad " -+ "block on mtd%d\n", mtd->index); -+ goto cleanup; -+ } -+ } -+ -+ /* check if the read from flash was successful */ -+ err = mtd_read(mtd, offset, 4, &len, (void *) magic); -+ if ((err && !mtd_is_bitflip(err)) || len != 4) { -+ pr_err("UBI error: unable to read from mtd%d\n", mtd->index); -+ goto cleanup; -+ } -+ -+ /* check for a valid ubi magic */ -+ if (strncmp(magic, "UBI#", 4)) { -+ pr_err("UBI error: no valid UBI magic found inside mtd%d\n", mtd->index); -+ goto cleanup; -+ } -+ -+ /* don't auto-add media types where UBI doesn't makes sense */ -+ if (mtd->type != MTD_NANDFLASH && -+ mtd->type != MTD_NORFLASH && -+ mtd->type != MTD_DATAFLASH && -+ mtd->type != MTD_MLCNANDFLASH) -+ goto cleanup; -+ -+ mutex_lock(&ubi_devices_mutex); -+ pr_notice("UBI: auto-attach mtd%d\n", mtd->index); -+ err = ubi_attach_mtd_dev(mtd, UBI_DEV_NUM_AUTO, 0, 0); -+ mutex_unlock(&ubi_devices_mutex); -+ if (err < 0) { -+ pr_err("UBI error: cannot attach mtd%d\n", mtd->index); -+ goto cleanup; -+ } -+ -+ return; -+ -+cleanup: -+ put_mtd_device(mtd); -+} -+ - static int __init ubi_init(void) - { - int err, i, k; -@@ -1267,6 +1334,12 @@ static int __init ubi_init(void) - } - } - -+ /* auto-attach mtd devices only if built-in to the kernel and no ubi.mtd -+ * parameter was given */ -+ if (IS_ENABLED(CONFIG_MTD_ROOTFS_ROOT_DEV) && -+ !ubi_is_module() && !mtd_devs) -+ ubi_auto_attach(); -+ - err = ubiblock_init(); - if (err) { - pr_err("UBI error: block: cannot initialize, error %d\n", err); diff --git a/target/linux/generic/pending-5.18/491-ubi-auto-create-ubiblock-device-for-rootfs.patch b/target/linux/generic/pending-5.18/491-ubi-auto-create-ubiblock-device-for-rootfs.patch deleted file mode 100644 index 17e8d8bedb6c16..00000000000000 --- a/target/linux/generic/pending-5.18/491-ubi-auto-create-ubiblock-device-for-rootfs.patch +++ /dev/null @@ -1,69 +0,0 @@ -From: Daniel Golle -Subject: ubi: auto-create ubiblock device for rootfs - -Signed-off-by: Daniel Golle ---- - drivers/mtd/ubi/block.c | 42 ++++++++++++++++++++++++++++++++++++++++++ - 1 file changed, 42 insertions(+) - ---- a/drivers/mtd/ubi/block.c -+++ b/drivers/mtd/ubi/block.c -@@ -653,6 +653,47 @@ static void __init ubiblock_create_from_ - } - } - -+#define UBIFS_NODE_MAGIC 0x06101831 -+static inline int ubi_vol_is_ubifs(struct ubi_volume_desc *desc) -+{ -+ int ret; -+ uint32_t magic_of, magic; -+ ret = ubi_read(desc, 0, (char *)&magic_of, 0, 4); -+ if (ret) -+ return 0; -+ magic = le32_to_cpu(magic_of); -+ return magic == UBIFS_NODE_MAGIC; -+} -+ -+static void __init ubiblock_create_auto_rootfs(void) -+{ -+ int ubi_num, ret, is_ubifs; -+ struct ubi_volume_desc *desc; -+ struct ubi_volume_info vi; -+ -+ for (ubi_num = 0; ubi_num < UBI_MAX_DEVICES; ubi_num++) { -+ desc = ubi_open_volume_nm(ubi_num, "rootfs", UBI_READONLY); -+ if (IS_ERR(desc)) -+ desc = ubi_open_volume_nm(ubi_num, "fit", UBI_READONLY);; -+ -+ if (IS_ERR(desc)) -+ continue; -+ -+ ubi_get_volume_info(desc, &vi); -+ is_ubifs = ubi_vol_is_ubifs(desc); -+ ubi_close_volume(desc); -+ if (is_ubifs) -+ break; -+ -+ ret = ubiblock_create(&vi); -+ if (ret) -+ pr_err("UBI error: block: can't add '%s' volume, err=%d\n", -+ vi.name, ret); -+ /* always break if we get here */ -+ break; -+ } -+} -+ - static void ubiblock_remove_all(void) - { - struct ubiblock *next; -@@ -685,6 +726,10 @@ int __init ubiblock_init(void) - */ - ubiblock_create_from_param(); - -+ /* auto-attach "rootfs" volume if existing and non-ubifs */ -+ if (IS_ENABLED(CONFIG_MTD_ROOTFS_ROOT_DEV)) -+ ubiblock_create_auto_rootfs(); -+ - /* - * Block devices are only created upon user requests, so we ignore - * existing volumes. diff --git a/target/linux/generic/pending-5.18/492-try-auto-mounting-ubi0-rootfs-in-init-do_mounts.c.patch b/target/linux/generic/pending-5.18/492-try-auto-mounting-ubi0-rootfs-in-init-do_mounts.c.patch deleted file mode 100644 index 1db73cf1796831..00000000000000 --- a/target/linux/generic/pending-5.18/492-try-auto-mounting-ubi0-rootfs-in-init-do_mounts.c.patch +++ /dev/null @@ -1,52 +0,0 @@ -From: Daniel Golle -Subject: try auto-mounting ubi0:rootfs in init/do_mounts.c - -Signed-off-by: Daniel Golle ---- - init/do_mounts.c | 28 +++++++++++++++++++++++++++- - 1 file changed, 27 insertions(+), 1 deletion(-) - ---- a/init/do_mounts.c -+++ b/init/do_mounts.c -@@ -446,7 +446,28 @@ retry: - out: - put_page(page); - } -- -+ -+static int __init mount_ubi_rootfs(void) -+{ -+ int flags = MS_SILENT; -+ int err, tried = 0; -+ -+ while (tried < 2) { -+ err = do_mount_root("ubi0:rootfs", "ubifs", flags, \ -+ root_mount_data); -+ switch (err) { -+ case -EACCES: -+ flags |= MS_RDONLY; -+ tried++; -+ break; -+ default: -+ return err; -+ } -+ } -+ -+ return -EINVAL; -+} -+ - #ifdef CONFIG_ROOT_NFS - - #define NFSROOT_TIMEOUT_MIN 5 -@@ -583,6 +604,11 @@ void __init mount_root(void) - if (mount_nodev_root() == 0) - return; - } -+ -+#ifdef CONFIG_MTD_ROOTFS_ROOT_DEV -+ if (!mount_ubi_rootfs()) -+ return; -+#endif - #ifdef CONFIG_BLOCK - { - int err = create_dev("/dev/root", ROOT_DEV); diff --git a/target/linux/generic/pending-5.18/493-ubi-set-ROOT_DEV-to-ubiblock-rootfs-if-unset.patch b/target/linux/generic/pending-5.18/493-ubi-set-ROOT_DEV-to-ubiblock-rootfs-if-unset.patch deleted file mode 100644 index e3493ef19ef8ca..00000000000000 --- a/target/linux/generic/pending-5.18/493-ubi-set-ROOT_DEV-to-ubiblock-rootfs-if-unset.patch +++ /dev/null @@ -1,34 +0,0 @@ -From: Daniel Golle -Subject: ubi: set ROOT_DEV to ubiblock "rootfs" if unset - -Signed-off-by: Daniel Golle ---- - drivers/mtd/ubi/block.c | 10 ++++++++++ - 1 file changed, 10 insertions(+) - ---- a/drivers/mtd/ubi/block.c -+++ b/drivers/mtd/ubi/block.c -@@ -42,6 +42,7 @@ - #include - #include - #include -+#include - - #include "ubi-media.h" - #include "ubi.h" -@@ -459,6 +460,15 @@ int ubiblock_create(struct ubi_volume_in - dev_info(disk_to_dev(dev->gd), "created from ubi%d:%d(%s)", - dev->ubi_num, dev->vol_id, vi->name); - mutex_unlock(&devices_mutex); -+ -+ if (!strcmp(vi->name, "rootfs") && -+ IS_ENABLED(CONFIG_MTD_ROOTFS_ROOT_DEV) && -+ ROOT_DEV == 0) { -+ pr_notice("ubiblock: device ubiblock%d_%d (%s) set to be root filesystem\n", -+ dev->ubi_num, dev->vol_id, vi->name); -+ ROOT_DEV = MKDEV(gd->major, gd->first_minor); -+ } -+ - return 0; - - out_destroy_wq: diff --git a/target/linux/generic/pending-5.18/494-mtd-ubi-add-EOF-marker-support.patch b/target/linux/generic/pending-5.18/494-mtd-ubi-add-EOF-marker-support.patch deleted file mode 100644 index 413431755f1d2c..00000000000000 --- a/target/linux/generic/pending-5.18/494-mtd-ubi-add-EOF-marker-support.patch +++ /dev/null @@ -1,60 +0,0 @@ -From: Gabor Juhos -Subject: mtd: add EOF marker support to the UBI layer - -Signed-off-by: Gabor Juhos ---- - drivers/mtd/ubi/attach.c | 25 ++++++++++++++++++++++--- - drivers/mtd/ubi/ubi.h | 1 + - 2 files changed, 23 insertions(+), 3 deletions(-) - ---- a/drivers/mtd/ubi/attach.c -+++ b/drivers/mtd/ubi/attach.c -@@ -926,6 +926,13 @@ static bool vol_ignored(int vol_id) - #endif - } - -+static bool ec_hdr_has_eof(struct ubi_ec_hdr *ech) -+{ -+ return ech->padding1[0] == 'E' && -+ ech->padding1[1] == 'O' && -+ ech->padding1[2] == 'F'; -+} -+ - /** - * scan_peb - scan and process UBI headers of a PEB. - * @ubi: UBI device description object -@@ -958,9 +965,21 @@ static int scan_peb(struct ubi_device *u - return 0; - } - -- err = ubi_io_read_ec_hdr(ubi, pnum, ech, 0); -- if (err < 0) -- return err; -+ if (!ai->eof_found) { -+ err = ubi_io_read_ec_hdr(ubi, pnum, ech, 0); -+ if (err < 0) -+ return err; -+ -+ if (ec_hdr_has_eof(ech)) { -+ pr_notice("UBI: EOF marker found, PEBs from %d will be erased\n", -+ pnum); -+ ai->eof_found = true; -+ } -+ } -+ -+ if (ai->eof_found) -+ err = UBI_IO_FF_BITFLIPS; -+ - switch (err) { - case 0: - break; ---- a/drivers/mtd/ubi/ubi.h -+++ b/drivers/mtd/ubi/ubi.h -@@ -778,6 +778,7 @@ struct ubi_attach_info { - int mean_ec; - uint64_t ec_sum; - int ec_count; -+ bool eof_found; - struct kmem_cache *aeb_slab_cache; - struct ubi_ec_hdr *ech; - struct ubi_vid_io_buf *vidb; diff --git a/target/linux/generic/pending-5.18/495-mtd-core-add-get_mtd_device_by_node.patch b/target/linux/generic/pending-5.18/495-mtd-core-add-get_mtd_device_by_node.patch deleted file mode 100644 index 7dc0f6d988df56..00000000000000 --- a/target/linux/generic/pending-5.18/495-mtd-core-add-get_mtd_device_by_node.patch +++ /dev/null @@ -1,75 +0,0 @@ -From 1bd1b740f208d1cf4071932cc51860d37266c402 Mon Sep 17 00:00:00 2001 -From: Bernhard Frauendienst -Date: Sat, 1 Sep 2018 00:30:11 +0200 -Subject: [PATCH 495/497] mtd: core: add get_mtd_device_by_node - -Add function to retrieve a mtd device by its OF node. Since drivers can -assign arbitrary names to mtd devices in the absence of a label -property, there is no other reliable way to retrieve a mtd device for a -given OF node. - -Signed-off-by: Bernhard Frauendienst -Reviewed-by: Miquel Raynal ---- - drivers/mtd/mtdcore.c | 38 ++++++++++++++++++++++++++++++++++++++ - include/linux/mtd/mtd.h | 2 ++ - 2 files changed, 40 insertions(+) - ---- a/drivers/mtd/mtdcore.c -+++ b/drivers/mtd/mtdcore.c -@@ -1185,6 +1185,44 @@ out_unlock: - } - EXPORT_SYMBOL_GPL(get_mtd_device_nm); - -+/** -+ * get_mtd_device_by_node - obtain a validated handle for an MTD device -+ * by of_node -+ * @of_node: OF node of MTD device to open -+ * -+ * This function returns MTD device description structure in case of -+ * success and an error code in case of failure. -+ */ -+struct mtd_info *get_mtd_device_by_node(const struct device_node *of_node) -+{ -+ int err = -ENODEV; -+ struct mtd_info *mtd = NULL, *other; -+ -+ mutex_lock(&mtd_table_mutex); -+ -+ mtd_for_each_device(other) { -+ if (of_node == other->dev.of_node) { -+ mtd = other; -+ break; -+ } -+ } -+ -+ if (!mtd) -+ goto out_unlock; -+ -+ err = __get_mtd_device(mtd); -+ if (err) -+ goto out_unlock; -+ -+ mutex_unlock(&mtd_table_mutex); -+ return mtd; -+ -+out_unlock: -+ mutex_unlock(&mtd_table_mutex); -+ return ERR_PTR(err); -+} -+EXPORT_SYMBOL_GPL(get_mtd_device_by_node); -+ - void put_mtd_device(struct mtd_info *mtd) - { - mutex_lock(&mtd_table_mutex); ---- a/include/linux/mtd/mtd.h -+++ b/include/linux/mtd/mtd.h -@@ -698,6 +698,8 @@ extern struct mtd_info *get_mtd_device(s - extern int __get_mtd_device(struct mtd_info *mtd); - extern void __put_mtd_device(struct mtd_info *mtd); - extern struct mtd_info *get_mtd_device_nm(const char *name); -+extern struct mtd_info *get_mtd_device_by_node( -+ const struct device_node *of_node); - extern void put_mtd_device(struct mtd_info *mtd); - - static inline uint64_t mtdpart_get_offset(const struct mtd_info *mtd) diff --git a/target/linux/generic/pending-5.18/496-dt-bindings-add-bindings-for-mtd-concat-devices.patch b/target/linux/generic/pending-5.18/496-dt-bindings-add-bindings-for-mtd-concat-devices.patch deleted file mode 100644 index 01f3b9ec2da0ce..00000000000000 --- a/target/linux/generic/pending-5.18/496-dt-bindings-add-bindings-for-mtd-concat-devices.patch +++ /dev/null @@ -1,52 +0,0 @@ -From 5734c6669fba7ddb5ef491ccff7159d15dba0b59 Mon Sep 17 00:00:00 2001 -From: Bernhard Frauendienst -Date: Wed, 5 Sep 2018 01:32:51 +0200 -Subject: [PATCH 496/497] dt-bindings: add bindings for mtd-concat devices - -Document virtual mtd-concat device bindings. - -Signed-off-by: Bernhard Frauendienst ---- - .../devicetree/bindings/mtd/mtd-concat.txt | 36 +++++++++++++++++++ - 1 file changed, 36 insertions(+) - create mode 100644 Documentation/devicetree/bindings/mtd/mtd-concat.txt - ---- /dev/null -+++ b/Documentation/devicetree/bindings/mtd/mtd-concat.txt -@@ -0,0 +1,36 @@ -+Virtual MTD concat device -+ -+Requires properties: -+- devices: list of phandles to mtd nodes that should be concatenated -+ -+Example: -+ -+&spi { -+ flash0: flash@0 { -+ ... -+ }; -+ flash1: flash@1 { -+ ... -+ }; -+}; -+ -+flash { -+ compatible = "mtd-concat"; -+ -+ devices = <&flash0 &flash1>; -+ -+ partitions { -+ compatible = "fixed-partitions"; -+ -+ partition@0 { -+ label = "boot"; -+ reg = <0x0000000 0x0040000>; -+ read-only; -+ }; -+ -+ partition@40000 { -+ label = "firmware"; -+ reg = <0x0040000 0x1fc0000>; -+ }; -+ } -+} diff --git a/target/linux/generic/pending-5.18/497-mtd-mtdconcat-add-dt-driver-for-concat-devices.patch b/target/linux/generic/pending-5.18/497-mtd-mtdconcat-add-dt-driver-for-concat-devices.patch deleted file mode 100644 index 321680154d5716..00000000000000 --- a/target/linux/generic/pending-5.18/497-mtd-mtdconcat-add-dt-driver-for-concat-devices.patch +++ /dev/null @@ -1,216 +0,0 @@ -From e53f712d8eac71f54399b61038ccf87d2cee99d7 Mon Sep 17 00:00:00 2001 -From: Bernhard Frauendienst -Date: Sat, 25 Aug 2018 12:35:22 +0200 -Subject: [PATCH 497/497] mtd: mtdconcat: add dt driver for concat devices - -Some mtd drivers like physmap variants have support for concatenating -multiple mtd devices, but there is no generic way to define such a -concat device from within the device tree. - -This is useful for some SoC boards that use multiple flash chips as -memory banks of a single mtd device, with partitions spanning chip -borders. - -This commit adds a driver for creating virtual mtd-concat devices. They -must have a compatible = "mtd-concat" line, and define a list of devices -to concat in the 'devices' property, for example: - -flash { - compatible = "mtd-concat"; - - devices = <&flash0 &flash1>; - - partitions { - ... - }; -}; - -The driver is added to the very end of the mtd Makefile to increase the -likelyhood of all child devices already being loaded at the time of -probing, preventing unnecessary deferred probes. - -Signed-off-by: Bernhard Frauendienst ---- - drivers/mtd/Kconfig | 2 + - drivers/mtd/Makefile | 3 + - drivers/mtd/composite/Kconfig | 12 +++ - drivers/mtd/composite/Makefile | 6 ++ - drivers/mtd/composite/virt_concat.c | 128 ++++++++++++++++++++++++++++ - 5 files changed, 151 insertions(+) - create mode 100644 drivers/mtd/composite/Kconfig - create mode 100644 drivers/mtd/composite/Makefile - create mode 100644 drivers/mtd/composite/virt_concat.c - ---- a/drivers/mtd/Kconfig -+++ b/drivers/mtd/Kconfig -@@ -241,4 +241,6 @@ source "drivers/mtd/ubi/Kconfig" - - source "drivers/mtd/hyperbus/Kconfig" - -+source "drivers/mtd/composite/Kconfig" -+ - endif # MTD ---- a/drivers/mtd/Makefile -+++ b/drivers/mtd/Makefile -@@ -33,3 +33,6 @@ obj-y += chips/ lpddr/ maps/ devices/ n - obj-$(CONFIG_MTD_SPI_NOR) += spi-nor/ - obj-$(CONFIG_MTD_UBI) += ubi/ - obj-$(CONFIG_MTD_HYPERBUS) += hyperbus/ -+ -+# Composite drivers must be loaded last -+obj-y += composite/ ---- /dev/null -+++ b/drivers/mtd/composite/Kconfig -@@ -0,0 +1,12 @@ -+menu "Composite MTD device drivers" -+ depends on MTD!=n -+ -+config MTD_VIRT_CONCAT -+ tristate "Virtual concat MTD device" -+ help -+ This driver allows creation of a virtual MTD concat device, which -+ concatenates multiple underlying MTD devices to a single device. -+ This is required by some SoC boards where multiple memory banks are -+ used as one device with partitions spanning across device boundaries. -+ -+endmenu ---- /dev/null -+++ b/drivers/mtd/composite/Makefile -@@ -0,0 +1,6 @@ -+# SPDX-License-Identifier: GPL-2.0 -+# -+# linux/drivers/mtd/composite/Makefile -+# -+ -+obj-$(CONFIG_MTD_VIRT_CONCAT) += virt_concat.o ---- /dev/null -+++ b/drivers/mtd/composite/virt_concat.c -@@ -0,0 +1,128 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Virtual concat MTD device driver -+ * -+ * Copyright (C) 2018 Bernhard Frauendienst -+ * Author: Bernhard Frauendienst, kernel@nospam.obeliks.de -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+/* -+ * struct of_virt_concat - platform device driver data. -+ * @cmtd the final mtd_concat device -+ * @num_devices the number of devices in @devices -+ * @devices points to an array of devices already loaded -+ */ -+struct of_virt_concat { -+ struct mtd_info *cmtd; -+ int num_devices; -+ struct mtd_info **devices; -+}; -+ -+static int virt_concat_remove(struct platform_device *pdev) -+{ -+ struct of_virt_concat *info; -+ int i; -+ -+ info = platform_get_drvdata(pdev); -+ if (!info) -+ return 0; -+ -+ // unset data for when this is called after a probe error -+ platform_set_drvdata(pdev, NULL); -+ -+ if (info->cmtd) { -+ mtd_device_unregister(info->cmtd); -+ mtd_concat_destroy(info->cmtd); -+ } -+ -+ if (info->devices) { -+ for (i = 0; i < info->num_devices; i++) -+ put_mtd_device(info->devices[i]); -+ } -+ -+ return 0; -+} -+ -+static int virt_concat_probe(struct platform_device *pdev) -+{ -+ struct device_node *node = pdev->dev.of_node; -+ struct of_phandle_iterator it; -+ struct of_virt_concat *info; -+ struct mtd_info *mtd; -+ int err = 0, count; -+ -+ count = of_count_phandle_with_args(node, "devices", NULL); -+ if (count <= 0) -+ return -EINVAL; -+ -+ info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); -+ if (!info) -+ return -ENOMEM; -+ info->devices = devm_kcalloc(&pdev->dev, count, -+ sizeof(*(info->devices)), GFP_KERNEL); -+ if (!info->devices) { -+ err = -ENOMEM; -+ goto err_remove; -+ } -+ -+ platform_set_drvdata(pdev, info); -+ -+ of_for_each_phandle(&it, err, node, "devices", NULL, 0) { -+ mtd = get_mtd_device_by_node(it.node); -+ if (IS_ERR(mtd)) { -+ of_node_put(it.node); -+ err = -EPROBE_DEFER; -+ goto err_remove; -+ } -+ -+ info->devices[info->num_devices++] = mtd; -+ } -+ -+ info->cmtd = mtd_concat_create(info->devices, info->num_devices, -+ dev_name(&pdev->dev)); -+ if (!info->cmtd) { -+ err = -ENXIO; -+ goto err_remove; -+ } -+ -+ info->cmtd->dev.parent = &pdev->dev; -+ mtd_set_of_node(info->cmtd, node); -+ mtd_device_register(info->cmtd, NULL, 0); -+ -+ return 0; -+ -+err_remove: -+ virt_concat_remove(pdev); -+ -+ return err; -+} -+ -+static const struct of_device_id virt_concat_of_match[] = { -+ { .compatible = "mtd-concat", }, -+ { /* sentinel */ } -+}; -+MODULE_DEVICE_TABLE(of, virt_concat_of_match); -+ -+static struct platform_driver virt_concat_driver = { -+ .probe = virt_concat_probe, -+ .remove = virt_concat_remove, -+ .driver = { -+ .name = "virt-mtdconcat", -+ .of_match_table = virt_concat_of_match, -+ }, -+}; -+ -+module_platform_driver(virt_concat_driver); -+ -+MODULE_LICENSE("GPL v2"); -+MODULE_AUTHOR("Bernhard Frauendienst "); -+MODULE_DESCRIPTION("Virtual concat MTD device driver"); diff --git a/target/linux/generic/pending-5.18/499-mtd-spi-nor-disable-16-bit-sr-for-macronix.patch b/target/linux/generic/pending-5.18/499-mtd-spi-nor-disable-16-bit-sr-for-macronix.patch deleted file mode 100644 index e9060e16ed803b..00000000000000 --- a/target/linux/generic/pending-5.18/499-mtd-spi-nor-disable-16-bit-sr-for-macronix.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 245224608b5368c10407da07557e546743d3c489 Mon Sep 17 00:00:00 2001 -From: Nick Hainke -Date: Mon, 27 Dec 2021 09:33:13 +0100 -Subject: [PATCH 2/2] mtd: spi-nor: disable 16-bit-sr for macronix - -Macronix flash chips seem to consist of only one status register. -These chips will not work with the "16-bit Write Status (01h) Command". -Disable SNOR_F_HAS_16BIT_SR for all Macronix chips. - -Tested with MX25L6405D. - -Fixes: 39d1e3340c73 ("mtd: spi-nor: Fix clearing of QE bit on -lock()/unlock()") - -Signed-off-by: David Bauer -Signed-off-by: Nick Hainke ---- - drivers/mtd/spi-nor/macronix.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/drivers/mtd/spi-nor/macronix.c -+++ b/drivers/mtd/spi-nor/macronix.c -@@ -106,6 +106,7 @@ static void macronix_nor_default_init(st - { - nor->params->quad_enable = spi_nor_sr1_bit6_quad_enable; - nor->params->set_4byte_addr_mode = spi_nor_set_4byte_addr_mode; -+ nor->flags &= ~SNOR_F_HAS_16BIT_SR; - nor->flags |= SNOR_F_HAS_LOCK; - } - diff --git a/target/linux/generic/pending-5.18/500-fs_cdrom_dependencies.patch b/target/linux/generic/pending-5.18/500-fs_cdrom_dependencies.patch deleted file mode 100644 index 0a5a3aae5db2aa..00000000000000 --- a/target/linux/generic/pending-5.18/500-fs_cdrom_dependencies.patch +++ /dev/null @@ -1,40 +0,0 @@ ---- a/fs/hfs/Kconfig -+++ b/fs/hfs/Kconfig -@@ -2,6 +2,7 @@ - config HFS_FS - tristate "Apple Macintosh file system support" - depends on BLOCK -+ select CDROM - select NLS - help - If you say Y here, you will be able to mount Macintosh-formatted ---- a/fs/hfsplus/Kconfig -+++ b/fs/hfsplus/Kconfig -@@ -2,6 +2,7 @@ - config HFSPLUS_FS - tristate "Apple Extended HFS file system support" - depends on BLOCK -+ select CDROM - select NLS - select NLS_UTF8 - help ---- a/fs/isofs/Kconfig -+++ b/fs/isofs/Kconfig -@@ -1,6 +1,7 @@ - # SPDX-License-Identifier: GPL-2.0-only - config ISO9660_FS - tristate "ISO 9660 CDROM file system support" -+ select CDROM - help - This is the standard file system used on CD-ROMs. It was previously - known as "High Sierra File System" and is called "hsfs" on other ---- a/fs/udf/Kconfig -+++ b/fs/udf/Kconfig -@@ -1,6 +1,7 @@ - # SPDX-License-Identifier: GPL-2.0-only - config UDF_FS - tristate "UDF file system support" -+ select CDROM - select CRC_ITU_T - select NLS - help diff --git a/target/linux/generic/pending-5.18/530-jffs2_make_lzma_available.patch b/target/linux/generic/pending-5.18/530-jffs2_make_lzma_available.patch deleted file mode 100644 index 64091cce6a8d2d..00000000000000 --- a/target/linux/generic/pending-5.18/530-jffs2_make_lzma_available.patch +++ /dev/null @@ -1,5180 +0,0 @@ -From: Alexandros C. Couloumbis -Subject: fs: add jffs2/lzma support (not activated by default yet) - -lede-commit: c2c88d315fa0e881f8b19da07b62859b915b11b2 -Signed-off-by: Alexandros C. Couloumbis ---- - fs/jffs2/Kconfig | 9 + - fs/jffs2/Makefile | 3 + - fs/jffs2/compr.c | 6 + - fs/jffs2/compr.h | 10 +- - fs/jffs2/compr_lzma.c | 128 +++ - fs/jffs2/super.c | 33 +- - include/linux/lzma.h | 62 ++ - include/linux/lzma/LzFind.h | 115 +++ - include/linux/lzma/LzHash.h | 54 + - include/linux/lzma/LzmaDec.h | 231 +++++ - include/linux/lzma/LzmaEnc.h | 80 ++ - include/linux/lzma/Types.h | 226 +++++ - include/uapi/linux/jffs2.h | 1 + - lib/Kconfig | 6 + - lib/Makefile | 12 + - lib/lzma/LzFind.c | 761 ++++++++++++++ - lib/lzma/LzmaDec.c | 999 +++++++++++++++++++ - lib/lzma/LzmaEnc.c | 2271 ++++++++++++++++++++++++++++++++++++++++++ - lib/lzma/Makefile | 7 + - 19 files changed, 5008 insertions(+), 6 deletions(-) - create mode 100644 fs/jffs2/compr_lzma.c - create mode 100644 include/linux/lzma.h - create mode 100644 include/linux/lzma/LzFind.h - create mode 100644 include/linux/lzma/LzHash.h - create mode 100644 include/linux/lzma/LzmaDec.h - create mode 100644 include/linux/lzma/LzmaEnc.h - create mode 100644 include/linux/lzma/Types.h - create mode 100644 lib/lzma/LzFind.c - create mode 100644 lib/lzma/LzmaDec.c - create mode 100644 lib/lzma/LzmaEnc.c - create mode 100644 lib/lzma/Makefile - ---- a/fs/jffs2/Kconfig -+++ b/fs/jffs2/Kconfig -@@ -136,6 +136,15 @@ config JFFS2_LZO - This feature was added in July, 2007. Say 'N' if you need - compatibility with older bootloaders or kernels. - -+config JFFS2_LZMA -+ bool "JFFS2 LZMA compression support" if JFFS2_COMPRESSION_OPTIONS -+ select LZMA_COMPRESS -+ select LZMA_DECOMPRESS -+ depends on JFFS2_FS -+ default n -+ help -+ JFFS2 wrapper to the LZMA C SDK -+ - config JFFS2_RTIME - bool "JFFS2 RTIME compression support" if JFFS2_COMPRESSION_OPTIONS - depends on JFFS2_FS ---- a/fs/jffs2/Makefile -+++ b/fs/jffs2/Makefile -@@ -19,4 +19,7 @@ jffs2-$(CONFIG_JFFS2_RUBIN) += compr_rub - jffs2-$(CONFIG_JFFS2_RTIME) += compr_rtime.o - jffs2-$(CONFIG_JFFS2_ZLIB) += compr_zlib.o - jffs2-$(CONFIG_JFFS2_LZO) += compr_lzo.o -+jffs2-$(CONFIG_JFFS2_LZMA) += compr_lzma.o - jffs2-$(CONFIG_JFFS2_SUMMARY) += summary.o -+ -+CFLAGS_compr_lzma.o += -Iinclude/linux -Ilib/lzma ---- a/fs/jffs2/compr.c -+++ b/fs/jffs2/compr.c -@@ -378,6 +378,9 @@ int __init jffs2_compressors_init(void) - #ifdef CONFIG_JFFS2_LZO - jffs2_lzo_init(); - #endif -+#ifdef CONFIG_JFFS2_LZMA -+ jffs2_lzma_init(); -+#endif - /* Setting default compression mode */ - #ifdef CONFIG_JFFS2_CMODE_NONE - jffs2_compression_mode = JFFS2_COMPR_MODE_NONE; -@@ -401,6 +404,9 @@ int __init jffs2_compressors_init(void) - int jffs2_compressors_exit(void) - { - /* Unregistering compressors */ -+#ifdef CONFIG_JFFS2_LZMA -+ jffs2_lzma_exit(); -+#endif - #ifdef CONFIG_JFFS2_LZO - jffs2_lzo_exit(); - #endif ---- a/fs/jffs2/compr.h -+++ b/fs/jffs2/compr.h -@@ -29,9 +29,9 @@ - #define JFFS2_DYNRUBIN_PRIORITY 20 - #define JFFS2_LZARI_PRIORITY 30 - #define JFFS2_RTIME_PRIORITY 50 --#define JFFS2_ZLIB_PRIORITY 60 --#define JFFS2_LZO_PRIORITY 80 -- -+#define JFFS2_LZMA_PRIORITY 70 -+#define JFFS2_ZLIB_PRIORITY 80 -+#define JFFS2_LZO_PRIORITY 90 - - #define JFFS2_RUBINMIPS_DISABLED /* RUBINs will be used only */ - #define JFFS2_DYNRUBIN_DISABLED /* for decompression */ -@@ -101,5 +101,9 @@ void jffs2_zlib_exit(void); - int jffs2_lzo_init(void); - void jffs2_lzo_exit(void); - #endif -+#ifdef CONFIG_JFFS2_LZMA -+int jffs2_lzma_init(void); -+void jffs2_lzma_exit(void); -+#endif - - #endif /* __JFFS2_COMPR_H__ */ ---- /dev/null -+++ b/fs/jffs2/compr_lzma.c -@@ -0,0 +1,128 @@ -+/* -+ * JFFS2 -- Journalling Flash File System, Version 2. -+ * -+ * For licensing information, see the file 'LICENCE' in this directory. -+ * -+ * JFFS2 wrapper to the LZMA C SDK -+ * -+ */ -+ -+#include -+#include "compr.h" -+ -+#ifdef __KERNEL__ -+ static DEFINE_MUTEX(deflate_mutex); -+#endif -+ -+CLzmaEncHandle *p; -+Byte propsEncoded[LZMA_PROPS_SIZE]; -+SizeT propsSize = sizeof(propsEncoded); -+ -+STATIC void lzma_free_workspace(void) -+{ -+ LzmaEnc_Destroy(p, &lzma_alloc, &lzma_alloc); -+} -+ -+STATIC int INIT lzma_alloc_workspace(CLzmaEncProps *props) -+{ -+ if ((p = (CLzmaEncHandle *)LzmaEnc_Create(&lzma_alloc)) == NULL) -+ { -+ PRINT_ERROR("Failed to allocate lzma deflate workspace\n"); -+ return -ENOMEM; -+ } -+ -+ if (LzmaEnc_SetProps(p, props) != SZ_OK) -+ { -+ lzma_free_workspace(); -+ return -1; -+ } -+ -+ if (LzmaEnc_WriteProperties(p, propsEncoded, &propsSize) != SZ_OK) -+ { -+ lzma_free_workspace(); -+ return -1; -+ } -+ -+ return 0; -+} -+ -+STATIC int jffs2_lzma_compress(unsigned char *data_in, unsigned char *cpage_out, -+ uint32_t *sourcelen, uint32_t *dstlen) -+{ -+ SizeT compress_size = (SizeT)(*dstlen); -+ int ret; -+ -+ #ifdef __KERNEL__ -+ mutex_lock(&deflate_mutex); -+ #endif -+ -+ ret = LzmaEnc_MemEncode(p, cpage_out, &compress_size, data_in, *sourcelen, -+ 0, NULL, &lzma_alloc, &lzma_alloc); -+ -+ #ifdef __KERNEL__ -+ mutex_unlock(&deflate_mutex); -+ #endif -+ -+ if (ret != SZ_OK) -+ return -1; -+ -+ *dstlen = (uint32_t)compress_size; -+ -+ return 0; -+} -+ -+STATIC int jffs2_lzma_decompress(unsigned char *data_in, unsigned char *cpage_out, -+ uint32_t srclen, uint32_t destlen) -+{ -+ int ret; -+ SizeT dl = (SizeT)destlen; -+ SizeT sl = (SizeT)srclen; -+ ELzmaStatus status; -+ -+ ret = LzmaDecode(cpage_out, &dl, data_in, &sl, propsEncoded, -+ propsSize, LZMA_FINISH_ANY, &status, &lzma_alloc); -+ -+ if (ret != SZ_OK || status == LZMA_STATUS_NOT_FINISHED || dl != (SizeT)destlen) -+ return -1; -+ -+ return 0; -+} -+ -+static struct jffs2_compressor jffs2_lzma_comp = { -+ .priority = JFFS2_LZMA_PRIORITY, -+ .name = "lzma", -+ .compr = JFFS2_COMPR_LZMA, -+ .compress = &jffs2_lzma_compress, -+ .decompress = &jffs2_lzma_decompress, -+ .disabled = 0, -+}; -+ -+int INIT jffs2_lzma_init(void) -+{ -+ int ret; -+ CLzmaEncProps props; -+ LzmaEncProps_Init(&props); -+ -+ props.dictSize = LZMA_BEST_DICT(0x2000); -+ props.level = LZMA_BEST_LEVEL; -+ props.lc = LZMA_BEST_LC; -+ props.lp = LZMA_BEST_LP; -+ props.pb = LZMA_BEST_PB; -+ props.fb = LZMA_BEST_FB; -+ -+ ret = lzma_alloc_workspace(&props); -+ if (ret < 0) -+ return ret; -+ -+ ret = jffs2_register_compressor(&jffs2_lzma_comp); -+ if (ret) -+ lzma_free_workspace(); -+ -+ return ret; -+} -+ -+void jffs2_lzma_exit(void) -+{ -+ jffs2_unregister_compressor(&jffs2_lzma_comp); -+ lzma_free_workspace(); -+} ---- a/fs/jffs2/super.c -+++ b/fs/jffs2/super.c -@@ -374,14 +374,41 @@ static int __init init_jffs2_fs(void) - BUILD_BUG_ON(sizeof(struct jffs2_raw_inode) != 68); - BUILD_BUG_ON(sizeof(struct jffs2_raw_summary) != 32); - -- pr_info("version 2.2." -+ pr_info("version 2.2" - #ifdef CONFIG_JFFS2_FS_WRITEBUFFER - " (NAND)" - #endif - #ifdef CONFIG_JFFS2_SUMMARY -- " (SUMMARY) " -+ " (SUMMARY)" - #endif -- " © 2001-2006 Red Hat, Inc.\n"); -+#ifdef CONFIG_JFFS2_ZLIB -+ " (ZLIB)" -+#endif -+#ifdef CONFIG_JFFS2_LZO -+ " (LZO)" -+#endif -+#ifdef CONFIG_JFFS2_LZMA -+ " (LZMA)" -+#endif -+#ifdef CONFIG_JFFS2_RTIME -+ " (RTIME)" -+#endif -+#ifdef CONFIG_JFFS2_RUBIN -+ " (RUBIN)" -+#endif -+#ifdef CONFIG_JFFS2_CMODE_NONE -+ " (CMODE_NONE)" -+#endif -+#ifdef CONFIG_JFFS2_CMODE_PRIORITY -+ " (CMODE_PRIORITY)" -+#endif -+#ifdef CONFIG_JFFS2_CMODE_SIZE -+ " (CMODE_SIZE)" -+#endif -+#ifdef CONFIG_JFFS2_CMODE_FAVOURLZO -+ " (CMODE_FAVOURLZO)" -+#endif -+ " (c) 2001-2006 Red Hat, Inc.\n"); - - jffs2_inode_cachep = kmem_cache_create("jffs2_i", - sizeof(struct jffs2_inode_info), ---- /dev/null -+++ b/include/linux/lzma.h -@@ -0,0 +1,62 @@ -+#ifndef __LZMA_H__ -+#define __LZMA_H__ -+ -+#ifdef __KERNEL__ -+ #include -+ #include -+ #include -+ #include -+ #include -+ #define LZMA_MALLOC vmalloc -+ #define LZMA_FREE vfree -+ #define PRINT_ERROR(msg) printk(KERN_WARNING #msg) -+ #define INIT __init -+ #define STATIC static -+#else -+ #include -+ #include -+ #include -+ #include -+ #include -+ #include -+ #include -+ #include -+ #ifndef PAGE_SIZE -+ extern int page_size; -+ #define PAGE_SIZE page_size -+ #endif -+ #define LZMA_MALLOC malloc -+ #define LZMA_FREE free -+ #define PRINT_ERROR(msg) fprintf(stderr, msg) -+ #define INIT -+ #define STATIC -+#endif -+ -+#include "lzma/LzmaDec.h" -+#include "lzma/LzmaEnc.h" -+ -+#define LZMA_BEST_LEVEL (9) -+#define LZMA_BEST_LC (0) -+#define LZMA_BEST_LP (0) -+#define LZMA_BEST_PB (0) -+#define LZMA_BEST_FB (273) -+ -+#define LZMA_BEST_DICT(n) (((int)((n) / 2)) * 2) -+ -+static void *p_lzma_malloc(void *p, size_t size) -+{ -+ if (size == 0) -+ return NULL; -+ -+ return LZMA_MALLOC(size); -+} -+ -+static void p_lzma_free(void *p, void *address) -+{ -+ if (address != NULL) -+ LZMA_FREE(address); -+} -+ -+static ISzAlloc lzma_alloc = {p_lzma_malloc, p_lzma_free}; -+ -+#endif ---- /dev/null -+++ b/include/linux/lzma/LzFind.h -@@ -0,0 +1,115 @@ -+/* LzFind.h -- Match finder for LZ algorithms -+2009-04-22 : Igor Pavlov : Public domain */ -+ -+#ifndef __LZ_FIND_H -+#define __LZ_FIND_H -+ -+#include "Types.h" -+ -+#ifdef __cplusplus -+extern "C" { -+#endif -+ -+typedef UInt32 CLzRef; -+ -+typedef struct _CMatchFinder -+{ -+ Byte *buffer; -+ UInt32 pos; -+ UInt32 posLimit; -+ UInt32 streamPos; -+ UInt32 lenLimit; -+ -+ UInt32 cyclicBufferPos; -+ UInt32 cyclicBufferSize; /* it must be = (historySize + 1) */ -+ -+ UInt32 matchMaxLen; -+ CLzRef *hash; -+ CLzRef *son; -+ UInt32 hashMask; -+ UInt32 cutValue; -+ -+ Byte *bufferBase; -+ ISeqInStream *stream; -+ int streamEndWasReached; -+ -+ UInt32 blockSize; -+ UInt32 keepSizeBefore; -+ UInt32 keepSizeAfter; -+ -+ UInt32 numHashBytes; -+ int directInput; -+ size_t directInputRem; -+ int btMode; -+ int bigHash; -+ UInt32 historySize; -+ UInt32 fixedHashSize; -+ UInt32 hashSizeSum; -+ UInt32 numSons; -+ SRes result; -+ UInt32 crc[256]; -+} CMatchFinder; -+ -+#define Inline_MatchFinder_GetPointerToCurrentPos(p) ((p)->buffer) -+#define Inline_MatchFinder_GetIndexByte(p, index) ((p)->buffer[(Int32)(index)]) -+ -+#define Inline_MatchFinder_GetNumAvailableBytes(p) ((p)->streamPos - (p)->pos) -+ -+int MatchFinder_NeedMove(CMatchFinder *p); -+Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p); -+void MatchFinder_MoveBlock(CMatchFinder *p); -+void MatchFinder_ReadIfRequired(CMatchFinder *p); -+ -+void MatchFinder_Construct(CMatchFinder *p); -+ -+/* Conditions: -+ historySize <= 3 GB -+ keepAddBufferBefore + matchMaxLen + keepAddBufferAfter < 511MB -+*/ -+int MatchFinder_Create(CMatchFinder *p, UInt32 historySize, -+ UInt32 keepAddBufferBefore, UInt32 matchMaxLen, UInt32 keepAddBufferAfter, -+ ISzAlloc *alloc); -+void MatchFinder_Free(CMatchFinder *p, ISzAlloc *alloc); -+void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems); -+void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue); -+ -+UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *buffer, CLzRef *son, -+ UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 _cutValue, -+ UInt32 *distances, UInt32 maxLen); -+ -+/* -+Conditions: -+ Mf_GetNumAvailableBytes_Func must be called before each Mf_GetMatchLen_Func. -+ Mf_GetPointerToCurrentPos_Func's result must be used only before any other function -+*/ -+ -+typedef void (*Mf_Init_Func)(void *object); -+typedef Byte (*Mf_GetIndexByte_Func)(void *object, Int32 index); -+typedef UInt32 (*Mf_GetNumAvailableBytes_Func)(void *object); -+typedef const Byte * (*Mf_GetPointerToCurrentPos_Func)(void *object); -+typedef UInt32 (*Mf_GetMatches_Func)(void *object, UInt32 *distances); -+typedef void (*Mf_Skip_Func)(void *object, UInt32); -+ -+typedef struct _IMatchFinder -+{ -+ Mf_Init_Func Init; -+ Mf_GetIndexByte_Func GetIndexByte; -+ Mf_GetNumAvailableBytes_Func GetNumAvailableBytes; -+ Mf_GetPointerToCurrentPos_Func GetPointerToCurrentPos; -+ Mf_GetMatches_Func GetMatches; -+ Mf_Skip_Func Skip; -+} IMatchFinder; -+ -+void MatchFinder_CreateVTable(CMatchFinder *p, IMatchFinder *vTable); -+ -+void MatchFinder_Init(CMatchFinder *p); -+UInt32 Bt3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances); -+UInt32 Hc3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances); -+void Bt3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num); -+void Hc3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num); -+ -+#ifdef __cplusplus -+} -+#endif -+ -+#endif ---- /dev/null -+++ b/include/linux/lzma/LzHash.h -@@ -0,0 +1,54 @@ -+/* LzHash.h -- HASH functions for LZ algorithms -+2009-02-07 : Igor Pavlov : Public domain */ -+ -+#ifndef __LZ_HASH_H -+#define __LZ_HASH_H -+ -+#define kHash2Size (1 << 10) -+#define kHash3Size (1 << 16) -+#define kHash4Size (1 << 20) -+ -+#define kFix3HashSize (kHash2Size) -+#define kFix4HashSize (kHash2Size + kHash3Size) -+#define kFix5HashSize (kHash2Size + kHash3Size + kHash4Size) -+ -+#define HASH2_CALC hashValue = cur[0] | ((UInt32)cur[1] << 8); -+ -+#define HASH3_CALC { \ -+ UInt32 temp = p->crc[cur[0]] ^ cur[1]; \ -+ hash2Value = temp & (kHash2Size - 1); \ -+ hashValue = (temp ^ ((UInt32)cur[2] << 8)) & p->hashMask; } -+ -+#define HASH4_CALC { \ -+ UInt32 temp = p->crc[cur[0]] ^ cur[1]; \ -+ hash2Value = temp & (kHash2Size - 1); \ -+ hash3Value = (temp ^ ((UInt32)cur[2] << 8)) & (kHash3Size - 1); \ -+ hashValue = (temp ^ ((UInt32)cur[2] << 8) ^ (p->crc[cur[3]] << 5)) & p->hashMask; } -+ -+#define HASH5_CALC { \ -+ UInt32 temp = p->crc[cur[0]] ^ cur[1]; \ -+ hash2Value = temp & (kHash2Size - 1); \ -+ hash3Value = (temp ^ ((UInt32)cur[2] << 8)) & (kHash3Size - 1); \ -+ hash4Value = (temp ^ ((UInt32)cur[2] << 8) ^ (p->crc[cur[3]] << 5)); \ -+ hashValue = (hash4Value ^ (p->crc[cur[4]] << 3)) & p->hashMask; \ -+ hash4Value &= (kHash4Size - 1); } -+ -+/* #define HASH_ZIP_CALC hashValue = ((cur[0] | ((UInt32)cur[1] << 8)) ^ p->crc[cur[2]]) & 0xFFFF; */ -+#define HASH_ZIP_CALC hashValue = ((cur[2] | ((UInt32)cur[0] << 8)) ^ p->crc[cur[1]]) & 0xFFFF; -+ -+ -+#define MT_HASH2_CALC \ -+ hash2Value = (p->crc[cur[0]] ^ cur[1]) & (kHash2Size - 1); -+ -+#define MT_HASH3_CALC { \ -+ UInt32 temp = p->crc[cur[0]] ^ cur[1]; \ -+ hash2Value = temp & (kHash2Size - 1); \ -+ hash3Value = (temp ^ ((UInt32)cur[2] << 8)) & (kHash3Size - 1); } -+ -+#define MT_HASH4_CALC { \ -+ UInt32 temp = p->crc[cur[0]] ^ cur[1]; \ -+ hash2Value = temp & (kHash2Size - 1); \ -+ hash3Value = (temp ^ ((UInt32)cur[2] << 8)) & (kHash3Size - 1); \ -+ hash4Value = (temp ^ ((UInt32)cur[2] << 8) ^ (p->crc[cur[3]] << 5)) & (kHash4Size - 1); } -+ -+#endif ---- /dev/null -+++ b/include/linux/lzma/LzmaDec.h -@@ -0,0 +1,231 @@ -+/* LzmaDec.h -- LZMA Decoder -+2009-02-07 : Igor Pavlov : Public domain */ -+ -+#ifndef __LZMA_DEC_H -+#define __LZMA_DEC_H -+ -+#include "Types.h" -+ -+#ifdef __cplusplus -+extern "C" { -+#endif -+ -+/* #define _LZMA_PROB32 */ -+/* _LZMA_PROB32 can increase the speed on some CPUs, -+ but memory usage for CLzmaDec::probs will be doubled in that case */ -+ -+#ifdef _LZMA_PROB32 -+#define CLzmaProb UInt32 -+#else -+#define CLzmaProb UInt16 -+#endif -+ -+ -+/* ---------- LZMA Properties ---------- */ -+ -+#define LZMA_PROPS_SIZE 5 -+ -+typedef struct _CLzmaProps -+{ -+ unsigned lc, lp, pb; -+ UInt32 dicSize; -+} CLzmaProps; -+ -+/* LzmaProps_Decode - decodes properties -+Returns: -+ SZ_OK -+ SZ_ERROR_UNSUPPORTED - Unsupported properties -+*/ -+ -+SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size); -+ -+ -+/* ---------- LZMA Decoder state ---------- */ -+ -+/* LZMA_REQUIRED_INPUT_MAX = number of required input bytes for worst case. -+ Num bits = log2((2^11 / 31) ^ 22) + 26 < 134 + 26 = 160; */ -+ -+#define LZMA_REQUIRED_INPUT_MAX 20 -+ -+typedef struct -+{ -+ CLzmaProps prop; -+ CLzmaProb *probs; -+ Byte *dic; -+ const Byte *buf; -+ UInt32 range, code; -+ SizeT dicPos; -+ SizeT dicBufSize; -+ UInt32 processedPos; -+ UInt32 checkDicSize; -+ unsigned state; -+ UInt32 reps[4]; -+ unsigned remainLen; -+ int needFlush; -+ int needInitState; -+ UInt32 numProbs; -+ unsigned tempBufSize; -+ Byte tempBuf[LZMA_REQUIRED_INPUT_MAX]; -+} CLzmaDec; -+ -+#define LzmaDec_Construct(p) { (p)->dic = 0; (p)->probs = 0; } -+ -+void LzmaDec_Init(CLzmaDec *p); -+ -+/* There are two types of LZMA streams: -+ 0) Stream with end mark. That end mark adds about 6 bytes to compressed size. -+ 1) Stream without end mark. You must know exact uncompressed size to decompress such stream. */ -+ -+typedef enum -+{ -+ LZMA_FINISH_ANY, /* finish at any point */ -+ LZMA_FINISH_END /* block must be finished at the end */ -+} ELzmaFinishMode; -+ -+/* ELzmaFinishMode has meaning only if the decoding reaches output limit !!! -+ -+ You must use LZMA_FINISH_END, when you know that current output buffer -+ covers last bytes of block. In other cases you must use LZMA_FINISH_ANY. -+ -+ If LZMA decoder sees end marker before reaching output limit, it returns SZ_OK, -+ and output value of destLen will be less than output buffer size limit. -+ You can check status result also. -+ -+ You can use multiple checks to test data integrity after full decompression: -+ 1) Check Result and "status" variable. -+ 2) Check that output(destLen) = uncompressedSize, if you know real uncompressedSize. -+ 3) Check that output(srcLen) = compressedSize, if you know real compressedSize. -+ You must use correct finish mode in that case. */ -+ -+typedef enum -+{ -+ LZMA_STATUS_NOT_SPECIFIED, /* use main error code instead */ -+ LZMA_STATUS_FINISHED_WITH_MARK, /* stream was finished with end mark. */ -+ LZMA_STATUS_NOT_FINISHED, /* stream was not finished */ -+ LZMA_STATUS_NEEDS_MORE_INPUT, /* you must provide more input bytes */ -+ LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK /* there is probability that stream was finished without end mark */ -+} ELzmaStatus; -+ -+/* ELzmaStatus is used only as output value for function call */ -+ -+ -+/* ---------- Interfaces ---------- */ -+ -+/* There are 3 levels of interfaces: -+ 1) Dictionary Interface -+ 2) Buffer Interface -+ 3) One Call Interface -+ You can select any of these interfaces, but don't mix functions from different -+ groups for same object. */ -+ -+ -+/* There are two variants to allocate state for Dictionary Interface: -+ 1) LzmaDec_Allocate / LzmaDec_Free -+ 2) LzmaDec_AllocateProbs / LzmaDec_FreeProbs -+ You can use variant 2, if you set dictionary buffer manually. -+ For Buffer Interface you must always use variant 1. -+ -+LzmaDec_Allocate* can return: -+ SZ_OK -+ SZ_ERROR_MEM - Memory allocation error -+ SZ_ERROR_UNSUPPORTED - Unsupported properties -+*/ -+ -+SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc); -+void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc); -+ -+SRes LzmaDec_Allocate(CLzmaDec *state, const Byte *prop, unsigned propsSize, ISzAlloc *alloc); -+void LzmaDec_Free(CLzmaDec *state, ISzAlloc *alloc); -+ -+/* ---------- Dictionary Interface ---------- */ -+ -+/* You can use it, if you want to eliminate the overhead for data copying from -+ dictionary to some other external buffer. -+ You must work with CLzmaDec variables directly in this interface. -+ -+ STEPS: -+ LzmaDec_Constr() -+ LzmaDec_Allocate() -+ for (each new stream) -+ { -+ LzmaDec_Init() -+ while (it needs more decompression) -+ { -+ LzmaDec_DecodeToDic() -+ use data from CLzmaDec::dic and update CLzmaDec::dicPos -+ } -+ } -+ LzmaDec_Free() -+*/ -+ -+/* LzmaDec_DecodeToDic -+ -+ The decoding to internal dictionary buffer (CLzmaDec::dic). -+ You must manually update CLzmaDec::dicPos, if it reaches CLzmaDec::dicBufSize !!! -+ -+finishMode: -+ It has meaning only if the decoding reaches output limit (dicLimit). -+ LZMA_FINISH_ANY - Decode just dicLimit bytes. -+ LZMA_FINISH_END - Stream must be finished after dicLimit. -+ -+Returns: -+ SZ_OK -+ status: -+ LZMA_STATUS_FINISHED_WITH_MARK -+ LZMA_STATUS_NOT_FINISHED -+ LZMA_STATUS_NEEDS_MORE_INPUT -+ LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK -+ SZ_ERROR_DATA - Data error -+*/ -+ -+SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit, -+ const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status); -+ -+ -+/* ---------- Buffer Interface ---------- */ -+ -+/* It's zlib-like interface. -+ See LzmaDec_DecodeToDic description for information about STEPS and return results, -+ but you must use LzmaDec_DecodeToBuf instead of LzmaDec_DecodeToDic and you don't need -+ to work with CLzmaDec variables manually. -+ -+finishMode: -+ It has meaning only if the decoding reaches output limit (*destLen). -+ LZMA_FINISH_ANY - Decode just destLen bytes. -+ LZMA_FINISH_END - Stream must be finished after (*destLen). -+*/ -+ -+SRes LzmaDec_DecodeToBuf(CLzmaDec *p, Byte *dest, SizeT *destLen, -+ const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status); -+ -+ -+/* ---------- One Call Interface ---------- */ -+ -+/* LzmaDecode -+ -+finishMode: -+ It has meaning only if the decoding reaches output limit (*destLen). -+ LZMA_FINISH_ANY - Decode just destLen bytes. -+ LZMA_FINISH_END - Stream must be finished after (*destLen). -+ -+Returns: -+ SZ_OK -+ status: -+ LZMA_STATUS_FINISHED_WITH_MARK -+ LZMA_STATUS_NOT_FINISHED -+ LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK -+ SZ_ERROR_DATA - Data error -+ SZ_ERROR_MEM - Memory allocation error -+ SZ_ERROR_UNSUPPORTED - Unsupported properties -+ SZ_ERROR_INPUT_EOF - It needs more bytes in input buffer (src). -+*/ -+ -+SRes LzmaDecode(Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen, -+ const Byte *propData, unsigned propSize, ELzmaFinishMode finishMode, -+ ELzmaStatus *status, ISzAlloc *alloc); -+ -+#ifdef __cplusplus -+} -+#endif -+ -+#endif ---- /dev/null -+++ b/include/linux/lzma/LzmaEnc.h -@@ -0,0 +1,80 @@ -+/* LzmaEnc.h -- LZMA Encoder -+2009-02-07 : Igor Pavlov : Public domain */ -+ -+#ifndef __LZMA_ENC_H -+#define __LZMA_ENC_H -+ -+#include "Types.h" -+ -+#ifdef __cplusplus -+extern "C" { -+#endif -+ -+#define LZMA_PROPS_SIZE 5 -+ -+typedef struct _CLzmaEncProps -+{ -+ int level; /* 0 <= level <= 9 */ -+ UInt32 dictSize; /* (1 << 12) <= dictSize <= (1 << 27) for 32-bit version -+ (1 << 12) <= dictSize <= (1 << 30) for 64-bit version -+ default = (1 << 24) */ -+ int lc; /* 0 <= lc <= 8, default = 3 */ -+ int lp; /* 0 <= lp <= 4, default = 0 */ -+ int pb; /* 0 <= pb <= 4, default = 2 */ -+ int algo; /* 0 - fast, 1 - normal, default = 1 */ -+ int fb; /* 5 <= fb <= 273, default = 32 */ -+ int btMode; /* 0 - hashChain Mode, 1 - binTree mode - normal, default = 1 */ -+ int numHashBytes; /* 2, 3 or 4, default = 4 */ -+ UInt32 mc; /* 1 <= mc <= (1 << 30), default = 32 */ -+ unsigned writeEndMark; /* 0 - do not write EOPM, 1 - write EOPM, default = 0 */ -+ int numThreads; /* 1 or 2, default = 2 */ -+} CLzmaEncProps; -+ -+void LzmaEncProps_Init(CLzmaEncProps *p); -+void LzmaEncProps_Normalize(CLzmaEncProps *p); -+UInt32 LzmaEncProps_GetDictSize(const CLzmaEncProps *props2); -+ -+ -+/* ---------- CLzmaEncHandle Interface ---------- */ -+ -+/* LzmaEnc_* functions can return the following exit codes: -+Returns: -+ SZ_OK - OK -+ SZ_ERROR_MEM - Memory allocation error -+ SZ_ERROR_PARAM - Incorrect paramater in props -+ SZ_ERROR_WRITE - Write callback error. -+ SZ_ERROR_PROGRESS - some break from progress callback -+ SZ_ERROR_THREAD - errors in multithreading functions (only for Mt version) -+*/ -+ -+typedef void * CLzmaEncHandle; -+ -+CLzmaEncHandle LzmaEnc_Create(ISzAlloc *alloc); -+void LzmaEnc_Destroy(CLzmaEncHandle p, ISzAlloc *alloc, ISzAlloc *allocBig); -+SRes LzmaEnc_SetProps(CLzmaEncHandle p, const CLzmaEncProps *props); -+SRes LzmaEnc_WriteProperties(CLzmaEncHandle p, Byte *properties, SizeT *size); -+SRes LzmaEnc_Encode(CLzmaEncHandle p, ISeqOutStream *outStream, ISeqInStream *inStream, -+ ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig); -+SRes LzmaEnc_MemEncode(CLzmaEncHandle p, Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen, -+ int writeEndMark, ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig); -+ -+/* ---------- One Call Interface ---------- */ -+ -+/* LzmaEncode -+Return code: -+ SZ_OK - OK -+ SZ_ERROR_MEM - Memory allocation error -+ SZ_ERROR_PARAM - Incorrect paramater -+ SZ_ERROR_OUTPUT_EOF - output buffer overflow -+ SZ_ERROR_THREAD - errors in multithreading functions (only for Mt version) -+*/ -+ -+SRes LzmaEncode(Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen, -+ const CLzmaEncProps *props, Byte *propsEncoded, SizeT *propsSize, int writeEndMark, -+ ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig); -+ -+#ifdef __cplusplus -+} -+#endif -+ -+#endif ---- /dev/null -+++ b/include/linux/lzma/Types.h -@@ -0,0 +1,226 @@ -+/* Types.h -- Basic types -+2009-11-23 : Igor Pavlov : Public domain */ -+ -+#ifndef __7Z_TYPES_H -+#define __7Z_TYPES_H -+ -+#include -+ -+#ifdef _WIN32 -+#include -+#endif -+ -+#ifndef EXTERN_C_BEGIN -+#ifdef __cplusplus -+#define EXTERN_C_BEGIN extern "C" { -+#define EXTERN_C_END } -+#else -+#define EXTERN_C_BEGIN -+#define EXTERN_C_END -+#endif -+#endif -+ -+EXTERN_C_BEGIN -+ -+#define SZ_OK 0 -+ -+#define SZ_ERROR_DATA 1 -+#define SZ_ERROR_MEM 2 -+#define SZ_ERROR_CRC 3 -+#define SZ_ERROR_UNSUPPORTED 4 -+#define SZ_ERROR_PARAM 5 -+#define SZ_ERROR_INPUT_EOF 6 -+#define SZ_ERROR_OUTPUT_EOF 7 -+#define SZ_ERROR_READ 8 -+#define SZ_ERROR_WRITE 9 -+#define SZ_ERROR_PROGRESS 10 -+#define SZ_ERROR_FAIL 11 -+#define SZ_ERROR_THREAD 12 -+ -+#define SZ_ERROR_ARCHIVE 16 -+#define SZ_ERROR_NO_ARCHIVE 17 -+ -+typedef int SRes; -+ -+#ifdef _WIN32 -+typedef DWORD WRes; -+#else -+typedef int WRes; -+#endif -+ -+#ifndef RINOK -+#define RINOK(x) { int __result__ = (x); if (__result__ != 0) return __result__; } -+#endif -+ -+typedef unsigned char Byte; -+typedef short Int16; -+typedef unsigned short UInt16; -+ -+#ifdef _LZMA_UINT32_IS_ULONG -+typedef long Int32; -+typedef unsigned long UInt32; -+#else -+typedef int Int32; -+typedef unsigned int UInt32; -+#endif -+ -+#ifdef _SZ_NO_INT_64 -+ -+/* define _SZ_NO_INT_64, if your compiler doesn't support 64-bit integers. -+ NOTES: Some code will work incorrectly in that case! */ -+ -+typedef long Int64; -+typedef unsigned long UInt64; -+ -+#else -+ -+#if defined(_MSC_VER) || defined(__BORLANDC__) -+typedef __int64 Int64; -+typedef unsigned __int64 UInt64; -+#else -+typedef long long int Int64; -+typedef unsigned long long int UInt64; -+#endif -+ -+#endif -+ -+#ifdef _LZMA_NO_SYSTEM_SIZE_T -+typedef UInt32 SizeT; -+#else -+typedef size_t SizeT; -+#endif -+ -+typedef int Bool; -+#define True 1 -+#define False 0 -+ -+ -+#ifdef _WIN32 -+#define MY_STD_CALL __stdcall -+#else -+#define MY_STD_CALL -+#endif -+ -+#ifdef _MSC_VER -+ -+#if _MSC_VER >= 1300 -+#define MY_NO_INLINE __declspec(noinline) -+#else -+#define MY_NO_INLINE -+#endif -+ -+#define MY_CDECL __cdecl -+#define MY_FAST_CALL __fastcall -+ -+#else -+ -+#define MY_CDECL -+#define MY_FAST_CALL -+ -+#endif -+ -+ -+/* The following interfaces use first parameter as pointer to structure */ -+ -+typedef struct -+{ -+ SRes (*Read)(void *p, void *buf, size_t *size); -+ /* if (input(*size) != 0 && output(*size) == 0) means end_of_stream. -+ (output(*size) < input(*size)) is allowed */ -+} ISeqInStream; -+ -+/* it can return SZ_ERROR_INPUT_EOF */ -+SRes SeqInStream_Read(ISeqInStream *stream, void *buf, size_t size); -+SRes SeqInStream_Read2(ISeqInStream *stream, void *buf, size_t size, SRes errorType); -+SRes SeqInStream_ReadByte(ISeqInStream *stream, Byte *buf); -+ -+typedef struct -+{ -+ size_t (*Write)(void *p, const void *buf, size_t size); -+ /* Returns: result - the number of actually written bytes. -+ (result < size) means error */ -+} ISeqOutStream; -+ -+typedef enum -+{ -+ SZ_SEEK_SET = 0, -+ SZ_SEEK_CUR = 1, -+ SZ_SEEK_END = 2 -+} ESzSeek; -+ -+typedef struct -+{ -+ SRes (*Read)(void *p, void *buf, size_t *size); /* same as ISeqInStream::Read */ -+ SRes (*Seek)(void *p, Int64 *pos, ESzSeek origin); -+} ISeekInStream; -+ -+typedef struct -+{ -+ SRes (*Look)(void *p, void **buf, size_t *size); -+ /* if (input(*size) != 0 && output(*size) == 0) means end_of_stream. -+ (output(*size) > input(*size)) is not allowed -+ (output(*size) < input(*size)) is allowed */ -+ SRes (*Skip)(void *p, size_t offset); -+ /* offset must be <= output(*size) of Look */ -+ -+ SRes (*Read)(void *p, void *buf, size_t *size); -+ /* reads directly (without buffer). It's same as ISeqInStream::Read */ -+ SRes (*Seek)(void *p, Int64 *pos, ESzSeek origin); -+} ILookInStream; -+ -+SRes LookInStream_LookRead(ILookInStream *stream, void *buf, size_t *size); -+SRes LookInStream_SeekTo(ILookInStream *stream, UInt64 offset); -+ -+/* reads via ILookInStream::Read */ -+SRes LookInStream_Read2(ILookInStream *stream, void *buf, size_t size, SRes errorType); -+SRes LookInStream_Read(ILookInStream *stream, void *buf, size_t size); -+ -+#define LookToRead_BUF_SIZE (1 << 14) -+ -+typedef struct -+{ -+ ILookInStream s; -+ ISeekInStream *realStream; -+ size_t pos; -+ size_t size; -+ Byte buf[LookToRead_BUF_SIZE]; -+} CLookToRead; -+ -+void LookToRead_CreateVTable(CLookToRead *p, int lookahead); -+void LookToRead_Init(CLookToRead *p); -+ -+typedef struct -+{ -+ ISeqInStream s; -+ ILookInStream *realStream; -+} CSecToLook; -+ -+void SecToLook_CreateVTable(CSecToLook *p); -+ -+typedef struct -+{ -+ ISeqInStream s; -+ ILookInStream *realStream; -+} CSecToRead; -+ -+void SecToRead_CreateVTable(CSecToRead *p); -+ -+typedef struct -+{ -+ SRes (*Progress)(void *p, UInt64 inSize, UInt64 outSize); -+ /* Returns: result. (result != SZ_OK) means break. -+ Value (UInt64)(Int64)-1 for size means unknown value. */ -+} ICompressProgress; -+ -+typedef struct -+{ -+ void *(*Alloc)(void *p, size_t size); -+ void (*Free)(void *p, void *address); /* address can be 0 */ -+} ISzAlloc; -+ -+#define IAlloc_Alloc(p, size) (p)->Alloc((p), size) -+#define IAlloc_Free(p, a) (p)->Free((p), a) -+ -+EXTERN_C_END -+ -+#endif ---- a/include/uapi/linux/jffs2.h -+++ b/include/uapi/linux/jffs2.h -@@ -46,6 +46,7 @@ - #define JFFS2_COMPR_DYNRUBIN 0x05 - #define JFFS2_COMPR_ZLIB 0x06 - #define JFFS2_COMPR_LZO 0x07 -+#define JFFS2_COMPR_LZMA 0x08 - /* Compatibility flags. */ - #define JFFS2_COMPAT_MASK 0xc000 /* What do to if an unknown nodetype is found */ - #define JFFS2_NODE_ACCURATE 0x2000 ---- a/lib/Kconfig -+++ b/lib/Kconfig -@@ -346,6 +346,12 @@ config ZSTD_DECOMPRESS - - source "lib/xz/Kconfig" - -+config LZMA_COMPRESS -+ tristate -+ -+config LZMA_DECOMPRESS -+ tristate -+ - # - # These all provide a common interface (hence the apparent duplication with - # ZLIB_INFLATE; DECOMPRESS_GZIP is just a wrapper.) ---- a/lib/Makefile -+++ b/lib/Makefile -@@ -136,6 +136,16 @@ CFLAGS_kobject.o += -DDEBUG - CFLAGS_kobject_uevent.o += -DDEBUG - endif - -+ifdef CONFIG_JFFS2_ZLIB -+ CONFIG_ZLIB_INFLATE:=y -+ CONFIG_ZLIB_DEFLATE:=y -+endif -+ -+ifdef CONFIG_JFFS2_LZMA -+ CONFIG_LZMA_DECOMPRESS:=y -+ CONFIG_LZMA_COMPRESS:=y -+endif -+ - obj-$(CONFIG_DEBUG_INFO_REDUCED) += debug_info.o - CFLAGS_debug_info.o += $(call cc-option, -femit-struct-debug-detailed=any) - -@@ -194,6 +204,8 @@ obj-$(CONFIG_ZSTD_COMPRESS) += zstd/ - obj-$(CONFIG_ZSTD_DECOMPRESS) += zstd/ - obj-$(CONFIG_XZ_DEC) += xz/ - obj-$(CONFIG_RAID6_PQ) += raid6/ -+obj-$(CONFIG_LZMA_COMPRESS) += lzma/ -+obj-$(CONFIG_LZMA_DECOMPRESS) += lzma/ - - lib-$(CONFIG_DECOMPRESS_GZIP) += decompress_inflate.o - lib-$(CONFIG_DECOMPRESS_BZIP2) += decompress_bunzip2.o ---- /dev/null -+++ b/lib/lzma/LzFind.c -@@ -0,0 +1,761 @@ -+/* LzFind.c -- Match finder for LZ algorithms -+2009-04-22 : Igor Pavlov : Public domain */ -+ -+#include -+ -+#include "LzFind.h" -+#include "LzHash.h" -+ -+#define kEmptyHashValue 0 -+#define kMaxValForNormalize ((UInt32)0xFFFFFFFF) -+#define kNormalizeStepMin (1 << 10) /* it must be power of 2 */ -+#define kNormalizeMask (~(kNormalizeStepMin - 1)) -+#define kMaxHistorySize ((UInt32)3 << 30) -+ -+#define kStartMaxLen 3 -+ -+static void LzInWindow_Free(CMatchFinder *p, ISzAlloc *alloc) -+{ -+ if (!p->directInput) -+ { -+ alloc->Free(alloc, p->bufferBase); -+ p->bufferBase = 0; -+ } -+} -+ -+/* keepSizeBefore + keepSizeAfter + keepSizeReserv must be < 4G) */ -+ -+static int LzInWindow_Create(CMatchFinder *p, UInt32 keepSizeReserv, ISzAlloc *alloc) -+{ -+ UInt32 blockSize = p->keepSizeBefore + p->keepSizeAfter + keepSizeReserv; -+ if (p->directInput) -+ { -+ p->blockSize = blockSize; -+ return 1; -+ } -+ if (p->bufferBase == 0 || p->blockSize != blockSize) -+ { -+ LzInWindow_Free(p, alloc); -+ p->blockSize = blockSize; -+ p->bufferBase = (Byte *)alloc->Alloc(alloc, (size_t)blockSize); -+ } -+ return (p->bufferBase != 0); -+} -+ -+Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p) { return p->buffer; } -+Byte MatchFinder_GetIndexByte(CMatchFinder *p, Int32 index) { return p->buffer[index]; } -+ -+UInt32 MatchFinder_GetNumAvailableBytes(CMatchFinder *p) { return p->streamPos - p->pos; } -+ -+void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue) -+{ -+ p->posLimit -= subValue; -+ p->pos -= subValue; -+ p->streamPos -= subValue; -+} -+ -+static void MatchFinder_ReadBlock(CMatchFinder *p) -+{ -+ if (p->streamEndWasReached || p->result != SZ_OK) -+ return; -+ if (p->directInput) -+ { -+ UInt32 curSize = 0xFFFFFFFF - p->streamPos; -+ if (curSize > p->directInputRem) -+ curSize = (UInt32)p->directInputRem; -+ p->directInputRem -= curSize; -+ p->streamPos += curSize; -+ if (p->directInputRem == 0) -+ p->streamEndWasReached = 1; -+ return; -+ } -+ for (;;) -+ { -+ Byte *dest = p->buffer + (p->streamPos - p->pos); -+ size_t size = (p->bufferBase + p->blockSize - dest); -+ if (size == 0) -+ return; -+ p->result = p->stream->Read(p->stream, dest, &size); -+ if (p->result != SZ_OK) -+ return; -+ if (size == 0) -+ { -+ p->streamEndWasReached = 1; -+ return; -+ } -+ p->streamPos += (UInt32)size; -+ if (p->streamPos - p->pos > p->keepSizeAfter) -+ return; -+ } -+} -+ -+void MatchFinder_MoveBlock(CMatchFinder *p) -+{ -+ memmove(p->bufferBase, -+ p->buffer - p->keepSizeBefore, -+ (size_t)(p->streamPos - p->pos + p->keepSizeBefore)); -+ p->buffer = p->bufferBase + p->keepSizeBefore; -+} -+ -+int MatchFinder_NeedMove(CMatchFinder *p) -+{ -+ if (p->directInput) -+ return 0; -+ /* if (p->streamEndWasReached) return 0; */ -+ return ((size_t)(p->bufferBase + p->blockSize - p->buffer) <= p->keepSizeAfter); -+} -+ -+void MatchFinder_ReadIfRequired(CMatchFinder *p) -+{ -+ if (p->streamEndWasReached) -+ return; -+ if (p->keepSizeAfter >= p->streamPos - p->pos) -+ MatchFinder_ReadBlock(p); -+} -+ -+static void MatchFinder_CheckAndMoveAndRead(CMatchFinder *p) -+{ -+ if (MatchFinder_NeedMove(p)) -+ MatchFinder_MoveBlock(p); -+ MatchFinder_ReadBlock(p); -+} -+ -+static void MatchFinder_SetDefaultSettings(CMatchFinder *p) -+{ -+ p->cutValue = 32; -+ p->btMode = 1; -+ p->numHashBytes = 4; -+ p->bigHash = 0; -+} -+ -+#define kCrcPoly 0xEDB88320 -+ -+void MatchFinder_Construct(CMatchFinder *p) -+{ -+ UInt32 i; -+ p->bufferBase = 0; -+ p->directInput = 0; -+ p->hash = 0; -+ MatchFinder_SetDefaultSettings(p); -+ -+ for (i = 0; i < 256; i++) -+ { -+ UInt32 r = i; -+ int j; -+ for (j = 0; j < 8; j++) -+ r = (r >> 1) ^ (kCrcPoly & ~((r & 1) - 1)); -+ p->crc[i] = r; -+ } -+} -+ -+static void MatchFinder_FreeThisClassMemory(CMatchFinder *p, ISzAlloc *alloc) -+{ -+ alloc->Free(alloc, p->hash); -+ p->hash = 0; -+} -+ -+void MatchFinder_Free(CMatchFinder *p, ISzAlloc *alloc) -+{ -+ MatchFinder_FreeThisClassMemory(p, alloc); -+ LzInWindow_Free(p, alloc); -+} -+ -+static CLzRef* AllocRefs(UInt32 num, ISzAlloc *alloc) -+{ -+ size_t sizeInBytes = (size_t)num * sizeof(CLzRef); -+ if (sizeInBytes / sizeof(CLzRef) != num) -+ return 0; -+ return (CLzRef *)alloc->Alloc(alloc, sizeInBytes); -+} -+ -+int MatchFinder_Create(CMatchFinder *p, UInt32 historySize, -+ UInt32 keepAddBufferBefore, UInt32 matchMaxLen, UInt32 keepAddBufferAfter, -+ ISzAlloc *alloc) -+{ -+ UInt32 sizeReserv; -+ if (historySize > kMaxHistorySize) -+ { -+ MatchFinder_Free(p, alloc); -+ return 0; -+ } -+ sizeReserv = historySize >> 1; -+ if (historySize > ((UInt32)2 << 30)) -+ sizeReserv = historySize >> 2; -+ sizeReserv += (keepAddBufferBefore + matchMaxLen + keepAddBufferAfter) / 2 + (1 << 19); -+ -+ p->keepSizeBefore = historySize + keepAddBufferBefore + 1; -+ p->keepSizeAfter = matchMaxLen + keepAddBufferAfter; -+ /* we need one additional byte, since we use MoveBlock after pos++ and before dictionary using */ -+ if (LzInWindow_Create(p, sizeReserv, alloc)) -+ { -+ UInt32 newCyclicBufferSize = historySize + 1; -+ UInt32 hs; -+ p->matchMaxLen = matchMaxLen; -+ { -+ p->fixedHashSize = 0; -+ if (p->numHashBytes == 2) -+ hs = (1 << 16) - 1; -+ else -+ { -+ hs = historySize - 1; -+ hs |= (hs >> 1); -+ hs |= (hs >> 2); -+ hs |= (hs >> 4); -+ hs |= (hs >> 8); -+ hs >>= 1; -+ hs |= 0xFFFF; /* don't change it! It's required for Deflate */ -+ if (hs > (1 << 24)) -+ { -+ if (p->numHashBytes == 3) -+ hs = (1 << 24) - 1; -+ else -+ hs >>= 1; -+ } -+ } -+ p->hashMask = hs; -+ hs++; -+ if (p->numHashBytes > 2) p->fixedHashSize += kHash2Size; -+ if (p->numHashBytes > 3) p->fixedHashSize += kHash3Size; -+ if (p->numHashBytes > 4) p->fixedHashSize += kHash4Size; -+ hs += p->fixedHashSize; -+ } -+ -+ { -+ UInt32 prevSize = p->hashSizeSum + p->numSons; -+ UInt32 newSize; -+ p->historySize = historySize; -+ p->hashSizeSum = hs; -+ p->cyclicBufferSize = newCyclicBufferSize; -+ p->numSons = (p->btMode ? newCyclicBufferSize * 2 : newCyclicBufferSize); -+ newSize = p->hashSizeSum + p->numSons; -+ if (p->hash != 0 && prevSize == newSize) -+ return 1; -+ MatchFinder_FreeThisClassMemory(p, alloc); -+ p->hash = AllocRefs(newSize, alloc); -+ if (p->hash != 0) -+ { -+ p->son = p->hash + p->hashSizeSum; -+ return 1; -+ } -+ } -+ } -+ MatchFinder_Free(p, alloc); -+ return 0; -+} -+ -+static void MatchFinder_SetLimits(CMatchFinder *p) -+{ -+ UInt32 limit = kMaxValForNormalize - p->pos; -+ UInt32 limit2 = p->cyclicBufferSize - p->cyclicBufferPos; -+ if (limit2 < limit) -+ limit = limit2; -+ limit2 = p->streamPos - p->pos; -+ if (limit2 <= p->keepSizeAfter) -+ { -+ if (limit2 > 0) -+ limit2 = 1; -+ } -+ else -+ limit2 -= p->keepSizeAfter; -+ if (limit2 < limit) -+ limit = limit2; -+ { -+ UInt32 lenLimit = p->streamPos - p->pos; -+ if (lenLimit > p->matchMaxLen) -+ lenLimit = p->matchMaxLen; -+ p->lenLimit = lenLimit; -+ } -+ p->posLimit = p->pos + limit; -+} -+ -+void MatchFinder_Init(CMatchFinder *p) -+{ -+ UInt32 i; -+ for (i = 0; i < p->hashSizeSum; i++) -+ p->hash[i] = kEmptyHashValue; -+ p->cyclicBufferPos = 0; -+ p->buffer = p->bufferBase; -+ p->pos = p->streamPos = p->cyclicBufferSize; -+ p->result = SZ_OK; -+ p->streamEndWasReached = 0; -+ MatchFinder_ReadBlock(p); -+ MatchFinder_SetLimits(p); -+} -+ -+static UInt32 MatchFinder_GetSubValue(CMatchFinder *p) -+{ -+ return (p->pos - p->historySize - 1) & kNormalizeMask; -+} -+ -+void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems) -+{ -+ UInt32 i; -+ for (i = 0; i < numItems; i++) -+ { -+ UInt32 value = items[i]; -+ if (value <= subValue) -+ value = kEmptyHashValue; -+ else -+ value -= subValue; -+ items[i] = value; -+ } -+} -+ -+static void MatchFinder_Normalize(CMatchFinder *p) -+{ -+ UInt32 subValue = MatchFinder_GetSubValue(p); -+ MatchFinder_Normalize3(subValue, p->hash, p->hashSizeSum + p->numSons); -+ MatchFinder_ReduceOffsets(p, subValue); -+} -+ -+static void MatchFinder_CheckLimits(CMatchFinder *p) -+{ -+ if (p->pos == kMaxValForNormalize) -+ MatchFinder_Normalize(p); -+ if (!p->streamEndWasReached && p->keepSizeAfter == p->streamPos - p->pos) -+ MatchFinder_CheckAndMoveAndRead(p); -+ if (p->cyclicBufferPos == p->cyclicBufferSize) -+ p->cyclicBufferPos = 0; -+ MatchFinder_SetLimits(p); -+} -+ -+static UInt32 * Hc_GetMatchesSpec(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son, -+ UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue, -+ UInt32 *distances, UInt32 maxLen) -+{ -+ son[_cyclicBufferPos] = curMatch; -+ for (;;) -+ { -+ UInt32 delta = pos - curMatch; -+ if (cutValue-- == 0 || delta >= _cyclicBufferSize) -+ return distances; -+ { -+ const Byte *pb = cur - delta; -+ curMatch = son[_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)]; -+ if (pb[maxLen] == cur[maxLen] && *pb == *cur) -+ { -+ UInt32 len = 0; -+ while (++len != lenLimit) -+ if (pb[len] != cur[len]) -+ break; -+ if (maxLen < len) -+ { -+ *distances++ = maxLen = len; -+ *distances++ = delta - 1; -+ if (len == lenLimit) -+ return distances; -+ } -+ } -+ } -+ } -+} -+ -+UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son, -+ UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue, -+ UInt32 *distances, UInt32 maxLen) -+{ -+ CLzRef *ptr0 = son + (_cyclicBufferPos << 1) + 1; -+ CLzRef *ptr1 = son + (_cyclicBufferPos << 1); -+ UInt32 len0 = 0, len1 = 0; -+ for (;;) -+ { -+ UInt32 delta = pos - curMatch; -+ if (cutValue-- == 0 || delta >= _cyclicBufferSize) -+ { -+ *ptr0 = *ptr1 = kEmptyHashValue; -+ return distances; -+ } -+ { -+ CLzRef *pair = son + ((_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)) << 1); -+ const Byte *pb = cur - delta; -+ UInt32 len = (len0 < len1 ? len0 : len1); -+ if (pb[len] == cur[len]) -+ { -+ if (++len != lenLimit && pb[len] == cur[len]) -+ while (++len != lenLimit) -+ if (pb[len] != cur[len]) -+ break; -+ if (maxLen < len) -+ { -+ *distances++ = maxLen = len; -+ *distances++ = delta - 1; -+ if (len == lenLimit) -+ { -+ *ptr1 = pair[0]; -+ *ptr0 = pair[1]; -+ return distances; -+ } -+ } -+ } -+ if (pb[len] < cur[len]) -+ { -+ *ptr1 = curMatch; -+ ptr1 = pair + 1; -+ curMatch = *ptr1; -+ len1 = len; -+ } -+ else -+ { -+ *ptr0 = curMatch; -+ ptr0 = pair; -+ curMatch = *ptr0; -+ len0 = len; -+ } -+ } -+ } -+} -+ -+static void SkipMatchesSpec(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son, -+ UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue) -+{ -+ CLzRef *ptr0 = son + (_cyclicBufferPos << 1) + 1; -+ CLzRef *ptr1 = son + (_cyclicBufferPos << 1); -+ UInt32 len0 = 0, len1 = 0; -+ for (;;) -+ { -+ UInt32 delta = pos - curMatch; -+ if (cutValue-- == 0 || delta >= _cyclicBufferSize) -+ { -+ *ptr0 = *ptr1 = kEmptyHashValue; -+ return; -+ } -+ { -+ CLzRef *pair = son + ((_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)) << 1); -+ const Byte *pb = cur - delta; -+ UInt32 len = (len0 < len1 ? len0 : len1); -+ if (pb[len] == cur[len]) -+ { -+ while (++len != lenLimit) -+ if (pb[len] != cur[len]) -+ break; -+ { -+ if (len == lenLimit) -+ { -+ *ptr1 = pair[0]; -+ *ptr0 = pair[1]; -+ return; -+ } -+ } -+ } -+ if (pb[len] < cur[len]) -+ { -+ *ptr1 = curMatch; -+ ptr1 = pair + 1; -+ curMatch = *ptr1; -+ len1 = len; -+ } -+ else -+ { -+ *ptr0 = curMatch; -+ ptr0 = pair; -+ curMatch = *ptr0; -+ len0 = len; -+ } -+ } -+ } -+} -+ -+#define MOVE_POS \ -+ ++p->cyclicBufferPos; \ -+ p->buffer++; \ -+ if (++p->pos == p->posLimit) MatchFinder_CheckLimits(p); -+ -+#define MOVE_POS_RET MOVE_POS return offset; -+ -+static void MatchFinder_MovePos(CMatchFinder *p) { MOVE_POS; } -+ -+#define GET_MATCHES_HEADER2(minLen, ret_op) \ -+ UInt32 lenLimit; UInt32 hashValue; const Byte *cur; UInt32 curMatch; \ -+ lenLimit = p->lenLimit; { if (lenLimit < minLen) { MatchFinder_MovePos(p); ret_op; }} \ -+ cur = p->buffer; -+ -+#define GET_MATCHES_HEADER(minLen) GET_MATCHES_HEADER2(minLen, return 0) -+#define SKIP_HEADER(minLen) GET_MATCHES_HEADER2(minLen, continue) -+ -+#define MF_PARAMS(p) p->pos, p->buffer, p->son, p->cyclicBufferPos, p->cyclicBufferSize, p->cutValue -+ -+#define GET_MATCHES_FOOTER(offset, maxLen) \ -+ offset = (UInt32)(GetMatchesSpec1(lenLimit, curMatch, MF_PARAMS(p), \ -+ distances + offset, maxLen) - distances); MOVE_POS_RET; -+ -+#define SKIP_FOOTER \ -+ SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p)); MOVE_POS; -+ -+static UInt32 Bt2_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances) -+{ -+ UInt32 offset; -+ GET_MATCHES_HEADER(2) -+ HASH2_CALC; -+ curMatch = p->hash[hashValue]; -+ p->hash[hashValue] = p->pos; -+ offset = 0; -+ GET_MATCHES_FOOTER(offset, 1) -+} -+ -+UInt32 Bt3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances) -+{ -+ UInt32 offset; -+ GET_MATCHES_HEADER(3) -+ HASH_ZIP_CALC; -+ curMatch = p->hash[hashValue]; -+ p->hash[hashValue] = p->pos; -+ offset = 0; -+ GET_MATCHES_FOOTER(offset, 2) -+} -+ -+static UInt32 Bt3_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances) -+{ -+ UInt32 hash2Value, delta2, maxLen, offset; -+ GET_MATCHES_HEADER(3) -+ -+ HASH3_CALC; -+ -+ delta2 = p->pos - p->hash[hash2Value]; -+ curMatch = p->hash[kFix3HashSize + hashValue]; -+ -+ p->hash[hash2Value] = -+ p->hash[kFix3HashSize + hashValue] = p->pos; -+ -+ -+ maxLen = 2; -+ offset = 0; -+ if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur) -+ { -+ for (; maxLen != lenLimit; maxLen++) -+ if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen]) -+ break; -+ distances[0] = maxLen; -+ distances[1] = delta2 - 1; -+ offset = 2; -+ if (maxLen == lenLimit) -+ { -+ SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p)); -+ MOVE_POS_RET; -+ } -+ } -+ GET_MATCHES_FOOTER(offset, maxLen) -+} -+ -+static UInt32 Bt4_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances) -+{ -+ UInt32 hash2Value, hash3Value, delta2, delta3, maxLen, offset; -+ GET_MATCHES_HEADER(4) -+ -+ HASH4_CALC; -+ -+ delta2 = p->pos - p->hash[ hash2Value]; -+ delta3 = p->pos - p->hash[kFix3HashSize + hash3Value]; -+ curMatch = p->hash[kFix4HashSize + hashValue]; -+ -+ p->hash[ hash2Value] = -+ p->hash[kFix3HashSize + hash3Value] = -+ p->hash[kFix4HashSize + hashValue] = p->pos; -+ -+ maxLen = 1; -+ offset = 0; -+ if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur) -+ { -+ distances[0] = maxLen = 2; -+ distances[1] = delta2 - 1; -+ offset = 2; -+ } -+ if (delta2 != delta3 && delta3 < p->cyclicBufferSize && *(cur - delta3) == *cur) -+ { -+ maxLen = 3; -+ distances[offset + 1] = delta3 - 1; -+ offset += 2; -+ delta2 = delta3; -+ } -+ if (offset != 0) -+ { -+ for (; maxLen != lenLimit; maxLen++) -+ if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen]) -+ break; -+ distances[offset - 2] = maxLen; -+ if (maxLen == lenLimit) -+ { -+ SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p)); -+ MOVE_POS_RET; -+ } -+ } -+ if (maxLen < 3) -+ maxLen = 3; -+ GET_MATCHES_FOOTER(offset, maxLen) -+} -+ -+static UInt32 Hc4_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances) -+{ -+ UInt32 hash2Value, hash3Value, delta2, delta3, maxLen, offset; -+ GET_MATCHES_HEADER(4) -+ -+ HASH4_CALC; -+ -+ delta2 = p->pos - p->hash[ hash2Value]; -+ delta3 = p->pos - p->hash[kFix3HashSize + hash3Value]; -+ curMatch = p->hash[kFix4HashSize + hashValue]; -+ -+ p->hash[ hash2Value] = -+ p->hash[kFix3HashSize + hash3Value] = -+ p->hash[kFix4HashSize + hashValue] = p->pos; -+ -+ maxLen = 1; -+ offset = 0; -+ if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur) -+ { -+ distances[0] = maxLen = 2; -+ distances[1] = delta2 - 1; -+ offset = 2; -+ } -+ if (delta2 != delta3 && delta3 < p->cyclicBufferSize && *(cur - delta3) == *cur) -+ { -+ maxLen = 3; -+ distances[offset + 1] = delta3 - 1; -+ offset += 2; -+ delta2 = delta3; -+ } -+ if (offset != 0) -+ { -+ for (; maxLen != lenLimit; maxLen++) -+ if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen]) -+ break; -+ distances[offset - 2] = maxLen; -+ if (maxLen == lenLimit) -+ { -+ p->son[p->cyclicBufferPos] = curMatch; -+ MOVE_POS_RET; -+ } -+ } -+ if (maxLen < 3) -+ maxLen = 3; -+ offset = (UInt32)(Hc_GetMatchesSpec(lenLimit, curMatch, MF_PARAMS(p), -+ distances + offset, maxLen) - (distances)); -+ MOVE_POS_RET -+} -+ -+UInt32 Hc3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances) -+{ -+ UInt32 offset; -+ GET_MATCHES_HEADER(3) -+ HASH_ZIP_CALC; -+ curMatch = p->hash[hashValue]; -+ p->hash[hashValue] = p->pos; -+ offset = (UInt32)(Hc_GetMatchesSpec(lenLimit, curMatch, MF_PARAMS(p), -+ distances, 2) - (distances)); -+ MOVE_POS_RET -+} -+ -+static void Bt2_MatchFinder_Skip(CMatchFinder *p, UInt32 num) -+{ -+ do -+ { -+ SKIP_HEADER(2) -+ HASH2_CALC; -+ curMatch = p->hash[hashValue]; -+ p->hash[hashValue] = p->pos; -+ SKIP_FOOTER -+ } -+ while (--num != 0); -+} -+ -+void Bt3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num) -+{ -+ do -+ { -+ SKIP_HEADER(3) -+ HASH_ZIP_CALC; -+ curMatch = p->hash[hashValue]; -+ p->hash[hashValue] = p->pos; -+ SKIP_FOOTER -+ } -+ while (--num != 0); -+} -+ -+static void Bt3_MatchFinder_Skip(CMatchFinder *p, UInt32 num) -+{ -+ do -+ { -+ UInt32 hash2Value; -+ SKIP_HEADER(3) -+ HASH3_CALC; -+ curMatch = p->hash[kFix3HashSize + hashValue]; -+ p->hash[hash2Value] = -+ p->hash[kFix3HashSize + hashValue] = p->pos; -+ SKIP_FOOTER -+ } -+ while (--num != 0); -+} -+ -+static void Bt4_MatchFinder_Skip(CMatchFinder *p, UInt32 num) -+{ -+ do -+ { -+ UInt32 hash2Value, hash3Value; -+ SKIP_HEADER(4) -+ HASH4_CALC; -+ curMatch = p->hash[kFix4HashSize + hashValue]; -+ p->hash[ hash2Value] = -+ p->hash[kFix3HashSize + hash3Value] = p->pos; -+ p->hash[kFix4HashSize + hashValue] = p->pos; -+ SKIP_FOOTER -+ } -+ while (--num != 0); -+} -+ -+static void Hc4_MatchFinder_Skip(CMatchFinder *p, UInt32 num) -+{ -+ do -+ { -+ UInt32 hash2Value, hash3Value; -+ SKIP_HEADER(4) -+ HASH4_CALC; -+ curMatch = p->hash[kFix4HashSize + hashValue]; -+ p->hash[ hash2Value] = -+ p->hash[kFix3HashSize + hash3Value] = -+ p->hash[kFix4HashSize + hashValue] = p->pos; -+ p->son[p->cyclicBufferPos] = curMatch; -+ MOVE_POS -+ } -+ while (--num != 0); -+} -+ -+void Hc3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num) -+{ -+ do -+ { -+ SKIP_HEADER(3) -+ HASH_ZIP_CALC; -+ curMatch = p->hash[hashValue]; -+ p->hash[hashValue] = p->pos; -+ p->son[p->cyclicBufferPos] = curMatch; -+ MOVE_POS -+ } -+ while (--num != 0); -+} -+ -+void MatchFinder_CreateVTable(CMatchFinder *p, IMatchFinder *vTable) -+{ -+ vTable->Init = (Mf_Init_Func)MatchFinder_Init; -+ vTable->GetIndexByte = (Mf_GetIndexByte_Func)MatchFinder_GetIndexByte; -+ vTable->GetNumAvailableBytes = (Mf_GetNumAvailableBytes_Func)MatchFinder_GetNumAvailableBytes; -+ vTable->GetPointerToCurrentPos = (Mf_GetPointerToCurrentPos_Func)MatchFinder_GetPointerToCurrentPos; -+ if (!p->btMode) -+ { -+ vTable->GetMatches = (Mf_GetMatches_Func)Hc4_MatchFinder_GetMatches; -+ vTable->Skip = (Mf_Skip_Func)Hc4_MatchFinder_Skip; -+ } -+ else if (p->numHashBytes == 2) -+ { -+ vTable->GetMatches = (Mf_GetMatches_Func)Bt2_MatchFinder_GetMatches; -+ vTable->Skip = (Mf_Skip_Func)Bt2_MatchFinder_Skip; -+ } -+ else if (p->numHashBytes == 3) -+ { -+ vTable->GetMatches = (Mf_GetMatches_Func)Bt3_MatchFinder_GetMatches; -+ vTable->Skip = (Mf_Skip_Func)Bt3_MatchFinder_Skip; -+ } -+ else -+ { -+ vTable->GetMatches = (Mf_GetMatches_Func)Bt4_MatchFinder_GetMatches; -+ vTable->Skip = (Mf_Skip_Func)Bt4_MatchFinder_Skip; -+ } -+} ---- /dev/null -+++ b/lib/lzma/LzmaDec.c -@@ -0,0 +1,999 @@ -+/* LzmaDec.c -- LZMA Decoder -+2009-09-20 : Igor Pavlov : Public domain */ -+ -+#include "LzmaDec.h" -+ -+#include -+ -+#define kNumTopBits 24 -+#define kTopValue ((UInt32)1 << kNumTopBits) -+ -+#define kNumBitModelTotalBits 11 -+#define kBitModelTotal (1 << kNumBitModelTotalBits) -+#define kNumMoveBits 5 -+ -+#define RC_INIT_SIZE 5 -+ -+#define NORMALIZE if (range < kTopValue) { range <<= 8; code = (code << 8) | (*buf++); } -+ -+#define IF_BIT_0(p) ttt = *(p); NORMALIZE; bound = (range >> kNumBitModelTotalBits) * ttt; if (code < bound) -+#define UPDATE_0(p) range = bound; *(p) = (CLzmaProb)(ttt + ((kBitModelTotal - ttt) >> kNumMoveBits)); -+#define UPDATE_1(p) range -= bound; code -= bound; *(p) = (CLzmaProb)(ttt - (ttt >> kNumMoveBits)); -+#define GET_BIT2(p, i, A0, A1) IF_BIT_0(p) \ -+ { UPDATE_0(p); i = (i + i); A0; } else \ -+ { UPDATE_1(p); i = (i + i) + 1; A1; } -+#define GET_BIT(p, i) GET_BIT2(p, i, ; , ;) -+ -+#define TREE_GET_BIT(probs, i) { GET_BIT((probs + i), i); } -+#define TREE_DECODE(probs, limit, i) \ -+ { i = 1; do { TREE_GET_BIT(probs, i); } while (i < limit); i -= limit; } -+ -+/* #define _LZMA_SIZE_OPT */ -+ -+#ifdef _LZMA_SIZE_OPT -+#define TREE_6_DECODE(probs, i) TREE_DECODE(probs, (1 << 6), i) -+#else -+#define TREE_6_DECODE(probs, i) \ -+ { i = 1; \ -+ TREE_GET_BIT(probs, i); \ -+ TREE_GET_BIT(probs, i); \ -+ TREE_GET_BIT(probs, i); \ -+ TREE_GET_BIT(probs, i); \ -+ TREE_GET_BIT(probs, i); \ -+ TREE_GET_BIT(probs, i); \ -+ i -= 0x40; } -+#endif -+ -+#define NORMALIZE_CHECK if (range < kTopValue) { if (buf >= bufLimit) return DUMMY_ERROR; range <<= 8; code = (code << 8) | (*buf++); } -+ -+#define IF_BIT_0_CHECK(p) ttt = *(p); NORMALIZE_CHECK; bound = (range >> kNumBitModelTotalBits) * ttt; if (code < bound) -+#define UPDATE_0_CHECK range = bound; -+#define UPDATE_1_CHECK range -= bound; code -= bound; -+#define GET_BIT2_CHECK(p, i, A0, A1) IF_BIT_0_CHECK(p) \ -+ { UPDATE_0_CHECK; i = (i + i); A0; } else \ -+ { UPDATE_1_CHECK; i = (i + i) + 1; A1; } -+#define GET_BIT_CHECK(p, i) GET_BIT2_CHECK(p, i, ; , ;) -+#define TREE_DECODE_CHECK(probs, limit, i) \ -+ { i = 1; do { GET_BIT_CHECK(probs + i, i) } while (i < limit); i -= limit; } -+ -+ -+#define kNumPosBitsMax 4 -+#define kNumPosStatesMax (1 << kNumPosBitsMax) -+ -+#define kLenNumLowBits 3 -+#define kLenNumLowSymbols (1 << kLenNumLowBits) -+#define kLenNumMidBits 3 -+#define kLenNumMidSymbols (1 << kLenNumMidBits) -+#define kLenNumHighBits 8 -+#define kLenNumHighSymbols (1 << kLenNumHighBits) -+ -+#define LenChoice 0 -+#define LenChoice2 (LenChoice + 1) -+#define LenLow (LenChoice2 + 1) -+#define LenMid (LenLow + (kNumPosStatesMax << kLenNumLowBits)) -+#define LenHigh (LenMid + (kNumPosStatesMax << kLenNumMidBits)) -+#define kNumLenProbs (LenHigh + kLenNumHighSymbols) -+ -+ -+#define kNumStates 12 -+#define kNumLitStates 7 -+ -+#define kStartPosModelIndex 4 -+#define kEndPosModelIndex 14 -+#define kNumFullDistances (1 << (kEndPosModelIndex >> 1)) -+ -+#define kNumPosSlotBits 6 -+#define kNumLenToPosStates 4 -+ -+#define kNumAlignBits 4 -+#define kAlignTableSize (1 << kNumAlignBits) -+ -+#define kMatchMinLen 2 -+#define kMatchSpecLenStart (kMatchMinLen + kLenNumLowSymbols + kLenNumMidSymbols + kLenNumHighSymbols) -+ -+#define IsMatch 0 -+#define IsRep (IsMatch + (kNumStates << kNumPosBitsMax)) -+#define IsRepG0 (IsRep + kNumStates) -+#define IsRepG1 (IsRepG0 + kNumStates) -+#define IsRepG2 (IsRepG1 + kNumStates) -+#define IsRep0Long (IsRepG2 + kNumStates) -+#define PosSlot (IsRep0Long + (kNumStates << kNumPosBitsMax)) -+#define SpecPos (PosSlot + (kNumLenToPosStates << kNumPosSlotBits)) -+#define Align (SpecPos + kNumFullDistances - kEndPosModelIndex) -+#define LenCoder (Align + kAlignTableSize) -+#define RepLenCoder (LenCoder + kNumLenProbs) -+#define Literal (RepLenCoder + kNumLenProbs) -+ -+#define LZMA_BASE_SIZE 1846 -+#define LZMA_LIT_SIZE 768 -+ -+#define LzmaProps_GetNumProbs(p) ((UInt32)LZMA_BASE_SIZE + (LZMA_LIT_SIZE << ((p)->lc + (p)->lp))) -+ -+#if Literal != LZMA_BASE_SIZE -+StopCompilingDueBUG -+#endif -+ -+#define LZMA_DIC_MIN (1 << 12) -+ -+/* First LZMA-symbol is always decoded. -+And it decodes new LZMA-symbols while (buf < bufLimit), but "buf" is without last normalization -+Out: -+ Result: -+ SZ_OK - OK -+ SZ_ERROR_DATA - Error -+ p->remainLen: -+ < kMatchSpecLenStart : normal remain -+ = kMatchSpecLenStart : finished -+ = kMatchSpecLenStart + 1 : Flush marker -+ = kMatchSpecLenStart + 2 : State Init Marker -+*/ -+ -+static int MY_FAST_CALL LzmaDec_DecodeReal(CLzmaDec *p, SizeT limit, const Byte *bufLimit) -+{ -+ CLzmaProb *probs = p->probs; -+ -+ unsigned state = p->state; -+ UInt32 rep0 = p->reps[0], rep1 = p->reps[1], rep2 = p->reps[2], rep3 = p->reps[3]; -+ unsigned pbMask = ((unsigned)1 << (p->prop.pb)) - 1; -+ unsigned lpMask = ((unsigned)1 << (p->prop.lp)) - 1; -+ unsigned lc = p->prop.lc; -+ -+ Byte *dic = p->dic; -+ SizeT dicBufSize = p->dicBufSize; -+ SizeT dicPos = p->dicPos; -+ -+ UInt32 processedPos = p->processedPos; -+ UInt32 checkDicSize = p->checkDicSize; -+ unsigned len = 0; -+ -+ const Byte *buf = p->buf; -+ UInt32 range = p->range; -+ UInt32 code = p->code; -+ -+ do -+ { -+ CLzmaProb *prob; -+ UInt32 bound; -+ unsigned ttt; -+ unsigned posState = processedPos & pbMask; -+ -+ prob = probs + IsMatch + (state << kNumPosBitsMax) + posState; -+ IF_BIT_0(prob) -+ { -+ unsigned symbol; -+ UPDATE_0(prob); -+ prob = probs + Literal; -+ if (checkDicSize != 0 || processedPos != 0) -+ prob += (LZMA_LIT_SIZE * (((processedPos & lpMask) << lc) + -+ (dic[(dicPos == 0 ? dicBufSize : dicPos) - 1] >> (8 - lc)))); -+ -+ if (state < kNumLitStates) -+ { -+ state -= (state < 4) ? state : 3; -+ symbol = 1; -+ do { GET_BIT(prob + symbol, symbol) } while (symbol < 0x100); -+ } -+ else -+ { -+ unsigned matchByte = p->dic[(dicPos - rep0) + ((dicPos < rep0) ? dicBufSize : 0)]; -+ unsigned offs = 0x100; -+ state -= (state < 10) ? 3 : 6; -+ symbol = 1; -+ do -+ { -+ unsigned bit; -+ CLzmaProb *probLit; -+ matchByte <<= 1; -+ bit = (matchByte & offs); -+ probLit = prob + offs + bit + symbol; -+ GET_BIT2(probLit, symbol, offs &= ~bit, offs &= bit) -+ } -+ while (symbol < 0x100); -+ } -+ dic[dicPos++] = (Byte)symbol; -+ processedPos++; -+ continue; -+ } -+ else -+ { -+ UPDATE_1(prob); -+ prob = probs + IsRep + state; -+ IF_BIT_0(prob) -+ { -+ UPDATE_0(prob); -+ state += kNumStates; -+ prob = probs + LenCoder; -+ } -+ else -+ { -+ UPDATE_1(prob); -+ if (checkDicSize == 0 && processedPos == 0) -+ return SZ_ERROR_DATA; -+ prob = probs + IsRepG0 + state; -+ IF_BIT_0(prob) -+ { -+ UPDATE_0(prob); -+ prob = probs + IsRep0Long + (state << kNumPosBitsMax) + posState; -+ IF_BIT_0(prob) -+ { -+ UPDATE_0(prob); -+ dic[dicPos] = dic[(dicPos - rep0) + ((dicPos < rep0) ? dicBufSize : 0)]; -+ dicPos++; -+ processedPos++; -+ state = state < kNumLitStates ? 9 : 11; -+ continue; -+ } -+ UPDATE_1(prob); -+ } -+ else -+ { -+ UInt32 distance; -+ UPDATE_1(prob); -+ prob = probs + IsRepG1 + state; -+ IF_BIT_0(prob) -+ { -+ UPDATE_0(prob); -+ distance = rep1; -+ } -+ else -+ { -+ UPDATE_1(prob); -+ prob = probs + IsRepG2 + state; -+ IF_BIT_0(prob) -+ { -+ UPDATE_0(prob); -+ distance = rep2; -+ } -+ else -+ { -+ UPDATE_1(prob); -+ distance = rep3; -+ rep3 = rep2; -+ } -+ rep2 = rep1; -+ } -+ rep1 = rep0; -+ rep0 = distance; -+ } -+ state = state < kNumLitStates ? 8 : 11; -+ prob = probs + RepLenCoder; -+ } -+ { -+ unsigned limit, offset; -+ CLzmaProb *probLen = prob + LenChoice; -+ IF_BIT_0(probLen) -+ { -+ UPDATE_0(probLen); -+ probLen = prob + LenLow + (posState << kLenNumLowBits); -+ offset = 0; -+ limit = (1 << kLenNumLowBits); -+ } -+ else -+ { -+ UPDATE_1(probLen); -+ probLen = prob + LenChoice2; -+ IF_BIT_0(probLen) -+ { -+ UPDATE_0(probLen); -+ probLen = prob + LenMid + (posState << kLenNumMidBits); -+ offset = kLenNumLowSymbols; -+ limit = (1 << kLenNumMidBits); -+ } -+ else -+ { -+ UPDATE_1(probLen); -+ probLen = prob + LenHigh; -+ offset = kLenNumLowSymbols + kLenNumMidSymbols; -+ limit = (1 << kLenNumHighBits); -+ } -+ } -+ TREE_DECODE(probLen, limit, len); -+ len += offset; -+ } -+ -+ if (state >= kNumStates) -+ { -+ UInt32 distance; -+ prob = probs + PosSlot + -+ ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) << kNumPosSlotBits); -+ TREE_6_DECODE(prob, distance); -+ if (distance >= kStartPosModelIndex) -+ { -+ unsigned posSlot = (unsigned)distance; -+ int numDirectBits = (int)(((distance >> 1) - 1)); -+ distance = (2 | (distance & 1)); -+ if (posSlot < kEndPosModelIndex) -+ { -+ distance <<= numDirectBits; -+ prob = probs + SpecPos + distance - posSlot - 1; -+ { -+ UInt32 mask = 1; -+ unsigned i = 1; -+ do -+ { -+ GET_BIT2(prob + i, i, ; , distance |= mask); -+ mask <<= 1; -+ } -+ while (--numDirectBits != 0); -+ } -+ } -+ else -+ { -+ numDirectBits -= kNumAlignBits; -+ do -+ { -+ NORMALIZE -+ range >>= 1; -+ -+ { -+ UInt32 t; -+ code -= range; -+ t = (0 - ((UInt32)code >> 31)); /* (UInt32)((Int32)code >> 31) */ -+ distance = (distance << 1) + (t + 1); -+ code += range & t; -+ } -+ /* -+ distance <<= 1; -+ if (code >= range) -+ { -+ code -= range; -+ distance |= 1; -+ } -+ */ -+ } -+ while (--numDirectBits != 0); -+ prob = probs + Align; -+ distance <<= kNumAlignBits; -+ { -+ unsigned i = 1; -+ GET_BIT2(prob + i, i, ; , distance |= 1); -+ GET_BIT2(prob + i, i, ; , distance |= 2); -+ GET_BIT2(prob + i, i, ; , distance |= 4); -+ GET_BIT2(prob + i, i, ; , distance |= 8); -+ } -+ if (distance == (UInt32)0xFFFFFFFF) -+ { -+ len += kMatchSpecLenStart; -+ state -= kNumStates; -+ break; -+ } -+ } -+ } -+ rep3 = rep2; -+ rep2 = rep1; -+ rep1 = rep0; -+ rep0 = distance + 1; -+ if (checkDicSize == 0) -+ { -+ if (distance >= processedPos) -+ return SZ_ERROR_DATA; -+ } -+ else if (distance >= checkDicSize) -+ return SZ_ERROR_DATA; -+ state = (state < kNumStates + kNumLitStates) ? kNumLitStates : kNumLitStates + 3; -+ } -+ -+ len += kMatchMinLen; -+ -+ if (limit == dicPos) -+ return SZ_ERROR_DATA; -+ { -+ SizeT rem = limit - dicPos; -+ unsigned curLen = ((rem < len) ? (unsigned)rem : len); -+ SizeT pos = (dicPos - rep0) + ((dicPos < rep0) ? dicBufSize : 0); -+ -+ processedPos += curLen; -+ -+ len -= curLen; -+ if (pos + curLen <= dicBufSize) -+ { -+ Byte *dest = dic + dicPos; -+ ptrdiff_t src = (ptrdiff_t)pos - (ptrdiff_t)dicPos; -+ const Byte *lim = dest + curLen; -+ dicPos += curLen; -+ do -+ *(dest) = (Byte)*(dest + src); -+ while (++dest != lim); -+ } -+ else -+ { -+ do -+ { -+ dic[dicPos++] = dic[pos]; -+ if (++pos == dicBufSize) -+ pos = 0; -+ } -+ while (--curLen != 0); -+ } -+ } -+ } -+ } -+ while (dicPos < limit && buf < bufLimit); -+ NORMALIZE; -+ p->buf = buf; -+ p->range = range; -+ p->code = code; -+ p->remainLen = len; -+ p->dicPos = dicPos; -+ p->processedPos = processedPos; -+ p->reps[0] = rep0; -+ p->reps[1] = rep1; -+ p->reps[2] = rep2; -+ p->reps[3] = rep3; -+ p->state = state; -+ -+ return SZ_OK; -+} -+ -+static void MY_FAST_CALL LzmaDec_WriteRem(CLzmaDec *p, SizeT limit) -+{ -+ if (p->remainLen != 0 && p->remainLen < kMatchSpecLenStart) -+ { -+ Byte *dic = p->dic; -+ SizeT dicPos = p->dicPos; -+ SizeT dicBufSize = p->dicBufSize; -+ unsigned len = p->remainLen; -+ UInt32 rep0 = p->reps[0]; -+ if (limit - dicPos < len) -+ len = (unsigned)(limit - dicPos); -+ -+ if (p->checkDicSize == 0 && p->prop.dicSize - p->processedPos <= len) -+ p->checkDicSize = p->prop.dicSize; -+ -+ p->processedPos += len; -+ p->remainLen -= len; -+ while (len-- != 0) -+ { -+ dic[dicPos] = dic[(dicPos - rep0) + ((dicPos < rep0) ? dicBufSize : 0)]; -+ dicPos++; -+ } -+ p->dicPos = dicPos; -+ } -+} -+ -+static int MY_FAST_CALL LzmaDec_DecodeReal2(CLzmaDec *p, SizeT limit, const Byte *bufLimit) -+{ -+ do -+ { -+ SizeT limit2 = limit; -+ if (p->checkDicSize == 0) -+ { -+ UInt32 rem = p->prop.dicSize - p->processedPos; -+ if (limit - p->dicPos > rem) -+ limit2 = p->dicPos + rem; -+ } -+ RINOK(LzmaDec_DecodeReal(p, limit2, bufLimit)); -+ if (p->processedPos >= p->prop.dicSize) -+ p->checkDicSize = p->prop.dicSize; -+ LzmaDec_WriteRem(p, limit); -+ } -+ while (p->dicPos < limit && p->buf < bufLimit && p->remainLen < kMatchSpecLenStart); -+ -+ if (p->remainLen > kMatchSpecLenStart) -+ { -+ p->remainLen = kMatchSpecLenStart; -+ } -+ return 0; -+} -+ -+typedef enum -+{ -+ DUMMY_ERROR, /* unexpected end of input stream */ -+ DUMMY_LIT, -+ DUMMY_MATCH, -+ DUMMY_REP -+} ELzmaDummy; -+ -+static ELzmaDummy LzmaDec_TryDummy(const CLzmaDec *p, const Byte *buf, SizeT inSize) -+{ -+ UInt32 range = p->range; -+ UInt32 code = p->code; -+ const Byte *bufLimit = buf + inSize; -+ CLzmaProb *probs = p->probs; -+ unsigned state = p->state; -+ ELzmaDummy res; -+ -+ { -+ CLzmaProb *prob; -+ UInt32 bound; -+ unsigned ttt; -+ unsigned posState = (p->processedPos) & ((1 << p->prop.pb) - 1); -+ -+ prob = probs + IsMatch + (state << kNumPosBitsMax) + posState; -+ IF_BIT_0_CHECK(prob) -+ { -+ UPDATE_0_CHECK -+ -+ /* if (bufLimit - buf >= 7) return DUMMY_LIT; */ -+ -+ prob = probs + Literal; -+ if (p->checkDicSize != 0 || p->processedPos != 0) -+ prob += (LZMA_LIT_SIZE * -+ ((((p->processedPos) & ((1 << (p->prop.lp)) - 1)) << p->prop.lc) + -+ (p->dic[(p->dicPos == 0 ? p->dicBufSize : p->dicPos) - 1] >> (8 - p->prop.lc)))); -+ -+ if (state < kNumLitStates) -+ { -+ unsigned symbol = 1; -+ do { GET_BIT_CHECK(prob + symbol, symbol) } while (symbol < 0x100); -+ } -+ else -+ { -+ unsigned matchByte = p->dic[p->dicPos - p->reps[0] + -+ ((p->dicPos < p->reps[0]) ? p->dicBufSize : 0)]; -+ unsigned offs = 0x100; -+ unsigned symbol = 1; -+ do -+ { -+ unsigned bit; -+ CLzmaProb *probLit; -+ matchByte <<= 1; -+ bit = (matchByte & offs); -+ probLit = prob + offs + bit + symbol; -+ GET_BIT2_CHECK(probLit, symbol, offs &= ~bit, offs &= bit) -+ } -+ while (symbol < 0x100); -+ } -+ res = DUMMY_LIT; -+ } -+ else -+ { -+ unsigned len; -+ UPDATE_1_CHECK; -+ -+ prob = probs + IsRep + state; -+ IF_BIT_0_CHECK(prob) -+ { -+ UPDATE_0_CHECK; -+ state = 0; -+ prob = probs + LenCoder; -+ res = DUMMY_MATCH; -+ } -+ else -+ { -+ UPDATE_1_CHECK; -+ res = DUMMY_REP; -+ prob = probs + IsRepG0 + state; -+ IF_BIT_0_CHECK(prob) -+ { -+ UPDATE_0_CHECK; -+ prob = probs + IsRep0Long + (state << kNumPosBitsMax) + posState; -+ IF_BIT_0_CHECK(prob) -+ { -+ UPDATE_0_CHECK; -+ NORMALIZE_CHECK; -+ return DUMMY_REP; -+ } -+ else -+ { -+ UPDATE_1_CHECK; -+ } -+ } -+ else -+ { -+ UPDATE_1_CHECK; -+ prob = probs + IsRepG1 + state; -+ IF_BIT_0_CHECK(prob) -+ { -+ UPDATE_0_CHECK; -+ } -+ else -+ { -+ UPDATE_1_CHECK; -+ prob = probs + IsRepG2 + state; -+ IF_BIT_0_CHECK(prob) -+ { -+ UPDATE_0_CHECK; -+ } -+ else -+ { -+ UPDATE_1_CHECK; -+ } -+ } -+ } -+ state = kNumStates; -+ prob = probs + RepLenCoder; -+ } -+ { -+ unsigned limit, offset; -+ CLzmaProb *probLen = prob + LenChoice; -+ IF_BIT_0_CHECK(probLen) -+ { -+ UPDATE_0_CHECK; -+ probLen = prob + LenLow + (posState << kLenNumLowBits); -+ offset = 0; -+ limit = 1 << kLenNumLowBits; -+ } -+ else -+ { -+ UPDATE_1_CHECK; -+ probLen = prob + LenChoice2; -+ IF_BIT_0_CHECK(probLen) -+ { -+ UPDATE_0_CHECK; -+ probLen = prob + LenMid + (posState << kLenNumMidBits); -+ offset = kLenNumLowSymbols; -+ limit = 1 << kLenNumMidBits; -+ } -+ else -+ { -+ UPDATE_1_CHECK; -+ probLen = prob + LenHigh; -+ offset = kLenNumLowSymbols + kLenNumMidSymbols; -+ limit = 1 << kLenNumHighBits; -+ } -+ } -+ TREE_DECODE_CHECK(probLen, limit, len); -+ len += offset; -+ } -+ -+ if (state < 4) -+ { -+ unsigned posSlot; -+ prob = probs + PosSlot + -+ ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) << -+ kNumPosSlotBits); -+ TREE_DECODE_CHECK(prob, 1 << kNumPosSlotBits, posSlot); -+ if (posSlot >= kStartPosModelIndex) -+ { -+ int numDirectBits = ((posSlot >> 1) - 1); -+ -+ /* if (bufLimit - buf >= 8) return DUMMY_MATCH; */ -+ -+ if (posSlot < kEndPosModelIndex) -+ { -+ prob = probs + SpecPos + ((2 | (posSlot & 1)) << numDirectBits) - posSlot - 1; -+ } -+ else -+ { -+ numDirectBits -= kNumAlignBits; -+ do -+ { -+ NORMALIZE_CHECK -+ range >>= 1; -+ code -= range & (((code - range) >> 31) - 1); -+ /* if (code >= range) code -= range; */ -+ } -+ while (--numDirectBits != 0); -+ prob = probs + Align; -+ numDirectBits = kNumAlignBits; -+ } -+ { -+ unsigned i = 1; -+ do -+ { -+ GET_BIT_CHECK(prob + i, i); -+ } -+ while (--numDirectBits != 0); -+ } -+ } -+ } -+ } -+ } -+ NORMALIZE_CHECK; -+ return res; -+} -+ -+ -+static void LzmaDec_InitRc(CLzmaDec *p, const Byte *data) -+{ -+ p->code = ((UInt32)data[1] << 24) | ((UInt32)data[2] << 16) | ((UInt32)data[3] << 8) | ((UInt32)data[4]); -+ p->range = 0xFFFFFFFF; -+ p->needFlush = 0; -+} -+ -+void LzmaDec_InitDicAndState(CLzmaDec *p, Bool initDic, Bool initState) -+{ -+ p->needFlush = 1; -+ p->remainLen = 0; -+ p->tempBufSize = 0; -+ -+ if (initDic) -+ { -+ p->processedPos = 0; -+ p->checkDicSize = 0; -+ p->needInitState = 1; -+ } -+ if (initState) -+ p->needInitState = 1; -+} -+ -+void LzmaDec_Init(CLzmaDec *p) -+{ -+ p->dicPos = 0; -+ LzmaDec_InitDicAndState(p, True, True); -+} -+ -+static void LzmaDec_InitStateReal(CLzmaDec *p) -+{ -+ UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (p->prop.lc + p->prop.lp)); -+ UInt32 i; -+ CLzmaProb *probs = p->probs; -+ for (i = 0; i < numProbs; i++) -+ probs[i] = kBitModelTotal >> 1; -+ p->reps[0] = p->reps[1] = p->reps[2] = p->reps[3] = 1; -+ p->state = 0; -+ p->needInitState = 0; -+} -+ -+SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit, const Byte *src, SizeT *srcLen, -+ ELzmaFinishMode finishMode, ELzmaStatus *status) -+{ -+ SizeT inSize = *srcLen; -+ (*srcLen) = 0; -+ LzmaDec_WriteRem(p, dicLimit); -+ -+ *status = LZMA_STATUS_NOT_SPECIFIED; -+ -+ while (p->remainLen != kMatchSpecLenStart) -+ { -+ int checkEndMarkNow; -+ -+ if (p->needFlush != 0) -+ { -+ for (; inSize > 0 && p->tempBufSize < RC_INIT_SIZE; (*srcLen)++, inSize--) -+ p->tempBuf[p->tempBufSize++] = *src++; -+ if (p->tempBufSize < RC_INIT_SIZE) -+ { -+ *status = LZMA_STATUS_NEEDS_MORE_INPUT; -+ return SZ_OK; -+ } -+ if (p->tempBuf[0] != 0) -+ return SZ_ERROR_DATA; -+ -+ LzmaDec_InitRc(p, p->tempBuf); -+ p->tempBufSize = 0; -+ } -+ -+ checkEndMarkNow = 0; -+ if (p->dicPos >= dicLimit) -+ { -+ if (p->remainLen == 0 && p->code == 0) -+ { -+ *status = LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK; -+ return SZ_OK; -+ } -+ if (finishMode == LZMA_FINISH_ANY) -+ { -+ *status = LZMA_STATUS_NOT_FINISHED; -+ return SZ_OK; -+ } -+ if (p->remainLen != 0) -+ { -+ *status = LZMA_STATUS_NOT_FINISHED; -+ return SZ_ERROR_DATA; -+ } -+ checkEndMarkNow = 1; -+ } -+ -+ if (p->needInitState) -+ LzmaDec_InitStateReal(p); -+ -+ if (p->tempBufSize == 0) -+ { -+ SizeT processed; -+ const Byte *bufLimit; -+ if (inSize < LZMA_REQUIRED_INPUT_MAX || checkEndMarkNow) -+ { -+ int dummyRes = LzmaDec_TryDummy(p, src, inSize); -+ if (dummyRes == DUMMY_ERROR) -+ { -+ memcpy(p->tempBuf, src, inSize); -+ p->tempBufSize = (unsigned)inSize; -+ (*srcLen) += inSize; -+ *status = LZMA_STATUS_NEEDS_MORE_INPUT; -+ return SZ_OK; -+ } -+ if (checkEndMarkNow && dummyRes != DUMMY_MATCH) -+ { -+ *status = LZMA_STATUS_NOT_FINISHED; -+ return SZ_ERROR_DATA; -+ } -+ bufLimit = src; -+ } -+ else -+ bufLimit = src + inSize - LZMA_REQUIRED_INPUT_MAX; -+ p->buf = src; -+ if (LzmaDec_DecodeReal2(p, dicLimit, bufLimit) != 0) -+ return SZ_ERROR_DATA; -+ processed = (SizeT)(p->buf - src); -+ (*srcLen) += processed; -+ src += processed; -+ inSize -= processed; -+ } -+ else -+ { -+ unsigned rem = p->tempBufSize, lookAhead = 0; -+ while (rem < LZMA_REQUIRED_INPUT_MAX && lookAhead < inSize) -+ p->tempBuf[rem++] = src[lookAhead++]; -+ p->tempBufSize = rem; -+ if (rem < LZMA_REQUIRED_INPUT_MAX || checkEndMarkNow) -+ { -+ int dummyRes = LzmaDec_TryDummy(p, p->tempBuf, rem); -+ if (dummyRes == DUMMY_ERROR) -+ { -+ (*srcLen) += lookAhead; -+ *status = LZMA_STATUS_NEEDS_MORE_INPUT; -+ return SZ_OK; -+ } -+ if (checkEndMarkNow && dummyRes != DUMMY_MATCH) -+ { -+ *status = LZMA_STATUS_NOT_FINISHED; -+ return SZ_ERROR_DATA; -+ } -+ } -+ p->buf = p->tempBuf; -+ if (LzmaDec_DecodeReal2(p, dicLimit, p->buf) != 0) -+ return SZ_ERROR_DATA; -+ lookAhead -= (rem - (unsigned)(p->buf - p->tempBuf)); -+ (*srcLen) += lookAhead; -+ src += lookAhead; -+ inSize -= lookAhead; -+ p->tempBufSize = 0; -+ } -+ } -+ if (p->code == 0) -+ *status = LZMA_STATUS_FINISHED_WITH_MARK; -+ return (p->code == 0) ? SZ_OK : SZ_ERROR_DATA; -+} -+ -+SRes LzmaDec_DecodeToBuf(CLzmaDec *p, Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status) -+{ -+ SizeT outSize = *destLen; -+ SizeT inSize = *srcLen; -+ *srcLen = *destLen = 0; -+ for (;;) -+ { -+ SizeT inSizeCur = inSize, outSizeCur, dicPos; -+ ELzmaFinishMode curFinishMode; -+ SRes res; -+ if (p->dicPos == p->dicBufSize) -+ p->dicPos = 0; -+ dicPos = p->dicPos; -+ if (outSize > p->dicBufSize - dicPos) -+ { -+ outSizeCur = p->dicBufSize; -+ curFinishMode = LZMA_FINISH_ANY; -+ } -+ else -+ { -+ outSizeCur = dicPos + outSize; -+ curFinishMode = finishMode; -+ } -+ -+ res = LzmaDec_DecodeToDic(p, outSizeCur, src, &inSizeCur, curFinishMode, status); -+ src += inSizeCur; -+ inSize -= inSizeCur; -+ *srcLen += inSizeCur; -+ outSizeCur = p->dicPos - dicPos; -+ memcpy(dest, p->dic + dicPos, outSizeCur); -+ dest += outSizeCur; -+ outSize -= outSizeCur; -+ *destLen += outSizeCur; -+ if (res != 0) -+ return res; -+ if (outSizeCur == 0 || outSize == 0) -+ return SZ_OK; -+ } -+} -+ -+void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc) -+{ -+ alloc->Free(alloc, p->probs); -+ p->probs = 0; -+} -+ -+static void LzmaDec_FreeDict(CLzmaDec *p, ISzAlloc *alloc) -+{ -+ alloc->Free(alloc, p->dic); -+ p->dic = 0; -+} -+ -+void LzmaDec_Free(CLzmaDec *p, ISzAlloc *alloc) -+{ -+ LzmaDec_FreeProbs(p, alloc); -+ LzmaDec_FreeDict(p, alloc); -+} -+ -+SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size) -+{ -+ UInt32 dicSize; -+ Byte d; -+ -+ if (size < LZMA_PROPS_SIZE) -+ return SZ_ERROR_UNSUPPORTED; -+ else -+ dicSize = data[1] | ((UInt32)data[2] << 8) | ((UInt32)data[3] << 16) | ((UInt32)data[4] << 24); -+ -+ if (dicSize < LZMA_DIC_MIN) -+ dicSize = LZMA_DIC_MIN; -+ p->dicSize = dicSize; -+ -+ d = data[0]; -+ if (d >= (9 * 5 * 5)) -+ return SZ_ERROR_UNSUPPORTED; -+ -+ p->lc = d % 9; -+ d /= 9; -+ p->pb = d / 5; -+ p->lp = d % 5; -+ -+ return SZ_OK; -+} -+ -+static SRes LzmaDec_AllocateProbs2(CLzmaDec *p, const CLzmaProps *propNew, ISzAlloc *alloc) -+{ -+ UInt32 numProbs = LzmaProps_GetNumProbs(propNew); -+ if (p->probs == 0 || numProbs != p->numProbs) -+ { -+ LzmaDec_FreeProbs(p, alloc); -+ p->probs = (CLzmaProb *)alloc->Alloc(alloc, numProbs * sizeof(CLzmaProb)); -+ p->numProbs = numProbs; -+ if (p->probs == 0) -+ return SZ_ERROR_MEM; -+ } -+ return SZ_OK; -+} -+ -+SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc) -+{ -+ CLzmaProps propNew; -+ RINOK(LzmaProps_Decode(&propNew, props, propsSize)); -+ RINOK(LzmaDec_AllocateProbs2(p, &propNew, alloc)); -+ p->prop = propNew; -+ return SZ_OK; -+} -+ -+SRes LzmaDec_Allocate(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc) -+{ -+ CLzmaProps propNew; -+ SizeT dicBufSize; -+ RINOK(LzmaProps_Decode(&propNew, props, propsSize)); -+ RINOK(LzmaDec_AllocateProbs2(p, &propNew, alloc)); -+ dicBufSize = propNew.dicSize; -+ if (p->dic == 0 || dicBufSize != p->dicBufSize) -+ { -+ LzmaDec_FreeDict(p, alloc); -+ p->dic = (Byte *)alloc->Alloc(alloc, dicBufSize); -+ if (p->dic == 0) -+ { -+ LzmaDec_FreeProbs(p, alloc); -+ return SZ_ERROR_MEM; -+ } -+ } -+ p->dicBufSize = dicBufSize; -+ p->prop = propNew; -+ return SZ_OK; -+} -+ -+SRes LzmaDecode(Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen, -+ const Byte *propData, unsigned propSize, ELzmaFinishMode finishMode, -+ ELzmaStatus *status, ISzAlloc *alloc) -+{ -+ CLzmaDec p; -+ SRes res; -+ SizeT inSize = *srcLen; -+ SizeT outSize = *destLen; -+ *srcLen = *destLen = 0; -+ if (inSize < RC_INIT_SIZE) -+ return SZ_ERROR_INPUT_EOF; -+ -+ LzmaDec_Construct(&p); -+ res = LzmaDec_AllocateProbs(&p, propData, propSize, alloc); -+ if (res != 0) -+ return res; -+ p.dic = dest; -+ p.dicBufSize = outSize; -+ -+ LzmaDec_Init(&p); -+ -+ *srcLen = inSize; -+ res = LzmaDec_DecodeToDic(&p, outSize, src, srcLen, finishMode, status); -+ -+ if (res == SZ_OK && *status == LZMA_STATUS_NEEDS_MORE_INPUT) -+ res = SZ_ERROR_INPUT_EOF; -+ -+ (*destLen) = p.dicPos; -+ LzmaDec_FreeProbs(&p, alloc); -+ return res; -+} ---- /dev/null -+++ b/lib/lzma/LzmaEnc.c -@@ -0,0 +1,2271 @@ -+/* LzmaEnc.c -- LZMA Encoder -+2009-11-24 : Igor Pavlov : Public domain */ -+ -+#include -+ -+/* #define SHOW_STAT */ -+/* #define SHOW_STAT2 */ -+ -+#if defined(SHOW_STAT) || defined(SHOW_STAT2) -+#include -+#endif -+ -+#include "LzmaEnc.h" -+ -+/* disable MT */ -+#define _7ZIP_ST -+ -+#include "LzFind.h" -+#ifndef _7ZIP_ST -+#include "LzFindMt.h" -+#endif -+ -+#ifdef SHOW_STAT -+static int ttt = 0; -+#endif -+ -+#define kBlockSizeMax ((1 << LZMA_NUM_BLOCK_SIZE_BITS) - 1) -+ -+#define kBlockSize (9 << 10) -+#define kUnpackBlockSize (1 << 18) -+#define kMatchArraySize (1 << 21) -+#define kMatchRecordMaxSize ((LZMA_MATCH_LEN_MAX * 2 + 3) * LZMA_MATCH_LEN_MAX) -+ -+#define kNumMaxDirectBits (31) -+ -+#define kNumTopBits 24 -+#define kTopValue ((UInt32)1 << kNumTopBits) -+ -+#define kNumBitModelTotalBits 11 -+#define kBitModelTotal (1 << kNumBitModelTotalBits) -+#define kNumMoveBits 5 -+#define kProbInitValue (kBitModelTotal >> 1) -+ -+#define kNumMoveReducingBits 4 -+#define kNumBitPriceShiftBits 4 -+#define kBitPrice (1 << kNumBitPriceShiftBits) -+ -+void LzmaEncProps_Init(CLzmaEncProps *p) -+{ -+ p->level = 5; -+ p->dictSize = p->mc = 0; -+ p->lc = p->lp = p->pb = p->algo = p->fb = p->btMode = p->numHashBytes = p->numThreads = -1; -+ p->writeEndMark = 0; -+} -+ -+void LzmaEncProps_Normalize(CLzmaEncProps *p) -+{ -+ int level = p->level; -+ if (level < 0) level = 5; -+ p->level = level; -+ if (p->dictSize == 0) p->dictSize = (level <= 5 ? (1 << (level * 2 + 14)) : (level == 6 ? (1 << 25) : (1 << 26))); -+ if (p->lc < 0) p->lc = 3; -+ if (p->lp < 0) p->lp = 0; -+ if (p->pb < 0) p->pb = 2; -+ if (p->algo < 0) p->algo = (level < 5 ? 0 : 1); -+ if (p->fb < 0) p->fb = (level < 7 ? 32 : 64); -+ if (p->btMode < 0) p->btMode = (p->algo == 0 ? 0 : 1); -+ if (p->numHashBytes < 0) p->numHashBytes = 4; -+ if (p->mc == 0) p->mc = (16 + (p->fb >> 1)) >> (p->btMode ? 0 : 1); -+ if (p->numThreads < 0) -+ p->numThreads = -+ #ifndef _7ZIP_ST -+ ((p->btMode && p->algo) ? 2 : 1); -+ #else -+ 1; -+ #endif -+} -+ -+UInt32 LzmaEncProps_GetDictSize(const CLzmaEncProps *props2) -+{ -+ CLzmaEncProps props = *props2; -+ LzmaEncProps_Normalize(&props); -+ return props.dictSize; -+} -+ -+/* #define LZMA_LOG_BSR */ -+/* Define it for Intel's CPU */ -+ -+ -+#ifdef LZMA_LOG_BSR -+ -+#define kDicLogSizeMaxCompress 30 -+ -+#define BSR2_RET(pos, res) { unsigned long i; _BitScanReverse(&i, (pos)); res = (i + i) + ((pos >> (i - 1)) & 1); } -+ -+UInt32 GetPosSlot1(UInt32 pos) -+{ -+ UInt32 res; -+ BSR2_RET(pos, res); -+ return res; -+} -+#define GetPosSlot2(pos, res) { BSR2_RET(pos, res); } -+#define GetPosSlot(pos, res) { if (pos < 2) res = pos; else BSR2_RET(pos, res); } -+ -+#else -+ -+#define kNumLogBits (9 + (int)sizeof(size_t) / 2) -+#define kDicLogSizeMaxCompress ((kNumLogBits - 1) * 2 + 7) -+ -+void LzmaEnc_FastPosInit(Byte *g_FastPos) -+{ -+ int c = 2, slotFast; -+ g_FastPos[0] = 0; -+ g_FastPos[1] = 1; -+ -+ for (slotFast = 2; slotFast < kNumLogBits * 2; slotFast++) -+ { -+ UInt32 k = (1 << ((slotFast >> 1) - 1)); -+ UInt32 j; -+ for (j = 0; j < k; j++, c++) -+ g_FastPos[c] = (Byte)slotFast; -+ } -+} -+ -+#define BSR2_RET(pos, res) { UInt32 i = 6 + ((kNumLogBits - 1) & \ -+ (0 - (((((UInt32)1 << (kNumLogBits + 6)) - 1) - pos) >> 31))); \ -+ res = p->g_FastPos[pos >> i] + (i * 2); } -+/* -+#define BSR2_RET(pos, res) { res = (pos < (1 << (kNumLogBits + 6))) ? \ -+ p->g_FastPos[pos >> 6] + 12 : \ -+ p->g_FastPos[pos >> (6 + kNumLogBits - 1)] + (6 + (kNumLogBits - 1)) * 2; } -+*/ -+ -+#define GetPosSlot1(pos) p->g_FastPos[pos] -+#define GetPosSlot2(pos, res) { BSR2_RET(pos, res); } -+#define GetPosSlot(pos, res) { if (pos < kNumFullDistances) res = p->g_FastPos[pos]; else BSR2_RET(pos, res); } -+ -+#endif -+ -+ -+#define LZMA_NUM_REPS 4 -+ -+typedef unsigned CState; -+ -+typedef struct -+{ -+ UInt32 price; -+ -+ CState state; -+ int prev1IsChar; -+ int prev2; -+ -+ UInt32 posPrev2; -+ UInt32 backPrev2; -+ -+ UInt32 posPrev; -+ UInt32 backPrev; -+ UInt32 backs[LZMA_NUM_REPS]; -+} COptimal; -+ -+#define kNumOpts (1 << 12) -+ -+#define kNumLenToPosStates 4 -+#define kNumPosSlotBits 6 -+#define kDicLogSizeMin 0 -+#define kDicLogSizeMax 32 -+#define kDistTableSizeMax (kDicLogSizeMax * 2) -+ -+ -+#define kNumAlignBits 4 -+#define kAlignTableSize (1 << kNumAlignBits) -+#define kAlignMask (kAlignTableSize - 1) -+ -+#define kStartPosModelIndex 4 -+#define kEndPosModelIndex 14 -+#define kNumPosModels (kEndPosModelIndex - kStartPosModelIndex) -+ -+#define kNumFullDistances (1 << (kEndPosModelIndex >> 1)) -+ -+#ifdef _LZMA_PROB32 -+#define CLzmaProb UInt32 -+#else -+#define CLzmaProb UInt16 -+#endif -+ -+#define LZMA_PB_MAX 4 -+#define LZMA_LC_MAX 8 -+#define LZMA_LP_MAX 4 -+ -+#define LZMA_NUM_PB_STATES_MAX (1 << LZMA_PB_MAX) -+ -+ -+#define kLenNumLowBits 3 -+#define kLenNumLowSymbols (1 << kLenNumLowBits) -+#define kLenNumMidBits 3 -+#define kLenNumMidSymbols (1 << kLenNumMidBits) -+#define kLenNumHighBits 8 -+#define kLenNumHighSymbols (1 << kLenNumHighBits) -+ -+#define kLenNumSymbolsTotal (kLenNumLowSymbols + kLenNumMidSymbols + kLenNumHighSymbols) -+ -+#define LZMA_MATCH_LEN_MIN 2 -+#define LZMA_MATCH_LEN_MAX (LZMA_MATCH_LEN_MIN + kLenNumSymbolsTotal - 1) -+ -+#define kNumStates 12 -+ -+typedef struct -+{ -+ CLzmaProb choice; -+ CLzmaProb choice2; -+ CLzmaProb low[LZMA_NUM_PB_STATES_MAX << kLenNumLowBits]; -+ CLzmaProb mid[LZMA_NUM_PB_STATES_MAX << kLenNumMidBits]; -+ CLzmaProb high[kLenNumHighSymbols]; -+} CLenEnc; -+ -+typedef struct -+{ -+ CLenEnc p; -+ UInt32 prices[LZMA_NUM_PB_STATES_MAX][kLenNumSymbolsTotal]; -+ UInt32 tableSize; -+ UInt32 counters[LZMA_NUM_PB_STATES_MAX]; -+} CLenPriceEnc; -+ -+typedef struct -+{ -+ UInt32 range; -+ Byte cache; -+ UInt64 low; -+ UInt64 cacheSize; -+ Byte *buf; -+ Byte *bufLim; -+ Byte *bufBase; -+ ISeqOutStream *outStream; -+ UInt64 processed; -+ SRes res; -+} CRangeEnc; -+ -+typedef struct -+{ -+ CLzmaProb *litProbs; -+ -+ CLzmaProb isMatch[kNumStates][LZMA_NUM_PB_STATES_MAX]; -+ CLzmaProb isRep[kNumStates]; -+ CLzmaProb isRepG0[kNumStates]; -+ CLzmaProb isRepG1[kNumStates]; -+ CLzmaProb isRepG2[kNumStates]; -+ CLzmaProb isRep0Long[kNumStates][LZMA_NUM_PB_STATES_MAX]; -+ -+ CLzmaProb posSlotEncoder[kNumLenToPosStates][1 << kNumPosSlotBits]; -+ CLzmaProb posEncoders[kNumFullDistances - kEndPosModelIndex]; -+ CLzmaProb posAlignEncoder[1 << kNumAlignBits]; -+ -+ CLenPriceEnc lenEnc; -+ CLenPriceEnc repLenEnc; -+ -+ UInt32 reps[LZMA_NUM_REPS]; -+ UInt32 state; -+} CSaveState; -+ -+typedef struct -+{ -+ IMatchFinder matchFinder; -+ void *matchFinderObj; -+ -+ #ifndef _7ZIP_ST -+ Bool mtMode; -+ CMatchFinderMt matchFinderMt; -+ #endif -+ -+ CMatchFinder matchFinderBase; -+ -+ #ifndef _7ZIP_ST -+ Byte pad[128]; -+ #endif -+ -+ UInt32 optimumEndIndex; -+ UInt32 optimumCurrentIndex; -+ -+ UInt32 longestMatchLength; -+ UInt32 numPairs; -+ UInt32 numAvail; -+ COptimal opt[kNumOpts]; -+ -+ #ifndef LZMA_LOG_BSR -+ Byte g_FastPos[1 << kNumLogBits]; -+ #endif -+ -+ UInt32 ProbPrices[kBitModelTotal >> kNumMoveReducingBits]; -+ UInt32 matches[LZMA_MATCH_LEN_MAX * 2 + 2 + 1]; -+ UInt32 numFastBytes; -+ UInt32 additionalOffset; -+ UInt32 reps[LZMA_NUM_REPS]; -+ UInt32 state; -+ -+ UInt32 posSlotPrices[kNumLenToPosStates][kDistTableSizeMax]; -+ UInt32 distancesPrices[kNumLenToPosStates][kNumFullDistances]; -+ UInt32 alignPrices[kAlignTableSize]; -+ UInt32 alignPriceCount; -+ -+ UInt32 distTableSize; -+ -+ unsigned lc, lp, pb; -+ unsigned lpMask, pbMask; -+ -+ CLzmaProb *litProbs; -+ -+ CLzmaProb isMatch[kNumStates][LZMA_NUM_PB_STATES_MAX]; -+ CLzmaProb isRep[kNumStates]; -+ CLzmaProb isRepG0[kNumStates]; -+ CLzmaProb isRepG1[kNumStates]; -+ CLzmaProb isRepG2[kNumStates]; -+ CLzmaProb isRep0Long[kNumStates][LZMA_NUM_PB_STATES_MAX]; -+ -+ CLzmaProb posSlotEncoder[kNumLenToPosStates][1 << kNumPosSlotBits]; -+ CLzmaProb posEncoders[kNumFullDistances - kEndPosModelIndex]; -+ CLzmaProb posAlignEncoder[1 << kNumAlignBits]; -+ -+ CLenPriceEnc lenEnc; -+ CLenPriceEnc repLenEnc; -+ -+ unsigned lclp; -+ -+ Bool fastMode; -+ -+ CRangeEnc rc; -+ -+ Bool writeEndMark; -+ UInt64 nowPos64; -+ UInt32 matchPriceCount; -+ Bool finished; -+ Bool multiThread; -+ -+ SRes result; -+ UInt32 dictSize; -+ UInt32 matchFinderCycles; -+ -+ int needInit; -+ -+ CSaveState saveState; -+} CLzmaEnc; -+ -+void LzmaEnc_SaveState(CLzmaEncHandle pp) -+{ -+ CLzmaEnc *p = (CLzmaEnc *)pp; -+ CSaveState *dest = &p->saveState; -+ int i; -+ dest->lenEnc = p->lenEnc; -+ dest->repLenEnc = p->repLenEnc; -+ dest->state = p->state; -+ -+ for (i = 0; i < kNumStates; i++) -+ { -+ memcpy(dest->isMatch[i], p->isMatch[i], sizeof(p->isMatch[i])); -+ memcpy(dest->isRep0Long[i], p->isRep0Long[i], sizeof(p->isRep0Long[i])); -+ } -+ for (i = 0; i < kNumLenToPosStates; i++) -+ memcpy(dest->posSlotEncoder[i], p->posSlotEncoder[i], sizeof(p->posSlotEncoder[i])); -+ memcpy(dest->isRep, p->isRep, sizeof(p->isRep)); -+ memcpy(dest->isRepG0, p->isRepG0, sizeof(p->isRepG0)); -+ memcpy(dest->isRepG1, p->isRepG1, sizeof(p->isRepG1)); -+ memcpy(dest->isRepG2, p->isRepG2, sizeof(p->isRepG2)); -+ memcpy(dest->posEncoders, p->posEncoders, sizeof(p->posEncoders)); -+ memcpy(dest->posAlignEncoder, p->posAlignEncoder, sizeof(p->posAlignEncoder)); -+ memcpy(dest->reps, p->reps, sizeof(p->reps)); -+ memcpy(dest->litProbs, p->litProbs, (0x300 << p->lclp) * sizeof(CLzmaProb)); -+} -+ -+void LzmaEnc_RestoreState(CLzmaEncHandle pp) -+{ -+ CLzmaEnc *dest = (CLzmaEnc *)pp; -+ const CSaveState *p = &dest->saveState; -+ int i; -+ dest->lenEnc = p->lenEnc; -+ dest->repLenEnc = p->repLenEnc; -+ dest->state = p->state; -+ -+ for (i = 0; i < kNumStates; i++) -+ { -+ memcpy(dest->isMatch[i], p->isMatch[i], sizeof(p->isMatch[i])); -+ memcpy(dest->isRep0Long[i], p->isRep0Long[i], sizeof(p->isRep0Long[i])); -+ } -+ for (i = 0; i < kNumLenToPosStates; i++) -+ memcpy(dest->posSlotEncoder[i], p->posSlotEncoder[i], sizeof(p->posSlotEncoder[i])); -+ memcpy(dest->isRep, p->isRep, sizeof(p->isRep)); -+ memcpy(dest->isRepG0, p->isRepG0, sizeof(p->isRepG0)); -+ memcpy(dest->isRepG1, p->isRepG1, sizeof(p->isRepG1)); -+ memcpy(dest->isRepG2, p->isRepG2, sizeof(p->isRepG2)); -+ memcpy(dest->posEncoders, p->posEncoders, sizeof(p->posEncoders)); -+ memcpy(dest->posAlignEncoder, p->posAlignEncoder, sizeof(p->posAlignEncoder)); -+ memcpy(dest->reps, p->reps, sizeof(p->reps)); -+ memcpy(dest->litProbs, p->litProbs, (0x300 << dest->lclp) * sizeof(CLzmaProb)); -+} -+ -+SRes LzmaEnc_SetProps(CLzmaEncHandle pp, const CLzmaEncProps *props2) -+{ -+ CLzmaEnc *p = (CLzmaEnc *)pp; -+ CLzmaEncProps props = *props2; -+ LzmaEncProps_Normalize(&props); -+ -+ if (props.lc > LZMA_LC_MAX || props.lp > LZMA_LP_MAX || props.pb > LZMA_PB_MAX || -+ props.dictSize > (1 << kDicLogSizeMaxCompress) || props.dictSize > (1 << 30)) -+ return SZ_ERROR_PARAM; -+ p->dictSize = props.dictSize; -+ p->matchFinderCycles = props.mc; -+ { -+ unsigned fb = props.fb; -+ if (fb < 5) -+ fb = 5; -+ if (fb > LZMA_MATCH_LEN_MAX) -+ fb = LZMA_MATCH_LEN_MAX; -+ p->numFastBytes = fb; -+ } -+ p->lc = props.lc; -+ p->lp = props.lp; -+ p->pb = props.pb; -+ p->fastMode = (props.algo == 0); -+ p->matchFinderBase.btMode = props.btMode; -+ { -+ UInt32 numHashBytes = 4; -+ if (props.btMode) -+ { -+ if (props.numHashBytes < 2) -+ numHashBytes = 2; -+ else if (props.numHashBytes < 4) -+ numHashBytes = props.numHashBytes; -+ } -+ p->matchFinderBase.numHashBytes = numHashBytes; -+ } -+ -+ p->matchFinderBase.cutValue = props.mc; -+ -+ p->writeEndMark = props.writeEndMark; -+ -+ #ifndef _7ZIP_ST -+ /* -+ if (newMultiThread != _multiThread) -+ { -+ ReleaseMatchFinder(); -+ _multiThread = newMultiThread; -+ } -+ */ -+ p->multiThread = (props.numThreads > 1); -+ #endif -+ -+ return SZ_OK; -+} -+ -+static const int kLiteralNextStates[kNumStates] = {0, 0, 0, 0, 1, 2, 3, 4, 5, 6, 4, 5}; -+static const int kMatchNextStates[kNumStates] = {7, 7, 7, 7, 7, 7, 7, 10, 10, 10, 10, 10}; -+static const int kRepNextStates[kNumStates] = {8, 8, 8, 8, 8, 8, 8, 11, 11, 11, 11, 11}; -+static const int kShortRepNextStates[kNumStates]= {9, 9, 9, 9, 9, 9, 9, 11, 11, 11, 11, 11}; -+ -+#define IsCharState(s) ((s) < 7) -+ -+#define GetLenToPosState(len) (((len) < kNumLenToPosStates + 1) ? (len) - 2 : kNumLenToPosStates - 1) -+ -+#define kInfinityPrice (1 << 30) -+ -+static void RangeEnc_Construct(CRangeEnc *p) -+{ -+ p->outStream = 0; -+ p->bufBase = 0; -+} -+ -+#define RangeEnc_GetProcessed(p) ((p)->processed + ((p)->buf - (p)->bufBase) + (p)->cacheSize) -+ -+#define RC_BUF_SIZE (1 << 16) -+static int RangeEnc_Alloc(CRangeEnc *p, ISzAlloc *alloc) -+{ -+ if (p->bufBase == 0) -+ { -+ p->bufBase = (Byte *)alloc->Alloc(alloc, RC_BUF_SIZE); -+ if (p->bufBase == 0) -+ return 0; -+ p->bufLim = p->bufBase + RC_BUF_SIZE; -+ } -+ return 1; -+} -+ -+static void RangeEnc_Free(CRangeEnc *p, ISzAlloc *alloc) -+{ -+ alloc->Free(alloc, p->bufBase); -+ p->bufBase = 0; -+} -+ -+static void RangeEnc_Init(CRangeEnc *p) -+{ -+ /* Stream.Init(); */ -+ p->low = 0; -+ p->range = 0xFFFFFFFF; -+ p->cacheSize = 1; -+ p->cache = 0; -+ -+ p->buf = p->bufBase; -+ -+ p->processed = 0; -+ p->res = SZ_OK; -+} -+ -+static void RangeEnc_FlushStream(CRangeEnc *p) -+{ -+ size_t num; -+ if (p->res != SZ_OK) -+ return; -+ num = p->buf - p->bufBase; -+ if (num != p->outStream->Write(p->outStream, p->bufBase, num)) -+ p->res = SZ_ERROR_WRITE; -+ p->processed += num; -+ p->buf = p->bufBase; -+} -+ -+static void MY_FAST_CALL RangeEnc_ShiftLow(CRangeEnc *p) -+{ -+ if ((UInt32)p->low < (UInt32)0xFF000000 || (int)(p->low >> 32) != 0) -+ { -+ Byte temp = p->cache; -+ do -+ { -+ Byte *buf = p->buf; -+ *buf++ = (Byte)(temp + (Byte)(p->low >> 32)); -+ p->buf = buf; -+ if (buf == p->bufLim) -+ RangeEnc_FlushStream(p); -+ temp = 0xFF; -+ } -+ while (--p->cacheSize != 0); -+ p->cache = (Byte)((UInt32)p->low >> 24); -+ } -+ p->cacheSize++; -+ p->low = (UInt32)p->low << 8; -+} -+ -+static void RangeEnc_FlushData(CRangeEnc *p) -+{ -+ int i; -+ for (i = 0; i < 5; i++) -+ RangeEnc_ShiftLow(p); -+} -+ -+static void RangeEnc_EncodeDirectBits(CRangeEnc *p, UInt32 value, int numBits) -+{ -+ do -+ { -+ p->range >>= 1; -+ p->low += p->range & (0 - ((value >> --numBits) & 1)); -+ if (p->range < kTopValue) -+ { -+ p->range <<= 8; -+ RangeEnc_ShiftLow(p); -+ } -+ } -+ while (numBits != 0); -+} -+ -+static void RangeEnc_EncodeBit(CRangeEnc *p, CLzmaProb *prob, UInt32 symbol) -+{ -+ UInt32 ttt = *prob; -+ UInt32 newBound = (p->range >> kNumBitModelTotalBits) * ttt; -+ if (symbol == 0) -+ { -+ p->range = newBound; -+ ttt += (kBitModelTotal - ttt) >> kNumMoveBits; -+ } -+ else -+ { -+ p->low += newBound; -+ p->range -= newBound; -+ ttt -= ttt >> kNumMoveBits; -+ } -+ *prob = (CLzmaProb)ttt; -+ if (p->range < kTopValue) -+ { -+ p->range <<= 8; -+ RangeEnc_ShiftLow(p); -+ } -+} -+ -+static void LitEnc_Encode(CRangeEnc *p, CLzmaProb *probs, UInt32 symbol) -+{ -+ symbol |= 0x100; -+ do -+ { -+ RangeEnc_EncodeBit(p, probs + (symbol >> 8), (symbol >> 7) & 1); -+ symbol <<= 1; -+ } -+ while (symbol < 0x10000); -+} -+ -+static void LitEnc_EncodeMatched(CRangeEnc *p, CLzmaProb *probs, UInt32 symbol, UInt32 matchByte) -+{ -+ UInt32 offs = 0x100; -+ symbol |= 0x100; -+ do -+ { -+ matchByte <<= 1; -+ RangeEnc_EncodeBit(p, probs + (offs + (matchByte & offs) + (symbol >> 8)), (symbol >> 7) & 1); -+ symbol <<= 1; -+ offs &= ~(matchByte ^ symbol); -+ } -+ while (symbol < 0x10000); -+} -+ -+void LzmaEnc_InitPriceTables(UInt32 *ProbPrices) -+{ -+ UInt32 i; -+ for (i = (1 << kNumMoveReducingBits) / 2; i < kBitModelTotal; i += (1 << kNumMoveReducingBits)) -+ { -+ const int kCyclesBits = kNumBitPriceShiftBits; -+ UInt32 w = i; -+ UInt32 bitCount = 0; -+ int j; -+ for (j = 0; j < kCyclesBits; j++) -+ { -+ w = w * w; -+ bitCount <<= 1; -+ while (w >= ((UInt32)1 << 16)) -+ { -+ w >>= 1; -+ bitCount++; -+ } -+ } -+ ProbPrices[i >> kNumMoveReducingBits] = ((kNumBitModelTotalBits << kCyclesBits) - 15 - bitCount); -+ } -+} -+ -+ -+#define GET_PRICE(prob, symbol) \ -+ p->ProbPrices[((prob) ^ (((-(int)(symbol))) & (kBitModelTotal - 1))) >> kNumMoveReducingBits]; -+ -+#define GET_PRICEa(prob, symbol) \ -+ ProbPrices[((prob) ^ ((-((int)(symbol))) & (kBitModelTotal - 1))) >> kNumMoveReducingBits]; -+ -+#define GET_PRICE_0(prob) p->ProbPrices[(prob) >> kNumMoveReducingBits] -+#define GET_PRICE_1(prob) p->ProbPrices[((prob) ^ (kBitModelTotal - 1)) >> kNumMoveReducingBits] -+ -+#define GET_PRICE_0a(prob) ProbPrices[(prob) >> kNumMoveReducingBits] -+#define GET_PRICE_1a(prob) ProbPrices[((prob) ^ (kBitModelTotal - 1)) >> kNumMoveReducingBits] -+ -+static UInt32 LitEnc_GetPrice(const CLzmaProb *probs, UInt32 symbol, UInt32 *ProbPrices) -+{ -+ UInt32 price = 0; -+ symbol |= 0x100; -+ do -+ { -+ price += GET_PRICEa(probs[symbol >> 8], (symbol >> 7) & 1); -+ symbol <<= 1; -+ } -+ while (symbol < 0x10000); -+ return price; -+} -+ -+static UInt32 LitEnc_GetPriceMatched(const CLzmaProb *probs, UInt32 symbol, UInt32 matchByte, UInt32 *ProbPrices) -+{ -+ UInt32 price = 0; -+ UInt32 offs = 0x100; -+ symbol |= 0x100; -+ do -+ { -+ matchByte <<= 1; -+ price += GET_PRICEa(probs[offs + (matchByte & offs) + (symbol >> 8)], (symbol >> 7) & 1); -+ symbol <<= 1; -+ offs &= ~(matchByte ^ symbol); -+ } -+ while (symbol < 0x10000); -+ return price; -+} -+ -+ -+static void RcTree_Encode(CRangeEnc *rc, CLzmaProb *probs, int numBitLevels, UInt32 symbol) -+{ -+ UInt32 m = 1; -+ int i; -+ for (i = numBitLevels; i != 0;) -+ { -+ UInt32 bit; -+ i--; -+ bit = (symbol >> i) & 1; -+ RangeEnc_EncodeBit(rc, probs + m, bit); -+ m = (m << 1) | bit; -+ } -+} -+ -+static void RcTree_ReverseEncode(CRangeEnc *rc, CLzmaProb *probs, int numBitLevels, UInt32 symbol) -+{ -+ UInt32 m = 1; -+ int i; -+ for (i = 0; i < numBitLevels; i++) -+ { -+ UInt32 bit = symbol & 1; -+ RangeEnc_EncodeBit(rc, probs + m, bit); -+ m = (m << 1) | bit; -+ symbol >>= 1; -+ } -+} -+ -+static UInt32 RcTree_GetPrice(const CLzmaProb *probs, int numBitLevels, UInt32 symbol, UInt32 *ProbPrices) -+{ -+ UInt32 price = 0; -+ symbol |= (1 << numBitLevels); -+ while (symbol != 1) -+ { -+ price += GET_PRICEa(probs[symbol >> 1], symbol & 1); -+ symbol >>= 1; -+ } -+ return price; -+} -+ -+static UInt32 RcTree_ReverseGetPrice(const CLzmaProb *probs, int numBitLevels, UInt32 symbol, UInt32 *ProbPrices) -+{ -+ UInt32 price = 0; -+ UInt32 m = 1; -+ int i; -+ for (i = numBitLevels; i != 0; i--) -+ { -+ UInt32 bit = symbol & 1; -+ symbol >>= 1; -+ price += GET_PRICEa(probs[m], bit); -+ m = (m << 1) | bit; -+ } -+ return price; -+} -+ -+ -+static void LenEnc_Init(CLenEnc *p) -+{ -+ unsigned i; -+ p->choice = p->choice2 = kProbInitValue; -+ for (i = 0; i < (LZMA_NUM_PB_STATES_MAX << kLenNumLowBits); i++) -+ p->low[i] = kProbInitValue; -+ for (i = 0; i < (LZMA_NUM_PB_STATES_MAX << kLenNumMidBits); i++) -+ p->mid[i] = kProbInitValue; -+ for (i = 0; i < kLenNumHighSymbols; i++) -+ p->high[i] = kProbInitValue; -+} -+ -+static void LenEnc_Encode(CLenEnc *p, CRangeEnc *rc, UInt32 symbol, UInt32 posState) -+{ -+ if (symbol < kLenNumLowSymbols) -+ { -+ RangeEnc_EncodeBit(rc, &p->choice, 0); -+ RcTree_Encode(rc, p->low + (posState << kLenNumLowBits), kLenNumLowBits, symbol); -+ } -+ else -+ { -+ RangeEnc_EncodeBit(rc, &p->choice, 1); -+ if (symbol < kLenNumLowSymbols + kLenNumMidSymbols) -+ { -+ RangeEnc_EncodeBit(rc, &p->choice2, 0); -+ RcTree_Encode(rc, p->mid + (posState << kLenNumMidBits), kLenNumMidBits, symbol - kLenNumLowSymbols); -+ } -+ else -+ { -+ RangeEnc_EncodeBit(rc, &p->choice2, 1); -+ RcTree_Encode(rc, p->high, kLenNumHighBits, symbol - kLenNumLowSymbols - kLenNumMidSymbols); -+ } -+ } -+} -+ -+static void LenEnc_SetPrices(CLenEnc *p, UInt32 posState, UInt32 numSymbols, UInt32 *prices, UInt32 *ProbPrices) -+{ -+ UInt32 a0 = GET_PRICE_0a(p->choice); -+ UInt32 a1 = GET_PRICE_1a(p->choice); -+ UInt32 b0 = a1 + GET_PRICE_0a(p->choice2); -+ UInt32 b1 = a1 + GET_PRICE_1a(p->choice2); -+ UInt32 i = 0; -+ for (i = 0; i < kLenNumLowSymbols; i++) -+ { -+ if (i >= numSymbols) -+ return; -+ prices[i] = a0 + RcTree_GetPrice(p->low + (posState << kLenNumLowBits), kLenNumLowBits, i, ProbPrices); -+ } -+ for (; i < kLenNumLowSymbols + kLenNumMidSymbols; i++) -+ { -+ if (i >= numSymbols) -+ return; -+ prices[i] = b0 + RcTree_GetPrice(p->mid + (posState << kLenNumMidBits), kLenNumMidBits, i - kLenNumLowSymbols, ProbPrices); -+ } -+ for (; i < numSymbols; i++) -+ prices[i] = b1 + RcTree_GetPrice(p->high, kLenNumHighBits, i - kLenNumLowSymbols - kLenNumMidSymbols, ProbPrices); -+} -+ -+static void MY_FAST_CALL LenPriceEnc_UpdateTable(CLenPriceEnc *p, UInt32 posState, UInt32 *ProbPrices) -+{ -+ LenEnc_SetPrices(&p->p, posState, p->tableSize, p->prices[posState], ProbPrices); -+ p->counters[posState] = p->tableSize; -+} -+ -+static void LenPriceEnc_UpdateTables(CLenPriceEnc *p, UInt32 numPosStates, UInt32 *ProbPrices) -+{ -+ UInt32 posState; -+ for (posState = 0; posState < numPosStates; posState++) -+ LenPriceEnc_UpdateTable(p, posState, ProbPrices); -+} -+ -+static void LenEnc_Encode2(CLenPriceEnc *p, CRangeEnc *rc, UInt32 symbol, UInt32 posState, Bool updatePrice, UInt32 *ProbPrices) -+{ -+ LenEnc_Encode(&p->p, rc, symbol, posState); -+ if (updatePrice) -+ if (--p->counters[posState] == 0) -+ LenPriceEnc_UpdateTable(p, posState, ProbPrices); -+} -+ -+ -+ -+ -+static void MovePos(CLzmaEnc *p, UInt32 num) -+{ -+ #ifdef SHOW_STAT -+ ttt += num; -+ printf("\n MovePos %d", num); -+ #endif -+ if (num != 0) -+ { -+ p->additionalOffset += num; -+ p->matchFinder.Skip(p->matchFinderObj, num); -+ } -+} -+ -+static UInt32 ReadMatchDistances(CLzmaEnc *p, UInt32 *numDistancePairsRes) -+{ -+ UInt32 lenRes = 0, numPairs; -+ p->numAvail = p->matchFinder.GetNumAvailableBytes(p->matchFinderObj); -+ numPairs = p->matchFinder.GetMatches(p->matchFinderObj, p->matches); -+ #ifdef SHOW_STAT -+ printf("\n i = %d numPairs = %d ", ttt, numPairs / 2); -+ ttt++; -+ { -+ UInt32 i; -+ for (i = 0; i < numPairs; i += 2) -+ printf("%2d %6d | ", p->matches[i], p->matches[i + 1]); -+ } -+ #endif -+ if (numPairs > 0) -+ { -+ lenRes = p->matches[numPairs - 2]; -+ if (lenRes == p->numFastBytes) -+ { -+ const Byte *pby = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1; -+ UInt32 distance = p->matches[numPairs - 1] + 1; -+ UInt32 numAvail = p->numAvail; -+ if (numAvail > LZMA_MATCH_LEN_MAX) -+ numAvail = LZMA_MATCH_LEN_MAX; -+ { -+ const Byte *pby2 = pby - distance; -+ for (; lenRes < numAvail && pby[lenRes] == pby2[lenRes]; lenRes++); -+ } -+ } -+ } -+ p->additionalOffset++; -+ *numDistancePairsRes = numPairs; -+ return lenRes; -+} -+ -+ -+#define MakeAsChar(p) (p)->backPrev = (UInt32)(-1); (p)->prev1IsChar = False; -+#define MakeAsShortRep(p) (p)->backPrev = 0; (p)->prev1IsChar = False; -+#define IsShortRep(p) ((p)->backPrev == 0) -+ -+static UInt32 GetRepLen1Price(CLzmaEnc *p, UInt32 state, UInt32 posState) -+{ -+ return -+ GET_PRICE_0(p->isRepG0[state]) + -+ GET_PRICE_0(p->isRep0Long[state][posState]); -+} -+ -+static UInt32 GetPureRepPrice(CLzmaEnc *p, UInt32 repIndex, UInt32 state, UInt32 posState) -+{ -+ UInt32 price; -+ if (repIndex == 0) -+ { -+ price = GET_PRICE_0(p->isRepG0[state]); -+ price += GET_PRICE_1(p->isRep0Long[state][posState]); -+ } -+ else -+ { -+ price = GET_PRICE_1(p->isRepG0[state]); -+ if (repIndex == 1) -+ price += GET_PRICE_0(p->isRepG1[state]); -+ else -+ { -+ price += GET_PRICE_1(p->isRepG1[state]); -+ price += GET_PRICE(p->isRepG2[state], repIndex - 2); -+ } -+ } -+ return price; -+} -+ -+static UInt32 GetRepPrice(CLzmaEnc *p, UInt32 repIndex, UInt32 len, UInt32 state, UInt32 posState) -+{ -+ return p->repLenEnc.prices[posState][len - LZMA_MATCH_LEN_MIN] + -+ GetPureRepPrice(p, repIndex, state, posState); -+} -+ -+static UInt32 Backward(CLzmaEnc *p, UInt32 *backRes, UInt32 cur) -+{ -+ UInt32 posMem = p->opt[cur].posPrev; -+ UInt32 backMem = p->opt[cur].backPrev; -+ p->optimumEndIndex = cur; -+ do -+ { -+ if (p->opt[cur].prev1IsChar) -+ { -+ MakeAsChar(&p->opt[posMem]) -+ p->opt[posMem].posPrev = posMem - 1; -+ if (p->opt[cur].prev2) -+ { -+ p->opt[posMem - 1].prev1IsChar = False; -+ p->opt[posMem - 1].posPrev = p->opt[cur].posPrev2; -+ p->opt[posMem - 1].backPrev = p->opt[cur].backPrev2; -+ } -+ } -+ { -+ UInt32 posPrev = posMem; -+ UInt32 backCur = backMem; -+ -+ backMem = p->opt[posPrev].backPrev; -+ posMem = p->opt[posPrev].posPrev; -+ -+ p->opt[posPrev].backPrev = backCur; -+ p->opt[posPrev].posPrev = cur; -+ cur = posPrev; -+ } -+ } -+ while (cur != 0); -+ *backRes = p->opt[0].backPrev; -+ p->optimumCurrentIndex = p->opt[0].posPrev; -+ return p->optimumCurrentIndex; -+} -+ -+#define LIT_PROBS(pos, prevByte) (p->litProbs + ((((pos) & p->lpMask) << p->lc) + ((prevByte) >> (8 - p->lc))) * 0x300) -+ -+static UInt32 GetOptimum(CLzmaEnc *p, UInt32 position, UInt32 *backRes) -+{ -+ UInt32 numAvail, mainLen, numPairs, repMaxIndex, i, posState, lenEnd, len, cur; -+ UInt32 matchPrice, repMatchPrice, normalMatchPrice; -+ UInt32 reps[LZMA_NUM_REPS], repLens[LZMA_NUM_REPS]; -+ UInt32 *matches; -+ const Byte *data; -+ Byte curByte, matchByte; -+ if (p->optimumEndIndex != p->optimumCurrentIndex) -+ { -+ const COptimal *opt = &p->opt[p->optimumCurrentIndex]; -+ UInt32 lenRes = opt->posPrev - p->optimumCurrentIndex; -+ *backRes = opt->backPrev; -+ p->optimumCurrentIndex = opt->posPrev; -+ return lenRes; -+ } -+ p->optimumCurrentIndex = p->optimumEndIndex = 0; -+ -+ if (p->additionalOffset == 0) -+ mainLen = ReadMatchDistances(p, &numPairs); -+ else -+ { -+ mainLen = p->longestMatchLength; -+ numPairs = p->numPairs; -+ } -+ -+ numAvail = p->numAvail; -+ if (numAvail < 2) -+ { -+ *backRes = (UInt32)(-1); -+ return 1; -+ } -+ if (numAvail > LZMA_MATCH_LEN_MAX) -+ numAvail = LZMA_MATCH_LEN_MAX; -+ -+ data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1; -+ repMaxIndex = 0; -+ for (i = 0; i < LZMA_NUM_REPS; i++) -+ { -+ UInt32 lenTest; -+ const Byte *data2; -+ reps[i] = p->reps[i]; -+ data2 = data - (reps[i] + 1); -+ if (data[0] != data2[0] || data[1] != data2[1]) -+ { -+ repLens[i] = 0; -+ continue; -+ } -+ for (lenTest = 2; lenTest < numAvail && data[lenTest] == data2[lenTest]; lenTest++); -+ repLens[i] = lenTest; -+ if (lenTest > repLens[repMaxIndex]) -+ repMaxIndex = i; -+ } -+ if (repLens[repMaxIndex] >= p->numFastBytes) -+ { -+ UInt32 lenRes; -+ *backRes = repMaxIndex; -+ lenRes = repLens[repMaxIndex]; -+ MovePos(p, lenRes - 1); -+ return lenRes; -+ } -+ -+ matches = p->matches; -+ if (mainLen >= p->numFastBytes) -+ { -+ *backRes = matches[numPairs - 1] + LZMA_NUM_REPS; -+ MovePos(p, mainLen - 1); -+ return mainLen; -+ } -+ curByte = *data; -+ matchByte = *(data - (reps[0] + 1)); -+ -+ if (mainLen < 2 && curByte != matchByte && repLens[repMaxIndex] < 2) -+ { -+ *backRes = (UInt32)-1; -+ return 1; -+ } -+ -+ p->opt[0].state = (CState)p->state; -+ -+ posState = (position & p->pbMask); -+ -+ { -+ const CLzmaProb *probs = LIT_PROBS(position, *(data - 1)); -+ p->opt[1].price = GET_PRICE_0(p->isMatch[p->state][posState]) + -+ (!IsCharState(p->state) ? -+ LitEnc_GetPriceMatched(probs, curByte, matchByte, p->ProbPrices) : -+ LitEnc_GetPrice(probs, curByte, p->ProbPrices)); -+ } -+ -+ MakeAsChar(&p->opt[1]); -+ -+ matchPrice = GET_PRICE_1(p->isMatch[p->state][posState]); -+ repMatchPrice = matchPrice + GET_PRICE_1(p->isRep[p->state]); -+ -+ if (matchByte == curByte) -+ { -+ UInt32 shortRepPrice = repMatchPrice + GetRepLen1Price(p, p->state, posState); -+ if (shortRepPrice < p->opt[1].price) -+ { -+ p->opt[1].price = shortRepPrice; -+ MakeAsShortRep(&p->opt[1]); -+ } -+ } -+ lenEnd = ((mainLen >= repLens[repMaxIndex]) ? mainLen : repLens[repMaxIndex]); -+ -+ if (lenEnd < 2) -+ { -+ *backRes = p->opt[1].backPrev; -+ return 1; -+ } -+ -+ p->opt[1].posPrev = 0; -+ for (i = 0; i < LZMA_NUM_REPS; i++) -+ p->opt[0].backs[i] = reps[i]; -+ -+ len = lenEnd; -+ do -+ p->opt[len--].price = kInfinityPrice; -+ while (len >= 2); -+ -+ for (i = 0; i < LZMA_NUM_REPS; i++) -+ { -+ UInt32 repLen = repLens[i]; -+ UInt32 price; -+ if (repLen < 2) -+ continue; -+ price = repMatchPrice + GetPureRepPrice(p, i, p->state, posState); -+ do -+ { -+ UInt32 curAndLenPrice = price + p->repLenEnc.prices[posState][repLen - 2]; -+ COptimal *opt = &p->opt[repLen]; -+ if (curAndLenPrice < opt->price) -+ { -+ opt->price = curAndLenPrice; -+ opt->posPrev = 0; -+ opt->backPrev = i; -+ opt->prev1IsChar = False; -+ } -+ } -+ while (--repLen >= 2); -+ } -+ -+ normalMatchPrice = matchPrice + GET_PRICE_0(p->isRep[p->state]); -+ -+ len = ((repLens[0] >= 2) ? repLens[0] + 1 : 2); -+ if (len <= mainLen) -+ { -+ UInt32 offs = 0; -+ while (len > matches[offs]) -+ offs += 2; -+ for (; ; len++) -+ { -+ COptimal *opt; -+ UInt32 distance = matches[offs + 1]; -+ -+ UInt32 curAndLenPrice = normalMatchPrice + p->lenEnc.prices[posState][len - LZMA_MATCH_LEN_MIN]; -+ UInt32 lenToPosState = GetLenToPosState(len); -+ if (distance < kNumFullDistances) -+ curAndLenPrice += p->distancesPrices[lenToPosState][distance]; -+ else -+ { -+ UInt32 slot; -+ GetPosSlot2(distance, slot); -+ curAndLenPrice += p->alignPrices[distance & kAlignMask] + p->posSlotPrices[lenToPosState][slot]; -+ } -+ opt = &p->opt[len]; -+ if (curAndLenPrice < opt->price) -+ { -+ opt->price = curAndLenPrice; -+ opt->posPrev = 0; -+ opt->backPrev = distance + LZMA_NUM_REPS; -+ opt->prev1IsChar = False; -+ } -+ if (len == matches[offs]) -+ { -+ offs += 2; -+ if (offs == numPairs) -+ break; -+ } -+ } -+ } -+ -+ cur = 0; -+ -+ #ifdef SHOW_STAT2 -+ if (position >= 0) -+ { -+ unsigned i; -+ printf("\n pos = %4X", position); -+ for (i = cur; i <= lenEnd; i++) -+ printf("\nprice[%4X] = %d", position - cur + i, p->opt[i].price); -+ } -+ #endif -+ -+ for (;;) -+ { -+ UInt32 numAvailFull, newLen, numPairs, posPrev, state, posState, startLen; -+ UInt32 curPrice, curAnd1Price, matchPrice, repMatchPrice; -+ Bool nextIsChar; -+ Byte curByte, matchByte; -+ const Byte *data; -+ COptimal *curOpt; -+ COptimal *nextOpt; -+ -+ cur++; -+ if (cur == lenEnd) -+ return Backward(p, backRes, cur); -+ -+ newLen = ReadMatchDistances(p, &numPairs); -+ if (newLen >= p->numFastBytes) -+ { -+ p->numPairs = numPairs; -+ p->longestMatchLength = newLen; -+ return Backward(p, backRes, cur); -+ } -+ position++; -+ curOpt = &p->opt[cur]; -+ posPrev = curOpt->posPrev; -+ if (curOpt->prev1IsChar) -+ { -+ posPrev--; -+ if (curOpt->prev2) -+ { -+ state = p->opt[curOpt->posPrev2].state; -+ if (curOpt->backPrev2 < LZMA_NUM_REPS) -+ state = kRepNextStates[state]; -+ else -+ state = kMatchNextStates[state]; -+ } -+ else -+ state = p->opt[posPrev].state; -+ state = kLiteralNextStates[state]; -+ } -+ else -+ state = p->opt[posPrev].state; -+ if (posPrev == cur - 1) -+ { -+ if (IsShortRep(curOpt)) -+ state = kShortRepNextStates[state]; -+ else -+ state = kLiteralNextStates[state]; -+ } -+ else -+ { -+ UInt32 pos; -+ const COptimal *prevOpt; -+ if (curOpt->prev1IsChar && curOpt->prev2) -+ { -+ posPrev = curOpt->posPrev2; -+ pos = curOpt->backPrev2; -+ state = kRepNextStates[state]; -+ } -+ else -+ { -+ pos = curOpt->backPrev; -+ if (pos < LZMA_NUM_REPS) -+ state = kRepNextStates[state]; -+ else -+ state = kMatchNextStates[state]; -+ } -+ prevOpt = &p->opt[posPrev]; -+ if (pos < LZMA_NUM_REPS) -+ { -+ UInt32 i; -+ reps[0] = prevOpt->backs[pos]; -+ for (i = 1; i <= pos; i++) -+ reps[i] = prevOpt->backs[i - 1]; -+ for (; i < LZMA_NUM_REPS; i++) -+ reps[i] = prevOpt->backs[i]; -+ } -+ else -+ { -+ UInt32 i; -+ reps[0] = (pos - LZMA_NUM_REPS); -+ for (i = 1; i < LZMA_NUM_REPS; i++) -+ reps[i] = prevOpt->backs[i - 1]; -+ } -+ } -+ curOpt->state = (CState)state; -+ -+ curOpt->backs[0] = reps[0]; -+ curOpt->backs[1] = reps[1]; -+ curOpt->backs[2] = reps[2]; -+ curOpt->backs[3] = reps[3]; -+ -+ curPrice = curOpt->price; -+ nextIsChar = False; -+ data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1; -+ curByte = *data; -+ matchByte = *(data - (reps[0] + 1)); -+ -+ posState = (position & p->pbMask); -+ -+ curAnd1Price = curPrice + GET_PRICE_0(p->isMatch[state][posState]); -+ { -+ const CLzmaProb *probs = LIT_PROBS(position, *(data - 1)); -+ curAnd1Price += -+ (!IsCharState(state) ? -+ LitEnc_GetPriceMatched(probs, curByte, matchByte, p->ProbPrices) : -+ LitEnc_GetPrice(probs, curByte, p->ProbPrices)); -+ } -+ -+ nextOpt = &p->opt[cur + 1]; -+ -+ if (curAnd1Price < nextOpt->price) -+ { -+ nextOpt->price = curAnd1Price; -+ nextOpt->posPrev = cur; -+ MakeAsChar(nextOpt); -+ nextIsChar = True; -+ } -+ -+ matchPrice = curPrice + GET_PRICE_1(p->isMatch[state][posState]); -+ repMatchPrice = matchPrice + GET_PRICE_1(p->isRep[state]); -+ -+ if (matchByte == curByte && !(nextOpt->posPrev < cur && nextOpt->backPrev == 0)) -+ { -+ UInt32 shortRepPrice = repMatchPrice + GetRepLen1Price(p, state, posState); -+ if (shortRepPrice <= nextOpt->price) -+ { -+ nextOpt->price = shortRepPrice; -+ nextOpt->posPrev = cur; -+ MakeAsShortRep(nextOpt); -+ nextIsChar = True; -+ } -+ } -+ numAvailFull = p->numAvail; -+ { -+ UInt32 temp = kNumOpts - 1 - cur; -+ if (temp < numAvailFull) -+ numAvailFull = temp; -+ } -+ -+ if (numAvailFull < 2) -+ continue; -+ numAvail = (numAvailFull <= p->numFastBytes ? numAvailFull : p->numFastBytes); -+ -+ if (!nextIsChar && matchByte != curByte) /* speed optimization */ -+ { -+ /* try Literal + rep0 */ -+ UInt32 temp; -+ UInt32 lenTest2; -+ const Byte *data2 = data - (reps[0] + 1); -+ UInt32 limit = p->numFastBytes + 1; -+ if (limit > numAvailFull) -+ limit = numAvailFull; -+ -+ for (temp = 1; temp < limit && data[temp] == data2[temp]; temp++); -+ lenTest2 = temp - 1; -+ if (lenTest2 >= 2) -+ { -+ UInt32 state2 = kLiteralNextStates[state]; -+ UInt32 posStateNext = (position + 1) & p->pbMask; -+ UInt32 nextRepMatchPrice = curAnd1Price + -+ GET_PRICE_1(p->isMatch[state2][posStateNext]) + -+ GET_PRICE_1(p->isRep[state2]); -+ /* for (; lenTest2 >= 2; lenTest2--) */ -+ { -+ UInt32 curAndLenPrice; -+ COptimal *opt; -+ UInt32 offset = cur + 1 + lenTest2; -+ while (lenEnd < offset) -+ p->opt[++lenEnd].price = kInfinityPrice; -+ curAndLenPrice = nextRepMatchPrice + GetRepPrice(p, 0, lenTest2, state2, posStateNext); -+ opt = &p->opt[offset]; -+ if (curAndLenPrice < opt->price) -+ { -+ opt->price = curAndLenPrice; -+ opt->posPrev = cur + 1; -+ opt->backPrev = 0; -+ opt->prev1IsChar = True; -+ opt->prev2 = False; -+ } -+ } -+ } -+ } -+ -+ startLen = 2; /* speed optimization */ -+ { -+ UInt32 repIndex; -+ for (repIndex = 0; repIndex < LZMA_NUM_REPS; repIndex++) -+ { -+ UInt32 lenTest; -+ UInt32 lenTestTemp; -+ UInt32 price; -+ const Byte *data2 = data - (reps[repIndex] + 1); -+ if (data[0] != data2[0] || data[1] != data2[1]) -+ continue; -+ for (lenTest = 2; lenTest < numAvail && data[lenTest] == data2[lenTest]; lenTest++); -+ while (lenEnd < cur + lenTest) -+ p->opt[++lenEnd].price = kInfinityPrice; -+ lenTestTemp = lenTest; -+ price = repMatchPrice + GetPureRepPrice(p, repIndex, state, posState); -+ do -+ { -+ UInt32 curAndLenPrice = price + p->repLenEnc.prices[posState][lenTest - 2]; -+ COptimal *opt = &p->opt[cur + lenTest]; -+ if (curAndLenPrice < opt->price) -+ { -+ opt->price = curAndLenPrice; -+ opt->posPrev = cur; -+ opt->backPrev = repIndex; -+ opt->prev1IsChar = False; -+ } -+ } -+ while (--lenTest >= 2); -+ lenTest = lenTestTemp; -+ -+ if (repIndex == 0) -+ startLen = lenTest + 1; -+ -+ /* if (_maxMode) */ -+ { -+ UInt32 lenTest2 = lenTest + 1; -+ UInt32 limit = lenTest2 + p->numFastBytes; -+ UInt32 nextRepMatchPrice; -+ if (limit > numAvailFull) -+ limit = numAvailFull; -+ for (; lenTest2 < limit && data[lenTest2] == data2[lenTest2]; lenTest2++); -+ lenTest2 -= lenTest + 1; -+ if (lenTest2 >= 2) -+ { -+ UInt32 state2 = kRepNextStates[state]; -+ UInt32 posStateNext = (position + lenTest) & p->pbMask; -+ UInt32 curAndLenCharPrice = -+ price + p->repLenEnc.prices[posState][lenTest - 2] + -+ GET_PRICE_0(p->isMatch[state2][posStateNext]) + -+ LitEnc_GetPriceMatched(LIT_PROBS(position + lenTest, data[lenTest - 1]), -+ data[lenTest], data2[lenTest], p->ProbPrices); -+ state2 = kLiteralNextStates[state2]; -+ posStateNext = (position + lenTest + 1) & p->pbMask; -+ nextRepMatchPrice = curAndLenCharPrice + -+ GET_PRICE_1(p->isMatch[state2][posStateNext]) + -+ GET_PRICE_1(p->isRep[state2]); -+ -+ /* for (; lenTest2 >= 2; lenTest2--) */ -+ { -+ UInt32 curAndLenPrice; -+ COptimal *opt; -+ UInt32 offset = cur + lenTest + 1 + lenTest2; -+ while (lenEnd < offset) -+ p->opt[++lenEnd].price = kInfinityPrice; -+ curAndLenPrice = nextRepMatchPrice + GetRepPrice(p, 0, lenTest2, state2, posStateNext); -+ opt = &p->opt[offset]; -+ if (curAndLenPrice < opt->price) -+ { -+ opt->price = curAndLenPrice; -+ opt->posPrev = cur + lenTest + 1; -+ opt->backPrev = 0; -+ opt->prev1IsChar = True; -+ opt->prev2 = True; -+ opt->posPrev2 = cur; -+ opt->backPrev2 = repIndex; -+ } -+ } -+ } -+ } -+ } -+ } -+ /* for (UInt32 lenTest = 2; lenTest <= newLen; lenTest++) */ -+ if (newLen > numAvail) -+ { -+ newLen = numAvail; -+ for (numPairs = 0; newLen > matches[numPairs]; numPairs += 2); -+ matches[numPairs] = newLen; -+ numPairs += 2; -+ } -+ if (newLen >= startLen) -+ { -+ UInt32 normalMatchPrice = matchPrice + GET_PRICE_0(p->isRep[state]); -+ UInt32 offs, curBack, posSlot; -+ UInt32 lenTest; -+ while (lenEnd < cur + newLen) -+ p->opt[++lenEnd].price = kInfinityPrice; -+ -+ offs = 0; -+ while (startLen > matches[offs]) -+ offs += 2; -+ curBack = matches[offs + 1]; -+ GetPosSlot2(curBack, posSlot); -+ for (lenTest = /*2*/ startLen; ; lenTest++) -+ { -+ UInt32 curAndLenPrice = normalMatchPrice + p->lenEnc.prices[posState][lenTest - LZMA_MATCH_LEN_MIN]; -+ UInt32 lenToPosState = GetLenToPosState(lenTest); -+ COptimal *opt; -+ if (curBack < kNumFullDistances) -+ curAndLenPrice += p->distancesPrices[lenToPosState][curBack]; -+ else -+ curAndLenPrice += p->posSlotPrices[lenToPosState][posSlot] + p->alignPrices[curBack & kAlignMask]; -+ -+ opt = &p->opt[cur + lenTest]; -+ if (curAndLenPrice < opt->price) -+ { -+ opt->price = curAndLenPrice; -+ opt->posPrev = cur; -+ opt->backPrev = curBack + LZMA_NUM_REPS; -+ opt->prev1IsChar = False; -+ } -+ -+ if (/*_maxMode && */lenTest == matches[offs]) -+ { -+ /* Try Match + Literal + Rep0 */ -+ const Byte *data2 = data - (curBack + 1); -+ UInt32 lenTest2 = lenTest + 1; -+ UInt32 limit = lenTest2 + p->numFastBytes; -+ UInt32 nextRepMatchPrice; -+ if (limit > numAvailFull) -+ limit = numAvailFull; -+ for (; lenTest2 < limit && data[lenTest2] == data2[lenTest2]; lenTest2++); -+ lenTest2 -= lenTest + 1; -+ if (lenTest2 >= 2) -+ { -+ UInt32 state2 = kMatchNextStates[state]; -+ UInt32 posStateNext = (position + lenTest) & p->pbMask; -+ UInt32 curAndLenCharPrice = curAndLenPrice + -+ GET_PRICE_0(p->isMatch[state2][posStateNext]) + -+ LitEnc_GetPriceMatched(LIT_PROBS(position + lenTest, data[lenTest - 1]), -+ data[lenTest], data2[lenTest], p->ProbPrices); -+ state2 = kLiteralNextStates[state2]; -+ posStateNext = (posStateNext + 1) & p->pbMask; -+ nextRepMatchPrice = curAndLenCharPrice + -+ GET_PRICE_1(p->isMatch[state2][posStateNext]) + -+ GET_PRICE_1(p->isRep[state2]); -+ -+ /* for (; lenTest2 >= 2; lenTest2--) */ -+ { -+ UInt32 offset = cur + lenTest + 1 + lenTest2; -+ UInt32 curAndLenPrice; -+ COptimal *opt; -+ while (lenEnd < offset) -+ p->opt[++lenEnd].price = kInfinityPrice; -+ curAndLenPrice = nextRepMatchPrice + GetRepPrice(p, 0, lenTest2, state2, posStateNext); -+ opt = &p->opt[offset]; -+ if (curAndLenPrice < opt->price) -+ { -+ opt->price = curAndLenPrice; -+ opt->posPrev = cur + lenTest + 1; -+ opt->backPrev = 0; -+ opt->prev1IsChar = True; -+ opt->prev2 = True; -+ opt->posPrev2 = cur; -+ opt->backPrev2 = curBack + LZMA_NUM_REPS; -+ } -+ } -+ } -+ offs += 2; -+ if (offs == numPairs) -+ break; -+ curBack = matches[offs + 1]; -+ if (curBack >= kNumFullDistances) -+ GetPosSlot2(curBack, posSlot); -+ } -+ } -+ } -+ } -+} -+ -+#define ChangePair(smallDist, bigDist) (((bigDist) >> 7) > (smallDist)) -+ -+static UInt32 GetOptimumFast(CLzmaEnc *p, UInt32 *backRes) -+{ -+ UInt32 numAvail, mainLen, mainDist, numPairs, repIndex, repLen, i; -+ const Byte *data; -+ const UInt32 *matches; -+ -+ if (p->additionalOffset == 0) -+ mainLen = ReadMatchDistances(p, &numPairs); -+ else -+ { -+ mainLen = p->longestMatchLength; -+ numPairs = p->numPairs; -+ } -+ -+ numAvail = p->numAvail; -+ *backRes = (UInt32)-1; -+ if (numAvail < 2) -+ return 1; -+ if (numAvail > LZMA_MATCH_LEN_MAX) -+ numAvail = LZMA_MATCH_LEN_MAX; -+ data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1; -+ -+ repLen = repIndex = 0; -+ for (i = 0; i < LZMA_NUM_REPS; i++) -+ { -+ UInt32 len; -+ const Byte *data2 = data - (p->reps[i] + 1); -+ if (data[0] != data2[0] || data[1] != data2[1]) -+ continue; -+ for (len = 2; len < numAvail && data[len] == data2[len]; len++); -+ if (len >= p->numFastBytes) -+ { -+ *backRes = i; -+ MovePos(p, len - 1); -+ return len; -+ } -+ if (len > repLen) -+ { -+ repIndex = i; -+ repLen = len; -+ } -+ } -+ -+ matches = p->matches; -+ if (mainLen >= p->numFastBytes) -+ { -+ *backRes = matches[numPairs - 1] + LZMA_NUM_REPS; -+ MovePos(p, mainLen - 1); -+ return mainLen; -+ } -+ -+ mainDist = 0; /* for GCC */ -+ if (mainLen >= 2) -+ { -+ mainDist = matches[numPairs - 1]; -+ while (numPairs > 2 && mainLen == matches[numPairs - 4] + 1) -+ { -+ if (!ChangePair(matches[numPairs - 3], mainDist)) -+ break; -+ numPairs -= 2; -+ mainLen = matches[numPairs - 2]; -+ mainDist = matches[numPairs - 1]; -+ } -+ if (mainLen == 2 && mainDist >= 0x80) -+ mainLen = 1; -+ } -+ -+ if (repLen >= 2 && ( -+ (repLen + 1 >= mainLen) || -+ (repLen + 2 >= mainLen && mainDist >= (1 << 9)) || -+ (repLen + 3 >= mainLen && mainDist >= (1 << 15)))) -+ { -+ *backRes = repIndex; -+ MovePos(p, repLen - 1); -+ return repLen; -+ } -+ -+ if (mainLen < 2 || numAvail <= 2) -+ return 1; -+ -+ p->longestMatchLength = ReadMatchDistances(p, &p->numPairs); -+ if (p->longestMatchLength >= 2) -+ { -+ UInt32 newDistance = matches[p->numPairs - 1]; -+ if ((p->longestMatchLength >= mainLen && newDistance < mainDist) || -+ (p->longestMatchLength == mainLen + 1 && !ChangePair(mainDist, newDistance)) || -+ (p->longestMatchLength > mainLen + 1) || -+ (p->longestMatchLength + 1 >= mainLen && mainLen >= 3 && ChangePair(newDistance, mainDist))) -+ return 1; -+ } -+ -+ data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1; -+ for (i = 0; i < LZMA_NUM_REPS; i++) -+ { -+ UInt32 len, limit; -+ const Byte *data2 = data - (p->reps[i] + 1); -+ if (data[0] != data2[0] || data[1] != data2[1]) -+ continue; -+ limit = mainLen - 1; -+ for (len = 2; len < limit && data[len] == data2[len]; len++); -+ if (len >= limit) -+ return 1; -+ } -+ *backRes = mainDist + LZMA_NUM_REPS; -+ MovePos(p, mainLen - 2); -+ return mainLen; -+} -+ -+static void WriteEndMarker(CLzmaEnc *p, UInt32 posState) -+{ -+ UInt32 len; -+ RangeEnc_EncodeBit(&p->rc, &p->isMatch[p->state][posState], 1); -+ RangeEnc_EncodeBit(&p->rc, &p->isRep[p->state], 0); -+ p->state = kMatchNextStates[p->state]; -+ len = LZMA_MATCH_LEN_MIN; -+ LenEnc_Encode2(&p->lenEnc, &p->rc, len - LZMA_MATCH_LEN_MIN, posState, !p->fastMode, p->ProbPrices); -+ RcTree_Encode(&p->rc, p->posSlotEncoder[GetLenToPosState(len)], kNumPosSlotBits, (1 << kNumPosSlotBits) - 1); -+ RangeEnc_EncodeDirectBits(&p->rc, (((UInt32)1 << 30) - 1) >> kNumAlignBits, 30 - kNumAlignBits); -+ RcTree_ReverseEncode(&p->rc, p->posAlignEncoder, kNumAlignBits, kAlignMask); -+} -+ -+static SRes CheckErrors(CLzmaEnc *p) -+{ -+ if (p->result != SZ_OK) -+ return p->result; -+ if (p->rc.res != SZ_OK) -+ p->result = SZ_ERROR_WRITE; -+ if (p->matchFinderBase.result != SZ_OK) -+ p->result = SZ_ERROR_READ; -+ if (p->result != SZ_OK) -+ p->finished = True; -+ return p->result; -+} -+ -+static SRes Flush(CLzmaEnc *p, UInt32 nowPos) -+{ -+ /* ReleaseMFStream(); */ -+ p->finished = True; -+ if (p->writeEndMark) -+ WriteEndMarker(p, nowPos & p->pbMask); -+ RangeEnc_FlushData(&p->rc); -+ RangeEnc_FlushStream(&p->rc); -+ return CheckErrors(p); -+} -+ -+static void FillAlignPrices(CLzmaEnc *p) -+{ -+ UInt32 i; -+ for (i = 0; i < kAlignTableSize; i++) -+ p->alignPrices[i] = RcTree_ReverseGetPrice(p->posAlignEncoder, kNumAlignBits, i, p->ProbPrices); -+ p->alignPriceCount = 0; -+} -+ -+static void FillDistancesPrices(CLzmaEnc *p) -+{ -+ UInt32 tempPrices[kNumFullDistances]; -+ UInt32 i, lenToPosState; -+ for (i = kStartPosModelIndex; i < kNumFullDistances; i++) -+ { -+ UInt32 posSlot = GetPosSlot1(i); -+ UInt32 footerBits = ((posSlot >> 1) - 1); -+ UInt32 base = ((2 | (posSlot & 1)) << footerBits); -+ tempPrices[i] = RcTree_ReverseGetPrice(p->posEncoders + base - posSlot - 1, footerBits, i - base, p->ProbPrices); -+ } -+ -+ for (lenToPosState = 0; lenToPosState < kNumLenToPosStates; lenToPosState++) -+ { -+ UInt32 posSlot; -+ const CLzmaProb *encoder = p->posSlotEncoder[lenToPosState]; -+ UInt32 *posSlotPrices = p->posSlotPrices[lenToPosState]; -+ for (posSlot = 0; posSlot < p->distTableSize; posSlot++) -+ posSlotPrices[posSlot] = RcTree_GetPrice(encoder, kNumPosSlotBits, posSlot, p->ProbPrices); -+ for (posSlot = kEndPosModelIndex; posSlot < p->distTableSize; posSlot++) -+ posSlotPrices[posSlot] += ((((posSlot >> 1) - 1) - kNumAlignBits) << kNumBitPriceShiftBits); -+ -+ { -+ UInt32 *distancesPrices = p->distancesPrices[lenToPosState]; -+ UInt32 i; -+ for (i = 0; i < kStartPosModelIndex; i++) -+ distancesPrices[i] = posSlotPrices[i]; -+ for (; i < kNumFullDistances; i++) -+ distancesPrices[i] = posSlotPrices[GetPosSlot1(i)] + tempPrices[i]; -+ } -+ } -+ p->matchPriceCount = 0; -+} -+ -+void LzmaEnc_Construct(CLzmaEnc *p) -+{ -+ RangeEnc_Construct(&p->rc); -+ MatchFinder_Construct(&p->matchFinderBase); -+ #ifndef _7ZIP_ST -+ MatchFinderMt_Construct(&p->matchFinderMt); -+ p->matchFinderMt.MatchFinder = &p->matchFinderBase; -+ #endif -+ -+ { -+ CLzmaEncProps props; -+ LzmaEncProps_Init(&props); -+ LzmaEnc_SetProps(p, &props); -+ } -+ -+ #ifndef LZMA_LOG_BSR -+ LzmaEnc_FastPosInit(p->g_FastPos); -+ #endif -+ -+ LzmaEnc_InitPriceTables(p->ProbPrices); -+ p->litProbs = 0; -+ p->saveState.litProbs = 0; -+} -+ -+CLzmaEncHandle LzmaEnc_Create(ISzAlloc *alloc) -+{ -+ void *p; -+ p = alloc->Alloc(alloc, sizeof(CLzmaEnc)); -+ if (p != 0) -+ LzmaEnc_Construct((CLzmaEnc *)p); -+ return p; -+} -+ -+void LzmaEnc_FreeLits(CLzmaEnc *p, ISzAlloc *alloc) -+{ -+ alloc->Free(alloc, p->litProbs); -+ alloc->Free(alloc, p->saveState.litProbs); -+ p->litProbs = 0; -+ p->saveState.litProbs = 0; -+} -+ -+void LzmaEnc_Destruct(CLzmaEnc *p, ISzAlloc *alloc, ISzAlloc *allocBig) -+{ -+ #ifndef _7ZIP_ST -+ MatchFinderMt_Destruct(&p->matchFinderMt, allocBig); -+ #endif -+ MatchFinder_Free(&p->matchFinderBase, allocBig); -+ LzmaEnc_FreeLits(p, alloc); -+ RangeEnc_Free(&p->rc, alloc); -+} -+ -+void LzmaEnc_Destroy(CLzmaEncHandle p, ISzAlloc *alloc, ISzAlloc *allocBig) -+{ -+ LzmaEnc_Destruct((CLzmaEnc *)p, alloc, allocBig); -+ alloc->Free(alloc, p); -+} -+ -+static SRes LzmaEnc_CodeOneBlock(CLzmaEnc *p, Bool useLimits, UInt32 maxPackSize, UInt32 maxUnpackSize) -+{ -+ UInt32 nowPos32, startPos32; -+ if (p->needInit) -+ { -+ p->matchFinder.Init(p->matchFinderObj); -+ p->needInit = 0; -+ } -+ -+ if (p->finished) -+ return p->result; -+ RINOK(CheckErrors(p)); -+ -+ nowPos32 = (UInt32)p->nowPos64; -+ startPos32 = nowPos32; -+ -+ if (p->nowPos64 == 0) -+ { -+ UInt32 numPairs; -+ Byte curByte; -+ if (p->matchFinder.GetNumAvailableBytes(p->matchFinderObj) == 0) -+ return Flush(p, nowPos32); -+ ReadMatchDistances(p, &numPairs); -+ RangeEnc_EncodeBit(&p->rc, &p->isMatch[p->state][0], 0); -+ p->state = kLiteralNextStates[p->state]; -+ curByte = p->matchFinder.GetIndexByte(p->matchFinderObj, 0 - p->additionalOffset); -+ LitEnc_Encode(&p->rc, p->litProbs, curByte); -+ p->additionalOffset--; -+ nowPos32++; -+ } -+ -+ if (p->matchFinder.GetNumAvailableBytes(p->matchFinderObj) != 0) -+ for (;;) -+ { -+ UInt32 pos, len, posState; -+ -+ if (p->fastMode) -+ len = GetOptimumFast(p, &pos); -+ else -+ len = GetOptimum(p, nowPos32, &pos); -+ -+ #ifdef SHOW_STAT2 -+ printf("\n pos = %4X, len = %d pos = %d", nowPos32, len, pos); -+ #endif -+ -+ posState = nowPos32 & p->pbMask; -+ if (len == 1 && pos == (UInt32)-1) -+ { -+ Byte curByte; -+ CLzmaProb *probs; -+ const Byte *data; -+ -+ RangeEnc_EncodeBit(&p->rc, &p->isMatch[p->state][posState], 0); -+ data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - p->additionalOffset; -+ curByte = *data; -+ probs = LIT_PROBS(nowPos32, *(data - 1)); -+ if (IsCharState(p->state)) -+ LitEnc_Encode(&p->rc, probs, curByte); -+ else -+ LitEnc_EncodeMatched(&p->rc, probs, curByte, *(data - p->reps[0] - 1)); -+ p->state = kLiteralNextStates[p->state]; -+ } -+ else -+ { -+ RangeEnc_EncodeBit(&p->rc, &p->isMatch[p->state][posState], 1); -+ if (pos < LZMA_NUM_REPS) -+ { -+ RangeEnc_EncodeBit(&p->rc, &p->isRep[p->state], 1); -+ if (pos == 0) -+ { -+ RangeEnc_EncodeBit(&p->rc, &p->isRepG0[p->state], 0); -+ RangeEnc_EncodeBit(&p->rc, &p->isRep0Long[p->state][posState], ((len == 1) ? 0 : 1)); -+ } -+ else -+ { -+ UInt32 distance = p->reps[pos]; -+ RangeEnc_EncodeBit(&p->rc, &p->isRepG0[p->state], 1); -+ if (pos == 1) -+ RangeEnc_EncodeBit(&p->rc, &p->isRepG1[p->state], 0); -+ else -+ { -+ RangeEnc_EncodeBit(&p->rc, &p->isRepG1[p->state], 1); -+ RangeEnc_EncodeBit(&p->rc, &p->isRepG2[p->state], pos - 2); -+ if (pos == 3) -+ p->reps[3] = p->reps[2]; -+ p->reps[2] = p->reps[1]; -+ } -+ p->reps[1] = p->reps[0]; -+ p->reps[0] = distance; -+ } -+ if (len == 1) -+ p->state = kShortRepNextStates[p->state]; -+ else -+ { -+ LenEnc_Encode2(&p->repLenEnc, &p->rc, len - LZMA_MATCH_LEN_MIN, posState, !p->fastMode, p->ProbPrices); -+ p->state = kRepNextStates[p->state]; -+ } -+ } -+ else -+ { -+ UInt32 posSlot; -+ RangeEnc_EncodeBit(&p->rc, &p->isRep[p->state], 0); -+ p->state = kMatchNextStates[p->state]; -+ LenEnc_Encode2(&p->lenEnc, &p->rc, len - LZMA_MATCH_LEN_MIN, posState, !p->fastMode, p->ProbPrices); -+ pos -= LZMA_NUM_REPS; -+ GetPosSlot(pos, posSlot); -+ RcTree_Encode(&p->rc, p->posSlotEncoder[GetLenToPosState(len)], kNumPosSlotBits, posSlot); -+ -+ if (posSlot >= kStartPosModelIndex) -+ { -+ UInt32 footerBits = ((posSlot >> 1) - 1); -+ UInt32 base = ((2 | (posSlot & 1)) << footerBits); -+ UInt32 posReduced = pos - base; -+ -+ if (posSlot < kEndPosModelIndex) -+ RcTree_ReverseEncode(&p->rc, p->posEncoders + base - posSlot - 1, footerBits, posReduced); -+ else -+ { -+ RangeEnc_EncodeDirectBits(&p->rc, posReduced >> kNumAlignBits, footerBits - kNumAlignBits); -+ RcTree_ReverseEncode(&p->rc, p->posAlignEncoder, kNumAlignBits, posReduced & kAlignMask); -+ p->alignPriceCount++; -+ } -+ } -+ p->reps[3] = p->reps[2]; -+ p->reps[2] = p->reps[1]; -+ p->reps[1] = p->reps[0]; -+ p->reps[0] = pos; -+ p->matchPriceCount++; -+ } -+ } -+ p->additionalOffset -= len; -+ nowPos32 += len; -+ if (p->additionalOffset == 0) -+ { -+ UInt32 processed; -+ if (!p->fastMode) -+ { -+ if (p->matchPriceCount >= (1 << 7)) -+ FillDistancesPrices(p); -+ if (p->alignPriceCount >= kAlignTableSize) -+ FillAlignPrices(p); -+ } -+ if (p->matchFinder.GetNumAvailableBytes(p->matchFinderObj) == 0) -+ break; -+ processed = nowPos32 - startPos32; -+ if (useLimits) -+ { -+ if (processed + kNumOpts + 300 >= maxUnpackSize || -+ RangeEnc_GetProcessed(&p->rc) + kNumOpts * 2 >= maxPackSize) -+ break; -+ } -+ else if (processed >= (1 << 15)) -+ { -+ p->nowPos64 += nowPos32 - startPos32; -+ return CheckErrors(p); -+ } -+ } -+ } -+ p->nowPos64 += nowPos32 - startPos32; -+ return Flush(p, nowPos32); -+} -+ -+#define kBigHashDicLimit ((UInt32)1 << 24) -+ -+static SRes LzmaEnc_Alloc(CLzmaEnc *p, UInt32 keepWindowSize, ISzAlloc *alloc, ISzAlloc *allocBig) -+{ -+ UInt32 beforeSize = kNumOpts; -+ Bool btMode; -+ if (!RangeEnc_Alloc(&p->rc, alloc)) -+ return SZ_ERROR_MEM; -+ btMode = (p->matchFinderBase.btMode != 0); -+ #ifndef _7ZIP_ST -+ p->mtMode = (p->multiThread && !p->fastMode && btMode); -+ #endif -+ -+ { -+ unsigned lclp = p->lc + p->lp; -+ if (p->litProbs == 0 || p->saveState.litProbs == 0 || p->lclp != lclp) -+ { -+ LzmaEnc_FreeLits(p, alloc); -+ p->litProbs = (CLzmaProb *)alloc->Alloc(alloc, (0x300 << lclp) * sizeof(CLzmaProb)); -+ p->saveState.litProbs = (CLzmaProb *)alloc->Alloc(alloc, (0x300 << lclp) * sizeof(CLzmaProb)); -+ if (p->litProbs == 0 || p->saveState.litProbs == 0) -+ { -+ LzmaEnc_FreeLits(p, alloc); -+ return SZ_ERROR_MEM; -+ } -+ p->lclp = lclp; -+ } -+ } -+ -+ p->matchFinderBase.bigHash = (p->dictSize > kBigHashDicLimit); -+ -+ if (beforeSize + p->dictSize < keepWindowSize) -+ beforeSize = keepWindowSize - p->dictSize; -+ -+ #ifndef _7ZIP_ST -+ if (p->mtMode) -+ { -+ RINOK(MatchFinderMt_Create(&p->matchFinderMt, p->dictSize, beforeSize, p->numFastBytes, LZMA_MATCH_LEN_MAX, allocBig)); -+ p->matchFinderObj = &p->matchFinderMt; -+ MatchFinderMt_CreateVTable(&p->matchFinderMt, &p->matchFinder); -+ } -+ else -+ #endif -+ { -+ if (!MatchFinder_Create(&p->matchFinderBase, p->dictSize, beforeSize, p->numFastBytes, LZMA_MATCH_LEN_MAX, allocBig)) -+ return SZ_ERROR_MEM; -+ p->matchFinderObj = &p->matchFinderBase; -+ MatchFinder_CreateVTable(&p->matchFinderBase, &p->matchFinder); -+ } -+ return SZ_OK; -+} -+ -+void LzmaEnc_Init(CLzmaEnc *p) -+{ -+ UInt32 i; -+ p->state = 0; -+ for (i = 0 ; i < LZMA_NUM_REPS; i++) -+ p->reps[i] = 0; -+ -+ RangeEnc_Init(&p->rc); -+ -+ -+ for (i = 0; i < kNumStates; i++) -+ { -+ UInt32 j; -+ for (j = 0; j < LZMA_NUM_PB_STATES_MAX; j++) -+ { -+ p->isMatch[i][j] = kProbInitValue; -+ p->isRep0Long[i][j] = kProbInitValue; -+ } -+ p->isRep[i] = kProbInitValue; -+ p->isRepG0[i] = kProbInitValue; -+ p->isRepG1[i] = kProbInitValue; -+ p->isRepG2[i] = kProbInitValue; -+ } -+ -+ { -+ UInt32 num = 0x300 << (p->lp + p->lc); -+ for (i = 0; i < num; i++) -+ p->litProbs[i] = kProbInitValue; -+ } -+ -+ { -+ for (i = 0; i < kNumLenToPosStates; i++) -+ { -+ CLzmaProb *probs = p->posSlotEncoder[i]; -+ UInt32 j; -+ for (j = 0; j < (1 << kNumPosSlotBits); j++) -+ probs[j] = kProbInitValue; -+ } -+ } -+ { -+ for (i = 0; i < kNumFullDistances - kEndPosModelIndex; i++) -+ p->posEncoders[i] = kProbInitValue; -+ } -+ -+ LenEnc_Init(&p->lenEnc.p); -+ LenEnc_Init(&p->repLenEnc.p); -+ -+ for (i = 0; i < (1 << kNumAlignBits); i++) -+ p->posAlignEncoder[i] = kProbInitValue; -+ -+ p->optimumEndIndex = 0; -+ p->optimumCurrentIndex = 0; -+ p->additionalOffset = 0; -+ -+ p->pbMask = (1 << p->pb) - 1; -+ p->lpMask = (1 << p->lp) - 1; -+} -+ -+void LzmaEnc_InitPrices(CLzmaEnc *p) -+{ -+ if (!p->fastMode) -+ { -+ FillDistancesPrices(p); -+ FillAlignPrices(p); -+ } -+ -+ p->lenEnc.tableSize = -+ p->repLenEnc.tableSize = -+ p->numFastBytes + 1 - LZMA_MATCH_LEN_MIN; -+ LenPriceEnc_UpdateTables(&p->lenEnc, 1 << p->pb, p->ProbPrices); -+ LenPriceEnc_UpdateTables(&p->repLenEnc, 1 << p->pb, p->ProbPrices); -+} -+ -+static SRes LzmaEnc_AllocAndInit(CLzmaEnc *p, UInt32 keepWindowSize, ISzAlloc *alloc, ISzAlloc *allocBig) -+{ -+ UInt32 i; -+ for (i = 0; i < (UInt32)kDicLogSizeMaxCompress; i++) -+ if (p->dictSize <= ((UInt32)1 << i)) -+ break; -+ p->distTableSize = i * 2; -+ -+ p->finished = False; -+ p->result = SZ_OK; -+ RINOK(LzmaEnc_Alloc(p, keepWindowSize, alloc, allocBig)); -+ LzmaEnc_Init(p); -+ LzmaEnc_InitPrices(p); -+ p->nowPos64 = 0; -+ return SZ_OK; -+} -+ -+static SRes LzmaEnc_Prepare(CLzmaEncHandle pp, ISeqOutStream *outStream, ISeqInStream *inStream, -+ ISzAlloc *alloc, ISzAlloc *allocBig) -+{ -+ CLzmaEnc *p = (CLzmaEnc *)pp; -+ p->matchFinderBase.stream = inStream; -+ p->needInit = 1; -+ p->rc.outStream = outStream; -+ return LzmaEnc_AllocAndInit(p, 0, alloc, allocBig); -+} -+ -+SRes LzmaEnc_PrepareForLzma2(CLzmaEncHandle pp, -+ ISeqInStream *inStream, UInt32 keepWindowSize, -+ ISzAlloc *alloc, ISzAlloc *allocBig) -+{ -+ CLzmaEnc *p = (CLzmaEnc *)pp; -+ p->matchFinderBase.stream = inStream; -+ p->needInit = 1; -+ return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig); -+} -+ -+static void LzmaEnc_SetInputBuf(CLzmaEnc *p, const Byte *src, SizeT srcLen) -+{ -+ p->matchFinderBase.directInput = 1; -+ p->matchFinderBase.bufferBase = (Byte *)src; -+ p->matchFinderBase.directInputRem = srcLen; -+} -+ -+SRes LzmaEnc_MemPrepare(CLzmaEncHandle pp, const Byte *src, SizeT srcLen, -+ UInt32 keepWindowSize, ISzAlloc *alloc, ISzAlloc *allocBig) -+{ -+ CLzmaEnc *p = (CLzmaEnc *)pp; -+ LzmaEnc_SetInputBuf(p, src, srcLen); -+ p->needInit = 1; -+ -+ return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig); -+} -+ -+void LzmaEnc_Finish(CLzmaEncHandle pp) -+{ -+ #ifndef _7ZIP_ST -+ CLzmaEnc *p = (CLzmaEnc *)pp; -+ if (p->mtMode) -+ MatchFinderMt_ReleaseStream(&p->matchFinderMt); -+ #else -+ pp = pp; -+ #endif -+} -+ -+typedef struct -+{ -+ ISeqOutStream funcTable; -+ Byte *data; -+ SizeT rem; -+ Bool overflow; -+} CSeqOutStreamBuf; -+ -+static size_t MyWrite(void *pp, const void *data, size_t size) -+{ -+ CSeqOutStreamBuf *p = (CSeqOutStreamBuf *)pp; -+ if (p->rem < size) -+ { -+ size = p->rem; -+ p->overflow = True; -+ } -+ memcpy(p->data, data, size); -+ p->rem -= size; -+ p->data += size; -+ return size; -+} -+ -+ -+UInt32 LzmaEnc_GetNumAvailableBytes(CLzmaEncHandle pp) -+{ -+ const CLzmaEnc *p = (CLzmaEnc *)pp; -+ return p->matchFinder.GetNumAvailableBytes(p->matchFinderObj); -+} -+ -+const Byte *LzmaEnc_GetCurBuf(CLzmaEncHandle pp) -+{ -+ const CLzmaEnc *p = (CLzmaEnc *)pp; -+ return p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - p->additionalOffset; -+} -+ -+SRes LzmaEnc_CodeOneMemBlock(CLzmaEncHandle pp, Bool reInit, -+ Byte *dest, size_t *destLen, UInt32 desiredPackSize, UInt32 *unpackSize) -+{ -+ CLzmaEnc *p = (CLzmaEnc *)pp; -+ UInt64 nowPos64; -+ SRes res; -+ CSeqOutStreamBuf outStream; -+ -+ outStream.funcTable.Write = MyWrite; -+ outStream.data = dest; -+ outStream.rem = *destLen; -+ outStream.overflow = False; -+ -+ p->writeEndMark = False; -+ p->finished = False; -+ p->result = SZ_OK; -+ -+ if (reInit) -+ LzmaEnc_Init(p); -+ LzmaEnc_InitPrices(p); -+ nowPos64 = p->nowPos64; -+ RangeEnc_Init(&p->rc); -+ p->rc.outStream = &outStream.funcTable; -+ -+ res = LzmaEnc_CodeOneBlock(p, True, desiredPackSize, *unpackSize); -+ -+ *unpackSize = (UInt32)(p->nowPos64 - nowPos64); -+ *destLen -= outStream.rem; -+ if (outStream.overflow) -+ return SZ_ERROR_OUTPUT_EOF; -+ -+ return res; -+} -+ -+static SRes LzmaEnc_Encode2(CLzmaEnc *p, ICompressProgress *progress) -+{ -+ SRes res = SZ_OK; -+ -+ #ifndef _7ZIP_ST -+ Byte allocaDummy[0x300]; -+ int i = 0; -+ for (i = 0; i < 16; i++) -+ allocaDummy[i] = (Byte)i; -+ #endif -+ -+ for (;;) -+ { -+ res = LzmaEnc_CodeOneBlock(p, False, 0, 0); -+ if (res != SZ_OK || p->finished != 0) -+ break; -+ if (progress != 0) -+ { -+ res = progress->Progress(progress, p->nowPos64, RangeEnc_GetProcessed(&p->rc)); -+ if (res != SZ_OK) -+ { -+ res = SZ_ERROR_PROGRESS; -+ break; -+ } -+ } -+ } -+ LzmaEnc_Finish(p); -+ return res; -+} -+ -+SRes LzmaEnc_Encode(CLzmaEncHandle pp, ISeqOutStream *outStream, ISeqInStream *inStream, ICompressProgress *progress, -+ ISzAlloc *alloc, ISzAlloc *allocBig) -+{ -+ RINOK(LzmaEnc_Prepare(pp, outStream, inStream, alloc, allocBig)); -+ return LzmaEnc_Encode2((CLzmaEnc *)pp, progress); -+} -+ -+SRes LzmaEnc_WriteProperties(CLzmaEncHandle pp, Byte *props, SizeT *size) -+{ -+ CLzmaEnc *p = (CLzmaEnc *)pp; -+ int i; -+ UInt32 dictSize = p->dictSize; -+ if (*size < LZMA_PROPS_SIZE) -+ return SZ_ERROR_PARAM; -+ *size = LZMA_PROPS_SIZE; -+ props[0] = (Byte)((p->pb * 5 + p->lp) * 9 + p->lc); -+ -+ for (i = 11; i <= 30; i++) -+ { -+ if (dictSize <= ((UInt32)2 << i)) -+ { -+ dictSize = (2 << i); -+ break; -+ } -+ if (dictSize <= ((UInt32)3 << i)) -+ { -+ dictSize = (3 << i); -+ break; -+ } -+ } -+ -+ for (i = 0; i < 4; i++) -+ props[1 + i] = (Byte)(dictSize >> (8 * i)); -+ return SZ_OK; -+} -+ -+SRes LzmaEnc_MemEncode(CLzmaEncHandle pp, Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen, -+ int writeEndMark, ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig) -+{ -+ SRes res; -+ CLzmaEnc *p = (CLzmaEnc *)pp; -+ -+ CSeqOutStreamBuf outStream; -+ -+ LzmaEnc_SetInputBuf(p, src, srcLen); -+ -+ outStream.funcTable.Write = MyWrite; -+ outStream.data = dest; -+ outStream.rem = *destLen; -+ outStream.overflow = False; -+ -+ p->writeEndMark = writeEndMark; -+ -+ p->rc.outStream = &outStream.funcTable; -+ res = LzmaEnc_MemPrepare(pp, src, srcLen, 0, alloc, allocBig); -+ if (res == SZ_OK) -+ res = LzmaEnc_Encode2(p, progress); -+ -+ *destLen -= outStream.rem; -+ if (outStream.overflow) -+ return SZ_ERROR_OUTPUT_EOF; -+ return res; -+} -+ -+SRes LzmaEncode(Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen, -+ const CLzmaEncProps *props, Byte *propsEncoded, SizeT *propsSize, int writeEndMark, -+ ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig) -+{ -+ CLzmaEnc *p = (CLzmaEnc *)LzmaEnc_Create(alloc); -+ SRes res; -+ if (p == 0) -+ return SZ_ERROR_MEM; -+ -+ res = LzmaEnc_SetProps(p, props); -+ if (res == SZ_OK) -+ { -+ res = LzmaEnc_WriteProperties(p, propsEncoded, propsSize); -+ if (res == SZ_OK) -+ res = LzmaEnc_MemEncode(p, dest, destLen, src, srcLen, -+ writeEndMark, progress, alloc, allocBig); -+ } -+ -+ LzmaEnc_Destroy(p, alloc, allocBig); -+ return res; -+} ---- /dev/null -+++ b/lib/lzma/Makefile -@@ -0,0 +1,7 @@ -+lzma_compress-objs := LzFind.o LzmaEnc.o -+lzma_decompress-objs := LzmaDec.o -+ -+obj-$(CONFIG_LZMA_COMPRESS) += lzma_compress.o -+obj-$(CONFIG_LZMA_DECOMPRESS) += lzma_decompress.o -+ -+EXTRA_CFLAGS += -Iinclude/linux -Iinclude/linux/lzma -include types.h diff --git a/target/linux/generic/pending-5.18/532-jffs2_eofdetect.patch b/target/linux/generic/pending-5.18/532-jffs2_eofdetect.patch deleted file mode 100644 index 744fbd0e21790b..00000000000000 --- a/target/linux/generic/pending-5.18/532-jffs2_eofdetect.patch +++ /dev/null @@ -1,65 +0,0 @@ -From: Felix Fietkau -Subject: fs: jffs2: EOF marker - -Signed-off-by: Felix Fietkau ---- - fs/jffs2/build.c | 10 ++++++++++ - fs/jffs2/scan.c | 21 +++++++++++++++++++-- - 2 files changed, 29 insertions(+), 2 deletions(-) - ---- a/fs/jffs2/build.c -+++ b/fs/jffs2/build.c -@@ -117,6 +117,16 @@ static int jffs2_build_filesystem(struct - dbg_fsbuild("scanned flash completely\n"); - jffs2_dbg_dump_block_lists_nolock(c); - -+ if (c->flags & (1 << 7)) { -+ printk("%s(): unlocking the mtd device... ", __func__); -+ mtd_unlock(c->mtd, 0, c->mtd->size); -+ printk("done.\n"); -+ -+ printk("%s(): erasing all blocks after the end marker... ", __func__); -+ jffs2_erase_pending_blocks(c, -1); -+ printk("done.\n"); -+ } -+ - dbg_fsbuild("pass 1 starting\n"); - c->flags |= JFFS2_SB_FLAG_BUILDING; - /* Now scan the directory tree, increasing nlink according to every dirent found. */ ---- a/fs/jffs2/scan.c -+++ b/fs/jffs2/scan.c -@@ -148,8 +148,14 @@ int jffs2_scan_medium(struct jffs2_sb_in - /* reset summary info for next eraseblock scan */ - jffs2_sum_reset_collected(s); - -- ret = jffs2_scan_eraseblock(c, jeb, buf_size?flashbuf:(flashbuf+jeb->offset), -- buf_size, s); -+ if (c->flags & (1 << 7)) { -+ if (mtd_block_isbad(c->mtd, jeb->offset)) -+ ret = BLK_STATE_BADBLOCK; -+ else -+ ret = BLK_STATE_ALLFF; -+ } else -+ ret = jffs2_scan_eraseblock(c, jeb, buf_size?flashbuf:(flashbuf+jeb->offset), -+ buf_size, s); - - if (ret < 0) - goto out; -@@ -567,6 +573,17 @@ full_scan: - return err; - } - -+ if ((buf[0] == 0xde) && -+ (buf[1] == 0xad) && -+ (buf[2] == 0xc0) && -+ (buf[3] == 0xde)) { -+ /* end of filesystem. erase everything after this point */ -+ printk("%s(): End of filesystem marker found at 0x%x\n", __func__, jeb->offset); -+ c->flags |= (1 << 7); -+ -+ return BLK_STATE_ALLFF; -+ } -+ - /* We temporarily use 'ofs' as a pointer into the buffer/jeb */ - ofs = 0; - max_ofs = EMPTY_SCAN_SIZE(c->sector_size); diff --git a/target/linux/generic/pending-5.18/600-netfilter_conntrack_flush.patch b/target/linux/generic/pending-5.18/600-netfilter_conntrack_flush.patch deleted file mode 100644 index 6514c932e2206d..00000000000000 --- a/target/linux/generic/pending-5.18/600-netfilter_conntrack_flush.patch +++ /dev/null @@ -1,88 +0,0 @@ -From: Felix Fietkau -Subject: netfilter: add support for flushing conntrack via /proc - -lede-commit 8193bbe59a74d34d6a26d4a8cb857b1952905314 -Signed-off-by: Felix Fietkau ---- - net/netfilter/nf_conntrack_standalone.c | 59 ++++++++++++++++++++++++++++++++- - 1 file changed, 58 insertions(+), 1 deletion(-) - ---- a/net/netfilter/nf_conntrack_standalone.c -+++ b/net/netfilter/nf_conntrack_standalone.c -@@ -9,6 +9,7 @@ - #include - #include - #include -+#include - #include - #ifdef CONFIG_SYSCTL - #include -@@ -465,6 +466,56 @@ static int ct_cpu_seq_show(struct seq_fi - return 0; - } - -+struct kill_request { -+ u16 family; -+ union nf_inet_addr addr; -+}; -+ -+static int kill_matching(struct nf_conn *i, void *data) -+{ -+ struct kill_request *kr = data; -+ struct nf_conntrack_tuple *t1 = &i->tuplehash[IP_CT_DIR_ORIGINAL].tuple; -+ struct nf_conntrack_tuple *t2 = &i->tuplehash[IP_CT_DIR_REPLY].tuple; -+ -+ if (!kr->family) -+ return 1; -+ -+ if (t1->src.l3num != kr->family) -+ return 0; -+ -+ return (nf_inet_addr_cmp(&kr->addr, &t1->src.u3) || -+ nf_inet_addr_cmp(&kr->addr, &t1->dst.u3) || -+ nf_inet_addr_cmp(&kr->addr, &t2->src.u3) || -+ nf_inet_addr_cmp(&kr->addr, &t2->dst.u3)); -+} -+ -+static int ct_file_write(struct file *file, char *buf, size_t count) -+{ -+ struct seq_file *seq = file->private_data; -+ struct net *net = seq_file_net(seq); -+ struct kill_request kr = { }; -+ -+ if (count == 0) -+ return 0; -+ -+ if (count >= INET6_ADDRSTRLEN) -+ count = INET6_ADDRSTRLEN - 1; -+ -+ if (strnchr(buf, count, ':')) { -+ kr.family = AF_INET6; -+ if (!in6_pton(buf, count, (void *)&kr.addr, '\n', NULL)) -+ return -EINVAL; -+ } else if (strnchr(buf, count, '.')) { -+ kr.family = AF_INET; -+ if (!in4_pton(buf, count, (void *)&kr.addr, '\n', NULL)) -+ return -EINVAL; -+ } -+ -+ nf_ct_iterate_cleanup_net(net, kill_matching, &kr, 0, 0); -+ -+ return 0; -+} -+ - static const struct seq_operations ct_cpu_seq_ops = { - .start = ct_cpu_seq_start, - .next = ct_cpu_seq_next, -@@ -478,8 +529,9 @@ static int nf_conntrack_standalone_init_ - kuid_t root_uid; - kgid_t root_gid; - -- pde = proc_create_net("nf_conntrack", 0440, net->proc_net, &ct_seq_ops, -- sizeof(struct ct_iter_state)); -+ pde = proc_create_net_data_write("nf_conntrack", 0440, net->proc_net, -+ &ct_seq_ops, &ct_file_write, -+ sizeof(struct ct_iter_state), NULL); - if (!pde) - goto out_nf_conntrack; - diff --git a/target/linux/generic/pending-5.18/610-netfilter_match_bypass_default_checks.patch b/target/linux/generic/pending-5.18/610-netfilter_match_bypass_default_checks.patch deleted file mode 100644 index 67aec69bf4360e..00000000000000 --- a/target/linux/generic/pending-5.18/610-netfilter_match_bypass_default_checks.patch +++ /dev/null @@ -1,110 +0,0 @@ -From: Felix Fietkau -Subject: kernel: add a new version of my netfilter speedup patches for linux 2.6.39 and 3.0 - -Signed-off-by: Felix Fietkau ---- - include/uapi/linux/netfilter_ipv4/ip_tables.h | 1 + - net/ipv4/netfilter/ip_tables.c | 37 +++++++++++++++++++++++++++ - 2 files changed, 38 insertions(+) - ---- a/include/uapi/linux/netfilter_ipv4/ip_tables.h -+++ b/include/uapi/linux/netfilter_ipv4/ip_tables.h -@@ -89,6 +89,7 @@ struct ipt_ip { - #define IPT_F_FRAG 0x01 /* Set if rule is a fragment rule */ - #define IPT_F_GOTO 0x02 /* Set if jump is a goto */ - #define IPT_F_MASK 0x03 /* All possible flag bits mask. */ -+#define IPT_F_NO_DEF_MATCH 0x80 /* Internal: no default match rules present */ - - /* Values for "inv" field in struct ipt_ip. */ - #define IPT_INV_VIA_IN 0x01 /* Invert the sense of IN IFACE. */ ---- a/net/ipv4/netfilter/ip_tables.c -+++ b/net/ipv4/netfilter/ip_tables.c -@@ -50,6 +50,9 @@ ip_packet_match(const struct iphdr *ip, - { - unsigned long ret; - -+ if (ipinfo->flags & IPT_F_NO_DEF_MATCH) -+ return true; -+ - if (NF_INVF(ipinfo, IPT_INV_SRCIP, - (ip->saddr & ipinfo->smsk.s_addr) != ipinfo->src.s_addr) || - NF_INVF(ipinfo, IPT_INV_DSTIP, -@@ -80,6 +83,29 @@ ip_packet_match(const struct iphdr *ip, - return true; - } - -+static void -+ip_checkdefault(struct ipt_ip *ip) -+{ -+ static const char iface_mask[IFNAMSIZ] = {}; -+ -+ if (ip->invflags || ip->flags & IPT_F_FRAG) -+ return; -+ -+ if (memcmp(ip->iniface_mask, iface_mask, IFNAMSIZ) != 0) -+ return; -+ -+ if (memcmp(ip->outiface_mask, iface_mask, IFNAMSIZ) != 0) -+ return; -+ -+ if (ip->smsk.s_addr || ip->dmsk.s_addr) -+ return; -+ -+ if (ip->proto) -+ return; -+ -+ ip->flags |= IPT_F_NO_DEF_MATCH; -+} -+ - static bool - ip_checkentry(const struct ipt_ip *ip) - { -@@ -525,6 +551,8 @@ find_check_entry(struct ipt_entry *e, st - struct xt_mtchk_param mtpar; - struct xt_entry_match *ematch; - -+ ip_checkdefault(&e->ip); -+ - if (!xt_percpu_counter_alloc(alloc_state, &e->counters)) - return -ENOMEM; - -@@ -819,6 +847,7 @@ copy_entries_to_user(unsigned int total_ - const struct xt_table_info *private = table->private; - int ret = 0; - const void *loc_cpu_entry; -+ u8 flags; - - counters = alloc_counters(table); - if (IS_ERR(counters)) -@@ -846,6 +875,14 @@ copy_entries_to_user(unsigned int total_ - goto free_counters; - } - -+ flags = e->ip.flags & IPT_F_MASK; -+ if (copy_to_user(userptr + off -+ + offsetof(struct ipt_entry, ip.flags), -+ &flags, sizeof(flags)) != 0) { -+ ret = -EFAULT; -+ goto free_counters; -+ } -+ - for (i = sizeof(struct ipt_entry); - i < e->target_offset; - i += m->u.match_size) { -@@ -1224,12 +1261,15 @@ compat_copy_entry_to_user(struct ipt_ent - compat_uint_t origsize; - const struct xt_entry_match *ematch; - int ret = 0; -+ u8 flags = e->ip.flags & IPT_F_MASK; - - origsize = *size; - ce = *dstptr; - if (copy_to_user(ce, e, sizeof(struct ipt_entry)) != 0 || - copy_to_user(&ce->counters, &counters[i], -- sizeof(counters[i])) != 0) -+ sizeof(counters[i])) != 0 || -+ copy_to_user(&ce->ip.flags, &flags, -+ sizeof(flags)) != 0) - return -EFAULT; - - *dstptr += sizeof(struct compat_ipt_entry); diff --git a/target/linux/generic/pending-5.18/611-netfilter_match_bypass_default_table.patch b/target/linux/generic/pending-5.18/611-netfilter_match_bypass_default_table.patch deleted file mode 100644 index dd557fd3eaae32..00000000000000 --- a/target/linux/generic/pending-5.18/611-netfilter_match_bypass_default_table.patch +++ /dev/null @@ -1,106 +0,0 @@ -From: Felix Fietkau -Subject: netfilter: match bypass default table - -Signed-off-by: Felix Fietkau ---- - net/ipv4/netfilter/ip_tables.c | 79 +++++++++++++++++++++++++++++++----------- - 1 file changed, 58 insertions(+), 21 deletions(-) - ---- a/net/ipv4/netfilter/ip_tables.c -+++ b/net/ipv4/netfilter/ip_tables.c -@@ -246,6 +246,33 @@ struct ipt_entry *ipt_next_entry(const s - return (void *)entry + entry->next_offset; - } - -+static bool -+ipt_handle_default_rule(struct ipt_entry *e, unsigned int *verdict) -+{ -+ struct xt_entry_target *t; -+ struct xt_standard_target *st; -+ -+ if (e->target_offset != sizeof(struct ipt_entry)) -+ return false; -+ -+ if (!(e->ip.flags & IPT_F_NO_DEF_MATCH)) -+ return false; -+ -+ t = ipt_get_target(e); -+ if (t->u.kernel.target->target) -+ return false; -+ -+ st = (struct xt_standard_target *) t; -+ if (st->verdict == XT_RETURN) -+ return false; -+ -+ if (st->verdict >= 0) -+ return false; -+ -+ *verdict = (unsigned)(-st->verdict) - 1; -+ return true; -+} -+ - /* Returns one of the generic firewall policies, like NF_ACCEPT. */ - unsigned int - ipt_do_table(void *priv, -@@ -267,27 +294,28 @@ ipt_do_table(void *priv, - unsigned int addend; - - /* Initialization */ -+ WARN_ON(!(table->valid_hooks & (1 << hook))); -+ local_bh_disable(); -+ private = READ_ONCE(table->private); /* Address dependency. */ -+ cpu = smp_processor_id(); -+ table_base = private->entries; -+ -+ e = get_entry(table_base, private->hook_entry[hook]); -+ if (ipt_handle_default_rule(e, &verdict)) { -+ struct xt_counters *counter; -+ -+ counter = xt_get_this_cpu_counter(&e->counters); -+ ADD_COUNTER(*counter, skb->len, 1); -+ local_bh_enable(); -+ return verdict; -+ } -+ - stackidx = 0; - ip = ip_hdr(skb); - indev = state->in ? state->in->name : nulldevname; - outdev = state->out ? state->out->name : nulldevname; -- /* We handle fragments by dealing with the first fragment as -- * if it was a normal packet. All other fragments are treated -- * normally, except that they will NEVER match rules that ask -- * things we don't know, ie. tcp syn flag or ports). If the -- * rule is also a fragment-specific rule, non-fragments won't -- * match it. */ -- acpar.fragoff = ntohs(ip->frag_off) & IP_OFFSET; -- acpar.thoff = ip_hdrlen(skb); -- acpar.hotdrop = false; -- acpar.state = state; - -- WARN_ON(!(table->valid_hooks & (1 << hook))); -- local_bh_disable(); - addend = xt_write_recseq_begin(); -- private = READ_ONCE(table->private); /* Address dependency. */ -- cpu = smp_processor_id(); -- table_base = private->entries; - jumpstack = (struct ipt_entry **)private->jumpstack[cpu]; - - /* Switch to alternate jumpstack if we're being invoked via TEE. -@@ -300,7 +328,16 @@ ipt_do_table(void *priv, - if (static_key_false(&xt_tee_enabled)) - jumpstack += private->stacksize * __this_cpu_read(nf_skb_duplicated); - -- e = get_entry(table_base, private->hook_entry[hook]); -+ /* We handle fragments by dealing with the first fragment as -+ * if it was a normal packet. All other fragments are treated -+ * normally, except that they will NEVER match rules that ask -+ * things we don't know, ie. tcp syn flag or ports). If the -+ * rule is also a fragment-specific rule, non-fragments won't -+ * match it. */ -+ acpar.fragoff = ntohs(ip->frag_off) & IP_OFFSET; -+ acpar.thoff = ip_hdrlen(skb); -+ acpar.hotdrop = false; -+ acpar.state = state; - - do { - const struct xt_entry_target *t; diff --git a/target/linux/generic/pending-5.18/612-netfilter_match_reduce_memory_access.patch b/target/linux/generic/pending-5.18/612-netfilter_match_reduce_memory_access.patch deleted file mode 100644 index 79da6778b684a5..00000000000000 --- a/target/linux/generic/pending-5.18/612-netfilter_match_reduce_memory_access.patch +++ /dev/null @@ -1,22 +0,0 @@ -From: Felix Fietkau -Subject: netfilter: reduce match memory access - -Signed-off-by: Felix Fietkau ---- - net/ipv4/netfilter/ip_tables.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - ---- a/net/ipv4/netfilter/ip_tables.c -+++ b/net/ipv4/netfilter/ip_tables.c -@@ -53,9 +53,9 @@ ip_packet_match(const struct iphdr *ip, - if (ipinfo->flags & IPT_F_NO_DEF_MATCH) - return true; - -- if (NF_INVF(ipinfo, IPT_INV_SRCIP, -+ if (NF_INVF(ipinfo, IPT_INV_SRCIP, ipinfo->smsk.s_addr && - (ip->saddr & ipinfo->smsk.s_addr) != ipinfo->src.s_addr) || -- NF_INVF(ipinfo, IPT_INV_DSTIP, -+ NF_INVF(ipinfo, IPT_INV_DSTIP, ipinfo->dmsk.s_addr && - (ip->daddr & ipinfo->dmsk.s_addr) != ipinfo->dst.s_addr)) - return false; - diff --git a/target/linux/generic/pending-5.18/613-netfilter_optional_tcp_window_check.patch b/target/linux/generic/pending-5.18/613-netfilter_optional_tcp_window_check.patch deleted file mode 100644 index ca0c2d30aaf285..00000000000000 --- a/target/linux/generic/pending-5.18/613-netfilter_optional_tcp_window_check.patch +++ /dev/null @@ -1,83 +0,0 @@ -From: Felix Fietkau -Subject: netfilter: optional tcp window check - -Signed-off-by: Felix Fietkau -Signed-off-by: Christian 'Ansuel' Marangi ---- - net/netfilter/nf_conntrack_proto_tcp.c | 13 +++++++++++++ - 1 file changed, 13 insertions(+) - ---- a/net/netfilter/nf_conntrack_proto_tcp.c -+++ b/net/netfilter/nf_conntrack_proto_tcp.c -@@ -491,6 +491,9 @@ static bool tcp_in_window(struct nf_conn - s32 receiver_offset; - bool res, in_recv_win; - -+ if (tn->tcp_no_window_check) -+ return true; -+ - /* - * Get the required data from the packet. - */ -@@ -1174,7 +1177,7 @@ int nf_conntrack_tcp_packet(struct nf_co - IP_CT_TCP_FLAG_DATA_UNACKNOWLEDGED && - timeouts[new_state] > timeouts[TCP_CONNTRACK_UNACK]) - timeout = timeouts[TCP_CONNTRACK_UNACK]; -- else if (ct->proto.tcp.last_win == 0 && -+ else if (!tn->tcp_no_window_check && ct->proto.tcp.last_win == 0 && - timeouts[new_state] > timeouts[TCP_CONNTRACK_RETRANS]) - timeout = timeouts[TCP_CONNTRACK_RETRANS]; - else -@@ -1490,6 +1493,9 @@ void nf_conntrack_tcp_init_net(struct ne - */ - tn->tcp_be_liberal = 0; - -+ /* Skip Windows Check */ -+ tn->tcp_no_window_check = 0; -+ - /* If it's non-zero, we turn off RST sequence number check */ - tn->tcp_ignore_invalid_rst = 0; - ---- a/net/netfilter/nf_conntrack_standalone.c -+++ b/net/netfilter/nf_conntrack_standalone.c -@@ -636,6 +636,7 @@ enum nf_ct_sysctl_index { - #endif - NF_SYSCTL_CT_PROTO_TCP_LOOSE, - NF_SYSCTL_CT_PROTO_TCP_LIBERAL, -+ NF_SYSCTL_CT_PROTO_TCP_NO_WINDOW_CHECK, - NF_SYSCTL_CT_PROTO_TCP_IGNORE_INVALID_RST, - NF_SYSCTL_CT_PROTO_TCP_MAX_RETRANS, - NF_SYSCTL_CT_PROTO_TIMEOUT_UDP, -@@ -852,6 +853,14 @@ static struct ctl_table nf_ct_sysctl_tab - .extra1 = SYSCTL_ZERO, - .extra2 = SYSCTL_ONE, - }, -+ [NF_SYSCTL_CT_PROTO_TCP_NO_WINDOW_CHECK] = { -+ .procname = "nf_conntrack_tcp_no_window_check", -+ .maxlen = sizeof(u8), -+ .mode = 0644, -+ .proc_handler = proc_dou8vec_minmax, -+ .extra1 = SYSCTL_ZERO, -+ .extra2 = SYSCTL_ONE, -+ }, - [NF_SYSCTL_CT_PROTO_TCP_IGNORE_INVALID_RST] = { - .procname = "nf_conntrack_tcp_ignore_invalid_rst", - .maxlen = sizeof(u8), -@@ -1068,6 +1077,7 @@ static void nf_conntrack_standalone_init - - XASSIGN(LOOSE, &tn->tcp_loose); - XASSIGN(LIBERAL, &tn->tcp_be_liberal); -+ XASSIGN(NO_WINDOW_CHECK, &tn->tcp_no_window_check); - XASSIGN(MAX_RETRANS, &tn->tcp_max_retrans); - XASSIGN(IGNORE_INVALID_RST, &tn->tcp_ignore_invalid_rst); - #undef XASSIGN ---- a/include/net/netns/conntrack.h -+++ b/include/net/netns/conntrack.h -@@ -26,6 +26,7 @@ struct nf_tcp_net { - unsigned int timeouts[TCP_CONNTRACK_TIMEOUT_MAX]; - u8 tcp_loose; - u8 tcp_be_liberal; -+ u8 tcp_no_window_check; - u8 tcp_max_retrans; - u8 tcp_ignore_invalid_rst; - #if IS_ENABLED(CONFIG_NF_FLOW_TABLE) diff --git a/target/linux/generic/pending-5.18/620-net_sched-codel-do-not-defer-queue-length-update.patch b/target/linux/generic/pending-5.18/620-net_sched-codel-do-not-defer-queue-length-update.patch deleted file mode 100644 index 4b4825ae3b9a4a..00000000000000 --- a/target/linux/generic/pending-5.18/620-net_sched-codel-do-not-defer-queue-length-update.patch +++ /dev/null @@ -1,86 +0,0 @@ -From: Konstantin Khlebnikov -Date: Mon, 21 Aug 2017 11:14:14 +0300 -Subject: [PATCH] net_sched/codel: do not defer queue length update - -When codel wants to drop last packet in ->dequeue() it cannot call -qdisc_tree_reduce_backlog() right away - it will notify parent qdisc -about zero qlen and HTB/HFSC will deactivate class. The same class will -be deactivated second time by caller of ->dequeue(). Currently codel and -fq_codel defer update. This triggers warning in HFSC when it's qlen != 0 -but there is no active classes. - -This patch update parent queue length immediately: just temporary increase -qlen around qdisc_tree_reduce_backlog() to prevent first class deactivation -if we have skb to return. - -This might open another problem in HFSC - now operation peek could fail and -deactivate parent class. - -Signed-off-by: Konstantin Khlebnikov -Link: https://bugzilla.kernel.org/show_bug.cgi?id=109581 ---- - ---- a/net/sched/sch_codel.c -+++ b/net/sched/sch_codel.c -@@ -95,11 +95,17 @@ static struct sk_buff *codel_qdisc_deque - &q->stats, qdisc_pkt_len, codel_get_enqueue_time, - drop_func, dequeue_func); - -- /* We cant call qdisc_tree_reduce_backlog() if our qlen is 0, -- * or HTB crashes. Defer it for next round. -+ /* If our qlen is 0 qdisc_tree_reduce_backlog() will deactivate -+ * parent class, dequeue in parent qdisc will do the same if we -+ * return skb. Temporary increment qlen if we have skb. - */ -- if (q->stats.drop_count && sch->q.qlen) { -- qdisc_tree_reduce_backlog(sch, q->stats.drop_count, q->stats.drop_len); -+ if (q->stats.drop_count) { -+ if (skb) -+ sch->q.qlen++; -+ qdisc_tree_reduce_backlog(sch, q->stats.drop_count, -+ q->stats.drop_len); -+ if (skb) -+ sch->q.qlen--; - q->stats.drop_count = 0; - q->stats.drop_len = 0; - } ---- a/net/sched/sch_fq_codel.c -+++ b/net/sched/sch_fq_codel.c -@@ -304,6 +304,21 @@ begin: - &flow->cvars, &q->cstats, qdisc_pkt_len, - codel_get_enqueue_time, drop_func, dequeue_func); - -+ /* If our qlen is 0 qdisc_tree_reduce_backlog() will deactivate -+ * parent class, dequeue in parent qdisc will do the same if we -+ * return skb. Temporary increment qlen if we have skb. -+ */ -+ if (q->cstats.drop_count) { -+ if (skb) -+ sch->q.qlen++; -+ qdisc_tree_reduce_backlog(sch, q->cstats.drop_count, -+ q->cstats.drop_len); -+ if (skb) -+ sch->q.qlen--; -+ q->cstats.drop_count = 0; -+ q->cstats.drop_len = 0; -+ } -+ - if (!skb) { - /* force a pass through old_flows to prevent starvation */ - if ((head == &q->new_flows) && !list_empty(&q->old_flows)) -@@ -314,15 +329,6 @@ begin: - } - qdisc_bstats_update(sch, skb); - flow->deficit -= qdisc_pkt_len(skb); -- /* We cant call qdisc_tree_reduce_backlog() if our qlen is 0, -- * or HTB crashes. Defer it for next round. -- */ -- if (q->cstats.drop_count && sch->q.qlen) { -- qdisc_tree_reduce_backlog(sch, q->cstats.drop_count, -- q->cstats.drop_len); -- q->cstats.drop_count = 0; -- q->cstats.drop_len = 0; -- } - return skb; - } - diff --git a/target/linux/generic/pending-5.18/630-packet_socket_type.patch b/target/linux/generic/pending-5.18/630-packet_socket_type.patch deleted file mode 100644 index 6c5b259714bb9e..00000000000000 --- a/target/linux/generic/pending-5.18/630-packet_socket_type.patch +++ /dev/null @@ -1,138 +0,0 @@ -From: Felix Fietkau -Subject: net: add an optimization for dealing with raw sockets - -lede-commit: 4898039703d7315f0f3431c860123338ec3be0f6 -Signed-off-by: Felix Fietkau ---- - include/uapi/linux/if_packet.h | 3 +++ - net/packet/af_packet.c | 34 +++++++++++++++++++++++++++------- - net/packet/internal.h | 1 + - 3 files changed, 31 insertions(+), 7 deletions(-) - ---- a/include/uapi/linux/if_packet.h -+++ b/include/uapi/linux/if_packet.h -@@ -33,6 +33,8 @@ struct sockaddr_ll { - #define PACKET_KERNEL 7 /* To kernel space */ - /* Unused, PACKET_FASTROUTE and PACKET_LOOPBACK are invisible to user space */ - #define PACKET_FASTROUTE 6 /* Fastrouted frame */ -+#define PACKET_MASK_ANY 0xffffffff /* mask for packet type bits */ -+ - - /* Packet socket options */ - -@@ -59,6 +61,7 @@ struct sockaddr_ll { - #define PACKET_ROLLOVER_STATS 21 - #define PACKET_FANOUT_DATA 22 - #define PACKET_IGNORE_OUTGOING 23 -+#define PACKET_RECV_TYPE 24 - - #define PACKET_FANOUT_HASH 0 - #define PACKET_FANOUT_LB 1 ---- a/net/packet/af_packet.c -+++ b/net/packet/af_packet.c -@@ -1861,6 +1861,7 @@ static int packet_rcv_spkt(struct sk_buf - { - struct sock *sk; - struct sockaddr_pkt *spkt; -+ struct packet_sock *po; - - /* - * When we registered the protocol we saved the socket in the data -@@ -1868,6 +1869,7 @@ static int packet_rcv_spkt(struct sk_buf - */ - - sk = pt->af_packet_priv; -+ po = pkt_sk(sk); - - /* - * Yank back the headers [hope the device set this -@@ -1880,7 +1882,7 @@ static int packet_rcv_spkt(struct sk_buf - * so that this procedure is noop. - */ - -- if (skb->pkt_type == PACKET_LOOPBACK) -+ if (!(po->pkt_type & (1 << skb->pkt_type))) - goto out; - - if (!net_eq(dev_net(dev), sock_net(sk))) -@@ -2118,12 +2120,12 @@ static int packet_rcv(struct sk_buff *sk - unsigned int snaplen, res; - bool is_drop_n_account = false; - -- if (skb->pkt_type == PACKET_LOOPBACK) -- goto drop; -- - sk = pt->af_packet_priv; - po = pkt_sk(sk); - -+ if (!(po->pkt_type & (1 << skb->pkt_type))) -+ goto drop; -+ - if (!net_eq(dev_net(dev), sock_net(sk))) - goto drop; - -@@ -2250,12 +2252,12 @@ static int tpacket_rcv(struct sk_buff *s - BUILD_BUG_ON(TPACKET_ALIGN(sizeof(*h.h2)) != 32); - BUILD_BUG_ON(TPACKET_ALIGN(sizeof(*h.h3)) != 48); - -- if (skb->pkt_type == PACKET_LOOPBACK) -- goto drop; -- - sk = pt->af_packet_priv; - po = pkt_sk(sk); - -+ if (!(po->pkt_type & (1 << skb->pkt_type))) -+ goto drop; -+ - if (!net_eq(dev_net(dev), sock_net(sk))) - goto drop; - -@@ -3362,6 +3364,7 @@ static int packet_create(struct net *net - mutex_init(&po->pg_vec_lock); - po->rollover = NULL; - po->prot_hook.func = packet_rcv; -+ po->pkt_type = PACKET_MASK_ANY & ~(1 << PACKET_LOOPBACK); - - if (sock->type == SOCK_PACKET) - po->prot_hook.func = packet_rcv_spkt; -@@ -4001,6 +4004,16 @@ packet_setsockopt(struct socket *sock, i - po->xmit = val ? packet_direct_xmit : dev_queue_xmit; - return 0; - } -+ case PACKET_RECV_TYPE: -+ { -+ unsigned int val; -+ if (optlen != sizeof(val)) -+ return -EINVAL; -+ if (copy_from_sockptr(&val, optval, sizeof(val))) -+ return -EFAULT; -+ po->pkt_type = val & ~BIT(PACKET_LOOPBACK); -+ return 0; -+ } - default: - return -ENOPROTOOPT; - } -@@ -4057,6 +4070,13 @@ static int packet_getsockopt(struct sock - case PACKET_VNET_HDR: - val = po->has_vnet_hdr; - break; -+ case PACKET_RECV_TYPE: -+ if (len > sizeof(unsigned int)) -+ len = sizeof(unsigned int); -+ val = po->pkt_type; -+ -+ data = &val; -+ break; - case PACKET_VERSION: - val = po->tp_version; - break; ---- a/net/packet/internal.h -+++ b/net/packet/internal.h -@@ -137,6 +137,7 @@ struct packet_sock { - int (*xmit)(struct sk_buff *skb); - struct packet_type prot_hook ____cacheline_aligned_in_smp; - atomic_t tp_drops ____cacheline_aligned_in_smp; -+ unsigned int pkt_type; - }; - - static inline struct packet_sock *pkt_sk(struct sock *sk) diff --git a/target/linux/generic/pending-5.18/655-increase_skb_pad.patch b/target/linux/generic/pending-5.18/655-increase_skb_pad.patch deleted file mode 100644 index 168b74206bfc25..00000000000000 --- a/target/linux/generic/pending-5.18/655-increase_skb_pad.patch +++ /dev/null @@ -1,20 +0,0 @@ -From: Felix Fietkau -Subject: kernel: add a few patches for avoiding unnecessary skb reallocations - significantly improves ethernet<->wireless performance - -lede-commit: 6f89cffc9add6939d44a6b54cf9a5e77849aa7fd -Signed-off-by: Felix Fietkau ---- - include/linux/skbuff.h | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/include/linux/skbuff.h -+++ b/include/linux/skbuff.h -@@ -2931,7 +2931,7 @@ static inline int pskb_network_may_pull( - * NET_IP_ALIGN(2) + ethernet_header(14) + IP_header(20/40) + ports(8) - */ - #ifndef NET_SKB_PAD --#define NET_SKB_PAD max(32, L1_CACHE_BYTES) -+#define NET_SKB_PAD max(64, L1_CACHE_BYTES) - #endif - - int ___pskb_trim(struct sk_buff *skb, unsigned int len); diff --git a/target/linux/generic/pending-5.18/666-Add-support-for-MAP-E-FMRs-mesh-mode.patch b/target/linux/generic/pending-5.18/666-Add-support-for-MAP-E-FMRs-mesh-mode.patch deleted file mode 100644 index e59f6e140ed421..00000000000000 --- a/target/linux/generic/pending-5.18/666-Add-support-for-MAP-E-FMRs-mesh-mode.patch +++ /dev/null @@ -1,511 +0,0 @@ -From: Steven Barth -Subject: Add support for MAP-E FMRs (mesh mode) - -MAP-E FMRs (draft-ietf-softwire-map-10) are rules for IPv4-communication -between MAP CEs (mesh mode) without the need to forward such data to a -border relay. This is similar to how 6rd works but for IPv4 over IPv6. - -Signed-off-by: Steven Barth ---- - include/net/ip6_tunnel.h | 13 ++ - include/uapi/linux/if_tunnel.h | 13 ++ - net/ipv6/ip6_tunnel.c | 276 +++++++++++++++++++++++++++++++++++++++-- - 3 files changed, 291 insertions(+), 11 deletions(-) - ---- a/include/net/ip6_tunnel.h -+++ b/include/net/ip6_tunnel.h -@@ -18,6 +18,18 @@ - /* determine capability on a per-packet basis */ - #define IP6_TNL_F_CAP_PER_PACKET 0x40000 - -+/* IPv6 tunnel FMR */ -+struct __ip6_tnl_fmr { -+ struct __ip6_tnl_fmr *next; /* next fmr in list */ -+ struct in6_addr ip6_prefix; -+ struct in_addr ip4_prefix; -+ -+ __u8 ip6_prefix_len; -+ __u8 ip4_prefix_len; -+ __u8 ea_len; -+ __u8 offset; -+}; -+ - struct __ip6_tnl_parm { - char name[IFNAMSIZ]; /* name of tunnel device */ - int link; /* ifindex of underlying L2 interface */ -@@ -29,6 +41,7 @@ struct __ip6_tnl_parm { - __u32 flags; /* tunnel flags */ - struct in6_addr laddr; /* local tunnel end-point address */ - struct in6_addr raddr; /* remote tunnel end-point address */ -+ struct __ip6_tnl_fmr *fmrs; /* FMRs */ - - __be16 i_flags; - __be16 o_flags; ---- a/include/uapi/linux/if_tunnel.h -+++ b/include/uapi/linux/if_tunnel.h -@@ -77,10 +77,23 @@ enum { - IFLA_IPTUN_ENCAP_DPORT, - IFLA_IPTUN_COLLECT_METADATA, - IFLA_IPTUN_FWMARK, -+ IFLA_IPTUN_FMRS, - __IFLA_IPTUN_MAX, - }; - #define IFLA_IPTUN_MAX (__IFLA_IPTUN_MAX - 1) - -+enum { -+ IFLA_IPTUN_FMR_UNSPEC, -+ IFLA_IPTUN_FMR_IP6_PREFIX, -+ IFLA_IPTUN_FMR_IP4_PREFIX, -+ IFLA_IPTUN_FMR_IP6_PREFIX_LEN, -+ IFLA_IPTUN_FMR_IP4_PREFIX_LEN, -+ IFLA_IPTUN_FMR_EA_LEN, -+ IFLA_IPTUN_FMR_OFFSET, -+ __IFLA_IPTUN_FMR_MAX, -+}; -+#define IFLA_IPTUN_FMR_MAX (__IFLA_IPTUN_FMR_MAX - 1) -+ - enum tunnel_encap_types { - TUNNEL_ENCAP_NONE, - TUNNEL_ENCAP_FOU, ---- a/net/ipv6/ip6_tunnel.c -+++ b/net/ipv6/ip6_tunnel.c -@@ -11,6 +11,9 @@ - * linux/net/ipv6/sit.c and linux/net/ipv4/ipip.c - * - * RFC 2473 -+ * -+ * Changes: -+ * Steven Barth : MAP-E FMR support - */ - - #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt -@@ -67,9 +70,9 @@ static bool log_ecn_error = true; - module_param(log_ecn_error, bool, 0644); - MODULE_PARM_DESC(log_ecn_error, "Log packets received with corrupted ECN"); - --static u32 HASH(const struct in6_addr *addr1, const struct in6_addr *addr2) -+static u32 HASH(const struct in6_addr *addr) - { -- u32 hash = ipv6_addr_hash(addr1) ^ ipv6_addr_hash(addr2); -+ u32 hash = ipv6_addr_hash(addr); - - return hash_32(hash, IP6_TUNNEL_HASH_SIZE_SHIFT); - } -@@ -114,17 +117,33 @@ static struct ip6_tnl * - ip6_tnl_lookup(struct net *net, int link, - const struct in6_addr *remote, const struct in6_addr *local) - { -- unsigned int hash = HASH(remote, local); -+ unsigned int hash = HASH(local); - struct ip6_tnl *t, *cand = NULL; - struct ip6_tnl_net *ip6n = net_generic(net, ip6_tnl_net_id); - struct in6_addr any; - - for_each_ip6_tunnel_rcu(ip6n->tnls_r_l[hash]) { - if (!ipv6_addr_equal(local, &t->parms.laddr) || -- !ipv6_addr_equal(remote, &t->parms.raddr) || - !(t->dev->flags & IFF_UP)) - continue; - -+ if (!ipv6_addr_equal(remote, &t->parms.raddr)) { -+ struct __ip6_tnl_fmr *fmr; -+ bool found = false; -+ -+ for (fmr = t->parms.fmrs; fmr; fmr = fmr->next) { -+ if (!ipv6_prefix_equal(remote, &fmr->ip6_prefix, -+ fmr->ip6_prefix_len)) -+ continue; -+ -+ found = true; -+ break; -+ } -+ -+ if (!found) -+ continue; -+ } -+ - if (link == t->parms.link) - return t; - else -@@ -132,7 +151,7 @@ ip6_tnl_lookup(struct net *net, int link - } - - memset(&any, 0, sizeof(any)); -- hash = HASH(&any, local); -+ hash = HASH(local); - for_each_ip6_tunnel_rcu(ip6n->tnls_r_l[hash]) { - if (!ipv6_addr_equal(local, &t->parms.laddr) || - !ipv6_addr_any(&t->parms.raddr) || -@@ -145,7 +164,7 @@ ip6_tnl_lookup(struct net *net, int link - cand = t; - } - -- hash = HASH(remote, &any); -+ hash = HASH(&any); - for_each_ip6_tunnel_rcu(ip6n->tnls_r_l[hash]) { - if (!ipv6_addr_equal(remote, &t->parms.raddr) || - !ipv6_addr_any(&t->parms.laddr) || -@@ -194,7 +213,7 @@ ip6_tnl_bucket(struct ip6_tnl_net *ip6n, - - if (!ipv6_addr_any(remote) || !ipv6_addr_any(local)) { - prio = 1; -- h = HASH(remote, local); -+ h = HASH(local); - } - return &ip6n->tnls[prio][h]; - } -@@ -378,6 +397,12 @@ ip6_tnl_dev_uninit(struct net_device *de - struct net *net = t->net; - struct ip6_tnl_net *ip6n = net_generic(net, ip6_tnl_net_id); - -+ while (t->parms.fmrs) { -+ struct __ip6_tnl_fmr *next = t->parms.fmrs->next; -+ kfree(t->parms.fmrs); -+ t->parms.fmrs = next; -+ } -+ - if (dev == ip6n->fb_tnl_dev) - RCU_INIT_POINTER(ip6n->tnls_wc[0], NULL); - else -@@ -790,6 +815,107 @@ int ip6_tnl_rcv_ctl(struct ip6_tnl *t, - } - EXPORT_SYMBOL_GPL(ip6_tnl_rcv_ctl); - -+/** -+ * ip4ip6_fmr_calc - calculate target / source IPv6-address based on FMR -+ * @dest: destination IPv6 address buffer -+ * @skb: received socket buffer -+ * @fmr: MAP FMR -+ * @xmit: Calculate for xmit or rcv -+ **/ -+static void ip4ip6_fmr_calc(struct in6_addr *dest, -+ const struct iphdr *iph, const uint8_t *end, -+ const struct __ip6_tnl_fmr *fmr, bool xmit) -+{ -+ int psidlen = fmr->ea_len - (32 - fmr->ip4_prefix_len); -+ u8 *portp = NULL; -+ bool use_dest_addr; -+ const struct iphdr *dsth = iph; -+ -+ if ((u8*)dsth >= end) -+ return; -+ -+ /* find significant IP header */ -+ if (iph->protocol == IPPROTO_ICMP) { -+ struct icmphdr *ih = (struct icmphdr*)(((u8*)dsth) + dsth->ihl * 4); -+ if (ih && ((u8*)&ih[1]) <= end && ( -+ ih->type == ICMP_DEST_UNREACH || -+ ih->type == ICMP_SOURCE_QUENCH || -+ ih->type == ICMP_TIME_EXCEEDED || -+ ih->type == ICMP_PARAMETERPROB || -+ ih->type == ICMP_REDIRECT)) -+ dsth = (const struct iphdr*)&ih[1]; -+ } -+ -+ /* in xmit-path use dest port by default and source port only if -+ this is an ICMP reply to something else; vice versa in rcv-path */ -+ use_dest_addr = (xmit && dsth == iph) || (!xmit && dsth != iph); -+ -+ /* get dst port */ -+ if (((u8*)&dsth[1]) <= end && ( -+ dsth->protocol == IPPROTO_UDP || -+ dsth->protocol == IPPROTO_TCP || -+ dsth->protocol == IPPROTO_SCTP || -+ dsth->protocol == IPPROTO_DCCP)) { -+ /* for UDP, TCP, SCTP and DCCP source and dest port -+ follow IPv4 header directly */ -+ portp = ((u8*)dsth) + dsth->ihl * 4; -+ -+ if (use_dest_addr) -+ portp += sizeof(u16); -+ } else if (iph->protocol == IPPROTO_ICMP) { -+ struct icmphdr *ih = (struct icmphdr*)(((u8*)dsth) + dsth->ihl * 4); -+ -+ /* use icmp identifier as port */ -+ if (((u8*)&ih) <= end && ( -+ (use_dest_addr && ( -+ ih->type == ICMP_ECHOREPLY || -+ ih->type == ICMP_TIMESTAMPREPLY || -+ ih->type == ICMP_INFO_REPLY || -+ ih->type == ICMP_ADDRESSREPLY)) || -+ (!use_dest_addr && ( -+ ih->type == ICMP_ECHO || -+ ih->type == ICMP_TIMESTAMP || -+ ih->type == ICMP_INFO_REQUEST || -+ ih->type == ICMP_ADDRESS) -+ ))) -+ portp = (u8*)&ih->un.echo.id; -+ } -+ -+ if ((portp && &portp[2] <= end) || psidlen == 0) { -+ int frombyte = fmr->ip6_prefix_len / 8; -+ int fromrem = fmr->ip6_prefix_len % 8; -+ int bytes = sizeof(struct in6_addr) - frombyte; -+ const u32 *addr = (use_dest_addr) ? &iph->daddr : &iph->saddr; -+ u64 eabits = ((u64)ntohl(*addr)) << (32 + fmr->ip4_prefix_len); -+ u64 t = 0; -+ -+ /* extract PSID from port and add it to eabits */ -+ u16 psidbits = 0; -+ if (psidlen > 0) { -+ psidbits = ((u16)portp[0]) << 8 | ((u16)portp[1]); -+ psidbits >>= 16 - psidlen - fmr->offset; -+ psidbits = (u16)(psidbits << (16 - psidlen)); -+ eabits |= ((u64)psidbits) << (48 - (fmr->ea_len - psidlen)); -+ } -+ -+ /* rewrite destination address */ -+ *dest = fmr->ip6_prefix; -+ memcpy(&dest->s6_addr[10], addr, sizeof(*addr)); -+ dest->s6_addr16[7] = htons(psidbits >> (16 - psidlen)); -+ -+ if (bytes > sizeof(u64)) -+ bytes = sizeof(u64); -+ -+ /* insert eabits */ -+ memcpy(&t, &dest->s6_addr[frombyte], bytes); -+ t = be64_to_cpu(t) & ~(((((u64)1) << fmr->ea_len) - 1) -+ << (64 - fmr->ea_len - fromrem)); -+ t = cpu_to_be64(t | (eabits >> fromrem)); -+ memcpy(&dest->s6_addr[frombyte], &t, bytes); -+ } -+} -+ -+ - static int __ip6_tnl_rcv(struct ip6_tnl *tunnel, struct sk_buff *skb, - const struct tnl_ptk_info *tpi, - struct metadata_dst *tun_dst, -@@ -843,6 +969,27 @@ static int __ip6_tnl_rcv(struct ip6_tnl - skb_reset_network_header(skb); - memset(skb->cb, 0, sizeof(struct inet6_skb_parm)); - -+ if (tpi->proto == htons(ETH_P_IP) && tunnel->parms.fmrs && -+ !ipv6_addr_equal(&ipv6h->saddr, &tunnel->parms.raddr)) { -+ /* Packet didn't come from BR, so lookup FMR */ -+ struct __ip6_tnl_fmr *fmr; -+ struct in6_addr expected = tunnel->parms.raddr; -+ for (fmr = tunnel->parms.fmrs; fmr; fmr = fmr->next) -+ if (ipv6_prefix_equal(&ipv6h->saddr, -+ &fmr->ip6_prefix, fmr->ip6_prefix_len)) -+ break; -+ -+ /* Check that IPv6 matches IPv4 source to prevent spoofing */ -+ if (fmr) -+ ip4ip6_fmr_calc(&expected, ip_hdr(skb), -+ skb_tail_pointer(skb), fmr, false); -+ -+ if (!ipv6_addr_equal(&ipv6h->saddr, &expected)) { -+ rcu_read_unlock(); -+ goto drop; -+ } -+ } -+ - __skb_tunnel_rx(skb, tunnel->dev, tunnel->net); - - err = dscp_ecn_decapsulate(tunnel, ipv6h, skb); -@@ -994,6 +1141,7 @@ static void init_tel_txopt(struct ipv6_t - opt->ops.opt_nflen = 8; - } - -+ - /** - * ip6_tnl_addr_conflict - compare packet addresses to tunnel's own - * @t: the outgoing tunnel device -@@ -1282,6 +1430,7 @@ ipxip6_tnl_xmit(struct sk_buff *skb, str - u8 protocol) - { - struct ip6_tnl *t = netdev_priv(dev); -+ struct __ip6_tnl_fmr *fmr; - struct ipv6hdr *ipv6h; - const struct iphdr *iph; - int encap_limit = -1; -@@ -1381,6 +1530,18 @@ ipxip6_tnl_xmit(struct sk_buff *skb, str - fl6.flowi6_uid = sock_net_uid(dev_net(dev), NULL); - dsfield = INET_ECN_encapsulate(dsfield, orig_dsfield); - -+ /* try to find matching FMR */ -+ for (fmr = t->parms.fmrs; fmr; fmr = fmr->next) { -+ unsigned mshift = 32 - fmr->ip4_prefix_len; -+ if (ntohl(fmr->ip4_prefix.s_addr) >> mshift == -+ ntohl(ip_hdr(skb)->daddr) >> mshift) -+ break; -+ } -+ -+ /* change dstaddr according to FMR */ -+ if (fmr) -+ ip4ip6_fmr_calc(&fl6.daddr, ip_hdr(skb), skb_tail_pointer(skb), fmr, true); -+ - if (iptunnel_handle_offloads(skb, SKB_GSO_IPXIP6)) - return -1; - -@@ -1533,6 +1694,14 @@ ip6_tnl_change(struct ip6_tnl *t, const - t->parms.link = p->link; - t->parms.proto = p->proto; - t->parms.fwmark = p->fwmark; -+ -+ while (t->parms.fmrs) { -+ struct __ip6_tnl_fmr *next = t->parms.fmrs->next; -+ kfree(t->parms.fmrs); -+ t->parms.fmrs = next; -+ } -+ t->parms.fmrs = p->fmrs; -+ - dst_cache_reset(&t->dst_cache); - ip6_tnl_link_config(t); - return 0; -@@ -1571,6 +1740,7 @@ ip6_tnl_parm_from_user(struct __ip6_tnl_ - p->flowinfo = u->flowinfo; - p->link = u->link; - p->proto = u->proto; -+ p->fmrs = NULL; - memcpy(p->name, u->name, sizeof(u->name)); - } - -@@ -1957,6 +2127,15 @@ static int ip6_tnl_validate(struct nlatt - return 0; - } - -+static const struct nla_policy ip6_tnl_fmr_policy[IFLA_IPTUN_FMR_MAX + 1] = { -+ [IFLA_IPTUN_FMR_IP6_PREFIX] = { .len = sizeof(struct in6_addr) }, -+ [IFLA_IPTUN_FMR_IP4_PREFIX] = { .len = sizeof(struct in_addr) }, -+ [IFLA_IPTUN_FMR_IP6_PREFIX_LEN] = { .type = NLA_U8 }, -+ [IFLA_IPTUN_FMR_IP4_PREFIX_LEN] = { .type = NLA_U8 }, -+ [IFLA_IPTUN_FMR_EA_LEN] = { .type = NLA_U8 }, -+ [IFLA_IPTUN_FMR_OFFSET] = { .type = NLA_U8 } -+}; -+ - static void ip6_tnl_netlink_parms(struct nlattr *data[], - struct __ip6_tnl_parm *parms) - { -@@ -1994,6 +2173,46 @@ static void ip6_tnl_netlink_parms(struct - - if (data[IFLA_IPTUN_FWMARK]) - parms->fwmark = nla_get_u32(data[IFLA_IPTUN_FWMARK]); -+ -+ if (data[IFLA_IPTUN_FMRS]) { -+ unsigned rem; -+ struct nlattr *fmr; -+ nla_for_each_nested(fmr, data[IFLA_IPTUN_FMRS], rem) { -+ struct nlattr *fmrd[IFLA_IPTUN_FMR_MAX + 1], *c; -+ struct __ip6_tnl_fmr *nfmr; -+ -+ nla_parse_nested(fmrd, IFLA_IPTUN_FMR_MAX, -+ fmr, ip6_tnl_fmr_policy, NULL); -+ -+ if (!(nfmr = kzalloc(sizeof(*nfmr), GFP_KERNEL))) -+ continue; -+ -+ nfmr->offset = 6; -+ -+ if ((c = fmrd[IFLA_IPTUN_FMR_IP6_PREFIX])) -+ nla_memcpy(&nfmr->ip6_prefix, fmrd[IFLA_IPTUN_FMR_IP6_PREFIX], -+ sizeof(nfmr->ip6_prefix)); -+ -+ if ((c = fmrd[IFLA_IPTUN_FMR_IP4_PREFIX])) -+ nla_memcpy(&nfmr->ip4_prefix, fmrd[IFLA_IPTUN_FMR_IP4_PREFIX], -+ sizeof(nfmr->ip4_prefix)); -+ -+ if ((c = fmrd[IFLA_IPTUN_FMR_IP6_PREFIX_LEN])) -+ nfmr->ip6_prefix_len = nla_get_u8(c); -+ -+ if ((c = fmrd[IFLA_IPTUN_FMR_IP4_PREFIX_LEN])) -+ nfmr->ip4_prefix_len = nla_get_u8(c); -+ -+ if ((c = fmrd[IFLA_IPTUN_FMR_EA_LEN])) -+ nfmr->ea_len = nla_get_u8(c); -+ -+ if ((c = fmrd[IFLA_IPTUN_FMR_OFFSET])) -+ nfmr->offset = nla_get_u8(c); -+ -+ nfmr->next = parms->fmrs; -+ parms->fmrs = nfmr; -+ } -+ } - } - - static bool ip6_tnl_netlink_encap_parms(struct nlattr *data[], -@@ -2109,6 +2328,12 @@ static void ip6_tnl_dellink(struct net_d - - static size_t ip6_tnl_get_size(const struct net_device *dev) - { -+ const struct ip6_tnl *t = netdev_priv(dev); -+ struct __ip6_tnl_fmr *c; -+ int fmrs = 0; -+ for (c = t->parms.fmrs; c; c = c->next) -+ ++fmrs; -+ - return - /* IFLA_IPTUN_LINK */ - nla_total_size(4) + -@@ -2138,6 +2363,24 @@ static size_t ip6_tnl_get_size(const str - nla_total_size(0) + - /* IFLA_IPTUN_FWMARK */ - nla_total_size(4) + -+ /* IFLA_IPTUN_FMRS */ -+ nla_total_size(0) + -+ ( -+ /* nest */ -+ nla_total_size(0) + -+ /* IFLA_IPTUN_FMR_IP6_PREFIX */ -+ nla_total_size(sizeof(struct in6_addr)) + -+ /* IFLA_IPTUN_FMR_IP4_PREFIX */ -+ nla_total_size(sizeof(struct in_addr)) + -+ /* IFLA_IPTUN_FMR_EA_LEN */ -+ nla_total_size(1) + -+ /* IFLA_IPTUN_FMR_IP6_PREFIX_LEN */ -+ nla_total_size(1) + -+ /* IFLA_IPTUN_FMR_IP4_PREFIX_LEN */ -+ nla_total_size(1) + -+ /* IFLA_IPTUN_FMR_OFFSET */ -+ nla_total_size(1) -+ ) * fmrs + - 0; - } - -@@ -2145,6 +2388,9 @@ static int ip6_tnl_fill_info(struct sk_b - { - struct ip6_tnl *tunnel = netdev_priv(dev); - struct __ip6_tnl_parm *parm = &tunnel->parms; -+ struct __ip6_tnl_fmr *c; -+ int fmrcnt = 0; -+ struct nlattr *fmrs; - - if (nla_put_u32(skb, IFLA_IPTUN_LINK, parm->link) || - nla_put_in6_addr(skb, IFLA_IPTUN_LOCAL, &parm->laddr) || -@@ -2154,9 +2400,27 @@ static int ip6_tnl_fill_info(struct sk_b - nla_put_be32(skb, IFLA_IPTUN_FLOWINFO, parm->flowinfo) || - nla_put_u32(skb, IFLA_IPTUN_FLAGS, parm->flags) || - nla_put_u8(skb, IFLA_IPTUN_PROTO, parm->proto) || -- nla_put_u32(skb, IFLA_IPTUN_FWMARK, parm->fwmark)) -+ nla_put_u32(skb, IFLA_IPTUN_FWMARK, parm->fwmark) || -+ !(fmrs = nla_nest_start(skb, IFLA_IPTUN_FMRS))) - goto nla_put_failure; - -+ for (c = parm->fmrs; c; c = c->next) { -+ struct nlattr *fmr = nla_nest_start(skb, ++fmrcnt); -+ if (!fmr || -+ nla_put(skb, IFLA_IPTUN_FMR_IP6_PREFIX, -+ sizeof(c->ip6_prefix), &c->ip6_prefix) || -+ nla_put(skb, IFLA_IPTUN_FMR_IP4_PREFIX, -+ sizeof(c->ip4_prefix), &c->ip4_prefix) || -+ nla_put_u8(skb, IFLA_IPTUN_FMR_IP6_PREFIX_LEN, c->ip6_prefix_len) || -+ nla_put_u8(skb, IFLA_IPTUN_FMR_IP4_PREFIX_LEN, c->ip4_prefix_len) || -+ nla_put_u8(skb, IFLA_IPTUN_FMR_EA_LEN, c->ea_len) || -+ nla_put_u8(skb, IFLA_IPTUN_FMR_OFFSET, c->offset)) -+ goto nla_put_failure; -+ -+ nla_nest_end(skb, fmr); -+ } -+ nla_nest_end(skb, fmrs); -+ - if (nla_put_u16(skb, IFLA_IPTUN_ENCAP_TYPE, tunnel->encap.type) || - nla_put_be16(skb, IFLA_IPTUN_ENCAP_SPORT, tunnel->encap.sport) || - nla_put_be16(skb, IFLA_IPTUN_ENCAP_DPORT, tunnel->encap.dport) || -@@ -2196,6 +2460,7 @@ static const struct nla_policy ip6_tnl_p - [IFLA_IPTUN_ENCAP_DPORT] = { .type = NLA_U16 }, - [IFLA_IPTUN_COLLECT_METADATA] = { .type = NLA_FLAG }, - [IFLA_IPTUN_FWMARK] = { .type = NLA_U32 }, -+ [IFLA_IPTUN_FMRS] = { .type = NLA_NESTED }, - }; - - static struct rtnl_link_ops ip6_link_ops __read_mostly = { diff --git a/target/linux/generic/pending-5.18/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch b/target/linux/generic/pending-5.18/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch deleted file mode 100644 index 534cd5a9d12571..00000000000000 --- a/target/linux/generic/pending-5.18/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch +++ /dev/null @@ -1,263 +0,0 @@ -From: Jonas Gorski -Subject: ipv6: allow rejecting with "source address failed policy" - -RFC6204 L-14 requires rejecting traffic from invalid addresses with -ICMPv6 Destination Unreachable, Code 5 (Source address failed ingress/ -egress policy) on the LAN side, so add an appropriate rule for that. - -Signed-off-by: Jonas Gorski ---- - include/net/netns/ipv6.h | 1 + - include/uapi/linux/fib_rules.h | 4 +++ - include/uapi/linux/rtnetlink.h | 1 + - net/ipv4/fib_semantics.c | 4 +++ - net/ipv4/fib_trie.c | 1 + - net/ipv4/ipmr.c | 1 + - net/ipv6/fib6_rules.c | 4 +++ - net/ipv6/ip6mr.c | 2 ++ - net/ipv6/route.c | 58 +++++++++++++++++++++++++++++++++++++++++- - 9 files changed, 75 insertions(+), 1 deletion(-) - ---- a/include/net/netns/ipv6.h -+++ b/include/net/netns/ipv6.h -@@ -85,6 +85,7 @@ struct netns_ipv6 { - unsigned int fib6_routes_require_src; - #endif - struct rt6_info *ip6_prohibit_entry; -+ struct rt6_info *ip6_policy_failed_entry; - struct rt6_info *ip6_blk_hole_entry; - struct fib6_table *fib6_local_tbl; - struct fib_rules_ops *fib6_rules_ops; ---- a/include/uapi/linux/fib_rules.h -+++ b/include/uapi/linux/fib_rules.h -@@ -82,6 +82,10 @@ enum { - FR_ACT_BLACKHOLE, /* Drop without notification */ - FR_ACT_UNREACHABLE, /* Drop with ENETUNREACH */ - FR_ACT_PROHIBIT, /* Drop with EACCES */ -+ FR_ACT_RES9, -+ FR_ACT_RES10, -+ FR_ACT_RES11, -+ FR_ACT_POLICY_FAILED, /* Drop with EACCES */ - __FR_ACT_MAX, - }; - ---- a/include/uapi/linux/rtnetlink.h -+++ b/include/uapi/linux/rtnetlink.h -@@ -265,6 +265,7 @@ enum { - RTN_THROW, /* Not in this table */ - RTN_NAT, /* Translate this address */ - RTN_XRESOLVE, /* Use external resolver */ -+ RTN_POLICY_FAILED, /* Failed ingress/egress policy */ - __RTN_MAX - }; - ---- a/net/ipv4/fib_semantics.c -+++ b/net/ipv4/fib_semantics.c -@@ -144,6 +144,10 @@ const struct fib_prop fib_props[RTN_MAX - .error = -EINVAL, - .scope = RT_SCOPE_NOWHERE, - }, -+ [RTN_POLICY_FAILED] = { -+ .error = -EACCES, -+ .scope = RT_SCOPE_UNIVERSE, -+ }, - }; - - static void rt_fibinfo_free(struct rtable __rcu **rtp) ---- a/net/ipv4/fib_trie.c -+++ b/net/ipv4/fib_trie.c -@@ -2776,6 +2776,7 @@ static const char *const rtn_type_names[ - [RTN_THROW] = "THROW", - [RTN_NAT] = "NAT", - [RTN_XRESOLVE] = "XRESOLVE", -+ [RTN_POLICY_FAILED] = "POLICY_FAILED", - }; - - static inline const char *rtn_type(char *buf, size_t len, unsigned int t) ---- a/net/ipv4/ipmr.c -+++ b/net/ipv4/ipmr.c -@@ -175,6 +175,7 @@ static int ipmr_rule_action(struct fib_r - case FR_ACT_UNREACHABLE: - return -ENETUNREACH; - case FR_ACT_PROHIBIT: -+ case FR_ACT_POLICY_FAILED: - return -EACCES; - case FR_ACT_BLACKHOLE: - default: ---- a/net/ipv6/fib6_rules.c -+++ b/net/ipv6/fib6_rules.c -@@ -221,6 +221,10 @@ static int __fib6_rule_action(struct fib - err = -EACCES; - rt = net->ipv6.ip6_prohibit_entry; - goto discard_pkt; -+ case FR_ACT_POLICY_FAILED: -+ err = -EACCES; -+ rt = net->ipv6.ip6_policy_failed_entry; -+ goto discard_pkt; - } - - tb_id = fib_rule_get_table(rule, arg); ---- a/net/ipv6/ip6mr.c -+++ b/net/ipv6/ip6mr.c -@@ -163,6 +163,8 @@ static int ip6mr_rule_action(struct fib_ - return -ENETUNREACH; - case FR_ACT_PROHIBIT: - return -EACCES; -+ case FR_ACT_POLICY_FAILED: -+ return -EACCES; - case FR_ACT_BLACKHOLE: - default: - return -EINVAL; ---- a/net/ipv6/route.c -+++ b/net/ipv6/route.c -@@ -97,6 +97,8 @@ static int ip6_pkt_discard(struct sk_bu - static int ip6_pkt_discard_out(struct net *net, struct sock *sk, struct sk_buff *skb); - static int ip6_pkt_prohibit(struct sk_buff *skb); - static int ip6_pkt_prohibit_out(struct net *net, struct sock *sk, struct sk_buff *skb); -+static int ip6_pkt_policy_failed(struct sk_buff *skb); -+static int ip6_pkt_policy_failed_out(struct net *net, struct sock *sk, struct sk_buff *skb); - static void ip6_link_failure(struct sk_buff *skb); - static void ip6_rt_update_pmtu(struct dst_entry *dst, struct sock *sk, - struct sk_buff *skb, u32 mtu, -@@ -317,6 +319,18 @@ static const struct rt6_info ip6_prohibi - .rt6i_flags = (RTF_REJECT | RTF_NONEXTHOP), - }; - -+static const struct rt6_info ip6_policy_failed_entry_template = { -+ .dst = { -+ .__refcnt = ATOMIC_INIT(1), -+ .__use = 1, -+ .obsolete = DST_OBSOLETE_FORCE_CHK, -+ .error = -EACCES, -+ .input = ip6_pkt_policy_failed, -+ .output = ip6_pkt_policy_failed_out, -+ }, -+ .rt6i_flags = (RTF_REJECT | RTF_NONEXTHOP), -+}; -+ - static const struct rt6_info ip6_blk_hole_entry_template = { - .dst = { - .__refcnt = ATOMIC_INIT(1), -@@ -1036,6 +1050,7 @@ static const int fib6_prop[RTN_MAX + 1] - [RTN_BLACKHOLE] = -EINVAL, - [RTN_UNREACHABLE] = -EHOSTUNREACH, - [RTN_PROHIBIT] = -EACCES, -+ [RTN_POLICY_FAILED] = -EACCES, - [RTN_THROW] = -EAGAIN, - [RTN_NAT] = -EINVAL, - [RTN_XRESOLVE] = -EINVAL, -@@ -1071,6 +1086,10 @@ static void ip6_rt_init_dst_reject(struc - rt->dst.output = ip6_pkt_prohibit_out; - rt->dst.input = ip6_pkt_prohibit; - break; -+ case RTN_POLICY_FAILED: -+ rt->dst.output = ip6_pkt_policy_failed_out; -+ rt->dst.input = ip6_pkt_policy_failed; -+ break; - case RTN_THROW: - case RTN_UNREACHABLE: - default: -@@ -4535,6 +4554,17 @@ static int ip6_pkt_prohibit_out(struct n - return ip6_pkt_drop(skb, ICMPV6_ADM_PROHIBITED, IPSTATS_MIB_OUTNOROUTES); - } - -+static int ip6_pkt_policy_failed(struct sk_buff *skb) -+{ -+ return ip6_pkt_drop(skb, ICMPV6_POLICY_FAIL, IPSTATS_MIB_INNOROUTES); -+} -+ -+static int ip6_pkt_policy_failed_out(struct net *net, struct sock *sk, struct sk_buff *skb) -+{ -+ skb->dev = skb_dst(skb)->dev; -+ return ip6_pkt_drop(skb, ICMPV6_POLICY_FAIL, IPSTATS_MIB_OUTNOROUTES); -+} -+ - /* - * Allocate a dst for local (unicast / anycast) address. - */ -@@ -5028,7 +5058,8 @@ static int rtm_to_fib6_config(struct sk_ - if (rtm->rtm_type == RTN_UNREACHABLE || - rtm->rtm_type == RTN_BLACKHOLE || - rtm->rtm_type == RTN_PROHIBIT || -- rtm->rtm_type == RTN_THROW) -+ rtm->rtm_type == RTN_THROW || -+ rtm->rtm_type == RTN_POLICY_FAILED) - cfg->fc_flags |= RTF_REJECT; - - if (rtm->rtm_type == RTN_LOCAL) -@@ -6281,6 +6312,8 @@ static int ip6_route_dev_notify(struct n - #ifdef CONFIG_IPV6_MULTIPLE_TABLES - net->ipv6.ip6_prohibit_entry->dst.dev = dev; - net->ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(dev); -+ net->ipv6.ip6_policy_failed_entry->dst.dev = dev; -+ net->ipv6.ip6_policy_failed_entry->rt6i_idev = in6_dev_get(dev); - net->ipv6.ip6_blk_hole_entry->dst.dev = dev; - net->ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(dev); - #endif -@@ -6292,6 +6325,7 @@ static int ip6_route_dev_notify(struct n - in6_dev_put_clear(&net->ipv6.ip6_null_entry->rt6i_idev); - #ifdef CONFIG_IPV6_MULTIPLE_TABLES - in6_dev_put_clear(&net->ipv6.ip6_prohibit_entry->rt6i_idev); -+ in6_dev_put_clear(&net->ipv6.ip6_policy_failed_entry->rt6i_idev); - in6_dev_put_clear(&net->ipv6.ip6_blk_hole_entry->rt6i_idev); - #endif - } -@@ -6483,6 +6517,8 @@ static int __net_init ip6_route_net_init - - #ifdef CONFIG_IPV6_MULTIPLE_TABLES - net->ipv6.fib6_has_custom_rules = false; -+ -+ - net->ipv6.ip6_prohibit_entry = kmemdup(&ip6_prohibit_entry_template, - sizeof(*net->ipv6.ip6_prohibit_entry), - GFP_KERNEL); -@@ -6493,11 +6529,21 @@ static int __net_init ip6_route_net_init - ip6_template_metrics, true); - INIT_LIST_HEAD(&net->ipv6.ip6_prohibit_entry->rt6i_uncached); - -+ net->ipv6.ip6_policy_failed_entry = -+ kmemdup(&ip6_policy_failed_entry_template, -+ sizeof(*net->ipv6.ip6_policy_failed_entry), GFP_KERNEL); -+ if (!net->ipv6.ip6_policy_failed_entry) -+ goto out_ip6_prohibit_entry; -+ net->ipv6.ip6_policy_failed_entry->dst.ops = &net->ipv6.ip6_dst_ops; -+ dst_init_metrics(&net->ipv6.ip6_policy_failed_entry->dst, -+ ip6_template_metrics, true); -+ INIT_LIST_HEAD(&net->ipv6.ip6_policy_failed_entry->rt6i_uncached); -+ - net->ipv6.ip6_blk_hole_entry = kmemdup(&ip6_blk_hole_entry_template, - sizeof(*net->ipv6.ip6_blk_hole_entry), - GFP_KERNEL); - if (!net->ipv6.ip6_blk_hole_entry) -- goto out_ip6_prohibit_entry; -+ goto out_ip6_policy_failed_entry; - net->ipv6.ip6_blk_hole_entry->dst.ops = &net->ipv6.ip6_dst_ops; - dst_init_metrics(&net->ipv6.ip6_blk_hole_entry->dst, - ip6_template_metrics, true); -@@ -6524,6 +6570,8 @@ out: - return ret; - - #ifdef CONFIG_IPV6_MULTIPLE_TABLES -+out_ip6_policy_failed_entry: -+ kfree(net->ipv6.ip6_policy_failed_entry); - out_ip6_prohibit_entry: - kfree(net->ipv6.ip6_prohibit_entry); - out_ip6_null_entry: -@@ -6543,6 +6591,7 @@ static void __net_exit ip6_route_net_exi - kfree(net->ipv6.ip6_null_entry); - #ifdef CONFIG_IPV6_MULTIPLE_TABLES - kfree(net->ipv6.ip6_prohibit_entry); -+ kfree(net->ipv6.ip6_policy_failed_entry); - kfree(net->ipv6.ip6_blk_hole_entry); - #endif - dst_entries_destroy(&net->ipv6.ip6_dst_ops); -@@ -6620,6 +6669,9 @@ void __init ip6_route_init_special_entri - init_net.ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev); - init_net.ipv6.ip6_blk_hole_entry->dst.dev = init_net.loopback_dev; - init_net.ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev); -+ init_net.ipv6.ip6_policy_failed_entry->dst.dev = init_net.loopback_dev; -+ init_net.ipv6.ip6_policy_failed_entry->rt6i_idev = -+ in6_dev_get(init_net.loopback_dev); - #endif - } - diff --git a/target/linux/generic/pending-5.18/671-net-provide-defines-for-_POLICY_FAILED-until-all-cod.patch b/target/linux/generic/pending-5.18/671-net-provide-defines-for-_POLICY_FAILED-until-all-cod.patch deleted file mode 100644 index 94416a5d70e536..00000000000000 --- a/target/linux/generic/pending-5.18/671-net-provide-defines-for-_POLICY_FAILED-until-all-cod.patch +++ /dev/null @@ -1,50 +0,0 @@ -From: Jonas Gorski -Subject: net: provide defines for _POLICY_FAILED until all code is updated - -Upstream introduced ICMPV6_POLICY_FAIL for code 5 of destination -unreachable, conflicting with our name. - -Add appropriate defines to allow our code to build with the new -name until we have updated our local patches for older kernels -and userspace packages. - -Signed-off-by: Jonas Gorski ---- - include/uapi/linux/fib_rules.h | 2 ++ - include/uapi/linux/icmpv6.h | 2 ++ - include/uapi/linux/rtnetlink.h | 2 ++ - 3 files changed, 6 insertions(+) - ---- a/include/uapi/linux/fib_rules.h -+++ b/include/uapi/linux/fib_rules.h -@@ -89,6 +89,8 @@ enum { - __FR_ACT_MAX, - }; - -+#define FR_ACT_FAILED_POLICY FR_ACT_POLICY_FAILED -+ - #define FR_ACT_MAX (__FR_ACT_MAX - 1) - - #endif ---- a/include/uapi/linux/icmpv6.h -+++ b/include/uapi/linux/icmpv6.h -@@ -126,6 +126,8 @@ struct icmp6hdr { - #define ICMPV6_POLICY_FAIL 5 - #define ICMPV6_REJECT_ROUTE 6 - -+#define ICMPV6_FAILED_POLICY ICMPV6_POLICY_FAIL -+ - /* - * Codes for Time Exceeded - */ ---- a/include/uapi/linux/rtnetlink.h -+++ b/include/uapi/linux/rtnetlink.h -@@ -269,6 +269,8 @@ enum { - __RTN_MAX - }; - -+#define RTN_FAILED_POLICY RTN_POLICY_FAILED -+ - #define RTN_MAX (__RTN_MAX - 1) - - diff --git a/target/linux/generic/pending-5.18/680-NET-skip-GRO-for-foreign-MAC-addresses.patch b/target/linux/generic/pending-5.18/680-NET-skip-GRO-for-foreign-MAC-addresses.patch deleted file mode 100644 index d97cf4c9ec4412..00000000000000 --- a/target/linux/generic/pending-5.18/680-NET-skip-GRO-for-foreign-MAC-addresses.patch +++ /dev/null @@ -1,139 +0,0 @@ -From: Felix Fietkau -Subject: net: replace GRO optimization patch with a new one that supports VLANs/bridges with different MAC addresses - -Signed-off-by: Felix Fietkau ---- - include/linux/netdevice.h | 2 ++ - include/linux/skbuff.h | 3 ++- - net/core/dev.c | 48 +++++++++++++++++++++++++++++++++++++++++++++++ - net/ethernet/eth.c | 18 +++++++++++++++++- - 4 files changed, 69 insertions(+), 2 deletions(-) - ---- a/include/linux/netdevice.h -+++ b/include/linux/netdevice.h -@@ -2083,6 +2083,8 @@ struct net_device { - struct netdev_hw_addr_list mc; - struct netdev_hw_addr_list dev_addrs; - -+ unsigned char local_addr_mask[MAX_ADDR_LEN]; -+ - #ifdef CONFIG_SYSFS - struct kset *queues_kset; - #endif ---- a/include/linux/skbuff.h -+++ b/include/linux/skbuff.h -@@ -1000,6 +1000,7 @@ struct sk_buff { - #ifdef CONFIG_IPV6_NDISC_NODETYPE - __u8 ndisc_nodetype:2; - #endif -+ __u8 gro_skip:1; - - __u8 ipvs_property:1; - __u8 inner_protocol_type:1; ---- a/net/core/dev.c -+++ b/net/core/dev.c -@@ -7497,6 +7497,48 @@ static void __netdev_adjacent_dev_unlink - &upper_dev->adj_list.lower); - } - -+static void __netdev_addr_mask(unsigned char *mask, const unsigned char *addr, -+ struct net_device *dev) -+{ -+ int i; -+ -+ for (i = 0; i < dev->addr_len; i++) -+ mask[i] |= addr[i] ^ dev->dev_addr[i]; -+} -+ -+static void __netdev_upper_mask(unsigned char *mask, struct net_device *dev, -+ struct net_device *lower) -+{ -+ struct net_device *cur; -+ struct list_head *iter; -+ -+ netdev_for_each_upper_dev_rcu(dev, cur, iter) { -+ __netdev_addr_mask(mask, cur->dev_addr, lower); -+ __netdev_upper_mask(mask, cur, lower); -+ } -+} -+ -+static void __netdev_update_addr_mask(struct net_device *dev) -+{ -+ unsigned char mask[MAX_ADDR_LEN]; -+ struct net_device *cur; -+ struct list_head *iter; -+ -+ memset(mask, 0, sizeof(mask)); -+ __netdev_upper_mask(mask, dev, dev); -+ memcpy(dev->local_addr_mask, mask, dev->addr_len); -+ -+ netdev_for_each_lower_dev(dev, cur, iter) -+ __netdev_update_addr_mask(cur); -+} -+ -+static void netdev_update_addr_mask(struct net_device *dev) -+{ -+ rcu_read_lock(); -+ __netdev_update_addr_mask(dev); -+ rcu_read_unlock(); -+} -+ - static int __netdev_upper_dev_link(struct net_device *dev, - struct net_device *upper_dev, bool master, - void *upper_priv, void *upper_info, -@@ -7548,6 +7590,7 @@ static int __netdev_upper_dev_link(struc - if (ret) - return ret; - -+ netdev_update_addr_mask(dev); - ret = call_netdevice_notifiers_info(NETDEV_CHANGEUPPER, - &changeupper_info.info); - ret = notifier_to_errno(ret); -@@ -7639,6 +7682,7 @@ static void __netdev_upper_dev_unlink(st - - changeupper_info.master = netdev_master_upper_dev_get(dev) == upper_dev; - -+ netdev_update_addr_mask(dev); - call_netdevice_notifiers_info(NETDEV_PRECHANGEUPPER, - &changeupper_info.info); - -@@ -8697,6 +8741,7 @@ int dev_set_mac_address(struct net_devic - if (err) - return err; - dev->addr_assign_type = NET_ADDR_SET; -+ netdev_update_addr_mask(dev); - call_netdevice_notifiers(NETDEV_CHANGEADDR, dev); - add_device_randomness(dev->dev_addr, dev->addr_len); - return 0; ---- a/net/ethernet/eth.c -+++ b/net/ethernet/eth.c -@@ -143,6 +143,18 @@ u32 eth_get_headlen(const struct net_dev - } - EXPORT_SYMBOL(eth_get_headlen); - -+static inline bool -+eth_check_local_mask(const void *addr1, const void *addr2, const void *mask) -+{ -+ const u16 *a1 = addr1; -+ const u16 *a2 = addr2; -+ const u16 *m = mask; -+ -+ return (((a1[0] ^ a2[0]) & ~m[0]) | -+ ((a1[1] ^ a2[1]) & ~m[1]) | -+ ((a1[2] ^ a2[2]) & ~m[2])); -+} -+ - /** - * eth_type_trans - determine the packet's protocol ID. - * @skb: received socket data -@@ -174,6 +186,10 @@ __be16 eth_type_trans(struct sk_buff *sk - } else { - skb->pkt_type = PACKET_OTHERHOST; - } -+ -+ if (eth_check_local_mask(eth->h_dest, dev->dev_addr, -+ dev->local_addr_mask)) -+ skb->gro_skip = 1; - } - - /* diff --git a/target/linux/generic/pending-5.18/682-of_net-add-mac-address-increment-support.patch b/target/linux/generic/pending-5.18/682-of_net-add-mac-address-increment-support.patch deleted file mode 100644 index f6ae9f31f1fa5d..00000000000000 --- a/target/linux/generic/pending-5.18/682-of_net-add-mac-address-increment-support.patch +++ /dev/null @@ -1,90 +0,0 @@ -From 844c273286f328acf0dab5fbd5d864366b4904dc Mon Sep 17 00:00:00 2001 -From: Ansuel Smith -Date: Tue, 30 Mar 2021 18:21:14 +0200 -Subject: [PATCH] of_net: add mac-address-increment support - -Lots of embedded devices use the mac-address of other interface -extracted from nvmem cells and increments it by one or two. Add two -bindings to integrate this and directly use the right mac-address for -the interface. Some example are some routers that use the gmac -mac-address stored in the art partition and increments it by one for the -wifi. mac-address-increment-byte bindings is used to tell what byte of -the mac-address has to be increased (if not defined the last byte is -increased) and mac-address-increment tells how much the byte decided -early has to be increased. - -Signed-off-by: Ansuel Smith ---- - net/core/of_net.c | 43 +++++++++++++++++++++++++++++++++++++++---- - 1 file changed, 39 insertions(+), 4 deletions(-) - ---- a/net/core/of_net.c -+++ b/net/core/of_net.c -@@ -119,28 +119,63 @@ static int of_get_mac_addr_nvmem(struct - * this case, the real MAC is in 'local-mac-address', and 'mac-address' exists - * but is all zeros. - * -+ * DT can tell the system to increment the mac-address after is extracted by -+ * using: -+ * - mac-address-increment-byte to decide what byte to increase -+ * (if not defined is increased the last byte) -+ * - mac-address-increment to decide how much to increase. The value WILL -+ * overflow to other bytes if the increment is over 255 or the total -+ * increment will exceed 255 of the current byte. -+ * (example 00:01:02:03:04:ff + 1 == 00:01:02:03:05:00) -+ * (example 00:01:02:03:04:fe + 5 == 00:01:02:03:05:03) -+ * - * Return: 0 on success and errno in case of error. - */ - int of_get_mac_address(struct device_node *np, u8 *addr) - { -+ u32 inc_idx, mac_inc, mac_val; - int ret; - -+ /* Check first if the increment byte is present and valid. -+ * If not set assume to increment the last byte if found. -+ */ -+ if (of_property_read_u32(np, "mac-address-increment-byte", &inc_idx)) -+ inc_idx = 5; -+ if (inc_idx < 3 || inc_idx > 5) -+ return -EINVAL; -+ - if (!np) - return -ENODEV; - - ret = of_get_mac_addr(np, "mac-address", addr); - if (!ret) -- return 0; -+ goto found; - - ret = of_get_mac_addr(np, "local-mac-address", addr); - if (!ret) -- return 0; -+ goto found; - - ret = of_get_mac_addr(np, "address", addr); - if (!ret) -- return 0; -+ goto found; -+ -+ ret = of_get_mac_addr_nvmem(np, addr); -+ if (ret) -+ return ret; -+ -+found: -+ if (!of_property_read_u32(np, "mac-address-increment", &mac_inc)) { -+ /* Convert to a contiguous value */ -+ mac_val = (addr[3] << 16) + (addr[4] << 8) + addr[5]; -+ mac_val += mac_inc << 8 * (5-inc_idx); -+ -+ /* Apply the incremented value handling overflow case */ -+ addr[3] = (mac_val >> 16) & 0xff; -+ addr[4] = (mac_val >> 8) & 0xff; -+ addr[5] = (mac_val >> 0) & 0xff; -+ } - -- return of_get_mac_addr_nvmem(np, addr); -+ return ret; - } - EXPORT_SYMBOL(of_get_mac_address); - diff --git a/target/linux/generic/pending-5.18/683-of_net-add-mac-address-to-of-tree.patch b/target/linux/generic/pending-5.18/683-of_net-add-mac-address-to-of-tree.patch deleted file mode 100644 index 88ade300a4cd1f..00000000000000 --- a/target/linux/generic/pending-5.18/683-of_net-add-mac-address-to-of-tree.patch +++ /dev/null @@ -1,38 +0,0 @@ ---- a/net/core/of_net.c -+++ b/net/core/of_net.c -@@ -95,6 +95,27 @@ static int of_get_mac_addr_nvmem(struct - return 0; - } - -+static int of_add_mac_address(struct device_node *np, u8* addr) -+{ -+ struct property *prop; -+ -+ prop = kzalloc(sizeof(*prop), GFP_KERNEL); -+ if (!prop) -+ return -ENOMEM; -+ -+ prop->name = "mac-address"; -+ prop->length = ETH_ALEN; -+ prop->value = kmemdup(addr, ETH_ALEN, GFP_KERNEL); -+ if (!prop->value || of_update_property(np, prop)) -+ goto free; -+ -+ return 0; -+free: -+ kfree(prop->value); -+ kfree(prop); -+ return -ENOMEM; -+} -+ - /** - * of_get_mac_address() - * @np: Caller's Device Node -@@ -175,6 +196,7 @@ found: - addr[5] = (mac_val >> 0) & 0xff; - } - -+ of_add_mac_address(np, addr); - return ret; - } - EXPORT_SYMBOL(of_get_mac_address); diff --git a/target/linux/generic/pending-5.18/700-net-ethernet-mtk_eth_soc-avoid-creating-duplicate-of.patch b/target/linux/generic/pending-5.18/700-net-ethernet-mtk_eth_soc-avoid-creating-duplicate-of.patch deleted file mode 100644 index 6323e5e9665a1a..00000000000000 --- a/target/linux/generic/pending-5.18/700-net-ethernet-mtk_eth_soc-avoid-creating-duplicate-of.patch +++ /dev/null @@ -1,26 +0,0 @@ -From: Felix Fietkau -Date: Thu, 8 Jul 2021 07:08:29 +0200 -Subject: [PATCH] net: ethernet: mtk_eth_soc: avoid creating duplicate offload - entries - -Sometimes multiple CLS_REPLACE calls are issued for the same connection. -rhashtable_insert_fast does not check for these duplicates, so multiple -hardware flow entries can be created. -Fix this by checking for an existing entry early - -Fixes: 502e84e2382d ("net: ethernet: mtk_eth_soc: add flow offloading support") -Signed-off-by: Felix Fietkau ---- - ---- a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c -+++ b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c -@@ -189,6 +189,9 @@ mtk_flow_offload_replace(struct mtk_eth - if (rhashtable_lookup(ð->flow_table, &f->cookie, mtk_flow_ht_params)) - return -EEXIST; - -+ if (rhashtable_lookup(ð->flow_table, &f->cookie, mtk_flow_ht_params)) -+ return -EEXIST; -+ - if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_META)) { - struct flow_match_meta match; - diff --git a/target/linux/generic/pending-5.18/701-00-net-ethernet-mtk_eth_soc-add-support-for-coherent-DM.patch b/target/linux/generic/pending-5.18/701-00-net-ethernet-mtk_eth_soc-add-support-for-coherent-DM.patch deleted file mode 100644 index d73ea4a25955c3..00000000000000 --- a/target/linux/generic/pending-5.18/701-00-net-ethernet-mtk_eth_soc-add-support-for-coherent-DM.patch +++ /dev/null @@ -1,327 +0,0 @@ -From: Felix Fietkau -Date: Sat, 5 Feb 2022 17:59:07 +0100 -Subject: [PATCH] net: ethernet: mtk_eth_soc: add support for coherent - DMA - -It improves performance by eliminating the need for a cache flush on rx and tx -In preparation for supporting WED (Wireless Ethernet Dispatch), also add a -function for disabling coherent DMA at runtime. - -Signed-off-by: Felix Fietkau ---- - ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -9,6 +9,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -797,7 +798,7 @@ static int mtk_init_fq_dma(struct mtk_et - dma_addr_t dma_addr; - int i; - -- eth->scratch_ring = dma_alloc_coherent(eth->dev, -+ eth->scratch_ring = dma_alloc_coherent(eth->dma_dev, - cnt * sizeof(struct mtk_tx_dma), - ð->phy_scratch_ring, - GFP_ATOMIC); -@@ -809,10 +810,10 @@ static int mtk_init_fq_dma(struct mtk_et - if (unlikely(!eth->scratch_head)) - return -ENOMEM; - -- dma_addr = dma_map_single(eth->dev, -+ dma_addr = dma_map_single(eth->dma_dev, - eth->scratch_head, cnt * MTK_QDMA_PAGE_SIZE, - DMA_FROM_DEVICE); -- if (unlikely(dma_mapping_error(eth->dev, dma_addr))) -+ if (unlikely(dma_mapping_error(eth->dma_dev, dma_addr))) - return -ENOMEM; - - phy_ring_tail = eth->phy_scratch_ring + -@@ -866,26 +867,26 @@ static void mtk_tx_unmap(struct mtk_eth - { - if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { - if (tx_buf->flags & MTK_TX_FLAGS_SINGLE0) { -- dma_unmap_single(eth->dev, -+ dma_unmap_single(eth->dma_dev, - dma_unmap_addr(tx_buf, dma_addr0), - dma_unmap_len(tx_buf, dma_len0), - DMA_TO_DEVICE); - } else if (tx_buf->flags & MTK_TX_FLAGS_PAGE0) { -- dma_unmap_page(eth->dev, -+ dma_unmap_page(eth->dma_dev, - dma_unmap_addr(tx_buf, dma_addr0), - dma_unmap_len(tx_buf, dma_len0), - DMA_TO_DEVICE); - } - } else { - if (dma_unmap_len(tx_buf, dma_len0)) { -- dma_unmap_page(eth->dev, -+ dma_unmap_page(eth->dma_dev, - dma_unmap_addr(tx_buf, dma_addr0), - dma_unmap_len(tx_buf, dma_len0), - DMA_TO_DEVICE); - } - - if (dma_unmap_len(tx_buf, dma_len1)) { -- dma_unmap_page(eth->dev, -+ dma_unmap_page(eth->dma_dev, - dma_unmap_addr(tx_buf, dma_addr1), - dma_unmap_len(tx_buf, dma_len1), - DMA_TO_DEVICE); -@@ -963,9 +964,9 @@ static int mtk_tx_map(struct sk_buff *sk - if (skb_vlan_tag_present(skb)) - txd4 |= TX_DMA_INS_VLAN | skb_vlan_tag_get(skb); - -- mapped_addr = dma_map_single(eth->dev, skb->data, -+ mapped_addr = dma_map_single(eth->dma_dev, skb->data, - skb_headlen(skb), DMA_TO_DEVICE); -- if (unlikely(dma_mapping_error(eth->dev, mapped_addr))) -+ if (unlikely(dma_mapping_error(eth->dma_dev, mapped_addr))) - return -ENOMEM; - - WRITE_ONCE(itxd->txd1, mapped_addr); -@@ -1004,10 +1005,10 @@ static int mtk_tx_map(struct sk_buff *sk - - - frag_map_size = min(frag_size, MTK_TX_DMA_BUF_LEN); -- mapped_addr = skb_frag_dma_map(eth->dev, frag, offset, -+ mapped_addr = skb_frag_dma_map(eth->dma_dev, frag, offset, - frag_map_size, - DMA_TO_DEVICE); -- if (unlikely(dma_mapping_error(eth->dev, mapped_addr))) -+ if (unlikely(dma_mapping_error(eth->dma_dev, mapped_addr))) - goto err_dma; - - if (i == nr_frags - 1 && -@@ -1288,18 +1289,18 @@ static int mtk_poll_rx(struct napi_struc - netdev->stats.rx_dropped++; - goto release_desc; - } -- dma_addr = dma_map_single(eth->dev, -+ dma_addr = dma_map_single(eth->dma_dev, - new_data + NET_SKB_PAD + - eth->ip_align, - ring->buf_size, - DMA_FROM_DEVICE); -- if (unlikely(dma_mapping_error(eth->dev, dma_addr))) { -+ if (unlikely(dma_mapping_error(eth->dma_dev, dma_addr))) { - skb_free_frag(new_data); - netdev->stats.rx_dropped++; - goto release_desc; - } - -- dma_unmap_single(eth->dev, trxd.rxd1, -+ dma_unmap_single(eth->dma_dev, trxd.rxd1, - ring->buf_size, DMA_FROM_DEVICE); - - /* receive data */ -@@ -1572,7 +1573,7 @@ static int mtk_tx_alloc(struct mtk_eth * - if (!ring->buf) - goto no_tx_mem; - -- ring->dma = dma_alloc_coherent(eth->dev, MTK_DMA_SIZE * sz, -+ ring->dma = dma_alloc_coherent(eth->dma_dev, MTK_DMA_SIZE * sz, - &ring->phys, GFP_ATOMIC); - if (!ring->dma) - goto no_tx_mem; -@@ -1590,7 +1591,7 @@ static int mtk_tx_alloc(struct mtk_eth * - * descriptors in ring->dma_pdma. - */ - if (!MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { -- ring->dma_pdma = dma_alloc_coherent(eth->dev, MTK_DMA_SIZE * sz, -+ ring->dma_pdma = dma_alloc_coherent(eth->dma_dev, MTK_DMA_SIZE * sz, - &ring->phys_pdma, - GFP_ATOMIC); - if (!ring->dma_pdma) -@@ -1649,7 +1650,7 @@ static void mtk_tx_clean(struct mtk_eth - } - - if (ring->dma) { -- dma_free_coherent(eth->dev, -+ dma_free_coherent(eth->dma_dev, - MTK_DMA_SIZE * sizeof(*ring->dma), - ring->dma, - ring->phys); -@@ -1657,7 +1658,7 @@ static void mtk_tx_clean(struct mtk_eth - } - - if (ring->dma_pdma) { -- dma_free_coherent(eth->dev, -+ dma_free_coherent(eth->dma_dev, - MTK_DMA_SIZE * sizeof(*ring->dma_pdma), - ring->dma_pdma, - ring->phys_pdma); -@@ -1705,18 +1706,18 @@ static int mtk_rx_alloc(struct mtk_eth * - return -ENOMEM; - } - -- ring->dma = dma_alloc_coherent(eth->dev, -+ ring->dma = dma_alloc_coherent(eth->dma_dev, - rx_dma_size * sizeof(*ring->dma), - &ring->phys, GFP_ATOMIC); - if (!ring->dma) - return -ENOMEM; - - for (i = 0; i < rx_dma_size; i++) { -- dma_addr_t dma_addr = dma_map_single(eth->dev, -+ dma_addr_t dma_addr = dma_map_single(eth->dma_dev, - ring->data[i] + NET_SKB_PAD + eth->ip_align, - ring->buf_size, - DMA_FROM_DEVICE); -- if (unlikely(dma_mapping_error(eth->dev, dma_addr))) -+ if (unlikely(dma_mapping_error(eth->dma_dev, dma_addr))) - return -ENOMEM; - ring->dma[i].rxd1 = (unsigned int)dma_addr; - -@@ -1752,7 +1753,7 @@ static void mtk_rx_clean(struct mtk_eth - continue; - if (!ring->dma[i].rxd1) - continue; -- dma_unmap_single(eth->dev, -+ dma_unmap_single(eth->dma_dev, - ring->dma[i].rxd1, - ring->buf_size, - DMA_FROM_DEVICE); -@@ -1763,7 +1764,7 @@ static void mtk_rx_clean(struct mtk_eth - } - - if (ring->dma) { -- dma_free_coherent(eth->dev, -+ dma_free_coherent(eth->dma_dev, - ring->dma_size * sizeof(*ring->dma), - ring->dma, - ring->phys); -@@ -2119,7 +2120,7 @@ static void mtk_dma_free(struct mtk_eth - if (eth->netdev[i]) - netdev_reset_queue(eth->netdev[i]); - if (eth->scratch_ring) { -- dma_free_coherent(eth->dev, -+ dma_free_coherent(eth->dma_dev, - MTK_DMA_SIZE * sizeof(struct mtk_tx_dma), - eth->scratch_ring, - eth->phy_scratch_ring); -@@ -2468,6 +2469,8 @@ static void mtk_dim_tx(struct work_struc - - static int mtk_hw_init(struct mtk_eth *eth) - { -+ u32 dma_mask = ETHSYS_DMA_AG_MAP_PDMA | ETHSYS_DMA_AG_MAP_QDMA | -+ ETHSYS_DMA_AG_MAP_PPE; - int i, val, ret; - - if (test_and_set_bit(MTK_HW_INIT, ð->state)) -@@ -2480,6 +2483,10 @@ static int mtk_hw_init(struct mtk_eth *e - if (ret) - goto err_disable_pm; - -+ if (eth->ethsys) -+ regmap_update_bits(eth->ethsys, ETHSYS_DMA_AG_MAP, dma_mask, -+ of_dma_is_coherent(eth->dma_dev->of_node) * dma_mask); -+ - if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) { - ret = device_reset(eth->dev); - if (ret) { -@@ -3060,6 +3067,35 @@ free_netdev: - return err; - } - -+void mtk_eth_set_dma_device(struct mtk_eth *eth, struct device *dma_dev) -+{ -+ struct net_device *dev, *tmp; -+ LIST_HEAD(dev_list); -+ int i; -+ -+ rtnl_lock(); -+ -+ for (i = 0; i < MTK_MAC_COUNT; i++) { -+ dev = eth->netdev[i]; -+ -+ if (!dev || !(dev->flags & IFF_UP)) -+ continue; -+ -+ list_add_tail(&dev->close_list, &dev_list); -+ } -+ -+ dev_close_many(&dev_list, false); -+ -+ eth->dma_dev = dma_dev; -+ -+ list_for_each_entry_safe(dev, tmp, &dev_list, close_list) { -+ list_del_init(&dev->close_list); -+ dev_open(dev, NULL); -+ } -+ -+ rtnl_unlock(); -+} -+ - static int mtk_probe(struct platform_device *pdev) - { - struct device_node *mac_np; -@@ -3073,6 +3109,7 @@ static int mtk_probe(struct platform_dev - eth->soc = of_device_get_match_data(&pdev->dev); - - eth->dev = &pdev->dev; -+ eth->dma_dev = &pdev->dev; - eth->base = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(eth->base)) - return PTR_ERR(eth->base); -@@ -3121,6 +3158,16 @@ static int mtk_probe(struct platform_dev - } - } - -+ if (of_dma_is_coherent(pdev->dev.of_node)) { -+ struct regmap *cci; -+ -+ cci = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, -+ "mediatek,cci-control"); -+ /* enable CPU/bus coherency */ -+ if (!IS_ERR(cci)) -+ regmap_write(cci, 0, 3); -+ } -+ - if (MTK_HAS_CAPS(eth->soc->caps, MTK_SGMII)) { - eth->sgmii = devm_kzalloc(eth->dev, sizeof(*eth->sgmii), - GFP_KERNEL); ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -465,6 +465,12 @@ - #define RSTCTRL_FE BIT(6) - #define RSTCTRL_PPE BIT(31) - -+/* ethernet dma channel agent map */ -+#define ETHSYS_DMA_AG_MAP 0x408 -+#define ETHSYS_DMA_AG_MAP_PDMA BIT(0) -+#define ETHSYS_DMA_AG_MAP_QDMA BIT(1) -+#define ETHSYS_DMA_AG_MAP_PPE BIT(2) -+ - /* SGMII subsystem config registers */ - /* Register to auto-negotiation restart */ - #define SGMSYS_PCS_CONTROL_1 0x0 -@@ -882,6 +888,7 @@ struct mtk_sgmii { - /* struct mtk_eth - This is the main datasructure for holding the state - * of the driver - * @dev: The device pointer -+ * @dev: The device pointer used for dma mapping/alloc - * @base: The mapped register i/o base - * @page_lock: Make sure that register operations are atomic - * @tx_irq__lock: Make sure that IRQ register operations are atomic -@@ -925,6 +932,7 @@ struct mtk_sgmii { - - struct mtk_eth { - struct device *dev; -+ struct device *dma_dev; - void __iomem *base; - spinlock_t page_lock; - spinlock_t tx_irq_lock; -@@ -1023,6 +1031,7 @@ int mtk_gmac_rgmii_path_setup(struct mtk - int mtk_eth_offload_init(struct mtk_eth *eth); - int mtk_eth_setup_tc(struct net_device *dev, enum tc_setup_type type, - void *type_data); -+void mtk_eth_set_dma_device(struct mtk_eth *eth, struct device *dma_dev); - - - #endif /* MTK_ETH_H */ diff --git a/target/linux/generic/pending-5.18/701-01-arm64-dts-mediatek-mt7622-add-support-for-coherent-D.patch b/target/linux/generic/pending-5.18/701-01-arm64-dts-mediatek-mt7622-add-support-for-coherent-D.patch deleted file mode 100644 index bb724e54b449e8..00000000000000 --- a/target/linux/generic/pending-5.18/701-01-arm64-dts-mediatek-mt7622-add-support-for-coherent-D.patch +++ /dev/null @@ -1,30 +0,0 @@ -From: Felix Fietkau -Date: Mon, 7 Feb 2022 10:27:22 +0100 -Subject: [PATCH] arm64: dts: mediatek: mt7622: add support for coherent - DMA - -It improves performance by eliminating the need for a cache flush on rx and tx - -Signed-off-by: Felix Fietkau ---- - ---- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi -+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi -@@ -357,7 +357,7 @@ - }; - - cci_control2: slave-if@5000 { -- compatible = "arm,cci-400-ctrl-if"; -+ compatible = "arm,cci-400-ctrl-if", "syscon"; - interface-type = "ace"; - reg = <0x5000 0x1000>; - }; -@@ -945,6 +945,8 @@ - power-domains = <&scpsys MT7622_POWER_DOMAIN_ETHSYS>; - mediatek,ethsys = <ðsys>; - mediatek,sgmiisys = <&sgmiisys>; -+ mediatek,cci-control = <&cci_control2>; -+ dma-coherent; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; diff --git a/target/linux/generic/pending-5.18/701-02-net-ethernet-mtk_eth_soc-add-support-for-Wireless-Et.patch b/target/linux/generic/pending-5.18/701-02-net-ethernet-mtk_eth_soc-add-support-for-Wireless-Et.patch deleted file mode 100644 index 10beda900fbc8e..00000000000000 --- a/target/linux/generic/pending-5.18/701-02-net-ethernet-mtk_eth_soc-add-support-for-Wireless-Et.patch +++ /dev/null @@ -1,1679 +0,0 @@ -From: Felix Fietkau -Date: Sat, 5 Feb 2022 17:56:08 +0100 -Subject: [PATCH] net: ethernet: mtk_eth_soc: add support for Wireless - Ethernet Dispatch (WED) - -The Wireless Ethernet Dispatch subsystem on the MT7622 SoC can be -configured to intercept and handle access to the DMA queues and -PCIe interrupts for a MT7615/MT7915 wireless card. -It can manage the internal WDMA (Wireless DMA) controller, which allows -ethernet packets to be passed from the packet switch engine (PSE) to the -wireless card, bypassing the CPU entirely. -This can be used to implement hardware flow offloading from ethernet to -WLAN. - -Signed-off-by: Felix Fietkau ---- - create mode 100644 drivers/net/ethernet/mediatek/mtk_wed.c - create mode 100644 drivers/net/ethernet/mediatek/mtk_wed.h - create mode 100644 drivers/net/ethernet/mediatek/mtk_wed_debugfs.c - create mode 100644 drivers/net/ethernet/mediatek/mtk_wed_ops.c - create mode 100644 drivers/net/ethernet/mediatek/mtk_wed_regs.h - create mode 100644 include/linux/soc/mediatek/mtk_wed.h - ---- a/drivers/net/ethernet/mediatek/Kconfig -+++ b/drivers/net/ethernet/mediatek/Kconfig -@@ -7,6 +7,10 @@ config NET_VENDOR_MEDIATEK - - if NET_VENDOR_MEDIATEK - -+config NET_MEDIATEK_SOC_WED -+ depends on ARCH_MEDIATEK || COMPILE_TEST -+ def_bool NET_MEDIATEK_SOC != n -+ - config NET_MEDIATEK_SOC - tristate "MediaTek SoC Gigabit Ethernet support" - depends on NET_DSA || !NET_DSA ---- a/drivers/net/ethernet/mediatek/Makefile -+++ b/drivers/net/ethernet/mediatek/Makefile -@@ -5,4 +5,9 @@ - - obj-$(CONFIG_NET_MEDIATEK_SOC) += mtk_eth.o - mtk_eth-y := mtk_eth_soc.o mtk_sgmii.o mtk_eth_path.o mtk_ppe.o mtk_ppe_debugfs.o mtk_ppe_offload.o -+mtk_eth-$(CONFIG_NET_MEDIATEK_SOC_WED) += mtk_wed.o -+ifdef CONFIG_DEBUG_FS -+mtk_eth-$(CONFIG_NET_MEDIATEK_SOC_WED) += mtk_wed_debugfs.o -+endif -+obj-$(CONFIG_NET_MEDIATEK_SOC_WED) += mtk_wed_ops.o - obj-$(CONFIG_NET_MEDIATEK_STAR_EMAC) += mtk_star_emac.o ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -24,6 +24,7 @@ - #include - - #include "mtk_eth_soc.h" -+#include "mtk_wed.h" - - static int mtk_msg_level = -1; - module_param_named(msg_level, mtk_msg_level, int, 0); -@@ -3190,6 +3191,22 @@ static int mtk_probe(struct platform_dev - } - } - -+ for (i = 0;; i++) { -+ struct device_node *np = of_parse_phandle(pdev->dev.of_node, -+ "mediatek,wed", i); -+ static const u32 wdma_regs[] = { -+ MTK_WDMA0_BASE, -+ MTK_WDMA1_BASE -+ }; -+ void __iomem *wdma; -+ -+ if (!np || i >= ARRAY_SIZE(wdma_regs)) -+ break; -+ -+ wdma = eth->base + wdma_regs[i]; -+ mtk_wed_add_hw(np, eth, wdma, i); -+ } -+ - for (i = 0; i < 3; i++) { - if (MTK_HAS_CAPS(eth->soc->caps, MTK_SHARED_INT) && i > 0) - eth->irq[i] = eth->irq[0]; ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -295,6 +295,9 @@ - #define MTK_GDM1_TX_GPCNT 0x2438 - #define MTK_STAT_OFFSET 0x40 - -+#define MTK_WDMA0_BASE 0x2800 -+#define MTK_WDMA1_BASE 0x2c00 -+ - /* QDMA descriptor txd4 */ - #define TX_DMA_CHKSUM (0x7 << 29) - #define TX_DMA_TSO BIT(28) ---- /dev/null -+++ b/drivers/net/ethernet/mediatek/mtk_wed.c -@@ -0,0 +1,875 @@ -+// SPDX-License-Identifier: GPL-2.0-only -+/* Copyright (C) 2021 Felix Fietkau */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include "mtk_eth_soc.h" -+#include "mtk_wed_regs.h" -+#include "mtk_wed.h" -+#include "mtk_ppe.h" -+ -+#define MTK_PCIE_BASE(n) (0x1a143000 + (n) * 0x2000) -+ -+#define MTK_WED_PKT_SIZE 1900 -+#define MTK_WED_BUF_SIZE 2048 -+#define MTK_WED_BUF_PER_PAGE (PAGE_SIZE / 2048) -+ -+#define MTK_WED_TX_RING_SIZE 2048 -+#define MTK_WED_WDMA_RING_SIZE 1024 -+ -+static struct mtk_wed_hw *hw_list[2]; -+static DEFINE_MUTEX(hw_lock); -+ -+static void -+wed_m32(struct mtk_wed_device *dev, u32 reg, u32 mask, u32 val) -+{ -+ regmap_update_bits(dev->hw->regs, reg, mask | val, val); -+} -+ -+static void -+wed_set(struct mtk_wed_device *dev, u32 reg, u32 mask) -+{ -+ return wed_m32(dev, reg, 0, mask); -+} -+ -+static void -+wed_clr(struct mtk_wed_device *dev, u32 reg, u32 mask) -+{ -+ return wed_m32(dev, reg, mask, 0); -+} -+ -+static void -+wdma_m32(struct mtk_wed_device *dev, u32 reg, u32 mask, u32 val) -+{ -+ wdma_w32(dev, reg, (wdma_r32(dev, reg) & ~mask) | val); -+} -+ -+static void -+wdma_set(struct mtk_wed_device *dev, u32 reg, u32 mask) -+{ -+ wdma_m32(dev, reg, 0, mask); -+} -+ -+static u32 -+mtk_wed_read_reset(struct mtk_wed_device *dev) -+{ -+ return wed_r32(dev, MTK_WED_RESET); -+} -+ -+static void -+mtk_wed_reset(struct mtk_wed_device *dev, u32 mask) -+{ -+ u32 status; -+ -+ wed_w32(dev, MTK_WED_RESET, mask); -+ if (readx_poll_timeout(mtk_wed_read_reset, dev, status, -+ !(status & mask), 0, 1000)) -+ WARN_ON_ONCE(1); -+} -+ -+static struct mtk_wed_hw * -+mtk_wed_assign(struct mtk_wed_device *dev) -+{ -+ struct mtk_wed_hw *hw; -+ -+ hw = hw_list[pci_domain_nr(dev->wlan.pci_dev->bus)]; -+ if (!hw || hw->wed_dev) -+ return NULL; -+ -+ hw->wed_dev = dev; -+ return hw; -+} -+ -+static int -+mtk_wed_buffer_alloc(struct mtk_wed_device *dev) -+{ -+ struct mtk_wdma_desc *desc; -+ dma_addr_t desc_phys; -+ void **page_list; -+ int token = dev->wlan.token_start; -+ int ring_size; -+ int n_pages; -+ int i, page_idx; -+ -+ ring_size = dev->wlan.nbuf & ~(MTK_WED_BUF_PER_PAGE - 1); -+ n_pages = ring_size / MTK_WED_BUF_PER_PAGE; -+ -+ page_list = kcalloc(n_pages, sizeof(*page_list), GFP_KERNEL); -+ if (!page_list) -+ return -ENOMEM; -+ -+ dev->buf_ring.size = ring_size; -+ dev->buf_ring.pages = page_list; -+ -+ desc = dma_alloc_coherent(dev->hw->dev, ring_size * sizeof(*desc), -+ &desc_phys, GFP_KERNEL); -+ if (!desc) -+ return -ENOMEM; -+ -+ dev->buf_ring.desc = desc; -+ dev->buf_ring.desc_phys = desc_phys; -+ -+ for (i = 0, page_idx = 0; i < ring_size; i += MTK_WED_BUF_PER_PAGE) { -+ dma_addr_t page_phys, buf_phys; -+ struct page *page; -+ void *buf; -+ int s; -+ -+ page = __dev_alloc_pages(GFP_KERNEL, 0); -+ if (!page) -+ return -ENOMEM; -+ -+ page_phys = dma_map_page(dev->hw->dev, page, 0, PAGE_SIZE, -+ DMA_BIDIRECTIONAL); -+ if (dma_mapping_error(dev->hw->dev, page_phys)) { -+ __free_page(page); -+ return -ENOMEM; -+ } -+ -+ page_list[page_idx++] = page; -+ dma_sync_single_for_cpu(dev->hw->dev, page_phys, PAGE_SIZE, -+ DMA_BIDIRECTIONAL); -+ -+ buf = page_to_virt(page); -+ buf_phys = page_phys; -+ -+ for (s = 0; s < MTK_WED_BUF_PER_PAGE; s++) { -+ u32 txd_size; -+ -+ txd_size = dev->wlan.init_buf(buf, buf_phys, token++); -+ -+ desc->buf0 = buf_phys; -+ desc->buf1 = buf_phys + txd_size; -+ desc->ctrl = FIELD_PREP(MTK_WDMA_DESC_CTRL_LEN0, -+ txd_size) | -+ FIELD_PREP(MTK_WDMA_DESC_CTRL_LEN1, -+ MTK_WED_BUF_SIZE - txd_size) | -+ MTK_WDMA_DESC_CTRL_LAST_SEG1; -+ desc->info = 0; -+ desc++; -+ -+ buf += MTK_WED_BUF_SIZE; -+ buf_phys += MTK_WED_BUF_SIZE; -+ } -+ -+ dma_sync_single_for_device(dev->hw->dev, page_phys, PAGE_SIZE, -+ DMA_BIDIRECTIONAL); -+ } -+ -+ return 0; -+} -+ -+static void -+mtk_wed_free_buffer(struct mtk_wed_device *dev) -+{ -+ struct mtk_wdma_desc *desc = dev->buf_ring.desc; -+ void **page_list = dev->buf_ring.pages; -+ int page_idx; -+ int i; -+ -+ if (!page_list) -+ return; -+ -+ if (!desc) -+ goto free_pagelist; -+ -+ for (i = 0, page_idx = 0; i < dev->buf_ring.size; i += MTK_WED_BUF_PER_PAGE) { -+ void *page = page_list[page_idx++]; -+ -+ if (!page) -+ break; -+ -+ dma_unmap_page(dev->hw->dev, desc[i].buf0, -+ PAGE_SIZE, DMA_BIDIRECTIONAL); -+ __free_page(page); -+ } -+ -+ dma_free_coherent(dev->hw->dev, dev->buf_ring.size * sizeof(*desc), -+ desc, dev->buf_ring.desc_phys); -+ -+free_pagelist: -+ kfree(page_list); -+} -+ -+static void -+mtk_wed_free_ring(struct mtk_wed_device *dev, struct mtk_wed_ring *ring) -+{ -+ if (!ring->desc) -+ return; -+ -+ dma_free_coherent(dev->hw->dev, ring->size * sizeof(*ring->desc), -+ ring->desc, ring->desc_phys); -+} -+ -+static void -+mtk_wed_free_tx_rings(struct mtk_wed_device *dev) -+{ -+ int i; -+ -+ for (i = 0; i < ARRAY_SIZE(dev->tx_ring); i++) -+ mtk_wed_free_ring(dev, &dev->tx_ring[i]); -+ for (i = 0; i < ARRAY_SIZE(dev->tx_wdma); i++) -+ mtk_wed_free_ring(dev, &dev->tx_wdma[i]); -+} -+ -+static void -+mtk_wed_set_ext_int(struct mtk_wed_device *dev, bool en) -+{ -+ u32 mask = MTK_WED_EXT_INT_STATUS_ERROR_MASK; -+ -+ if (!dev->hw->num_flows) -+ mask &= ~MTK_WED_EXT_INT_STATUS_TKID_WO_PYLD; -+ -+ wed_w32(dev, MTK_WED_EXT_INT_MASK, en ? mask : 0); -+ wed_r32(dev, MTK_WED_EXT_INT_MASK); -+} -+ -+static void -+mtk_wed_stop(struct mtk_wed_device *dev) -+{ -+ regmap_write(dev->hw->mirror, dev->hw->index * 4, 0); -+ mtk_wed_set_ext_int(dev, false); -+ -+ wed_clr(dev, MTK_WED_CTRL, -+ MTK_WED_CTRL_WDMA_INT_AGENT_EN | -+ MTK_WED_CTRL_WPDMA_INT_AGENT_EN | -+ MTK_WED_CTRL_WED_TX_BM_EN | -+ MTK_WED_CTRL_WED_TX_FREE_AGENT_EN); -+ wed_w32(dev, MTK_WED_WPDMA_INT_TRIGGER, 0); -+ wed_w32(dev, MTK_WED_WDMA_INT_TRIGGER, 0); -+ wdma_w32(dev, MTK_WDMA_INT_MASK, 0); -+ wdma_w32(dev, MTK_WDMA_INT_GRP2, 0); -+ wed_w32(dev, MTK_WED_WPDMA_INT_MASK, 0); -+ -+ wed_clr(dev, MTK_WED_GLO_CFG, -+ MTK_WED_GLO_CFG_TX_DMA_EN | -+ MTK_WED_GLO_CFG_RX_DMA_EN); -+ wed_clr(dev, MTK_WED_WPDMA_GLO_CFG, -+ MTK_WED_WPDMA_GLO_CFG_TX_DRV_EN | -+ MTK_WED_WPDMA_GLO_CFG_RX_DRV_EN); -+ wed_clr(dev, MTK_WED_WDMA_GLO_CFG, -+ MTK_WED_WDMA_GLO_CFG_RX_DRV_EN); -+} -+ -+static void -+mtk_wed_detach(struct mtk_wed_device *dev) -+{ -+ struct device_node *wlan_node = dev->wlan.pci_dev->dev.of_node; -+ struct mtk_wed_hw *hw = dev->hw; -+ -+ mutex_lock(&hw_lock); -+ -+ mtk_wed_stop(dev); -+ -+ wdma_w32(dev, MTK_WDMA_RESET_IDX, MTK_WDMA_RESET_IDX_RX); -+ wdma_w32(dev, MTK_WDMA_RESET_IDX, 0); -+ -+ mtk_wed_reset(dev, MTK_WED_RESET_WED); -+ -+ mtk_wed_free_buffer(dev); -+ mtk_wed_free_tx_rings(dev); -+ -+ if (of_dma_is_coherent(wlan_node)) -+ regmap_update_bits(hw->hifsys, HIFSYS_DMA_AG_MAP, -+ BIT(hw->index), BIT(hw->index)); -+ -+ if (!hw_list[!hw->index]->wed_dev && -+ hw->eth->dma_dev != hw->eth->dev) -+ mtk_eth_set_dma_device(hw->eth, hw->eth->dev); -+ -+ memset(dev, 0, sizeof(*dev)); -+ module_put(THIS_MODULE); -+ -+ hw->wed_dev = NULL; -+ mutex_unlock(&hw_lock); -+} -+ -+static void -+mtk_wed_hw_init_early(struct mtk_wed_device *dev) -+{ -+ u32 mask, set; -+ u32 offset; -+ -+ mtk_wed_stop(dev); -+ mtk_wed_reset(dev, MTK_WED_RESET_WED); -+ -+ mask = MTK_WED_WDMA_GLO_CFG_BT_SIZE | -+ MTK_WED_WDMA_GLO_CFG_DYNAMIC_DMAD_RECYCLE | -+ MTK_WED_WDMA_GLO_CFG_RX_DIS_FSM_AUTO_IDLE; -+ set = FIELD_PREP(MTK_WED_WDMA_GLO_CFG_BT_SIZE, 2) | -+ MTK_WED_WDMA_GLO_CFG_DYNAMIC_SKIP_DMAD_PREP | -+ MTK_WED_WDMA_GLO_CFG_IDLE_DMAD_SUPPLY; -+ wed_m32(dev, MTK_WED_WDMA_GLO_CFG, mask, set); -+ -+ wdma_set(dev, MTK_WDMA_GLO_CFG, MTK_WDMA_GLO_CFG_RX_INFO_PRERES); -+ -+ offset = dev->hw->index ? 0x04000400 : 0; -+ wed_w32(dev, MTK_WED_WDMA_OFFSET0, 0x2a042a20 + offset); -+ wed_w32(dev, MTK_WED_WDMA_OFFSET1, 0x29002800 + offset); -+ -+ wed_w32(dev, MTK_WED_PCIE_CFG_BASE, MTK_PCIE_BASE(dev->hw->index)); -+ wed_w32(dev, MTK_WED_WPDMA_CFG_BASE, dev->wlan.wpdma_phys); -+} -+ -+static void -+mtk_wed_hw_init(struct mtk_wed_device *dev) -+{ -+ if (dev->init_done) -+ return; -+ -+ dev->init_done = true; -+ mtk_wed_set_ext_int(dev, false); -+ wed_w32(dev, MTK_WED_TX_BM_CTRL, -+ MTK_WED_TX_BM_CTRL_PAUSE | -+ FIELD_PREP(MTK_WED_TX_BM_CTRL_VLD_GRP_NUM, -+ dev->buf_ring.size / 128) | -+ FIELD_PREP(MTK_WED_TX_BM_CTRL_RSV_GRP_NUM, -+ MTK_WED_TX_RING_SIZE / 256)); -+ -+ wed_w32(dev, MTK_WED_TX_BM_BASE, dev->buf_ring.desc_phys); -+ -+ wed_w32(dev, MTK_WED_TX_BM_TKID, -+ FIELD_PREP(MTK_WED_TX_BM_TKID_START, -+ dev->wlan.token_start) | -+ FIELD_PREP(MTK_WED_TX_BM_TKID_END, -+ dev->wlan.token_start + dev->wlan.nbuf - 1)); -+ -+ wed_w32(dev, MTK_WED_TX_BM_BUF_LEN, MTK_WED_PKT_SIZE); -+ -+ wed_w32(dev, MTK_WED_TX_BM_DYN_THR, -+ FIELD_PREP(MTK_WED_TX_BM_DYN_THR_LO, 1) | -+ MTK_WED_TX_BM_DYN_THR_HI); -+ -+ mtk_wed_reset(dev, MTK_WED_RESET_TX_BM); -+ -+ wed_set(dev, MTK_WED_CTRL, -+ MTK_WED_CTRL_WED_TX_BM_EN | -+ MTK_WED_CTRL_WED_TX_FREE_AGENT_EN); -+ -+ wed_clr(dev, MTK_WED_TX_BM_CTRL, MTK_WED_TX_BM_CTRL_PAUSE); -+} -+ -+static void -+mtk_wed_ring_reset(struct mtk_wdma_desc *desc, int size) -+{ -+ int i; -+ -+ for (i = 0; i < size; i++) { -+ desc[i].buf0 = 0; -+ desc[i].ctrl = cpu_to_le32(MTK_WDMA_DESC_CTRL_DMA_DONE); -+ desc[i].buf1 = 0; -+ desc[i].info = 0; -+ } -+} -+ -+static u32 -+mtk_wed_check_busy(struct mtk_wed_device *dev) -+{ -+ if (wed_r32(dev, MTK_WED_GLO_CFG) & MTK_WED_GLO_CFG_TX_DMA_BUSY) -+ return true; -+ -+ if (wed_r32(dev, MTK_WED_WPDMA_GLO_CFG) & -+ MTK_WED_WPDMA_GLO_CFG_TX_DRV_BUSY) -+ return true; -+ -+ if (wed_r32(dev, MTK_WED_CTRL) & MTK_WED_CTRL_WDMA_INT_AGENT_BUSY) -+ return true; -+ -+ if (wed_r32(dev, MTK_WED_WDMA_GLO_CFG) & -+ MTK_WED_WDMA_GLO_CFG_RX_DRV_BUSY) -+ return true; -+ -+ if (wdma_r32(dev, MTK_WDMA_GLO_CFG) & -+ MTK_WED_WDMA_GLO_CFG_RX_DRV_BUSY) -+ return true; -+ -+ if (wed_r32(dev, MTK_WED_CTRL) & -+ (MTK_WED_CTRL_WED_TX_BM_BUSY | MTK_WED_CTRL_WED_TX_FREE_AGENT_BUSY)) -+ return true; -+ -+ return false; -+} -+ -+static int -+mtk_wed_poll_busy(struct mtk_wed_device *dev) -+{ -+ int sleep = 15000; -+ int timeout = 100 * sleep; -+ u32 val; -+ -+ return read_poll_timeout(mtk_wed_check_busy, val, !val, sleep, -+ timeout, false, dev); -+} -+ -+static void -+mtk_wed_reset_dma(struct mtk_wed_device *dev) -+{ -+ bool busy = false; -+ u32 val; -+ int i; -+ -+ for (i = 0; i < ARRAY_SIZE(dev->tx_ring); i++) { -+ struct mtk_wdma_desc *desc = dev->tx_ring[i].desc; -+ -+ if (!desc) -+ continue; -+ -+ mtk_wed_ring_reset(desc, MTK_WED_TX_RING_SIZE); -+ } -+ -+ if (mtk_wed_poll_busy(dev)) -+ busy = mtk_wed_check_busy(dev); -+ -+ if (busy) { -+ mtk_wed_reset(dev, MTK_WED_RESET_WED_TX_DMA); -+ } else { -+ wed_w32(dev, MTK_WED_RESET_IDX, -+ MTK_WED_RESET_IDX_TX | -+ MTK_WED_RESET_IDX_RX); -+ wed_w32(dev, MTK_WED_RESET_IDX, 0); -+ } -+ -+ wdma_w32(dev, MTK_WDMA_RESET_IDX, MTK_WDMA_RESET_IDX_RX); -+ wdma_w32(dev, MTK_WDMA_RESET_IDX, 0); -+ -+ if (busy) { -+ mtk_wed_reset(dev, MTK_WED_RESET_WDMA_INT_AGENT); -+ mtk_wed_reset(dev, MTK_WED_RESET_WDMA_RX_DRV); -+ } else { -+ wed_w32(dev, MTK_WED_WDMA_RESET_IDX, -+ MTK_WED_WDMA_RESET_IDX_RX | MTK_WED_WDMA_RESET_IDX_DRV); -+ wed_w32(dev, MTK_WED_WDMA_RESET_IDX, 0); -+ -+ wed_set(dev, MTK_WED_WDMA_GLO_CFG, -+ MTK_WED_WDMA_GLO_CFG_RST_INIT_COMPLETE); -+ -+ wed_clr(dev, MTK_WED_WDMA_GLO_CFG, -+ MTK_WED_WDMA_GLO_CFG_RST_INIT_COMPLETE); -+ } -+ -+ for (i = 0; i < 100; i++) { -+ val = wed_r32(dev, MTK_WED_TX_BM_INTF); -+ if (FIELD_GET(MTK_WED_TX_BM_INTF_TKFIFO_FDEP, val) == 0x40) -+ break; -+ } -+ -+ mtk_wed_reset(dev, MTK_WED_RESET_TX_FREE_AGENT); -+ mtk_wed_reset(dev, MTK_WED_RESET_TX_BM); -+ -+ if (busy) { -+ mtk_wed_reset(dev, MTK_WED_RESET_WPDMA_INT_AGENT); -+ mtk_wed_reset(dev, MTK_WED_RESET_WPDMA_TX_DRV); -+ mtk_wed_reset(dev, MTK_WED_RESET_WPDMA_RX_DRV); -+ } else { -+ wed_w32(dev, MTK_WED_WPDMA_RESET_IDX, -+ MTK_WED_WPDMA_RESET_IDX_TX | -+ MTK_WED_WPDMA_RESET_IDX_RX); -+ wed_w32(dev, MTK_WED_WPDMA_RESET_IDX, 0); -+ } -+ -+} -+ -+static int -+mtk_wed_ring_alloc(struct mtk_wed_device *dev, struct mtk_wed_ring *ring, -+ int size) -+{ -+ ring->desc = dma_alloc_coherent(dev->hw->dev, -+ size * sizeof(*ring->desc), -+ &ring->desc_phys, GFP_KERNEL); -+ if (!ring->desc) -+ return -ENOMEM; -+ -+ ring->size = size; -+ mtk_wed_ring_reset(ring->desc, size); -+ -+ return 0; -+} -+ -+static int -+mtk_wed_wdma_ring_setup(struct mtk_wed_device *dev, int idx, int size) -+{ -+ struct mtk_wed_ring *wdma = &dev->tx_wdma[idx]; -+ -+ if (mtk_wed_ring_alloc(dev, wdma, MTK_WED_WDMA_RING_SIZE)) -+ return -ENOMEM; -+ -+ wdma_w32(dev, MTK_WDMA_RING_RX(idx) + MTK_WED_RING_OFS_BASE, -+ wdma->desc_phys); -+ wdma_w32(dev, MTK_WDMA_RING_RX(idx) + MTK_WED_RING_OFS_COUNT, -+ size); -+ wdma_w32(dev, MTK_WDMA_RING_RX(idx) + MTK_WED_RING_OFS_CPU_IDX, 0); -+ -+ wed_w32(dev, MTK_WED_WDMA_RING_RX(idx) + MTK_WED_RING_OFS_BASE, -+ wdma->desc_phys); -+ wed_w32(dev, MTK_WED_WDMA_RING_RX(idx) + MTK_WED_RING_OFS_COUNT, -+ size); -+ -+ return 0; -+} -+ -+static void -+mtk_wed_start(struct mtk_wed_device *dev, u32 irq_mask) -+{ -+ u32 wdma_mask; -+ u32 val; -+ int i; -+ -+ for (i = 0; i < ARRAY_SIZE(dev->tx_wdma); i++) -+ if (!dev->tx_wdma[i].desc) -+ mtk_wed_wdma_ring_setup(dev, i, 16); -+ -+ wdma_mask = FIELD_PREP(MTK_WDMA_INT_MASK_RX_DONE, GENMASK(1, 0)); -+ -+ mtk_wed_hw_init(dev); -+ -+ wed_set(dev, MTK_WED_CTRL, -+ MTK_WED_CTRL_WDMA_INT_AGENT_EN | -+ MTK_WED_CTRL_WPDMA_INT_AGENT_EN | -+ MTK_WED_CTRL_WED_TX_BM_EN | -+ MTK_WED_CTRL_WED_TX_FREE_AGENT_EN); -+ -+ wed_w32(dev, MTK_WED_PCIE_INT_TRIGGER, MTK_WED_PCIE_INT_TRIGGER_STATUS); -+ -+ wed_w32(dev, MTK_WED_WPDMA_INT_TRIGGER, -+ MTK_WED_WPDMA_INT_TRIGGER_RX_DONE | -+ MTK_WED_WPDMA_INT_TRIGGER_TX_DONE); -+ -+ wed_set(dev, MTK_WED_WPDMA_INT_CTRL, -+ MTK_WED_WPDMA_INT_CTRL_SUBRT_ADV); -+ -+ wed_w32(dev, MTK_WED_WDMA_INT_TRIGGER, wdma_mask); -+ wed_clr(dev, MTK_WED_WDMA_INT_CTRL, wdma_mask); -+ -+ wdma_w32(dev, MTK_WDMA_INT_MASK, wdma_mask); -+ wdma_w32(dev, MTK_WDMA_INT_GRP2, wdma_mask); -+ -+ wed_w32(dev, MTK_WED_WPDMA_INT_MASK, irq_mask); -+ wed_w32(dev, MTK_WED_INT_MASK, irq_mask); -+ -+ wed_set(dev, MTK_WED_GLO_CFG, -+ MTK_WED_GLO_CFG_TX_DMA_EN | -+ MTK_WED_GLO_CFG_RX_DMA_EN); -+ wed_set(dev, MTK_WED_WPDMA_GLO_CFG, -+ MTK_WED_WPDMA_GLO_CFG_TX_DRV_EN | -+ MTK_WED_WPDMA_GLO_CFG_RX_DRV_EN); -+ wed_set(dev, MTK_WED_WDMA_GLO_CFG, -+ MTK_WED_WDMA_GLO_CFG_RX_DRV_EN); -+ -+ mtk_wed_set_ext_int(dev, true); -+ val = dev->wlan.wpdma_phys | -+ MTK_PCIE_MIRROR_MAP_EN | -+ FIELD_PREP(MTK_PCIE_MIRROR_MAP_WED_ID, dev->hw->index); -+ -+ if (dev->hw->index) -+ val |= BIT(1); -+ val |= BIT(0); -+ regmap_write(dev->hw->mirror, dev->hw->index * 4, val); -+ -+ dev->running = true; -+} -+ -+static int -+mtk_wed_attach(struct mtk_wed_device *dev) -+ __releases(RCU) -+{ -+ struct mtk_wed_hw *hw; -+ int ret = 0; -+ -+ RCU_LOCKDEP_WARN(!rcu_read_lock_held(), -+ "mtk_wed_attach without holding the RCU read lock"); -+ -+ if (pci_domain_nr(dev->wlan.pci_dev->bus) > 1 || -+ !try_module_get(THIS_MODULE)) -+ ret = -ENODEV; -+ -+ rcu_read_unlock(); -+ -+ if (ret) -+ return ret; -+ -+ mutex_lock(&hw_lock); -+ -+ hw = mtk_wed_assign(dev); -+ if (!hw) { -+ module_put(THIS_MODULE); -+ ret = -ENODEV; -+ goto out; -+ } -+ -+ dev_info(&dev->wlan.pci_dev->dev, "attaching wed device %d\n", hw->index); -+ -+ dev->hw = hw; -+ dev->dev = hw->dev; -+ dev->irq = hw->irq; -+ dev->wdma_idx = hw->index; -+ -+ if (hw->eth->dma_dev == hw->eth->dev && -+ of_dma_is_coherent(hw->eth->dev->of_node)) -+ mtk_eth_set_dma_device(hw->eth, hw->dev); -+ -+ ret = mtk_wed_buffer_alloc(dev); -+ if (ret) { -+ mtk_wed_detach(dev); -+ goto out; -+ } -+ -+ mtk_wed_hw_init_early(dev); -+ regmap_update_bits(hw->hifsys, HIFSYS_DMA_AG_MAP, BIT(hw->index), 0); -+ -+out: -+ mutex_unlock(&hw_lock); -+ -+ return ret; -+} -+ -+static int -+mtk_wed_tx_ring_setup(struct mtk_wed_device *dev, int idx, void __iomem *regs) -+{ -+ struct mtk_wed_ring *ring = &dev->tx_ring[idx]; -+ -+ /* -+ * Tx ring redirection: -+ * Instead of configuring the WLAN PDMA TX ring directly, the WLAN -+ * driver allocated DMA ring gets configured into WED MTK_WED_RING_TX(n) -+ * registers. -+ * -+ * WED driver posts its own DMA ring as WLAN PDMA TX and configures it -+ * into MTK_WED_WPDMA_RING_TX(n) registers. -+ * It gets filled with packets picked up from WED TX ring and from -+ * WDMA RX. -+ */ -+ -+ BUG_ON(idx > ARRAY_SIZE(dev->tx_ring)); -+ -+ if (mtk_wed_ring_alloc(dev, ring, MTK_WED_TX_RING_SIZE)) -+ return -ENOMEM; -+ -+ if (mtk_wed_wdma_ring_setup(dev, idx, MTK_WED_WDMA_RING_SIZE)) -+ return -ENOMEM; -+ -+ ring->reg_base = MTK_WED_RING_TX(idx); -+ ring->wpdma = regs; -+ -+ /* WED -> WPDMA */ -+ wpdma_tx_w32(dev, idx, MTK_WED_RING_OFS_BASE, ring->desc_phys); -+ wpdma_tx_w32(dev, idx, MTK_WED_RING_OFS_COUNT, MTK_WED_TX_RING_SIZE); -+ wpdma_tx_w32(dev, idx, MTK_WED_RING_OFS_CPU_IDX, 0); -+ -+ wed_w32(dev, MTK_WED_WPDMA_RING_TX(idx) + MTK_WED_RING_OFS_BASE, -+ ring->desc_phys); -+ wed_w32(dev, MTK_WED_WPDMA_RING_TX(idx) + MTK_WED_RING_OFS_COUNT, -+ MTK_WED_TX_RING_SIZE); -+ wed_w32(dev, MTK_WED_WPDMA_RING_TX(idx) + MTK_WED_RING_OFS_CPU_IDX, 0); -+ -+ return 0; -+} -+ -+static int -+mtk_wed_txfree_ring_setup(struct mtk_wed_device *dev, void __iomem *regs) -+{ -+ struct mtk_wed_ring *ring = &dev->txfree_ring; -+ int i; -+ -+ /* -+ * For txfree event handling, the same DMA ring is shared between WED -+ * and WLAN. The WLAN driver accesses the ring index registers through -+ * WED -+ */ -+ ring->reg_base = MTK_WED_RING_RX(1); -+ ring->wpdma = regs; -+ -+ for (i = 0; i < 12; i += 4) { -+ u32 val = readl(regs + i); -+ -+ wed_w32(dev, MTK_WED_RING_RX(1) + i, val); -+ wed_w32(dev, MTK_WED_WPDMA_RING_RX(1) + i, val); -+ } -+ -+ return 0; -+} -+ -+static u32 -+mtk_wed_irq_get(struct mtk_wed_device *dev, u32 mask) -+{ -+ u32 val; -+ -+ val = wed_r32(dev, MTK_WED_EXT_INT_STATUS); -+ wed_w32(dev, MTK_WED_EXT_INT_STATUS, val); -+ val &= MTK_WED_EXT_INT_STATUS_ERROR_MASK; -+ if (!dev->hw->num_flows) -+ val &= ~MTK_WED_EXT_INT_STATUS_TKID_WO_PYLD; -+ if (val && net_ratelimit()) -+ pr_err("mtk_wed%d: error status=%08x\n", dev->hw->index, val); -+ -+ val = wed_r32(dev, MTK_WED_INT_STATUS); -+ val &= mask; -+ wed_w32(dev, MTK_WED_INT_STATUS, val); /* ACK */ -+ -+ return val; -+} -+ -+static void -+mtk_wed_irq_set_mask(struct mtk_wed_device *dev, u32 mask) -+{ -+ if (!dev->running) -+ return; -+ -+ mtk_wed_set_ext_int(dev, !!mask); -+ wed_w32(dev, MTK_WED_INT_MASK, mask); -+} -+ -+int mtk_wed_flow_add(int index) -+{ -+ struct mtk_wed_hw *hw = hw_list[index]; -+ int ret; -+ -+ if (!hw || !hw->wed_dev) -+ return -ENODEV; -+ -+ if (hw->num_flows) { -+ hw->num_flows++; -+ return 0; -+ } -+ -+ mutex_lock(&hw_lock); -+ if (!hw->wed_dev) { -+ ret = -ENODEV; -+ goto out; -+ } -+ -+ ret = hw->wed_dev->wlan.offload_enable(hw->wed_dev); -+ if (!ret) -+ hw->num_flows++; -+ mtk_wed_set_ext_int(hw->wed_dev, true); -+ -+out: -+ mutex_unlock(&hw_lock); -+ -+ return ret; -+} -+ -+void mtk_wed_flow_remove(int index) -+{ -+ struct mtk_wed_hw *hw = hw_list[index]; -+ -+ if (!hw) -+ return; -+ -+ if (--hw->num_flows) -+ return; -+ -+ mutex_lock(&hw_lock); -+ if (!hw->wed_dev) -+ goto out; -+ -+ hw->wed_dev->wlan.offload_disable(hw->wed_dev); -+ mtk_wed_set_ext_int(hw->wed_dev, true); -+ -+out: -+ mutex_unlock(&hw_lock); -+} -+ -+void mtk_wed_add_hw(struct device_node *np, struct mtk_eth *eth, -+ void __iomem *wdma, int index) -+{ -+ static const struct mtk_wed_ops wed_ops = { -+ .attach = mtk_wed_attach, -+ .tx_ring_setup = mtk_wed_tx_ring_setup, -+ .txfree_ring_setup = mtk_wed_txfree_ring_setup, -+ .start = mtk_wed_start, -+ .stop = mtk_wed_stop, -+ .reset_dma = mtk_wed_reset_dma, -+ .reg_read = wed_r32, -+ .reg_write = wed_w32, -+ .irq_get = mtk_wed_irq_get, -+ .irq_set_mask = mtk_wed_irq_set_mask, -+ .detach = mtk_wed_detach, -+ }; -+ struct device_node *eth_np = eth->dev->of_node; -+ struct platform_device *pdev; -+ struct mtk_wed_hw *hw; -+ struct regmap *regs; -+ int irq; -+ -+ if (!np) -+ return; -+ -+ pdev = of_find_device_by_node(np); -+ if (!pdev) -+ return; -+ -+ get_device(&pdev->dev); -+ irq = platform_get_irq(pdev, 0); -+ if (irq < 0) -+ return; -+ -+ regs = syscon_regmap_lookup_by_phandle(np, NULL); -+ if (!regs) -+ return; -+ -+ rcu_assign_pointer(mtk_soc_wed_ops, &wed_ops); -+ -+ mutex_lock(&hw_lock); -+ -+ if (WARN_ON(hw_list[index])) -+ goto unlock; -+ -+ hw = kzalloc(sizeof(*hw), GFP_KERNEL); -+ hw->node = np; -+ hw->regs = regs; -+ hw->eth = eth; -+ hw->dev = &pdev->dev; -+ hw->wdma = wdma; -+ hw->index = index; -+ hw->irq = irq; -+ hw->mirror = syscon_regmap_lookup_by_phandle(eth_np, -+ "mediatek,pcie-mirror"); -+ hw->hifsys = syscon_regmap_lookup_by_phandle(eth_np, -+ "mediatek,hifsys"); -+ if (IS_ERR(hw->mirror) || IS_ERR(hw->hifsys)) { -+ kfree(hw); -+ goto unlock; -+ } -+ -+ if (!index) { -+ regmap_write(hw->mirror, 0, 0); -+ regmap_write(hw->mirror, 4, 0); -+ } -+ mtk_wed_hw_add_debugfs(hw); -+ -+ hw_list[index] = hw; -+ -+unlock: -+ mutex_unlock(&hw_lock); -+} -+ -+void mtk_wed_exit(void) -+{ -+ int i; -+ -+ rcu_assign_pointer(mtk_soc_wed_ops, NULL); -+ -+ synchronize_rcu(); -+ -+ for (i = 0; i < ARRAY_SIZE(hw_list); i++) { -+ struct mtk_wed_hw *hw; -+ -+ hw = hw_list[i]; -+ if (!hw) -+ continue; -+ -+ hw_list[i] = NULL; -+ debugfs_remove(hw->debugfs_dir); -+ put_device(hw->dev); -+ kfree(hw); -+ } -+} ---- /dev/null -+++ b/drivers/net/ethernet/mediatek/mtk_wed.h -@@ -0,0 +1,128 @@ -+// SPDX-License-Identifier: GPL-2.0-only -+/* Copyright (C) 2021 Felix Fietkau */ -+ -+#ifndef __MTK_WED_PRIV_H -+#define __MTK_WED_PRIV_H -+ -+#include -+#include -+#include -+ -+struct mtk_eth; -+ -+struct mtk_wed_hw { -+ struct device_node *node; -+ struct mtk_eth *eth; -+ struct regmap *regs; -+ struct regmap *hifsys; -+ struct device *dev; -+ void __iomem *wdma; -+ struct regmap *mirror; -+ struct dentry *debugfs_dir; -+ struct mtk_wed_device *wed_dev; -+ u32 debugfs_reg; -+ u32 num_flows; -+ char dirname[5]; -+ int irq; -+ int index; -+}; -+ -+ -+#ifdef CONFIG_NET_MEDIATEK_SOC_WED -+static inline void -+wed_w32(struct mtk_wed_device *dev, u32 reg, u32 val) -+{ -+ regmap_write(dev->hw->regs, reg, val); -+} -+ -+static inline u32 -+wed_r32(struct mtk_wed_device *dev, u32 reg) -+{ -+ unsigned int val; -+ -+ regmap_read(dev->hw->regs, reg, &val); -+ -+ return val; -+} -+ -+static inline void -+wdma_w32(struct mtk_wed_device *dev, u32 reg, u32 val) -+{ -+ writel(val, dev->hw->wdma + reg); -+} -+ -+static inline u32 -+wdma_r32(struct mtk_wed_device *dev, u32 reg) -+{ -+ return readl(dev->hw->wdma + reg); -+} -+ -+static inline u32 -+wpdma_tx_r32(struct mtk_wed_device *dev, int ring, u32 reg) -+{ -+ if (!dev->tx_ring[ring].wpdma) -+ return 0; -+ -+ return readl(dev->tx_ring[ring].wpdma + reg); -+} -+ -+static inline void -+wpdma_tx_w32(struct mtk_wed_device *dev, int ring, u32 reg, u32 val) -+{ -+ if (!dev->tx_ring[ring].wpdma) -+ return; -+ -+ writel(val, dev->tx_ring[ring].wpdma + reg); -+} -+ -+static inline u32 -+wpdma_txfree_r32(struct mtk_wed_device *dev, u32 reg) -+{ -+ if (!dev->txfree_ring.wpdma) -+ return 0; -+ -+ return readl(dev->txfree_ring.wpdma + reg); -+} -+ -+static inline void -+wpdma_txfree_w32(struct mtk_wed_device *dev, u32 reg, u32 val) -+{ -+ if (!dev->txfree_ring.wpdma) -+ return; -+ -+ writel(val, dev->txfree_ring.wpdma + reg); -+} -+ -+void mtk_wed_add_hw(struct device_node *np, struct mtk_eth *eth, -+ void __iomem *wdma, int index); -+void mtk_wed_exit(void); -+int mtk_wed_flow_add(int index); -+void mtk_wed_flow_remove(int index); -+#else -+static inline void -+mtk_wed_add_hw(struct device_node *np, struct mtk_eth *eth, -+ void __iomem *wdma, int index) -+{ -+} -+static inline void -+mtk_wed_exit(void) -+{ -+} -+static inline int mtk_wed_flow_add(int index) -+{ -+ return -EINVAL; -+} -+static inline void mtk_wed_flow_remove(int index) -+{ -+} -+#endif -+ -+#ifdef CONFIG_DEBUG_FS -+void mtk_wed_hw_add_debugfs(struct mtk_wed_hw *hw); -+#else -+static inline void mtk_wed_hw_add_debugfs(struct mtk_wed_hw *hw) -+{ -+} -+#endif -+ -+#endif ---- /dev/null -+++ b/drivers/net/ethernet/mediatek/mtk_wed_debugfs.c -@@ -0,0 +1,175 @@ -+// SPDX-License-Identifier: GPL-2.0-only -+/* Copyright (C) 2021 Felix Fietkau */ -+ -+#include -+#include "mtk_wed.h" -+#include "mtk_wed_regs.h" -+ -+struct reg_dump { -+ const char *name; -+ u16 offset; -+ u8 type; -+ u8 base; -+}; -+ -+enum { -+ DUMP_TYPE_STRING, -+ DUMP_TYPE_WED, -+ DUMP_TYPE_WDMA, -+ DUMP_TYPE_WPDMA_TX, -+ DUMP_TYPE_WPDMA_TXFREE, -+}; -+ -+#define DUMP_STR(_str) { _str, 0, DUMP_TYPE_STRING } -+#define DUMP_REG(_reg, ...) { #_reg, MTK_##_reg, __VA_ARGS__ } -+#define DUMP_RING(_prefix, _base, ...) \ -+ { _prefix " BASE", _base, __VA_ARGS__ }, \ -+ { _prefix " CNT", _base + 0x4, __VA_ARGS__ }, \ -+ { _prefix " CIDX", _base + 0x8, __VA_ARGS__ }, \ -+ { _prefix " DIDX", _base + 0xc, __VA_ARGS__ } -+ -+#define DUMP_WED(_reg) DUMP_REG(_reg, DUMP_TYPE_WED) -+#define DUMP_WED_RING(_base) DUMP_RING(#_base, MTK_##_base, DUMP_TYPE_WED) -+ -+#define DUMP_WDMA(_reg) DUMP_REG(_reg, DUMP_TYPE_WDMA) -+#define DUMP_WDMA_RING(_base) DUMP_RING(#_base, MTK_##_base, DUMP_TYPE_WDMA) -+ -+#define DUMP_WPDMA_TX_RING(_n) DUMP_RING("WPDMA_TX" #_n, 0, DUMP_TYPE_WPDMA_TX, _n) -+#define DUMP_WPDMA_TXFREE_RING DUMP_RING("WPDMA_RX1", 0, DUMP_TYPE_WPDMA_TXFREE) -+ -+static void -+print_reg_val(struct seq_file *s, const char *name, u32 val) -+{ -+ seq_printf(s, "%-32s %08x\n", name, val); -+} -+ -+static void -+dump_wed_regs(struct seq_file *s, struct mtk_wed_device *dev, -+ const struct reg_dump *regs, int n_regs) -+{ -+ const struct reg_dump *cur; -+ u32 val; -+ -+ for (cur = regs; cur < ®s[n_regs]; cur++) { -+ switch (cur->type) { -+ case DUMP_TYPE_STRING: -+ seq_printf(s, "%s======== %s:\n", -+ cur > regs ? "\n" : "", -+ cur->name); -+ continue; -+ case DUMP_TYPE_WED: -+ val = wed_r32(dev, cur->offset); -+ break; -+ case DUMP_TYPE_WDMA: -+ val = wdma_r32(dev, cur->offset); -+ break; -+ case DUMP_TYPE_WPDMA_TX: -+ val = wpdma_tx_r32(dev, cur->base, cur->offset); -+ break; -+ case DUMP_TYPE_WPDMA_TXFREE: -+ val = wpdma_txfree_r32(dev, cur->offset); -+ break; -+ } -+ print_reg_val(s, cur->name, val); -+ } -+} -+ -+ -+static int -+wed_txinfo_show(struct seq_file *s, void *data) -+{ -+ static const struct reg_dump regs[] = { -+ DUMP_STR("WED TX"), -+ DUMP_WED(WED_TX_MIB(0)), -+ DUMP_WED_RING(WED_RING_TX(0)), -+ -+ DUMP_WED(WED_TX_MIB(1)), -+ DUMP_WED_RING(WED_RING_TX(1)), -+ -+ DUMP_STR("WPDMA TX"), -+ DUMP_WED(WED_WPDMA_TX_MIB(0)), -+ DUMP_WED_RING(WED_WPDMA_RING_TX(0)), -+ DUMP_WED(WED_WPDMA_TX_COHERENT_MIB(0)), -+ -+ DUMP_WED(WED_WPDMA_TX_MIB(1)), -+ DUMP_WED_RING(WED_WPDMA_RING_TX(1)), -+ DUMP_WED(WED_WPDMA_TX_COHERENT_MIB(1)), -+ -+ DUMP_STR("WPDMA TX"), -+ DUMP_WPDMA_TX_RING(0), -+ DUMP_WPDMA_TX_RING(1), -+ -+ DUMP_STR("WED WDMA RX"), -+ DUMP_WED(WED_WDMA_RX_MIB(0)), -+ DUMP_WED_RING(WED_WDMA_RING_RX(0)), -+ DUMP_WED(WED_WDMA_RX_THRES(0)), -+ DUMP_WED(WED_WDMA_RX_RECYCLE_MIB(0)), -+ DUMP_WED(WED_WDMA_RX_PROCESSED_MIB(0)), -+ -+ DUMP_WED(WED_WDMA_RX_MIB(1)), -+ DUMP_WED_RING(WED_WDMA_RING_RX(1)), -+ DUMP_WED(WED_WDMA_RX_THRES(1)), -+ DUMP_WED(WED_WDMA_RX_RECYCLE_MIB(1)), -+ DUMP_WED(WED_WDMA_RX_PROCESSED_MIB(1)), -+ -+ DUMP_STR("WDMA RX"), -+ DUMP_WDMA(WDMA_GLO_CFG), -+ DUMP_WDMA_RING(WDMA_RING_RX(0)), -+ DUMP_WDMA_RING(WDMA_RING_RX(1)), -+ }; -+ struct mtk_wed_hw *hw = s->private; -+ struct mtk_wed_device *dev = hw->wed_dev; -+ -+ if (!dev) -+ return 0; -+ -+ dump_wed_regs(s, dev, regs, ARRAY_SIZE(regs)); -+ -+ return 0; -+} -+DEFINE_SHOW_ATTRIBUTE(wed_txinfo); -+ -+ -+static int -+mtk_wed_reg_set(void *data, u64 val) -+{ -+ struct mtk_wed_hw *hw = data; -+ -+ regmap_write(hw->regs, hw->debugfs_reg, val); -+ -+ return 0; -+} -+ -+static int -+mtk_wed_reg_get(void *data, u64 *val) -+{ -+ struct mtk_wed_hw *hw = data; -+ unsigned int regval; -+ int ret; -+ -+ ret = regmap_read(hw->regs, hw->debugfs_reg, ®val); -+ if (ret) -+ return ret; -+ -+ *val = regval; -+ -+ return 0; -+} -+ -+DEFINE_DEBUGFS_ATTRIBUTE(fops_regval, mtk_wed_reg_get, mtk_wed_reg_set, -+ "0x%08llx\n"); -+ -+void mtk_wed_hw_add_debugfs(struct mtk_wed_hw *hw) -+{ -+ struct dentry *dir; -+ -+ snprintf(hw->dirname, sizeof(hw->dirname), "wed%d", hw->index); -+ dir = debugfs_create_dir(hw->dirname, NULL); -+ if (!dir) -+ return; -+ -+ hw->debugfs_dir = dir; -+ debugfs_create_u32("regidx", 0600, dir, &hw->debugfs_reg); -+ debugfs_create_file_unsafe("regval", 0600, dir, hw, &fops_regval); -+ debugfs_create_file_unsafe("txinfo", 0400, dir, hw, &wed_txinfo_fops); -+} ---- /dev/null -+++ b/drivers/net/ethernet/mediatek/mtk_wed_ops.c -@@ -0,0 +1,8 @@ -+// SPDX-License-Identifier: GPL-2.0-only -+/* Copyright (C) 2020 Felix Fietkau */ -+ -+#include -+#include -+ -+const struct mtk_wed_ops __rcu *mtk_soc_wed_ops; -+EXPORT_SYMBOL_GPL(mtk_soc_wed_ops); ---- /dev/null -+++ b/drivers/net/ethernet/mediatek/mtk_wed_regs.h -@@ -0,0 +1,251 @@ -+// SPDX-License-Identifier: GPL-2.0-only -+/* Copyright (C) 2020 Felix Fietkau */ -+ -+#ifndef __MTK_WED_REGS_H -+#define __MTK_WED_REGS_H -+ -+#define MTK_WDMA_DESC_CTRL_LEN1 GENMASK(14, 0) -+#define MTK_WDMA_DESC_CTRL_LAST_SEG1 BIT(15) -+#define MTK_WDMA_DESC_CTRL_BURST BIT(16) -+#define MTK_WDMA_DESC_CTRL_LEN0 GENMASK(29, 16) -+#define MTK_WDMA_DESC_CTRL_LAST_SEG0 BIT(30) -+#define MTK_WDMA_DESC_CTRL_DMA_DONE BIT(31) -+ -+struct mtk_wdma_desc { -+ __le32 buf0; -+ __le32 ctrl; -+ __le32 buf1; -+ __le32 info; -+} __packed __aligned(4); -+ -+#define MTK_WED_RESET 0x008 -+#define MTK_WED_RESET_TX_BM BIT(0) -+#define MTK_WED_RESET_TX_FREE_AGENT BIT(4) -+#define MTK_WED_RESET_WPDMA_TX_DRV BIT(8) -+#define MTK_WED_RESET_WPDMA_RX_DRV BIT(9) -+#define MTK_WED_RESET_WPDMA_INT_AGENT BIT(11) -+#define MTK_WED_RESET_WED_TX_DMA BIT(12) -+#define MTK_WED_RESET_WDMA_RX_DRV BIT(17) -+#define MTK_WED_RESET_WDMA_INT_AGENT BIT(19) -+#define MTK_WED_RESET_WED BIT(31) -+ -+#define MTK_WED_CTRL 0x00c -+#define MTK_WED_CTRL_WPDMA_INT_AGENT_EN BIT(0) -+#define MTK_WED_CTRL_WPDMA_INT_AGENT_BUSY BIT(1) -+#define MTK_WED_CTRL_WDMA_INT_AGENT_EN BIT(2) -+#define MTK_WED_CTRL_WDMA_INT_AGENT_BUSY BIT(3) -+#define MTK_WED_CTRL_WED_TX_BM_EN BIT(8) -+#define MTK_WED_CTRL_WED_TX_BM_BUSY BIT(9) -+#define MTK_WED_CTRL_WED_TX_FREE_AGENT_EN BIT(10) -+#define MTK_WED_CTRL_WED_TX_FREE_AGENT_BUSY BIT(11) -+#define MTK_WED_CTRL_RESERVE_EN BIT(12) -+#define MTK_WED_CTRL_RESERVE_BUSY BIT(13) -+#define MTK_WED_CTRL_FINAL_DIDX_READ BIT(24) -+#define MTK_WED_CTRL_MIB_READ_CLEAR BIT(28) -+ -+#define MTK_WED_EXT_INT_STATUS 0x020 -+#define MTK_WED_EXT_INT_STATUS_TF_LEN_ERR BIT(0) -+#define MTK_WED_EXT_INT_STATUS_TKID_WO_PYLD BIT(1) -+#define MTK_WED_EXT_INT_STATUS_TKID_TITO_INVALID BIT(4) -+#define MTK_WED_EXT_INT_STATUS_TX_FBUF_LO_TH BIT(8) -+#define MTK_WED_EXT_INT_STATUS_TX_FBUF_HI_TH BIT(9) -+#define MTK_WED_EXT_INT_STATUS_RX_FBUF_LO_TH BIT(12) -+#define MTK_WED_EXT_INT_STATUS_RX_FBUF_HI_TH BIT(13) -+#define MTK_WED_EXT_INT_STATUS_RX_DRV_R_RESP_ERR BIT(16) -+#define MTK_WED_EXT_INT_STATUS_RX_DRV_W_RESP_ERR BIT(17) -+#define MTK_WED_EXT_INT_STATUS_RX_DRV_COHERENT BIT(18) -+#define MTK_WED_EXT_INT_STATUS_RX_DRV_INIT_WDMA_EN BIT(19) -+#define MTK_WED_EXT_INT_STATUS_RX_DRV_BM_DMAD_COHERENT BIT(20) -+#define MTK_WED_EXT_INT_STATUS_TX_DRV_R_RESP_ERR BIT(21) -+#define MTK_WED_EXT_INT_STATUS_TX_DRV_W_RESP_ERR BIT(22) -+#define MTK_WED_EXT_INT_STATUS_RX_DRV_DMA_RECYCLE BIT(24) -+#define MTK_WED_EXT_INT_STATUS_ERROR_MASK (MTK_WED_EXT_INT_STATUS_TF_LEN_ERR | \ -+ MTK_WED_EXT_INT_STATUS_TKID_WO_PYLD | \ -+ MTK_WED_EXT_INT_STATUS_TKID_TITO_INVALID | \ -+ MTK_WED_EXT_INT_STATUS_RX_DRV_R_RESP_ERR | \ -+ MTK_WED_EXT_INT_STATUS_RX_DRV_W_RESP_ERR | \ -+ MTK_WED_EXT_INT_STATUS_RX_DRV_INIT_WDMA_EN | \ -+ MTK_WED_EXT_INT_STATUS_TX_DRV_R_RESP_ERR | \ -+ MTK_WED_EXT_INT_STATUS_TX_DRV_W_RESP_ERR) -+ -+#define MTK_WED_EXT_INT_MASK 0x028 -+ -+#define MTK_WED_STATUS 0x060 -+#define MTK_WED_STATUS_TX GENMASK(15, 8) -+ -+#define MTK_WED_TX_BM_CTRL 0x080 -+#define MTK_WED_TX_BM_CTRL_VLD_GRP_NUM GENMASK(6, 0) -+#define MTK_WED_TX_BM_CTRL_RSV_GRP_NUM GENMASK(22, 16) -+#define MTK_WED_TX_BM_CTRL_PAUSE BIT(28) -+ -+#define MTK_WED_TX_BM_BASE 0x084 -+ -+#define MTK_WED_TX_BM_TKID 0x088 -+#define MTK_WED_TX_BM_TKID_START GENMASK(15, 0) -+#define MTK_WED_TX_BM_TKID_END GENMASK(31, 16) -+ -+#define MTK_WED_TX_BM_BUF_LEN 0x08c -+ -+#define MTK_WED_TX_BM_INTF 0x09c -+#define MTK_WED_TX_BM_INTF_TKID GENMASK(15, 0) -+#define MTK_WED_TX_BM_INTF_TKFIFO_FDEP GENMASK(23, 16) -+#define MTK_WED_TX_BM_INTF_TKID_VALID BIT(28) -+#define MTK_WED_TX_BM_INTF_TKID_READ BIT(29) -+ -+#define MTK_WED_TX_BM_DYN_THR 0x0a0 -+#define MTK_WED_TX_BM_DYN_THR_LO GENMASK(6, 0) -+#define MTK_WED_TX_BM_DYN_THR_HI GENMASK(22, 16) -+ -+#define MTK_WED_INT_STATUS 0x200 -+#define MTK_WED_INT_MASK 0x204 -+ -+#define MTK_WED_GLO_CFG 0x208 -+#define MTK_WED_GLO_CFG_TX_DMA_EN BIT(0) -+#define MTK_WED_GLO_CFG_TX_DMA_BUSY BIT(1) -+#define MTK_WED_GLO_CFG_RX_DMA_EN BIT(2) -+#define MTK_WED_GLO_CFG_RX_DMA_BUSY BIT(3) -+#define MTK_WED_GLO_CFG_RX_BT_SIZE GENMASK(5, 4) -+#define MTK_WED_GLO_CFG_TX_WB_DDONE BIT(6) -+#define MTK_WED_GLO_CFG_BIG_ENDIAN BIT(7) -+#define MTK_WED_GLO_CFG_DIS_BT_SIZE_ALIGN BIT(8) -+#define MTK_WED_GLO_CFG_TX_BT_SIZE_LO BIT(9) -+#define MTK_WED_GLO_CFG_MULTI_DMA_EN GENMASK(11, 10) -+#define MTK_WED_GLO_CFG_FIFO_LITTLE_ENDIAN BIT(12) -+#define MTK_WED_GLO_CFG_MI_DEPTH_RD GENMASK(21, 13) -+#define MTK_WED_GLO_CFG_TX_BT_SIZE_HI GENMASK(23, 22) -+#define MTK_WED_GLO_CFG_SW_RESET BIT(24) -+#define MTK_WED_GLO_CFG_FIRST_TOKEN_ONLY BIT(26) -+#define MTK_WED_GLO_CFG_OMIT_RX_INFO BIT(27) -+#define MTK_WED_GLO_CFG_OMIT_TX_INFO BIT(28) -+#define MTK_WED_GLO_CFG_BYTE_SWAP BIT(29) -+#define MTK_WED_GLO_CFG_RX_2B_OFFSET BIT(31) -+ -+#define MTK_WED_RESET_IDX 0x20c -+#define MTK_WED_RESET_IDX_TX GENMASK(3, 0) -+#define MTK_WED_RESET_IDX_RX GENMASK(17, 16) -+ -+#define MTK_WED_TX_MIB(_n) (0x2a0 + (_n) * 4) -+ -+#define MTK_WED_RING_TX(_n) (0x300 + (_n) * 0x10) -+ -+#define MTK_WED_RING_RX(_n) (0x400 + (_n) * 0x10) -+ -+#define MTK_WED_WPDMA_INT_TRIGGER 0x504 -+#define MTK_WED_WPDMA_INT_TRIGGER_RX_DONE BIT(1) -+#define MTK_WED_WPDMA_INT_TRIGGER_TX_DONE GENMASK(5, 4) -+ -+#define MTK_WED_WPDMA_GLO_CFG 0x508 -+#define MTK_WED_WPDMA_GLO_CFG_TX_DRV_EN BIT(0) -+#define MTK_WED_WPDMA_GLO_CFG_TX_DRV_BUSY BIT(1) -+#define MTK_WED_WPDMA_GLO_CFG_RX_DRV_EN BIT(2) -+#define MTK_WED_WPDMA_GLO_CFG_RX_DRV_BUSY BIT(3) -+#define MTK_WED_WPDMA_GLO_CFG_RX_BT_SIZE GENMASK(5, 4) -+#define MTK_WED_WPDMA_GLO_CFG_TX_WB_DDONE BIT(6) -+#define MTK_WED_WPDMA_GLO_CFG_BIG_ENDIAN BIT(7) -+#define MTK_WED_WPDMA_GLO_CFG_DIS_BT_SIZE_ALIGN BIT(8) -+#define MTK_WED_WPDMA_GLO_CFG_TX_BT_SIZE_LO BIT(9) -+#define MTK_WED_WPDMA_GLO_CFG_MULTI_DMA_EN GENMASK(11, 10) -+#define MTK_WED_WPDMA_GLO_CFG_FIFO_LITTLE_ENDIAN BIT(12) -+#define MTK_WED_WPDMA_GLO_CFG_MI_DEPTH_RD GENMASK(21, 13) -+#define MTK_WED_WPDMA_GLO_CFG_TX_BT_SIZE_HI GENMASK(23, 22) -+#define MTK_WED_WPDMA_GLO_CFG_SW_RESET BIT(24) -+#define MTK_WED_WPDMA_GLO_CFG_FIRST_TOKEN_ONLY BIT(26) -+#define MTK_WED_WPDMA_GLO_CFG_OMIT_RX_INFO BIT(27) -+#define MTK_WED_WPDMA_GLO_CFG_OMIT_TX_INFO BIT(28) -+#define MTK_WED_WPDMA_GLO_CFG_BYTE_SWAP BIT(29) -+#define MTK_WED_WPDMA_GLO_CFG_RX_2B_OFFSET BIT(31) -+ -+#define MTK_WED_WPDMA_RESET_IDX 0x50c -+#define MTK_WED_WPDMA_RESET_IDX_TX GENMASK(3, 0) -+#define MTK_WED_WPDMA_RESET_IDX_RX GENMASK(17, 16) -+ -+#define MTK_WED_WPDMA_INT_CTRL 0x520 -+#define MTK_WED_WPDMA_INT_CTRL_SUBRT_ADV BIT(21) -+ -+#define MTK_WED_WPDMA_INT_MASK 0x524 -+ -+#define MTK_WED_PCIE_CFG_BASE 0x560 -+ -+#define MTK_WED_PCIE_INT_TRIGGER 0x570 -+#define MTK_WED_PCIE_INT_TRIGGER_STATUS BIT(16) -+ -+#define MTK_WED_WPDMA_CFG_BASE 0x580 -+ -+#define MTK_WED_WPDMA_TX_MIB(_n) (0x5a0 + (_n) * 4) -+#define MTK_WED_WPDMA_TX_COHERENT_MIB(_n) (0x5d0 + (_n) * 4) -+ -+#define MTK_WED_WPDMA_RING_TX(_n) (0x600 + (_n) * 0x10) -+#define MTK_WED_WPDMA_RING_RX(_n) (0x700 + (_n) * 0x10) -+#define MTK_WED_WDMA_RING_RX(_n) (0x900 + (_n) * 0x10) -+#define MTK_WED_WDMA_RX_THRES(_n) (0x940 + (_n) * 0x4) -+ -+#define MTK_WED_WDMA_GLO_CFG 0xa04 -+#define MTK_WED_WDMA_GLO_CFG_TX_DRV_EN BIT(0) -+#define MTK_WED_WDMA_GLO_CFG_RX_DRV_EN BIT(2) -+#define MTK_WED_WDMA_GLO_CFG_RX_DRV_BUSY BIT(3) -+#define MTK_WED_WDMA_GLO_CFG_BT_SIZE GENMASK(5, 4) -+#define MTK_WED_WDMA_GLO_CFG_TX_WB_DDONE BIT(6) -+#define MTK_WED_WDMA_GLO_CFG_RX_DIS_FSM_AUTO_IDLE BIT(13) -+#define MTK_WED_WDMA_GLO_CFG_WCOMPLETE_SEL BIT(16) -+#define MTK_WED_WDMA_GLO_CFG_INIT_PHASE_RXDMA_BYPASS BIT(17) -+#define MTK_WED_WDMA_GLO_CFG_INIT_PHASE_BYPASS BIT(18) -+#define MTK_WED_WDMA_GLO_CFG_FSM_RETURN_IDLE BIT(19) -+#define MTK_WED_WDMA_GLO_CFG_WAIT_COHERENT BIT(20) -+#define MTK_WED_WDMA_GLO_CFG_AXI_W_AFTER_AW BIT(21) -+#define MTK_WED_WDMA_GLO_CFG_IDLE_DMAD_SUPPLY_SINGLE_W BIT(22) -+#define MTK_WED_WDMA_GLO_CFG_IDLE_DMAD_SUPPLY BIT(23) -+#define MTK_WED_WDMA_GLO_CFG_DYNAMIC_SKIP_DMAD_PREP BIT(24) -+#define MTK_WED_WDMA_GLO_CFG_DYNAMIC_DMAD_RECYCLE BIT(25) -+#define MTK_WED_WDMA_GLO_CFG_RST_INIT_COMPLETE BIT(26) -+#define MTK_WED_WDMA_GLO_CFG_RXDRV_CLKGATE_BYPASS BIT(30) -+ -+#define MTK_WED_WDMA_RESET_IDX 0xa08 -+#define MTK_WED_WDMA_RESET_IDX_RX GENMASK(17, 16) -+#define MTK_WED_WDMA_RESET_IDX_DRV GENMASK(25, 24) -+ -+#define MTK_WED_WDMA_INT_TRIGGER 0xa28 -+#define MTK_WED_WDMA_INT_TRIGGER_RX_DONE GENMASK(17, 16) -+ -+#define MTK_WED_WDMA_INT_CTRL 0xa2c -+#define MTK_WED_WDMA_INT_CTRL_POLL_SRC_SEL GENMASK(17, 16) -+ -+#define MTK_WED_WDMA_OFFSET0 0xaa4 -+#define MTK_WED_WDMA_OFFSET1 0xaa8 -+ -+#define MTK_WED_WDMA_RX_MIB(_n) (0xae0 + (_n) * 4) -+#define MTK_WED_WDMA_RX_RECYCLE_MIB(_n) (0xae8 + (_n) * 4) -+#define MTK_WED_WDMA_RX_PROCESSED_MIB(_n) (0xaf0 + (_n) * 4) -+ -+#define MTK_WED_RING_OFS_BASE 0x00 -+#define MTK_WED_RING_OFS_COUNT 0x04 -+#define MTK_WED_RING_OFS_CPU_IDX 0x08 -+#define MTK_WED_RING_OFS_DMA_IDX 0x0c -+ -+#define MTK_WDMA_RING_RX(_n) (0x100 + (_n) * 0x10) -+ -+#define MTK_WDMA_GLO_CFG 0x204 -+#define MTK_WDMA_GLO_CFG_RX_INFO_PRERES GENMASK(28, 26) -+ -+#define MTK_WDMA_RESET_IDX 0x208 -+#define MTK_WDMA_RESET_IDX_TX GENMASK(3, 0) -+#define MTK_WDMA_RESET_IDX_RX GENMASK(17, 16) -+ -+#define MTK_WDMA_INT_MASK 0x228 -+#define MTK_WDMA_INT_MASK_TX_DONE GENMASK(3, 0) -+#define MTK_WDMA_INT_MASK_RX_DONE GENMASK(17, 16) -+#define MTK_WDMA_INT_MASK_TX_DELAY BIT(28) -+#define MTK_WDMA_INT_MASK_TX_COHERENT BIT(29) -+#define MTK_WDMA_INT_MASK_RX_DELAY BIT(30) -+#define MTK_WDMA_INT_MASK_RX_COHERENT BIT(31) -+ -+#define MTK_WDMA_INT_GRP1 0x250 -+#define MTK_WDMA_INT_GRP2 0x254 -+ -+#define MTK_PCIE_MIRROR_MAP(n) ((n) ? 0x4 : 0x0) -+#define MTK_PCIE_MIRROR_MAP_EN BIT(0) -+#define MTK_PCIE_MIRROR_MAP_WED_ID BIT(1) -+ -+/* DMA channel mapping */ -+#define HIFSYS_DMA_AG_MAP 0x008 -+ -+#endif ---- /dev/null -+++ b/include/linux/soc/mediatek/mtk_wed.h -@@ -0,0 +1,131 @@ -+#ifndef __MTK_WED_H -+#define __MTK_WED_H -+ -+#include -+#include -+#include -+#include -+ -+#define MTK_WED_TX_QUEUES 2 -+ -+struct mtk_wed_hw; -+struct mtk_wdma_desc; -+ -+struct mtk_wed_ring { -+ struct mtk_wdma_desc *desc; -+ dma_addr_t desc_phys; -+ int size; -+ -+ u32 reg_base; -+ void __iomem *wpdma; -+}; -+ -+struct mtk_wed_device { -+#ifdef CONFIG_NET_MEDIATEK_SOC_WED -+ const struct mtk_wed_ops *ops; -+ struct device *dev; -+ struct mtk_wed_hw *hw; -+ bool init_done, running; -+ int wdma_idx; -+ int irq; -+ -+ struct mtk_wed_ring tx_ring[MTK_WED_TX_QUEUES]; -+ struct mtk_wed_ring txfree_ring; -+ struct mtk_wed_ring tx_wdma[MTK_WED_TX_QUEUES]; -+ -+ struct { -+ int size; -+ void **pages; -+ struct mtk_wdma_desc *desc; -+ dma_addr_t desc_phys; -+ } buf_ring; -+ -+ /* filled by driver: */ -+ struct { -+ struct pci_dev *pci_dev; -+ -+ u32 wpdma_phys; -+ -+ u16 token_start; -+ unsigned int nbuf; -+ -+ u32 (*init_buf)(void *ptr, dma_addr_t phys, int token_id); -+ int (*offload_enable)(struct mtk_wed_device *wed); -+ void (*offload_disable)(struct mtk_wed_device *wed); -+ } wlan; -+#endif -+}; -+ -+struct mtk_wed_ops { -+ int (*attach)(struct mtk_wed_device *dev); -+ int (*tx_ring_setup)(struct mtk_wed_device *dev, int ring, -+ void __iomem *regs); -+ int (*txfree_ring_setup)(struct mtk_wed_device *dev, -+ void __iomem *regs); -+ void (*detach)(struct mtk_wed_device *dev); -+ -+ void (*stop)(struct mtk_wed_device *dev); -+ void (*start)(struct mtk_wed_device *dev, u32 irq_mask); -+ void (*reset_dma)(struct mtk_wed_device *dev); -+ -+ u32 (*reg_read)(struct mtk_wed_device *dev, u32 reg); -+ void (*reg_write)(struct mtk_wed_device *dev, u32 reg, u32 val); -+ -+ u32 (*irq_get)(struct mtk_wed_device *dev, u32 mask); -+ void (*irq_set_mask)(struct mtk_wed_device *dev, u32 mask); -+}; -+ -+extern const struct mtk_wed_ops __rcu *mtk_soc_wed_ops; -+ -+static inline int -+mtk_wed_device_attach(struct mtk_wed_device *dev) -+{ -+ int ret = -ENODEV; -+ -+#ifdef CONFIG_NET_MEDIATEK_SOC_WED -+ rcu_read_lock(); -+ dev->ops = rcu_dereference(mtk_soc_wed_ops); -+ if (dev->ops) -+ ret = dev->ops->attach(dev); -+ else -+ rcu_read_unlock(); -+ -+ if (ret) -+ dev->ops = NULL; -+#endif -+ -+ return ret; -+} -+ -+#ifdef CONFIG_NET_MEDIATEK_SOC_WED -+#define mtk_wed_device_active(_dev) !!(_dev)->ops -+#define mtk_wed_device_detach(_dev) (_dev)->ops->detach(_dev) -+#define mtk_wed_device_start(_dev, _mask) (_dev)->ops->start(_dev, _mask) -+#define mtk_wed_device_tx_ring_setup(_dev, _ring, _regs) \ -+ (_dev)->ops->tx_ring_setup(_dev, _ring, _regs) -+#define mtk_wed_device_txfree_ring_setup(_dev, _regs) \ -+ (_dev)->ops->txfree_ring_setup(_dev, _regs) -+#define mtk_wed_device_reg_read(_dev, _reg) \ -+ (_dev)->ops->reg_read(_dev, _reg) -+#define mtk_wed_device_reg_write(_dev, _reg, _val) \ -+ (_dev)->ops->reg_write(_dev, _reg, _val) -+#define mtk_wed_device_irq_get(_dev, _mask) \ -+ (_dev)->ops->irq_get(_dev, _mask) -+#define mtk_wed_device_irq_set_mask(_dev, _mask) \ -+ (_dev)->ops->irq_set_mask(_dev, _mask) -+#else -+static inline bool mtk_wed_device_active(struct mtk_wed_device *dev) -+{ -+ return false; -+} -+#define mtk_wed_device_detach(_dev) do {} while (0) -+#define mtk_wed_device_start(_dev, _mask) do {} while (0) -+#define mtk_wed_device_tx_ring_setup(_dev, _ring, _regs) -ENODEV -+#define mtk_wed_device_txfree_ring_setup(_dev, _ring, _regs) -ENODEV -+#define mtk_wed_device_reg_read(_dev, _reg) 0 -+#define mtk_wed_device_reg_write(_dev, _reg, _val) do {} while (0) -+#define mtk_wed_device_irq_get(_dev, _mask) 0 -+#define mtk_wed_device_irq_set_mask(_dev, _mask) do {} while (0) -+#endif -+ -+#endif diff --git a/target/linux/generic/pending-5.18/701-03-net-ethernet-mtk_eth_soc-implement-flow-offloading-t.patch b/target/linux/generic/pending-5.18/701-03-net-ethernet-mtk_eth_soc-implement-flow-offloading-t.patch deleted file mode 100644 index a5039026b4403e..00000000000000 --- a/target/linux/generic/pending-5.18/701-03-net-ethernet-mtk_eth_soc-implement-flow-offloading-t.patch +++ /dev/null @@ -1,269 +0,0 @@ -From: Felix Fietkau -Date: Sat, 5 Feb 2022 18:29:22 +0100 -Subject: [PATCH] net: ethernet: mtk_eth_soc: implement flow offloading - to WED devices - -This allows hardware flow offloading from Ethernet to WLAN on MT7622 SoC - -Co-developed-by: Lorenzo Bianconi -Signed-off-by: Lorenzo Bianconi -Signed-off-by: Felix Fietkau ---- - ---- a/drivers/net/ethernet/mediatek/mtk_ppe.c -+++ b/drivers/net/ethernet/mediatek/mtk_ppe.c -@@ -329,6 +329,24 @@ int mtk_foe_entry_set_pppoe(struct mtk_f - return 0; - } - -+int mtk_foe_entry_set_wdma(struct mtk_foe_entry *entry, int wdma_idx, int txq, -+ int bss, int wcid) -+{ -+ struct mtk_foe_mac_info *l2 = mtk_foe_entry_l2(entry); -+ u32 *ib2 = mtk_foe_entry_ib2(entry); -+ -+ *ib2 &= ~MTK_FOE_IB2_PORT_MG; -+ *ib2 |= MTK_FOE_IB2_WDMA_WINFO; -+ if (wdma_idx) -+ *ib2 |= MTK_FOE_IB2_WDMA_DEVIDX; -+ -+ l2->vlan2 = FIELD_PREP(MTK_FOE_VLAN2_WINFO_BSS, bss) | -+ FIELD_PREP(MTK_FOE_VLAN2_WINFO_WCID, wcid) | -+ FIELD_PREP(MTK_FOE_VLAN2_WINFO_RING, txq); -+ -+ return 0; -+} -+ - static inline bool mtk_foe_entry_usable(struct mtk_foe_entry *entry) - { - return !(entry->ib1 & MTK_FOE_IB1_STATIC) && ---- a/drivers/net/ethernet/mediatek/mtk_ppe.h -+++ b/drivers/net/ethernet/mediatek/mtk_ppe.h -@@ -48,9 +48,9 @@ enum { - #define MTK_FOE_IB2_DEST_PORT GENMASK(7, 5) - #define MTK_FOE_IB2_MULTICAST BIT(8) - --#define MTK_FOE_IB2_WHNAT_QID2 GENMASK(13, 12) --#define MTK_FOE_IB2_WHNAT_DEVIDX BIT(16) --#define MTK_FOE_IB2_WHNAT_NAT BIT(17) -+#define MTK_FOE_IB2_WDMA_QID2 GENMASK(13, 12) -+#define MTK_FOE_IB2_WDMA_DEVIDX BIT(16) -+#define MTK_FOE_IB2_WDMA_WINFO BIT(17) - - #define MTK_FOE_IB2_PORT_MG GENMASK(17, 12) - -@@ -58,9 +58,9 @@ enum { - - #define MTK_FOE_IB2_DSCP GENMASK(31, 24) - --#define MTK_FOE_VLAN2_WHNAT_BSS GEMMASK(5, 0) --#define MTK_FOE_VLAN2_WHNAT_WCID GENMASK(13, 6) --#define MTK_FOE_VLAN2_WHNAT_RING GENMASK(15, 14) -+#define MTK_FOE_VLAN2_WINFO_BSS GENMASK(5, 0) -+#define MTK_FOE_VLAN2_WINFO_WCID GENMASK(13, 6) -+#define MTK_FOE_VLAN2_WINFO_RING GENMASK(15, 14) - - enum { - MTK_FOE_STATE_INVALID, -@@ -281,6 +281,8 @@ int mtk_foe_entry_set_ipv6_tuple(struct - int mtk_foe_entry_set_dsa(struct mtk_foe_entry *entry, int port); - int mtk_foe_entry_set_vlan(struct mtk_foe_entry *entry, int vid); - int mtk_foe_entry_set_pppoe(struct mtk_foe_entry *entry, int sid); -+int mtk_foe_entry_set_wdma(struct mtk_foe_entry *entry, int wdma_idx, int txq, -+ int bss, int wcid); - int mtk_foe_entry_commit(struct mtk_ppe *ppe, struct mtk_foe_entry *entry, - u16 timestamp); - int mtk_ppe_debugfs_init(struct mtk_ppe *ppe); ---- a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c -+++ b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c -@@ -10,6 +10,7 @@ - #include - #include - #include "mtk_eth_soc.h" -+#include "mtk_wed.h" - - struct mtk_flow_data { - struct ethhdr eth; -@@ -39,6 +40,7 @@ struct mtk_flow_entry { - struct rhash_head node; - unsigned long cookie; - u16 hash; -+ s8 wed_index; - }; - - static const struct rhashtable_params mtk_flow_ht_params = { -@@ -80,6 +82,35 @@ mtk_flow_offload_mangle_eth(const struct - memcpy(dest, src, act->mangle.mask ? 2 : 4); - } - -+static int -+mtk_flow_get_wdma_info(struct net_device *dev, const u8 *addr, struct mtk_wdma_info *info) -+{ -+ struct net_device_path_ctx ctx = { -+ .dev = dev, -+ .daddr = addr, -+ }; -+ struct net_device_path path = {}; -+ -+ if (!IS_ENABLED(CONFIG_NET_MEDIATEK_SOC_WED)) -+ return -1; -+ -+ if (!dev->netdev_ops->ndo_fill_forward_path) -+ return -1; -+ -+ if (dev->netdev_ops->ndo_fill_forward_path(&ctx, &path)) -+ return -1; -+ -+ if (path.type != DEV_PATH_MTK_WDMA) -+ return -1; -+ -+ info->wdma_idx = path.mtk_wdma.wdma_idx; -+ info->queue = path.mtk_wdma.queue; -+ info->bss = path.mtk_wdma.bss; -+ info->wcid = path.mtk_wdma.wcid; -+ -+ return 0; -+} -+ - - static int - mtk_flow_mangle_ports(const struct flow_action_entry *act, -@@ -149,10 +180,20 @@ mtk_flow_get_dsa_port(struct net_device - - static int - mtk_flow_set_output_device(struct mtk_eth *eth, struct mtk_foe_entry *foe, -- struct net_device *dev) -+ struct net_device *dev, const u8 *dest_mac, -+ int *wed_index) - { -+ struct mtk_wdma_info info = {}; - int pse_port, dsa_port; - -+ if (mtk_flow_get_wdma_info(dev, dest_mac, &info) == 0) { -+ mtk_foe_entry_set_wdma(foe, info.wdma_idx, info.queue, info.bss, -+ info.wcid); -+ pse_port = 3; -+ *wed_index = info.wdma_idx; -+ goto out; -+ } -+ - dsa_port = mtk_flow_get_dsa_port(&dev); - if (dsa_port >= 0) - mtk_foe_entry_set_dsa(foe, dsa_port); -@@ -164,6 +205,7 @@ mtk_flow_set_output_device(struct mtk_et - else - return -EOPNOTSUPP; - -+out: - mtk_foe_entry_set_pse_port(foe, pse_port); - - return 0; -@@ -179,6 +221,7 @@ mtk_flow_offload_replace(struct mtk_eth - struct net_device *odev = NULL; - struct mtk_flow_entry *entry; - int offload_type = 0; -+ int wed_index = -1; - u16 addr_type = 0; - u32 timestamp; - u8 l4proto = 0; -@@ -329,10 +372,14 @@ mtk_flow_offload_replace(struct mtk_eth - if (data.pppoe.num == 1) - mtk_foe_entry_set_pppoe(&foe, data.pppoe.sid); - -- err = mtk_flow_set_output_device(eth, &foe, odev); -+ err = mtk_flow_set_output_device(eth, &foe, odev, data.eth.h_dest, -+ &wed_index); - if (err) - return err; - -+ if (wed_index >= 0 && (err = mtk_wed_flow_add(wed_index)) < 0) -+ return err; -+ - entry = kzalloc(sizeof(*entry), GFP_KERNEL); - if (!entry) - return -ENOMEM; -@@ -346,6 +393,7 @@ mtk_flow_offload_replace(struct mtk_eth - } - - entry->hash = hash; -+ entry->wed_index = wed_index; - err = rhashtable_insert_fast(ð->flow_table, &entry->node, - mtk_flow_ht_params); - if (err < 0) -@@ -356,6 +404,8 @@ clear_flow: - mtk_foe_entry_clear(ð->ppe, hash); - free: - kfree(entry); -+ if (wed_index >= 0) -+ mtk_wed_flow_remove(wed_index); - return err; - } - -@@ -372,6 +422,8 @@ mtk_flow_offload_destroy(struct mtk_eth - mtk_foe_entry_clear(ð->ppe, entry->hash); - rhashtable_remove_fast(ð->flow_table, &entry->node, - mtk_flow_ht_params); -+ if (entry->wed_index >= 0) -+ mtk_wed_flow_remove(entry->wed_index); - kfree(entry); - - return 0; ---- a/drivers/net/ethernet/mediatek/mtk_wed.h -+++ b/drivers/net/ethernet/mediatek/mtk_wed.h -@@ -7,6 +7,7 @@ - #include - #include - #include -+#include - - struct mtk_eth; - -@@ -27,6 +28,12 @@ struct mtk_wed_hw { - int index; - }; - -+struct mtk_wdma_info { -+ u8 wdma_idx; -+ u8 queue; -+ u16 wcid; -+ u8 bss; -+}; - - #ifdef CONFIG_NET_MEDIATEK_SOC_WED - static inline void ---- a/include/linux/netdevice.h -+++ b/include/linux/netdevice.h -@@ -862,6 +862,7 @@ enum net_device_path_type { - DEV_PATH_BRIDGE, - DEV_PATH_PPPOE, - DEV_PATH_DSA, -+ DEV_PATH_MTK_WDMA, - }; - - struct net_device_path { -@@ -887,6 +888,12 @@ struct net_device_path { - int port; - u16 proto; - } dsa; -+ struct { -+ u8 wdma_idx; -+ u8 queue; -+ u16 wcid; -+ u8 bss; -+ } mtk_wdma; - }; - }; - ---- a/net/core/dev.c -+++ b/net/core/dev.c -@@ -703,6 +703,10 @@ int dev_fill_forward_path(const struct n - if (WARN_ON_ONCE(last_dev == ctx.dev)) - return -1; - } -+ -+ if (!ctx.dev) -+ return ret; -+ - path = dev_fwd_path(stack); - if (!path) - return -1; diff --git a/target/linux/generic/pending-5.18/701-04-arm64-dts-mediatek-mt7622-introduce-nodes-for-Wirele.patch b/target/linux/generic/pending-5.18/701-04-arm64-dts-mediatek-mt7622-introduce-nodes-for-Wirele.patch deleted file mode 100644 index bec0c773b8b700..00000000000000 --- a/target/linux/generic/pending-5.18/701-04-arm64-dts-mediatek-mt7622-introduce-nodes-for-Wirele.patch +++ /dev/null @@ -1,62 +0,0 @@ -From: Felix Fietkau -Date: Sat, 5 Feb 2022 18:36:36 +0100 -Subject: [PATCH] arm64: dts: mediatek: mt7622: introduce nodes for - Wireless Ethernet Dispatch - -Introduce wed0 and wed1 nodes in order to enable offloading forwarding -between ethernet and wireless devices on the mt7622 chipset. - -Signed-off-by: Felix Fietkau ---- - ---- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi -+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi -@@ -901,6 +901,11 @@ - }; - }; - -+ hifsys: syscon@1af00000 { -+ compatible = "mediatek,mt7622-hifsys", "syscon"; -+ reg = <0 0x1af00000 0 0x70>; -+ }; -+ - ethsys: syscon@1b000000 { - compatible = "mediatek,mt7622-ethsys", - "syscon"; -@@ -919,6 +924,26 @@ - #dma-cells = <1>; - }; - -+ pcie_mirror: pcie-mirror@10000400 { -+ compatible = "mediatek,mt7622-pcie-mirror", -+ "syscon"; -+ reg = <0 0x10000400 0 0x10>; -+ }; -+ -+ wed0: wed@1020a000 { -+ compatible = "mediatek,mt7622-wed", -+ "syscon"; -+ reg = <0 0x1020a000 0 0x1000>; -+ interrupts = ; -+ }; -+ -+ wed1: wed@1020b000 { -+ compatible = "mediatek,mt7622-wed", -+ "syscon"; -+ reg = <0 0x1020b000 0 0x1000>; -+ interrupts = ; -+ }; -+ - eth: ethernet@1b100000 { - compatible = "mediatek,mt7622-eth", - "mediatek,mt2701-eth", -@@ -946,6 +971,9 @@ - mediatek,ethsys = <ðsys>; - mediatek,sgmiisys = <&sgmiisys>; - mediatek,cci-control = <&cci_control2>; -+ mediatek,wed = <&wed0>, <&wed1>; -+ mediatek,pcie-mirror = <&pcie_mirror>; -+ mediatek,hifsys = <&hifsys>; - dma-coherent; - #address-cells = <1>; - #size-cells = <0>; diff --git a/target/linux/generic/pending-5.18/701-05-net-ethernet-mtk_eth_soc-add-ipv6-flow-offload-suppo.patch b/target/linux/generic/pending-5.18/701-05-net-ethernet-mtk_eth_soc-add-ipv6-flow-offload-suppo.patch deleted file mode 100644 index b2114eb02d8f63..00000000000000 --- a/target/linux/generic/pending-5.18/701-05-net-ethernet-mtk_eth_soc-add-ipv6-flow-offload-suppo.patch +++ /dev/null @@ -1,79 +0,0 @@ -From: David Bentham -Date: Mon, 21 Feb 2022 15:36:16 +0100 -Subject: [PATCH] net: ethernet: mtk_eth_soc: add ipv6 flow offload - support - -Add the missing IPv6 flow offloading support for routing only. -Hardware flow offloading is done by the packet processing engine (PPE) -of the Ethernet MAC and as it doesn't support mangling of IPv6 packets, -IPv6 NAT cannot be supported. - -Signed-off-by: David Bentham -Signed-off-by: Felix Fietkau ---- - ---- a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c -+++ b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c -@@ -6,6 +6,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -20,6 +21,11 @@ struct mtk_flow_data { - __be32 src_addr; - __be32 dst_addr; - } v4; -+ -+ struct { -+ struct in6_addr src_addr; -+ struct in6_addr dst_addr; -+ } v6; - }; - - __be16 src_port; -@@ -65,6 +71,14 @@ mtk_flow_set_ipv4_addr(struct mtk_foe_en - data->v4.dst_addr, data->dst_port); - } - -+static int -+mtk_flow_set_ipv6_addr(struct mtk_foe_entry *foe, struct mtk_flow_data *data) -+{ -+ return mtk_foe_entry_set_ipv6_tuple(foe, -+ data->v6.src_addr.s6_addr32, data->src_port, -+ data->v6.dst_addr.s6_addr32, data->dst_port); -+} -+ - static void - mtk_flow_offload_mangle_eth(const struct flow_action_entry *act, void *eth) - { -@@ -299,6 +313,9 @@ mtk_flow_offload_replace(struct mtk_eth - case FLOW_DISSECTOR_KEY_IPV4_ADDRS: - offload_type = MTK_PPE_PKT_TYPE_IPV4_HNAPT; - break; -+ case FLOW_DISSECTOR_KEY_IPV6_ADDRS: -+ offload_type = MTK_PPE_PKT_TYPE_IPV6_ROUTE_5T; -+ break; - default: - return -EOPNOTSUPP; - } -@@ -334,6 +351,17 @@ mtk_flow_offload_replace(struct mtk_eth - mtk_flow_set_ipv4_addr(&foe, &data, false); - } - -+ if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) { -+ struct flow_match_ipv6_addrs addrs; -+ -+ flow_rule_match_ipv6_addrs(rule, &addrs); -+ -+ data.v6.src_addr = addrs.key->src; -+ data.v6.dst_addr = addrs.key->dst; -+ -+ mtk_flow_set_ipv6_addr(&foe, &data); -+ } -+ - flow_action_for_each(i, act, &rule->action) { - if (act->id != FLOW_ACTION_MANGLE) - continue; diff --git a/target/linux/generic/pending-5.18/701-06-net-ethernet-mtk_eth_soc-support-TC_SETUP_BLOCK-for-.patch b/target/linux/generic/pending-5.18/701-06-net-ethernet-mtk_eth_soc-support-TC_SETUP_BLOCK-for-.patch deleted file mode 100644 index a9fc70533d445b..00000000000000 --- a/target/linux/generic/pending-5.18/701-06-net-ethernet-mtk_eth_soc-support-TC_SETUP_BLOCK-for-.patch +++ /dev/null @@ -1,29 +0,0 @@ -From: Felix Fietkau -Date: Mon, 21 Feb 2022 15:37:21 +0100 -Subject: [PATCH] net: ethernet: mtk_eth_soc: support TC_SETUP_BLOCK for - PPE offload - -This allows offload entries to be created from user space - -Signed-off-by: Felix Fietkau ---- - ---- a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c -+++ b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c -@@ -566,10 +566,13 @@ mtk_eth_setup_tc_block(struct net_device - int mtk_eth_setup_tc(struct net_device *dev, enum tc_setup_type type, - void *type_data) - { -- if (type == TC_SETUP_FT) -+ switch (type) { -+ case TC_SETUP_BLOCK: -+ case TC_SETUP_FT: - return mtk_eth_setup_tc_block(dev, type_data); -- -- return -EOPNOTSUPP; -+ default: -+ return -EOPNOTSUPP; -+ } - } - - int mtk_eth_offload_init(struct mtk_eth *eth) diff --git a/target/linux/generic/pending-5.18/701-07-net-ethernet-mtk_eth_soc-allocate-struct-mtk_ppe-sep.patch b/target/linux/generic/pending-5.18/701-07-net-ethernet-mtk_eth_soc-allocate-struct-mtk_ppe-sep.patch deleted file mode 100644 index 9efd4b768c3025..00000000000000 --- a/target/linux/generic/pending-5.18/701-07-net-ethernet-mtk_eth_soc-allocate-struct-mtk_ppe-sep.patch +++ /dev/null @@ -1,159 +0,0 @@ -From: Felix Fietkau -Date: Mon, 21 Feb 2022 15:38:20 +0100 -Subject: [PATCH] net: ethernet: mtk_eth_soc: allocate struct mtk_ppe - separately - -Preparation for adding more data to it, which will increase its size. - -Signed-off-by: Felix Fietkau ---- - ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -2289,7 +2289,7 @@ static int mtk_open(struct net_device *d - if (err) - return err; - -- if (eth->soc->offload_version && mtk_ppe_start(ð->ppe) == 0) -+ if (eth->soc->offload_version && mtk_ppe_start(eth->ppe) == 0) - gdm_config = MTK_GDMA_TO_PPE; - - mtk_gdm_config(eth, gdm_config); -@@ -2363,7 +2363,7 @@ static int mtk_stop(struct net_device *d - mtk_dma_free(eth); - - if (eth->soc->offload_version) -- mtk_ppe_stop(ð->ppe); -+ mtk_ppe_stop(eth->ppe); - - return 0; - } -@@ -3282,10 +3282,11 @@ static int mtk_probe(struct platform_dev - } - - if (eth->soc->offload_version) { -- err = mtk_ppe_init(ð->ppe, eth->dev, -- eth->base + MTK_ETH_PPE_BASE, 2); -- if (err) -+ eth->ppe = mtk_ppe_init(eth->dev, eth->base + MTK_ETH_PPE_BASE, 2); -+ if (!eth->ppe) { -+ err = -ENOMEM; - goto err_free_dev; -+ } - - err = mtk_eth_offload_init(eth); - if (err) ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -985,7 +985,7 @@ struct mtk_eth { - u32 rx_dma_l4_valid; - int ip_align; - -- struct mtk_ppe ppe; -+ struct mtk_ppe *ppe; - struct rhashtable flow_table; - }; - ---- a/drivers/net/ethernet/mediatek/mtk_ppe.c -+++ b/drivers/net/ethernet/mediatek/mtk_ppe.c -@@ -384,10 +384,15 @@ int mtk_foe_entry_commit(struct mtk_ppe - return hash; - } - --int mtk_ppe_init(struct mtk_ppe *ppe, struct device *dev, void __iomem *base, -+struct mtk_ppe *mtk_ppe_init(struct device *dev, void __iomem *base, - int version) - { - struct mtk_foe_entry *foe; -+ struct mtk_ppe *ppe; -+ -+ ppe = devm_kzalloc(dev, sizeof(*ppe), GFP_KERNEL); -+ if (!ppe) -+ return NULL; - - /* need to allocate a separate device, since it PPE DMA access is - * not coherent. -@@ -399,13 +404,13 @@ int mtk_ppe_init(struct mtk_ppe *ppe, st - foe = dmam_alloc_coherent(ppe->dev, MTK_PPE_ENTRIES * sizeof(*foe), - &ppe->foe_phys, GFP_KERNEL); - if (!foe) -- return -ENOMEM; -+ return NULL; - - ppe->foe_table = foe; - - mtk_ppe_debugfs_init(ppe); - -- return 0; -+ return ppe; - } - - static void mtk_ppe_init_foe_table(struct mtk_ppe *ppe) ---- a/drivers/net/ethernet/mediatek/mtk_ppe.h -+++ b/drivers/net/ethernet/mediatek/mtk_ppe.h -@@ -246,8 +246,7 @@ struct mtk_ppe { - void *acct_table; - }; - --int mtk_ppe_init(struct mtk_ppe *ppe, struct device *dev, void __iomem *base, -- int version); -+struct mtk_ppe *mtk_ppe_init(struct device *dev, void __iomem *base, int version); - int mtk_ppe_start(struct mtk_ppe *ppe); - int mtk_ppe_stop(struct mtk_ppe *ppe); - ---- a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c -+++ b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c -@@ -414,7 +414,7 @@ mtk_flow_offload_replace(struct mtk_eth - - entry->cookie = f->cookie; - timestamp = mtk_eth_timestamp(eth); -- hash = mtk_foe_entry_commit(ð->ppe, &foe, timestamp); -+ hash = mtk_foe_entry_commit(eth->ppe, &foe, timestamp); - if (hash < 0) { - err = hash; - goto free; -@@ -429,7 +429,7 @@ mtk_flow_offload_replace(struct mtk_eth - - return 0; - clear_flow: -- mtk_foe_entry_clear(ð->ppe, hash); -+ mtk_foe_entry_clear(eth->ppe, hash); - free: - kfree(entry); - if (wed_index >= 0) -@@ -447,7 +447,7 @@ mtk_flow_offload_destroy(struct mtk_eth - if (!entry) - return -ENOENT; - -- mtk_foe_entry_clear(ð->ppe, entry->hash); -+ mtk_foe_entry_clear(eth->ppe, entry->hash); - rhashtable_remove_fast(ð->flow_table, &entry->node, - mtk_flow_ht_params); - if (entry->wed_index >= 0) -@@ -469,7 +469,7 @@ mtk_flow_offload_stats(struct mtk_eth *e - if (!entry) - return -ENOENT; - -- timestamp = mtk_foe_entry_timestamp(ð->ppe, entry->hash); -+ timestamp = mtk_foe_entry_timestamp(eth->ppe, entry->hash); - if (timestamp < 0) - return -ETIMEDOUT; - -@@ -525,7 +525,7 @@ mtk_eth_setup_tc_block(struct net_device - struct flow_block_cb *block_cb; - flow_setup_cb_t *cb; - -- if (!eth->ppe.foe_table) -+ if (!eth->ppe || !eth->ppe->foe_table) - return -EOPNOTSUPP; - - if (f->binder_type != FLOW_BLOCK_BINDER_TYPE_CLSACT_INGRESS) -@@ -577,7 +577,7 @@ int mtk_eth_setup_tc(struct net_device * - - int mtk_eth_offload_init(struct mtk_eth *eth) - { -- if (!eth->ppe.foe_table) -+ if (!eth->ppe || !eth->ppe->foe_table) - return 0; - - return rhashtable_init(ð->flow_table, &mtk_flow_ht_params); diff --git a/target/linux/generic/pending-5.18/701-08-net-ethernet-mtk_eth_soc-rework-hardware-flow-table-.patch b/target/linux/generic/pending-5.18/701-08-net-ethernet-mtk_eth_soc-rework-hardware-flow-table-.patch deleted file mode 100644 index e4efe0d4a3173b..00000000000000 --- a/target/linux/generic/pending-5.18/701-08-net-ethernet-mtk_eth_soc-rework-hardware-flow-table-.patch +++ /dev/null @@ -1,424 +0,0 @@ -From: Felix Fietkau -Date: Mon, 21 Feb 2022 15:39:18 +0100 -Subject: [PATCH] net: ethernet: mtk_eth_soc: rework hardware flow table - management - -The hardware was designed to handle flow detection and creation of flow entries -by itself, relying on the software primarily for filling in egress routing -information. -When there is a hash collision between multiple flows, this allows the hardware -to maintain the entry for the most active flow. -Additionally, the hardware only keeps offloading active for entries with at -least 30 packets per second. - -With this rework, the code no longer creates a hardware entries directly. -Instead, the hardware entry is only created when the PPE reports a matching -unbound flow with the minimum target rate. -In order to reduce CPU overhead, looking for flows belonging to a hash entry -is rate limited to once every 100ms. - -This rework is also used as preparation for emulating bridge offload by -managing L4 offload entries on demand. - -Signed-off-by: Felix Fietkau ---- - ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -21,6 +21,7 @@ - #include - #include - #include -+#include - #include - - #include "mtk_eth_soc.h" -@@ -1250,7 +1251,7 @@ static int mtk_poll_rx(struct napi_struc - struct net_device *netdev; - unsigned int pktlen; - dma_addr_t dma_addr; -- u32 hash; -+ u32 hash, reason; - int mac; - - ring = mtk_get_rx_ring(eth); -@@ -1329,6 +1330,11 @@ static int mtk_poll_rx(struct napi_struc - skb_set_hash(skb, hash, PKT_HASH_TYPE_L4); - } - -+ reason = FIELD_GET(MTK_RXD4_PPE_CPU_REASON, trxd.rxd4); -+ if (reason == MTK_PPE_CPU_REASON_HIT_UNBIND_RATE_REACHED) -+ mtk_ppe_check_skb(eth->ppe, skb, -+ trxd.rxd4 & MTK_RXD4_FOE_ENTRY); -+ - if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX && - (trxd.rxd2 & RX_DMA_VTAG)) - __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), -@@ -3282,7 +3288,7 @@ static int mtk_probe(struct platform_dev - } - - if (eth->soc->offload_version) { -- eth->ppe = mtk_ppe_init(eth->dev, eth->base + MTK_ETH_PPE_BASE, 2); -+ eth->ppe = mtk_ppe_init(eth, eth->base + MTK_ETH_PPE_BASE, 2); - if (!eth->ppe) { - err = -ENOMEM; - goto err_free_dev; ---- a/drivers/net/ethernet/mediatek/mtk_ppe.c -+++ b/drivers/net/ethernet/mediatek/mtk_ppe.c -@@ -6,9 +6,12 @@ - #include - #include - #include -+#include "mtk_eth_soc.h" - #include "mtk_ppe.h" - #include "mtk_ppe_regs.h" - -+static DEFINE_SPINLOCK(ppe_lock); -+ - static void ppe_w32(struct mtk_ppe *ppe, u32 reg, u32 val) - { - writel(val, ppe->base + reg); -@@ -41,6 +44,11 @@ static u32 ppe_clear(struct mtk_ppe *ppe - return ppe_m32(ppe, reg, val, 0); - } - -+static u32 mtk_eth_timestamp(struct mtk_eth *eth) -+{ -+ return mtk_r32(eth, 0x0010) & MTK_FOE_IB1_BIND_TIMESTAMP; -+} -+ - static int mtk_ppe_wait_busy(struct mtk_ppe *ppe) - { - int ret; -@@ -353,26 +361,59 @@ static inline bool mtk_foe_entry_usable( - FIELD_GET(MTK_FOE_IB1_STATE, entry->ib1) != MTK_FOE_STATE_BIND; - } - --int mtk_foe_entry_commit(struct mtk_ppe *ppe, struct mtk_foe_entry *entry, -- u16 timestamp) -+static bool -+mtk_flow_entry_match(struct mtk_flow_entry *entry, struct mtk_foe_entry *data) -+{ -+ int type, len; -+ -+ if ((data->ib1 ^ entry->data.ib1) & MTK_FOE_IB1_UDP) -+ return false; -+ -+ type = FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, entry->data.ib1); -+ if (type > MTK_PPE_PKT_TYPE_IPV4_DSLITE) -+ len = offsetof(struct mtk_foe_entry, ipv6._rsv); -+ else -+ len = offsetof(struct mtk_foe_entry, ipv4.ib2); -+ -+ return !memcmp(&entry->data.data, &data->data, len - 4); -+} -+ -+static void -+mtk_flow_entry_update(struct mtk_ppe *ppe, struct mtk_flow_entry *entry) - { - struct mtk_foe_entry *hwe; -- u32 hash; -+ struct mtk_foe_entry foe; - -+ spin_lock_bh(&ppe_lock); -+ if (entry->hash == 0xffff) -+ goto out; -+ -+ hwe = &ppe->foe_table[entry->hash]; -+ memcpy(&foe, hwe, sizeof(foe)); -+ if (!mtk_flow_entry_match(entry, &foe)) { -+ entry->hash = 0xffff; -+ goto out; -+ } -+ -+ entry->data.ib1 = foe.ib1; -+ -+out: -+ spin_unlock_bh(&ppe_lock); -+} -+ -+static void -+__mtk_foe_entry_commit(struct mtk_ppe *ppe, struct mtk_foe_entry *entry, -+ u16 hash) -+{ -+ struct mtk_foe_entry *hwe; -+ u16 timestamp; -+ -+ timestamp = mtk_eth_timestamp(ppe->eth); - timestamp &= MTK_FOE_IB1_BIND_TIMESTAMP; - entry->ib1 &= ~MTK_FOE_IB1_BIND_TIMESTAMP; - entry->ib1 |= FIELD_PREP(MTK_FOE_IB1_BIND_TIMESTAMP, timestamp); - -- hash = mtk_ppe_hash_entry(entry); - hwe = &ppe->foe_table[hash]; -- if (!mtk_foe_entry_usable(hwe)) { -- hwe++; -- hash++; -- -- if (!mtk_foe_entry_usable(hwe)) -- return -ENOSPC; -- } -- - memcpy(&hwe->data, &entry->data, sizeof(hwe->data)); - wmb(); - hwe->ib1 = entry->ib1; -@@ -380,13 +421,77 @@ int mtk_foe_entry_commit(struct mtk_ppe - dma_wmb(); - - mtk_ppe_cache_clear(ppe); -+} - -- return hash; -+void mtk_foe_entry_clear(struct mtk_ppe *ppe, struct mtk_flow_entry *entry) -+{ -+ spin_lock_bh(&ppe_lock); -+ hlist_del_init(&entry->list); -+ if (entry->hash != 0xffff) { -+ ppe->foe_table[entry->hash].ib1 &= ~MTK_FOE_IB1_STATE; -+ ppe->foe_table[entry->hash].ib1 |= FIELD_PREP(MTK_FOE_IB1_STATE, -+ MTK_FOE_STATE_BIND); -+ dma_wmb(); -+ } -+ entry->hash = 0xffff; -+ spin_unlock_bh(&ppe_lock); -+} -+ -+int mtk_foe_entry_commit(struct mtk_ppe *ppe, struct mtk_flow_entry *entry) -+{ -+ u32 hash = mtk_ppe_hash_entry(&entry->data); -+ -+ entry->hash = 0xffff; -+ spin_lock_bh(&ppe_lock); -+ hlist_add_head(&entry->list, &ppe->foe_flow[hash / 2]); -+ spin_unlock_bh(&ppe_lock); -+ -+ return 0; -+} -+ -+void __mtk_ppe_check_skb(struct mtk_ppe *ppe, struct sk_buff *skb, u16 hash) -+{ -+ struct hlist_head *head = &ppe->foe_flow[hash / 2]; -+ struct mtk_flow_entry *entry; -+ struct mtk_foe_entry *hwe = &ppe->foe_table[hash]; -+ bool found = false; -+ -+ if (hlist_empty(head)) -+ return; -+ -+ spin_lock_bh(&ppe_lock); -+ hlist_for_each_entry(entry, head, list) { -+ if (found || !mtk_flow_entry_match(entry, hwe)) { -+ if (entry->hash != 0xffff) -+ entry->hash = 0xffff; -+ continue; -+ } -+ -+ entry->hash = hash; -+ __mtk_foe_entry_commit(ppe, &entry->data, hash); -+ found = true; -+ } -+ spin_unlock_bh(&ppe_lock); -+} -+ -+int mtk_foe_entry_idle_time(struct mtk_ppe *ppe, struct mtk_flow_entry *entry) -+{ -+ u16 now = mtk_eth_timestamp(ppe->eth) & MTK_FOE_IB1_BIND_TIMESTAMP; -+ u16 timestamp; -+ -+ mtk_flow_entry_update(ppe, entry); -+ timestamp = entry->data.ib1 & MTK_FOE_IB1_BIND_TIMESTAMP; -+ -+ if (timestamp > now) -+ return MTK_FOE_IB1_BIND_TIMESTAMP + 1 - timestamp + now; -+ else -+ return now - timestamp; - } - --struct mtk_ppe *mtk_ppe_init(struct device *dev, void __iomem *base, -+struct mtk_ppe *mtk_ppe_init(struct mtk_eth *eth, void __iomem *base, - int version) - { -+ struct device *dev = eth->dev; - struct mtk_foe_entry *foe; - struct mtk_ppe *ppe; - -@@ -398,6 +503,7 @@ struct mtk_ppe *mtk_ppe_init(struct devi - * not coherent. - */ - ppe->base = base; -+ ppe->eth = eth; - ppe->dev = dev; - ppe->version = version; - ---- a/drivers/net/ethernet/mediatek/mtk_ppe.h -+++ b/drivers/net/ethernet/mediatek/mtk_ppe.h -@@ -235,7 +235,17 @@ enum { - MTK_PPE_CPU_REASON_INVALID = 0x1f, - }; - -+struct mtk_flow_entry { -+ struct rhash_head node; -+ struct hlist_node list; -+ unsigned long cookie; -+ struct mtk_foe_entry data; -+ u16 hash; -+ s8 wed_index; -+}; -+ - struct mtk_ppe { -+ struct mtk_eth *eth; - struct device *dev; - void __iomem *base; - int version; -@@ -243,18 +253,33 @@ struct mtk_ppe { - struct mtk_foe_entry *foe_table; - dma_addr_t foe_phys; - -+ u16 foe_check_time[MTK_PPE_ENTRIES]; -+ struct hlist_head foe_flow[MTK_PPE_ENTRIES / 2]; -+ - void *acct_table; - }; - --struct mtk_ppe *mtk_ppe_init(struct device *dev, void __iomem *base, int version); -+struct mtk_ppe *mtk_ppe_init(struct mtk_eth *eth, void __iomem *base, int version); - int mtk_ppe_start(struct mtk_ppe *ppe); - int mtk_ppe_stop(struct mtk_ppe *ppe); - -+void __mtk_ppe_check_skb(struct mtk_ppe *ppe, struct sk_buff *skb, u16 hash); -+ - static inline void --mtk_foe_entry_clear(struct mtk_ppe *ppe, u16 hash) -+mtk_ppe_check_skb(struct mtk_ppe *ppe, struct sk_buff *skb, u16 hash) - { -- ppe->foe_table[hash].ib1 = 0; -- dma_wmb(); -+ u16 now, diff; -+ -+ if (!ppe) -+ return; -+ -+ now = (u16)jiffies; -+ diff = now - ppe->foe_check_time[hash]; -+ if (diff < HZ / 10) -+ return; -+ -+ ppe->foe_check_time[hash] = now; -+ __mtk_ppe_check_skb(ppe, skb, hash); - } - - static inline int -@@ -282,8 +307,9 @@ int mtk_foe_entry_set_vlan(struct mtk_fo - int mtk_foe_entry_set_pppoe(struct mtk_foe_entry *entry, int sid); - int mtk_foe_entry_set_wdma(struct mtk_foe_entry *entry, int wdma_idx, int txq, - int bss, int wcid); --int mtk_foe_entry_commit(struct mtk_ppe *ppe, struct mtk_foe_entry *entry, -- u16 timestamp); -+int mtk_foe_entry_commit(struct mtk_ppe *ppe, struct mtk_flow_entry *entry); -+void mtk_foe_entry_clear(struct mtk_ppe *ppe, struct mtk_flow_entry *entry); -+int mtk_foe_entry_idle_time(struct mtk_ppe *ppe, struct mtk_flow_entry *entry); - int mtk_ppe_debugfs_init(struct mtk_ppe *ppe); - - #endif ---- a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c -+++ b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c -@@ -42,13 +42,6 @@ struct mtk_flow_data { - } pppoe; - }; - --struct mtk_flow_entry { -- struct rhash_head node; -- unsigned long cookie; -- u16 hash; -- s8 wed_index; --}; -- - static const struct rhashtable_params mtk_flow_ht_params = { - .head_offset = offsetof(struct mtk_flow_entry, node), - .key_offset = offsetof(struct mtk_flow_entry, cookie), -@@ -56,12 +49,6 @@ static const struct rhashtable_params mt - .automatic_shrinking = true, - }; - --static u32 --mtk_eth_timestamp(struct mtk_eth *eth) --{ -- return mtk_r32(eth, 0x0010) & MTK_FOE_IB1_BIND_TIMESTAMP; --} -- - static int - mtk_flow_set_ipv4_addr(struct mtk_foe_entry *foe, struct mtk_flow_data *data, - bool egress) -@@ -237,10 +224,8 @@ mtk_flow_offload_replace(struct mtk_eth - int offload_type = 0; - int wed_index = -1; - u16 addr_type = 0; -- u32 timestamp; - u8 l4proto = 0; - int err = 0; -- int hash; - int i; - - if (rhashtable_lookup(ð->flow_table, &f->cookie, mtk_flow_ht_params)) -@@ -413,23 +398,21 @@ mtk_flow_offload_replace(struct mtk_eth - return -ENOMEM; - - entry->cookie = f->cookie; -- timestamp = mtk_eth_timestamp(eth); -- hash = mtk_foe_entry_commit(eth->ppe, &foe, timestamp); -- if (hash < 0) { -- err = hash; -+ memcpy(&entry->data, &foe, sizeof(entry->data)); -+ entry->wed_index = wed_index; -+ -+ if (mtk_foe_entry_commit(eth->ppe, entry) < 0) - goto free; -- } - -- entry->hash = hash; -- entry->wed_index = wed_index; - err = rhashtable_insert_fast(ð->flow_table, &entry->node, - mtk_flow_ht_params); - if (err < 0) -- goto clear_flow; -+ goto clear; - - return 0; --clear_flow: -- mtk_foe_entry_clear(eth->ppe, hash); -+ -+clear: -+ mtk_foe_entry_clear(eth->ppe, entry); - free: - kfree(entry); - if (wed_index >= 0) -@@ -447,7 +430,7 @@ mtk_flow_offload_destroy(struct mtk_eth - if (!entry) - return -ENOENT; - -- mtk_foe_entry_clear(eth->ppe, entry->hash); -+ mtk_foe_entry_clear(eth->ppe, entry); - rhashtable_remove_fast(ð->flow_table, &entry->node, - mtk_flow_ht_params); - if (entry->wed_index >= 0) -@@ -461,7 +444,6 @@ static int - mtk_flow_offload_stats(struct mtk_eth *eth, struct flow_cls_offload *f) - { - struct mtk_flow_entry *entry; -- int timestamp; - u32 idle; - - entry = rhashtable_lookup(ð->flow_table, &f->cookie, -@@ -469,11 +451,7 @@ mtk_flow_offload_stats(struct mtk_eth *e - if (!entry) - return -ENOENT; - -- timestamp = mtk_foe_entry_timestamp(eth->ppe, entry->hash); -- if (timestamp < 0) -- return -ETIMEDOUT; -- -- idle = mtk_eth_timestamp(eth) - timestamp; -+ idle = mtk_foe_entry_idle_time(eth->ppe, entry); - f->stats.lastused = jiffies - idle * HZ; - - return 0; diff --git a/target/linux/generic/pending-5.18/701-09-net-ethernet-mtk_eth_soc-remove-bridge-flow-offload-.patch b/target/linux/generic/pending-5.18/701-09-net-ethernet-mtk_eth_soc-remove-bridge-flow-offload-.patch deleted file mode 100644 index 2ff0b341f9156a..00000000000000 --- a/target/linux/generic/pending-5.18/701-09-net-ethernet-mtk_eth_soc-remove-bridge-flow-offload-.patch +++ /dev/null @@ -1,44 +0,0 @@ -From: Felix Fietkau -Date: Mon, 21 Feb 2022 15:55:19 +0100 -Subject: [PATCH] net: ethernet: mtk_eth_soc: remove bridge flow offload - type entry support - -According to MediaTek, this feature is not supported in current hardware - -Signed-off-by: Felix Fietkau ---- - ---- a/drivers/net/ethernet/mediatek/mtk_ppe.c -+++ b/drivers/net/ethernet/mediatek/mtk_ppe.c -@@ -84,13 +84,6 @@ static u32 mtk_ppe_hash_entry(struct mtk - u32 hash; - - switch (FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, e->ib1)) { -- case MTK_PPE_PKT_TYPE_BRIDGE: -- hv1 = e->bridge.src_mac_lo; -- hv1 ^= ((e->bridge.src_mac_hi & 0xffff) << 16); -- hv2 = e->bridge.src_mac_hi >> 16; -- hv2 ^= e->bridge.dest_mac_lo; -- hv3 = e->bridge.dest_mac_hi; -- break; - case MTK_PPE_PKT_TYPE_IPV4_ROUTE: - case MTK_PPE_PKT_TYPE_IPV4_HNAPT: - hv1 = e->ipv4.orig.ports; -@@ -572,7 +565,6 @@ int mtk_ppe_start(struct mtk_ppe *ppe) - MTK_PPE_FLOW_CFG_IP4_NAT | - MTK_PPE_FLOW_CFG_IP4_NAPT | - MTK_PPE_FLOW_CFG_IP4_DSLITE | -- MTK_PPE_FLOW_CFG_L2_BRIDGE | - MTK_PPE_FLOW_CFG_IP4_NAT_FRAG; - ppe_w32(ppe, MTK_PPE_FLOW_CFG, val); - ---- a/drivers/net/ethernet/mediatek/mtk_ppe_debugfs.c -+++ b/drivers/net/ethernet/mediatek/mtk_ppe_debugfs.c -@@ -32,7 +32,6 @@ static const char *mtk_foe_pkt_type_str( - static const char * const type_str[] = { - [MTK_PPE_PKT_TYPE_IPV4_HNAPT] = "IPv4 5T", - [MTK_PPE_PKT_TYPE_IPV4_ROUTE] = "IPv4 3T", -- [MTK_PPE_PKT_TYPE_BRIDGE] = "L2", - [MTK_PPE_PKT_TYPE_IPV4_DSLITE] = "DS-LITE", - [MTK_PPE_PKT_TYPE_IPV6_ROUTE_3T] = "IPv6 3T", - [MTK_PPE_PKT_TYPE_IPV6_ROUTE_5T] = "IPv6 5T", diff --git a/target/linux/generic/pending-5.18/701-10-net-ethernet-mtk_eth_soc-support-creating-mac-addres.patch b/target/linux/generic/pending-5.18/701-10-net-ethernet-mtk_eth_soc-support-creating-mac-addres.patch deleted file mode 100644 index 67c02d6dbc9251..00000000000000 --- a/target/linux/generic/pending-5.18/701-10-net-ethernet-mtk_eth_soc-support-creating-mac-addres.patch +++ /dev/null @@ -1,553 +0,0 @@ -From: Felix Fietkau -Date: Wed, 23 Feb 2022 10:56:34 +0100 -Subject: [PATCH] net: ethernet: mtk_eth_soc: support creating mac - address based offload entries - -This will be used to implement a limited form of bridge offloading. -Since the hardware does not support flow table entries with just source -and destination MAC address, the driver has to emulate it. - -The hardware automatically creates entries entries for incoming flows, even -when they are bridged instead of routed, and reports when packets for these -flows have reached the minimum PPS rate for offloading. - -After this happens, we look up the L2 flow offload entry based on the MAC -header and fill in the output routing information in the flow table. -The dynamically created per-flow entries are automatically removed when -either the hardware flowtable entry expires, is replaced, or if the offload -rule they belong to is removed - -Signed-off-by: Felix Fietkau ---- - ---- a/drivers/net/ethernet/mediatek/mtk_ppe.c -+++ b/drivers/net/ethernet/mediatek/mtk_ppe.c -@@ -6,12 +6,22 @@ - #include - #include - #include -+#include -+#include -+#include - #include "mtk_eth_soc.h" - #include "mtk_ppe.h" - #include "mtk_ppe_regs.h" - - static DEFINE_SPINLOCK(ppe_lock); - -+static const struct rhashtable_params mtk_flow_l2_ht_params = { -+ .head_offset = offsetof(struct mtk_flow_entry, l2_node), -+ .key_offset = offsetof(struct mtk_flow_entry, data.bridge), -+ .key_len = offsetof(struct mtk_foe_bridge, key_end), -+ .automatic_shrinking = true, -+}; -+ - static void ppe_w32(struct mtk_ppe *ppe, u32 reg, u32 val) - { - writel(val, ppe->base + reg); -@@ -123,6 +133,9 @@ mtk_foe_entry_l2(struct mtk_foe_entry *e - { - int type = FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, entry->ib1); - -+ if (type == MTK_PPE_PKT_TYPE_BRIDGE) -+ return &entry->bridge.l2; -+ - if (type >= MTK_PPE_PKT_TYPE_IPV4_DSLITE) - return &entry->ipv6.l2; - -@@ -134,6 +147,9 @@ mtk_foe_entry_ib2(struct mtk_foe_entry * - { - int type = FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, entry->ib1); - -+ if (type == MTK_PPE_PKT_TYPE_BRIDGE) -+ return &entry->bridge.ib2; -+ - if (type >= MTK_PPE_PKT_TYPE_IPV4_DSLITE) - return &entry->ipv6.ib2; - -@@ -168,7 +184,12 @@ int mtk_foe_entry_prepare(struct mtk_foe - if (type == MTK_PPE_PKT_TYPE_IPV6_ROUTE_3T) - entry->ipv6.ports = ports_pad; - -- if (type >= MTK_PPE_PKT_TYPE_IPV4_DSLITE) { -+ if (type == MTK_PPE_PKT_TYPE_BRIDGE) { -+ ether_addr_copy(entry->bridge.src_mac, src_mac); -+ ether_addr_copy(entry->bridge.dest_mac, dest_mac); -+ entry->bridge.ib2 = val; -+ l2 = &entry->bridge.l2; -+ } else if (type >= MTK_PPE_PKT_TYPE_IPV4_DSLITE) { - entry->ipv6.ib2 = val; - l2 = &entry->ipv6.l2; - } else { -@@ -372,12 +393,96 @@ mtk_flow_entry_match(struct mtk_flow_ent - } - - static void -+__mtk_foe_entry_clear(struct mtk_ppe *ppe, struct mtk_flow_entry *entry) -+{ -+ struct hlist_head *head; -+ struct hlist_node *tmp; -+ -+ if (entry->type == MTK_FLOW_TYPE_L2) { -+ rhashtable_remove_fast(&ppe->l2_flows, &entry->l2_node, -+ mtk_flow_l2_ht_params); -+ -+ head = &entry->l2_flows; -+ hlist_for_each_entry_safe(entry, tmp, head, l2_data.list) -+ __mtk_foe_entry_clear(ppe, entry); -+ return; -+ } -+ -+ hlist_del_init(&entry->list); -+ if (entry->hash != 0xffff) { -+ ppe->foe_table[entry->hash].ib1 &= ~MTK_FOE_IB1_STATE; -+ ppe->foe_table[entry->hash].ib1 |= FIELD_PREP(MTK_FOE_IB1_STATE, -+ MTK_FOE_STATE_BIND); -+ dma_wmb(); -+ } -+ entry->hash = 0xffff; -+ -+ if (entry->type != MTK_FLOW_TYPE_L2_SUBFLOW) -+ return; -+ -+ hlist_del_init(&entry->l2_data.list); -+ kfree(entry); -+} -+ -+static int __mtk_foe_entry_idle_time(struct mtk_ppe *ppe, u32 ib1) -+{ -+ u16 timestamp; -+ u16 now; -+ -+ now = mtk_eth_timestamp(ppe->eth) & MTK_FOE_IB1_BIND_TIMESTAMP; -+ timestamp = ib1 & MTK_FOE_IB1_BIND_TIMESTAMP; -+ -+ if (timestamp > now) -+ return MTK_FOE_IB1_BIND_TIMESTAMP + 1 - timestamp + now; -+ else -+ return now - timestamp; -+} -+ -+static void -+mtk_flow_entry_update_l2(struct mtk_ppe *ppe, struct mtk_flow_entry *entry) -+{ -+ struct mtk_flow_entry *cur; -+ struct mtk_foe_entry *hwe; -+ struct hlist_node *tmp; -+ int idle; -+ -+ idle = __mtk_foe_entry_idle_time(ppe, entry->data.ib1); -+ hlist_for_each_entry_safe(cur, tmp, &entry->l2_flows, l2_data.list) { -+ int cur_idle; -+ u32 ib1; -+ -+ hwe = &ppe->foe_table[cur->hash]; -+ ib1 = READ_ONCE(hwe->ib1); -+ -+ if (FIELD_GET(MTK_FOE_IB1_STATE, ib1) != MTK_FOE_STATE_BIND) { -+ cur->hash = 0xffff; -+ __mtk_foe_entry_clear(ppe, cur); -+ continue; -+ } -+ -+ cur_idle = __mtk_foe_entry_idle_time(ppe, ib1); -+ if (cur_idle >= idle) -+ continue; -+ -+ idle = cur_idle; -+ entry->data.ib1 &= ~MTK_FOE_IB1_BIND_TIMESTAMP; -+ entry->data.ib1 |= hwe->ib1 & MTK_FOE_IB1_BIND_TIMESTAMP; -+ } -+} -+ -+static void - mtk_flow_entry_update(struct mtk_ppe *ppe, struct mtk_flow_entry *entry) - { - struct mtk_foe_entry *hwe; - struct mtk_foe_entry foe; - - spin_lock_bh(&ppe_lock); -+ -+ if (entry->type == MTK_FLOW_TYPE_L2) { -+ mtk_flow_entry_update_l2(ppe, entry); -+ goto out; -+ } -+ - if (entry->hash == 0xffff) - goto out; - -@@ -419,21 +524,28 @@ __mtk_foe_entry_commit(struct mtk_ppe *p - void mtk_foe_entry_clear(struct mtk_ppe *ppe, struct mtk_flow_entry *entry) - { - spin_lock_bh(&ppe_lock); -- hlist_del_init(&entry->list); -- if (entry->hash != 0xffff) { -- ppe->foe_table[entry->hash].ib1 &= ~MTK_FOE_IB1_STATE; -- ppe->foe_table[entry->hash].ib1 |= FIELD_PREP(MTK_FOE_IB1_STATE, -- MTK_FOE_STATE_BIND); -- dma_wmb(); -- } -- entry->hash = 0xffff; -+ __mtk_foe_entry_clear(ppe, entry); - spin_unlock_bh(&ppe_lock); - } - -+static int -+mtk_foe_entry_commit_l2(struct mtk_ppe *ppe, struct mtk_flow_entry *entry) -+{ -+ entry->type = MTK_FLOW_TYPE_L2; -+ -+ return rhashtable_insert_fast(&ppe->l2_flows, &entry->l2_node, -+ mtk_flow_l2_ht_params); -+} -+ - int mtk_foe_entry_commit(struct mtk_ppe *ppe, struct mtk_flow_entry *entry) - { -- u32 hash = mtk_ppe_hash_entry(&entry->data); -+ int type = FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, entry->data.ib1); -+ u32 hash; -+ -+ if (type == MTK_PPE_PKT_TYPE_BRIDGE) -+ return mtk_foe_entry_commit_l2(ppe, entry); - -+ hash = mtk_ppe_hash_entry(&entry->data); - entry->hash = 0xffff; - spin_lock_bh(&ppe_lock); - hlist_add_head(&entry->list, &ppe->foe_flow[hash / 2]); -@@ -442,18 +554,72 @@ int mtk_foe_entry_commit(struct mtk_ppe - return 0; - } - -+static void -+mtk_foe_entry_commit_subflow(struct mtk_ppe *ppe, struct mtk_flow_entry *entry, -+ u16 hash) -+{ -+ struct mtk_flow_entry *flow_info; -+ struct mtk_foe_entry foe, *hwe; -+ struct mtk_foe_mac_info *l2; -+ u32 ib1_mask = MTK_FOE_IB1_PACKET_TYPE | MTK_FOE_IB1_UDP; -+ int type; -+ -+ flow_info = kzalloc(offsetof(struct mtk_flow_entry, l2_data.end), -+ GFP_ATOMIC); -+ if (!flow_info) -+ return; -+ -+ flow_info->l2_data.base_flow = entry; -+ flow_info->type = MTK_FLOW_TYPE_L2_SUBFLOW; -+ flow_info->hash = hash; -+ hlist_add_head(&flow_info->list, &ppe->foe_flow[hash / 2]); -+ hlist_add_head(&flow_info->l2_data.list, &entry->l2_flows); -+ -+ hwe = &ppe->foe_table[hash]; -+ memcpy(&foe, hwe, sizeof(foe)); -+ foe.ib1 &= ib1_mask; -+ foe.ib1 |= entry->data.ib1 & ~ib1_mask; -+ -+ l2 = mtk_foe_entry_l2(&foe); -+ memcpy(l2, &entry->data.bridge.l2, sizeof(*l2)); -+ -+ type = FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, foe.ib1); -+ if (type == MTK_PPE_PKT_TYPE_IPV4_HNAPT) -+ memcpy(&foe.ipv4.new, &foe.ipv4.orig, sizeof(foe.ipv4.new)); -+ else if (type >= MTK_PPE_PKT_TYPE_IPV6_ROUTE_3T && l2->etype == ETH_P_IP) -+ l2->etype = ETH_P_IPV6; -+ -+ *mtk_foe_entry_ib2(&foe) = entry->data.bridge.ib2; -+ -+ __mtk_foe_entry_commit(ppe, &foe, hash); -+} -+ - void __mtk_ppe_check_skb(struct mtk_ppe *ppe, struct sk_buff *skb, u16 hash) - { - struct hlist_head *head = &ppe->foe_flow[hash / 2]; -- struct mtk_flow_entry *entry; - struct mtk_foe_entry *hwe = &ppe->foe_table[hash]; -+ struct mtk_flow_entry *entry; -+ struct mtk_foe_bridge key = {}; -+ struct ethhdr *eh; - bool found = false; -- -- if (hlist_empty(head)) -- return; -+ u8 *tag; - - spin_lock_bh(&ppe_lock); -+ -+ if (FIELD_GET(MTK_FOE_IB1_STATE, hwe->ib1) == MTK_FOE_STATE_BIND) -+ goto out; -+ - hlist_for_each_entry(entry, head, list) { -+ if (entry->type == MTK_FLOW_TYPE_L2_SUBFLOW) { -+ if (unlikely(FIELD_GET(MTK_FOE_IB1_STATE, hwe->ib1) == -+ MTK_FOE_STATE_BIND)) -+ continue; -+ -+ entry->hash = 0xffff; -+ __mtk_foe_entry_clear(ppe, entry); -+ continue; -+ } -+ - if (found || !mtk_flow_entry_match(entry, hwe)) { - if (entry->hash != 0xffff) - entry->hash = 0xffff; -@@ -464,21 +630,50 @@ void __mtk_ppe_check_skb(struct mtk_ppe - __mtk_foe_entry_commit(ppe, &entry->data, hash); - found = true; - } -+ -+ if (found) -+ goto out; -+ -+ eh = eth_hdr(skb); -+ ether_addr_copy(key.dest_mac, eh->h_dest); -+ ether_addr_copy(key.src_mac, eh->h_source); -+ tag = skb->data - 2; -+ key.vlan = 0; -+ switch (skb->protocol) { -+#if IS_ENABLED(CONFIG_NET_DSA) -+ case htons(ETH_P_XDSA): -+ if (!netdev_uses_dsa(skb->dev) || -+ skb->dev->dsa_ptr->tag_ops->proto != DSA_TAG_PROTO_MTK) -+ goto out; -+ -+ tag += 4; -+ if (get_unaligned_be16(tag) != ETH_P_8021Q) -+ break; -+ -+ fallthrough; -+#endif -+ case htons(ETH_P_8021Q): -+ key.vlan = get_unaligned_be16(tag + 2) & VLAN_VID_MASK; -+ break; -+ default: -+ break; -+ } -+ -+ entry = rhashtable_lookup_fast(&ppe->l2_flows, &key, mtk_flow_l2_ht_params); -+ if (!entry) -+ goto out; -+ -+ mtk_foe_entry_commit_subflow(ppe, entry, hash); -+ -+out: - spin_unlock_bh(&ppe_lock); - } - - int mtk_foe_entry_idle_time(struct mtk_ppe *ppe, struct mtk_flow_entry *entry) - { -- u16 now = mtk_eth_timestamp(ppe->eth) & MTK_FOE_IB1_BIND_TIMESTAMP; -- u16 timestamp; -- - mtk_flow_entry_update(ppe, entry); -- timestamp = entry->data.ib1 & MTK_FOE_IB1_BIND_TIMESTAMP; - -- if (timestamp > now) -- return MTK_FOE_IB1_BIND_TIMESTAMP + 1 - timestamp + now; -- else -- return now - timestamp; -+ return __mtk_foe_entry_idle_time(ppe, entry->data.ib1); - } - - struct mtk_ppe *mtk_ppe_init(struct mtk_eth *eth, void __iomem *base, -@@ -492,6 +687,8 @@ struct mtk_ppe *mtk_ppe_init(struct mtk_ - if (!ppe) - return NULL; - -+ rhashtable_init(&ppe->l2_flows, &mtk_flow_l2_ht_params); -+ - /* need to allocate a separate device, since it PPE DMA access is - * not coherent. - */ ---- a/drivers/net/ethernet/mediatek/mtk_ppe.h -+++ b/drivers/net/ethernet/mediatek/mtk_ppe.h -@@ -6,6 +6,7 @@ - - #include - #include -+#include - - #define MTK_ETH_PPE_BASE 0xc00 - -@@ -84,19 +85,16 @@ struct mtk_foe_mac_info { - u16 src_mac_lo; - }; - -+/* software-only entry type */ - struct mtk_foe_bridge { -- u32 dest_mac_hi; -- -- u16 src_mac_lo; -- u16 dest_mac_lo; -+ u8 dest_mac[ETH_ALEN]; -+ u8 src_mac[ETH_ALEN]; -+ u16 vlan; - -- u32 src_mac_hi; -+ struct {} key_end; - - u32 ib2; - -- u32 _rsv[5]; -- -- u32 udf_tsid; - struct mtk_foe_mac_info l2; - }; - -@@ -235,13 +233,33 @@ enum { - MTK_PPE_CPU_REASON_INVALID = 0x1f, - }; - -+enum { -+ MTK_FLOW_TYPE_L4, -+ MTK_FLOW_TYPE_L2, -+ MTK_FLOW_TYPE_L2_SUBFLOW, -+}; -+ - struct mtk_flow_entry { -+ union { -+ struct hlist_node list; -+ struct { -+ struct rhash_head l2_node; -+ struct hlist_head l2_flows; -+ }; -+ }; -+ u8 type; -+ s8 wed_index; -+ u16 hash; -+ union { -+ struct mtk_foe_entry data; -+ struct { -+ struct mtk_flow_entry *base_flow; -+ struct hlist_node list; -+ struct {} end; -+ } l2_data; -+ }; - struct rhash_head node; -- struct hlist_node list; - unsigned long cookie; -- struct mtk_foe_entry data; -- u16 hash; -- s8 wed_index; - }; - - struct mtk_ppe { -@@ -256,6 +274,8 @@ struct mtk_ppe { - u16 foe_check_time[MTK_PPE_ENTRIES]; - struct hlist_head foe_flow[MTK_PPE_ENTRIES / 2]; - -+ struct rhashtable l2_flows; -+ - void *acct_table; - }; - ---- a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c -+++ b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c -@@ -31,6 +31,8 @@ struct mtk_flow_data { - __be16 src_port; - __be16 dst_port; - -+ u16 vlan_in; -+ - struct { - u16 id; - __be16 proto; -@@ -260,9 +262,45 @@ mtk_flow_offload_replace(struct mtk_eth - return -EOPNOTSUPP; - } - -+ switch (addr_type) { -+ case 0: -+ offload_type = MTK_PPE_PKT_TYPE_BRIDGE; -+ if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) { -+ struct flow_match_eth_addrs match; -+ -+ flow_rule_match_eth_addrs(rule, &match); -+ memcpy(data.eth.h_dest, match.key->dst, ETH_ALEN); -+ memcpy(data.eth.h_source, match.key->src, ETH_ALEN); -+ } else { -+ return -EOPNOTSUPP; -+ } -+ -+ if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_VLAN)) { -+ struct flow_match_vlan match; -+ -+ flow_rule_match_vlan(rule, &match); -+ -+ if (match.key->vlan_tpid != cpu_to_be16(ETH_P_8021Q)) -+ return -EOPNOTSUPP; -+ -+ data.vlan_in = match.key->vlan_id; -+ } -+ break; -+ case FLOW_DISSECTOR_KEY_IPV4_ADDRS: -+ offload_type = MTK_PPE_PKT_TYPE_IPV4_HNAPT; -+ break; -+ case FLOW_DISSECTOR_KEY_IPV6_ADDRS: -+ offload_type = MTK_PPE_PKT_TYPE_IPV6_ROUTE_5T; -+ break; -+ default: -+ return -EOPNOTSUPP; -+ } -+ - flow_action_for_each(i, act, &rule->action) { - switch (act->id) { - case FLOW_ACTION_MANGLE: -+ if (offload_type == MTK_PPE_PKT_TYPE_BRIDGE) -+ return -EOPNOTSUPP; - if (act->mangle.htype == FLOW_ACT_MANGLE_HDR_TYPE_ETH) - mtk_flow_offload_mangle_eth(act, &data.eth); - break; -@@ -294,17 +332,6 @@ mtk_flow_offload_replace(struct mtk_eth - } - } - -- switch (addr_type) { -- case FLOW_DISSECTOR_KEY_IPV4_ADDRS: -- offload_type = MTK_PPE_PKT_TYPE_IPV4_HNAPT; -- break; -- case FLOW_DISSECTOR_KEY_IPV6_ADDRS: -- offload_type = MTK_PPE_PKT_TYPE_IPV6_ROUTE_5T; -- break; -- default: -- return -EOPNOTSUPP; -- } -- - if (!is_valid_ether_addr(data.eth.h_source) || - !is_valid_ether_addr(data.eth.h_dest)) - return -EINVAL; -@@ -318,10 +345,13 @@ mtk_flow_offload_replace(struct mtk_eth - if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_PORTS)) { - struct flow_match_ports ports; - -+ if (offload_type == MTK_PPE_PKT_TYPE_BRIDGE) -+ return -EOPNOTSUPP; -+ - flow_rule_match_ports(rule, &ports); - data.src_port = ports.key->src; - data.dst_port = ports.key->dst; -- } else { -+ } else if (offload_type != MTK_PPE_PKT_TYPE_BRIDGE) { - return -EOPNOTSUPP; - } - -@@ -351,6 +381,9 @@ mtk_flow_offload_replace(struct mtk_eth - if (act->id != FLOW_ACTION_MANGLE) - continue; - -+ if (offload_type == MTK_PPE_PKT_TYPE_BRIDGE) -+ return -EOPNOTSUPP; -+ - switch (act->mangle.htype) { - case FLOW_ACT_MANGLE_HDR_TYPE_TCP: - case FLOW_ACT_MANGLE_HDR_TYPE_UDP: -@@ -376,6 +409,9 @@ mtk_flow_offload_replace(struct mtk_eth - return err; - } - -+ if (offload_type == MTK_PPE_PKT_TYPE_BRIDGE) -+ foe.bridge.vlan = data.vlan_in; -+ - if (data.vlan.num == 1) { - if (data.vlan.proto != htons(ETH_P_8021Q)) - return -EOPNOTSUPP; diff --git a/target/linux/generic/pending-5.18/702-net-ethernet-mtk_eth_soc-enable-threaded-NAPI.patch b/target/linux/generic/pending-5.18/702-net-ethernet-mtk_eth_soc-enable-threaded-NAPI.patch deleted file mode 100644 index 61d5df19f3862c..00000000000000 --- a/target/linux/generic/pending-5.18/702-net-ethernet-mtk_eth_soc-enable-threaded-NAPI.patch +++ /dev/null @@ -1,41 +0,0 @@ -From: Felix Fietkau -Date: Mon, 21 Mar 2022 20:39:59 +0100 -Subject: [PATCH] net: ethernet: mtk_eth_soc: enable threaded NAPI - -This can improve performance under load by ensuring that NAPI processing is -not pinned on CPU 0. - -Signed-off-by: Felix Fietkau ---- - ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -2164,8 +2164,8 @@ static irqreturn_t mtk_handle_irq_rx(int - - eth->rx_events++; - if (likely(napi_schedule_prep(ð->rx_napi))) { -- __napi_schedule(ð->rx_napi); - mtk_rx_irq_disable(eth, MTK_RX_DONE_INT); -+ __napi_schedule(ð->rx_napi); - } - - return IRQ_HANDLED; -@@ -2177,8 +2177,8 @@ static irqreturn_t mtk_handle_irq_tx(int - - eth->tx_events++; - if (likely(napi_schedule_prep(ð->tx_napi))) { -- __napi_schedule(ð->tx_napi); - mtk_tx_irq_disable(eth, MTK_TX_DONE_INT); -+ __napi_schedule(ð->tx_napi); - } - - return IRQ_HANDLED; -@@ -3317,6 +3317,8 @@ static int mtk_probe(struct platform_dev - * for NAPI to work - */ - init_dummy_netdev(ð->dummy_dev); -+ eth->dummy_dev.threaded = 1; -+ strcpy(eth->dummy_dev.name, "mtk_eth"); - netif_napi_add(ð->dummy_dev, ð->tx_napi, mtk_napi_tx, - MTK_NAPI_WEIGHT); - netif_napi_add(ð->dummy_dev, ð->rx_napi, mtk_napi_rx, diff --git a/target/linux/generic/pending-5.18/703-phy-add-detach-callback-to-struct-phy_driver.patch b/target/linux/generic/pending-5.18/703-phy-add-detach-callback-to-struct-phy_driver.patch deleted file mode 100644 index 2d1d9ffaf651e7..00000000000000 --- a/target/linux/generic/pending-5.18/703-phy-add-detach-callback-to-struct-phy_driver.patch +++ /dev/null @@ -1,38 +0,0 @@ -From: Gabor Juhos -Subject: generic: add detach callback to struct phy_driver - -lede-commit: fe61fc2d7d0b3fb348b502f68f98243b3ddf5867 - -Signed-off-by: Gabor Juhos ---- - drivers/net/phy/phy_device.c | 3 +++ - include/linux/phy.h | 6 ++++++ - 2 files changed, 9 insertions(+) - ---- a/drivers/net/phy/phy_device.c -+++ b/drivers/net/phy/phy_device.c -@@ -1738,6 +1738,9 @@ void phy_detach(struct phy_device *phyde - struct module *ndev_owner = NULL; - struct mii_bus *bus; - -+ if (phydev->drv && phydev->drv->detach) -+ phydev->drv->detach(phydev); -+ - if (phydev->sysfs_links) { - if (dev) - sysfs_remove_link(&dev->dev.kobj, "phydev"); ---- a/include/linux/phy.h -+++ b/include/linux/phy.h -@@ -824,6 +824,12 @@ struct phy_driver { - /** @handle_interrupt: Override default interrupt handling */ - irqreturn_t (*handle_interrupt)(struct phy_device *phydev); - -+ /* -+ * Called before an ethernet device is detached -+ * from the PHY. -+ */ -+ void (*detach)(struct phy_device *phydev); -+ - /** @remove: Clears up any memory if needed */ - void (*remove)(struct phy_device *phydev); - diff --git a/target/linux/generic/pending-5.18/735-net-phy-at803x-fix-at8033-sgmii-mode.patch b/target/linux/generic/pending-5.18/735-net-phy-at803x-fix-at8033-sgmii-mode.patch deleted file mode 100644 index 8fc90aeb950630..00000000000000 --- a/target/linux/generic/pending-5.18/735-net-phy-at803x-fix-at8033-sgmii-mode.patch +++ /dev/null @@ -1,51 +0,0 @@ -From: Roman Yeryomin -Subject: kernel: add at803x fix for sgmii mode - -Some (possibly broken) bootloaders incorreclty initialize at8033 -phy. This patch enables sgmii autonegotiation mode. - -[john@phrozen.org: felix added this to his upstream queue] - -Signed-off-by: Roman Yeryomin ---- - drivers/net/phy/at803x.c | 25 +++++++++++++++++++++++++ - 1 file changed, 25 insertions(+) - ---- a/drivers/net/phy/at803x.c -+++ b/drivers/net/phy/at803x.c -@@ -84,6 +84,7 @@ - #define AT803X_LOC_MAC_ADDR_32_47_OFFSET 0x804A - #define AT803X_REG_CHIP_CONFIG 0x1f - #define AT803X_BT_BX_REG_SEL 0x8000 -+#define AT803X_SGMII_ANEG_EN 0x1000 - - #define AT803X_DEBUG_ADDR 0x1D - #define AT803X_DEBUG_DATA 0x1E -@@ -946,6 +947,27 @@ static int at803x_smarteee_config(struct - struct at803x_priv *priv = phydev->priv; - u16 mask = 0, val = 0; - int ret; -+ u32 v; -+ -+ if (phydev->drv->phy_id == ATH8031_PHY_ID && -+ phydev->interface == PHY_INTERFACE_MODE_SGMII) -+ { -+ v = phy_read(phydev, AT803X_REG_CHIP_CONFIG); -+ /* select SGMII/fiber page */ -+ ret = phy_write(phydev, AT803X_REG_CHIP_CONFIG, -+ v & ~AT803X_BT_BX_REG_SEL); -+ if (ret) -+ return ret; -+ /* enable SGMII autonegotiation */ -+ ret = phy_write(phydev, MII_BMCR, AT803X_SGMII_ANEG_EN); -+ if (ret) -+ return ret; -+ /* select copper page */ -+ ret = phy_write(phydev, AT803X_REG_CHIP_CONFIG, -+ v | AT803X_BT_BX_REG_SEL); -+ if (ret) -+ return ret; -+ } - - if (priv->flags & AT803X_DISABLE_SMARTEEE) - return phy_modify_mmd(phydev, MDIO_MMD_PCS, diff --git a/target/linux/generic/pending-5.18/760-net-dsa-mv88e6xxx-fix-vlan-setup.patch b/target/linux/generic/pending-5.18/760-net-dsa-mv88e6xxx-fix-vlan-setup.patch deleted file mode 100644 index e7a5283cc7f25d..00000000000000 --- a/target/linux/generic/pending-5.18/760-net-dsa-mv88e6xxx-fix-vlan-setup.patch +++ /dev/null @@ -1,27 +0,0 @@ -From a1b291f3f6c80a6c5ccad7283fc472d77a2a4763 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Sun, 22 Dec 2019 12:40:11 +0000 -Subject: [PATCH] net: dsa: mv88e6xxx: fix vlan setup - -Provide an option that drivers can set to indicate they want to receive -vlan configuration even when vlan filtering is disabled. This is safe -for Marvell DSA bridges, which do not look up ingress traffic in the -VTU if the port is in 8021Q disabled state. Whether this change is -suitable for all DSA bridges is not known. - -Signed-off-by: Russell King -Signed-off-by: DENG Qingfang ---- - drivers/net/dsa/mv88e6xxx/chip.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/drivers/net/dsa/mv88e6xxx/chip.c -+++ b/drivers/net/dsa/mv88e6xxx/chip.c -@@ -3654,6 +3654,7 @@ static int mv88e6xxx_setup(struct dsa_sw - - chip->ds = ds; - ds->slave_mii_bus = mv88e6xxx_default_mdio_bus(chip); -+ ds->configure_vlan_while_not_filtering = true; - - /* Since virtual bridges are mapped in the PVT, the number we support - * depends on the physical switch topology. We need to let DSA figure diff --git a/target/linux/generic/pending-5.18/761-net-dsa-mt7530-Support-EEE-features.patch b/target/linux/generic/pending-5.18/761-net-dsa-mt7530-Support-EEE-features.patch deleted file mode 100644 index 2a5009793f457a..00000000000000 --- a/target/linux/generic/pending-5.18/761-net-dsa-mt7530-Support-EEE-features.patch +++ /dev/null @@ -1,103 +0,0 @@ -From 9cfb2d426c38272f245e9e6f62b3552d1ed5852b Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Ren=C3=A9=20van=20Dorst?= -Date: Tue, 21 Apr 2020 00:18:08 +0200 -Subject: [PATCH] net: dsa: mt7530: Support EEE features -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: René van Dorst ---- a/drivers/net/dsa/mt7530.c -+++ b/drivers/net/dsa/mt7530.c -@@ -2833,9 +2833,13 @@ static void mt753x_phylink_mac_link_up(s - switch (speed) { - case SPEED_1000: - mcr |= PMCR_FORCE_SPEED_1000; -+ if (priv->eee_enable & BIT(port)) -+ mcr |= PMCR_FORCE_EEE1G; - break; - case SPEED_100: - mcr |= PMCR_FORCE_SPEED_100; -+ if (priv->eee_enable & BIT(port)) -+ mcr |= PMCR_FORCE_EEE100; - break; - } - if (duplex == DUPLEX_FULL) { -@@ -3112,6 +3116,54 @@ static int mt753x_set_mac_eee(struct dsa - - return 0; - } -+ -+static int mt7530_get_mac_eee(struct dsa_switch *ds, int port, -+ struct ethtool_eee *e) -+{ -+ struct mt7530_priv *priv = ds->priv; -+ u32 eeecr, pmsr; -+ -+ e->eee_enabled = !!(priv->eee_enable & BIT(port)); -+ -+ if (e->eee_enabled) { -+ eeecr = mt7530_read(priv, MT7530_PMEEECR_P(port)); -+ e->tx_lpi_enabled = !(eeecr & LPI_MODE_EN); -+ e->tx_lpi_timer = (eeecr >> 4) & 0xFFF; -+ pmsr = mt7530_read(priv, MT7530_PMSR_P(port)); -+ e->eee_active = e->eee_enabled && !!(pmsr & PMSR_EEE1G); -+ } else { -+ e->tx_lpi_enabled = 0; -+ e->tx_lpi_timer = 0; -+ e->eee_active = 0; -+ } -+ -+ return 0; -+} -+ -+static int mt7530_set_mac_eee(struct dsa_switch *ds, int port, -+ struct ethtool_eee *e) -+{ -+ struct mt7530_priv *priv = ds->priv; -+ u32 eeecr; -+ -+ if (e->tx_lpi_enabled && e->tx_lpi_timer > 0xFFF) -+ return -EINVAL; -+ -+ if (e->eee_enabled) { -+ priv->eee_enable |= BIT(port); -+ //MT7530_PMEEECR_P -+ eeecr = mt7530_read(priv, MT7530_PMEEECR_P(port)); -+ eeecr &= 0xFFFF0000; -+ if (!e->tx_lpi_enabled) -+ eeecr |= LPI_MODE_EN; -+ eeecr = LPI_THRESH(e->tx_lpi_timer); -+ mt7530_write(priv, MT7530_PMEEECR_P(port), eeecr); -+ } else { -+ priv->eee_enable &= ~(BIT(port)); -+ } -+ -+ return 0; -+} - - static const struct dsa_switch_ops mt7530_switch_ops = { - .get_tag_protocol = mtk_get_tag_protocol, ---- a/drivers/net/dsa/mt7530.h -+++ b/drivers/net/dsa/mt7530.h -@@ -346,6 +346,12 @@ enum mt7530_vlan_port_acc_frm { - #define MAX_RX_PKT_LEN_1552 0x2 - #define MAX_RX_PKT_LEN_JUMBO 0x3 - -+#define MT7530_PMEEECR_P(x) (0x3004 + (x) * 0x100) -+#define WAKEUP_TIME_1000(x) ((x & 0xFF) << 24) -+#define WAKEUP_TIME_100(x) ((x & 0xFF) << 16) -+#define LPI_THRESH(x) ((x & 0xFFF) << 4) -+#define LPI_MODE_EN BIT(0) -+ - /* Register for MIB */ - #define MT7530_PORT_MIB_COUNTER(x) (0x4000 + (x) * 0x100) - #define MT7530_MIB_CCR 0x4fe0 -@@ -821,6 +827,7 @@ struct mt7530_priv { - unsigned int p5_intf_sel; - u8 mirror_rx; - u8 mirror_tx; -+ u8 eee_enable; - - struct mt7530_port ports[MT7530_NUM_PORTS]; - /* protect among processes for registers access*/ diff --git a/target/linux/generic/pending-5.18/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch b/target/linux/generic/pending-5.18/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch deleted file mode 100644 index 9233564829bdf3..00000000000000 --- a/target/linux/generic/pending-5.18/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch +++ /dev/null @@ -1,27 +0,0 @@ -From: Tobias Waldekranz -Subject: [RFC net-next 7/7] net: dsa: mv88e6xxx: Request assisted learning on CPU port -Date: Sat, 16 Jan 2021 02:25:15 +0100 -Archived-At: - -While the hardware is capable of performing learning on the CPU port, -it requires alot of additions to the bridge's forwarding path in order -to handle multi-destination traffic correctly. - -Until that is in place, opt for the next best thing and let DSA sync -the relevant addresses down to the hardware FDB. - -Signed-off-by: Tobias Waldekranz ---- - drivers/net/dsa/mv88e6xxx/chip.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/drivers/net/dsa/mv88e6xxx/chip.c -+++ b/drivers/net/dsa/mv88e6xxx/chip.c -@@ -6873,6 +6873,7 @@ static int mv88e6xxx_register_switch(str - ds->ops = &mv88e6xxx_switch_ops; - ds->ageing_time_min = chip->info->age_time_coeff; - ds->ageing_time_max = chip->info->age_time_coeff * U8_MAX; -+ ds->assisted_learning_on_cpu_port = true; - - /* Some chips support up to 32, but that requires enabling the - * 5-bit port mode, which we do not support. 640k^W16 ought to diff --git a/target/linux/generic/pending-5.18/780-ARM-kirkwood-add-missing-linux-if_ether.h-for-ETH_AL.patch b/target/linux/generic/pending-5.18/780-ARM-kirkwood-add-missing-linux-if_ether.h-for-ETH_AL.patch deleted file mode 100644 index fcf7892c04e70f..00000000000000 --- a/target/linux/generic/pending-5.18/780-ARM-kirkwood-add-missing-linux-if_ether.h-for-ETH_AL.patch +++ /dev/null @@ -1,61 +0,0 @@ -From patchwork Thu Aug 5 22:23:30 2021 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Daniel Golle -X-Patchwork-Id: 12422209 -Date: Thu, 5 Aug 2021 23:23:30 +0100 -From: Daniel Golle -To: linux-arm-kernel@lists.infradead.org, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org -Cc: "David S. Miller" , Andrew Lunn , - Michael Walle -Subject: [PATCH] ARM: kirkwood: add missing for ETH_ALEN -Message-ID: -MIME-Version: 1.0 -Content-Disposition: inline -X-BeenThere: linux-arm-kernel@lists.infradead.org -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: -List-Archive: -Sender: "linux-arm-kernel" - -After commit 83216e3988cd1 ("of: net: pass the dst buffer to -of_get_mac_address()") build fails for kirkwood as ETH_ALEN is not -defined. - -arch/arm/mach-mvebu/kirkwood.c: In function 'kirkwood_dt_eth_fixup': -arch/arm/mach-mvebu/kirkwood.c:87:13: error: 'ETH_ALEN' undeclared (first use in this function); did you mean 'ESTALE'? - u8 tmpmac[ETH_ALEN]; - ^~~~~~~~ - ESTALE -arch/arm/mach-mvebu/kirkwood.c:87:13: note: each undeclared identifier is reported only once for each function it appears in -arch/arm/mach-mvebu/kirkwood.c:87:6: warning: unused variable 'tmpmac' [-Wunused-variable] - u8 tmpmac[ETH_ALEN]; - ^~~~~~ -make[5]: *** [scripts/Makefile.build:262: arch/arm/mach-mvebu/kirkwood.o] Error 1 -make[5]: *** Waiting for unfinished jobs.... - -Add missing #include to fix this. - -Cc: David S. Miller -Cc: Andrew Lunn -Cc: Michael Walle -Reported-by: https://buildbot.openwrt.org/master/images/#/builders/56/builds/220/steps/44/logs/stdio -Fixes: 83216e3988cd1 ("of: net: pass the dst buffer to of_get_mac_address()") -Signed-off-by: Daniel Golle ---- - arch/arm/mach-mvebu/kirkwood.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/arch/arm/mach-mvebu/kirkwood.c -+++ b/arch/arm/mach-mvebu/kirkwood.c -@@ -14,6 +14,7 @@ - #include - #include - #include -+#include - #include - #include - #include diff --git a/target/linux/generic/pending-5.18/800-bcma-get-SoC-device-struct-copy-its-DMA-params-to-th.patch b/target/linux/generic/pending-5.18/800-bcma-get-SoC-device-struct-copy-its-DMA-params-to-th.patch deleted file mode 100644 index 478a2cb27d8014..00000000000000 --- a/target/linux/generic/pending-5.18/800-bcma-get-SoC-device-struct-copy-its-DMA-params-to-th.patch +++ /dev/null @@ -1,73 +0,0 @@ -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Subject: [PATCH] bcma: get SoC device struct & copy its DMA params to the - subdevices -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -For bus devices to be fully usable it's required to set their DMA -parameters. - -For years it has been missing and remained unnoticed because of -mips_dma_alloc_coherent() silently handling the empty coherent_dma_mask. -Kernel 4.19 came with a lot of DMA changes and caused a regression on -the bcm47xx. Starting with the commit f8c55dc6e828 ("MIPS: use generic -dma noncoherent ops for simple noncoherent platforms") DMA coherent -allocations just fail. Example: -[ 1.114914] bgmac_bcma bcma0:2: Allocation of TX ring 0x200 failed -[ 1.121215] bgmac_bcma bcma0:2: Unable to alloc memory for DMA -[ 1.127626] bgmac_bcma: probe of bcma0:2 failed with error -12 -[ 1.133838] bgmac_bcma: Broadcom 47xx GBit MAC driver loaded - -This change fixes above regression in addition to the MIPS bcm47xx -commit 321c46b91550 ("MIPS: BCM47XX: Setup struct device for the SoC"). - -It also fixes another *old* GPIO regression caused by a parent pointing -to the NULL: -[ 0.157054] missing gpiochip .dev parent pointer -[ 0.157287] bcma: bus0: Error registering GPIO driver: -22 -introduced by the commit 74f4e0cc6108 ("bcma: switch GPIO portions to -use GPIOLIB_IRQCHIP"). - -Fixes: f8c55dc6e828 ("MIPS: use generic dma noncoherent ops for simple noncoherent platforms") -Fixes: 74f4e0cc6108 ("bcma: switch GPIO portions to use GPIOLIB_IRQCHIP") -Cc: linux-mips@linux-mips.org -Cc: Christoph Hellwig -Cc: Linus Walleij -Signed-off-by: Rafał Miłecki ---- - ---- a/drivers/bcma/host_soc.c -+++ b/drivers/bcma/host_soc.c -@@ -191,6 +191,8 @@ int __init bcma_host_soc_init(struct bcm - struct bcma_bus *bus = &soc->bus; - int err; - -+ bus->dev = soc->dev; -+ - /* Scan bus and initialize it */ - err = bcma_bus_early_register(bus); - if (err) ---- a/drivers/bcma/main.c -+++ b/drivers/bcma/main.c -@@ -236,13 +236,17 @@ EXPORT_SYMBOL(bcma_core_irq); - - void bcma_prepare_core(struct bcma_bus *bus, struct bcma_device *core) - { -- device_initialize(&core->dev); -+ struct device *dev = &core->dev; -+ -+ device_initialize(dev); - core->dev.release = bcma_release_core_dev; - core->dev.bus = &bcma_bus_type; -- dev_set_name(&core->dev, "bcma%d:%d", bus->num, core->core_index); -+ dev_set_name(dev, "bcma%d:%d", bus->num, core->core_index); - core->dev.parent = bus->dev; -- if (bus->dev) -+ if (bus->dev) { - bcma_of_fill_device(bus->dev, core); -+ dma_coerce_mask_and_coherent(dev, bus->dev->coherent_dma_mask); -+ } - - switch (bus->hosttype) { - case BCMA_HOSTTYPE_PCI: diff --git a/target/linux/generic/pending-5.18/801-gpio-gpio-cascade-add-generic-GPIO-cascade.patch b/target/linux/generic/pending-5.18/801-gpio-gpio-cascade-add-generic-GPIO-cascade.patch deleted file mode 100644 index e06728a280419b..00000000000000 --- a/target/linux/generic/pending-5.18/801-gpio-gpio-cascade-add-generic-GPIO-cascade.patch +++ /dev/null @@ -1,222 +0,0 @@ -From fc23ea48ba52c24f201fe5ca0132ee1a3de5a70a Mon Sep 17 00:00:00 2001 -From: Mauri Sandberg -Date: Thu, 25 Mar 2021 11:48:05 +0200 -Subject: [PATCH 2/2] gpio: gpio-cascade: add generic GPIO cascade - -Adds support for building cascades of GPIO lines. That is, it allows -setups when there is one upstream line and multiple cascaded lines, out -of which one can be chosen at a time. The status of the upstream line -can be conveyed to the selected cascaded line or, vice versa, the status -of the cascaded line can be conveyed to the upstream line. - -A multiplexer is being used to select, which cascaded GPIO line is being -used at any given time. - -At the moment only input direction is supported. In future it should be -possible to add support for output direction, too. - -Signed-off-by: Mauri Sandberg -Reviewed-by: Linus Walleij -Reviewed-by: Andy Shevchenko ---- -v7 -> v8: - - rearrange members in struct gpio_cascade - - cosmetic changes in file header and in one function declaration - - added Reviewed-by tags by Linus and Andy -v6 -> v7: - - In Kconfig add info about module name - - adhere to new convention that allows lines longer than 80 chars - - use dev_probe_err with upstream gpio line too - - refactor for cleaner exit of probe function. -v5 -> v6: - - In Kconfig, remove dependency to OF_GPIO and select only MULTIPLEXER - - refactor code preferring one-liners - - clean up prints, removing them from success-path. - - don't explicitly set gpio_chip.of_node as it's done in the GPIO library - - use devm_gpiochip_add_data instead of gpiochip_add -v4 -> v5: - - renamed gpio-mux-input -> gpio-cascade. refactored code accordingly - here and there and changed to use new bindings and compatible string - - ambigious and vague 'pin' was rename to 'upstream_line' - - dropped Tested-by and Reviewed-by due to changes in bindings - - dropped Reported-by suggested by an automatic bot as it was not really - appropriate to begin with - - functionally it's the same as v4 -v3 -> v4: - - Changed author email - - Included Tested-by and Reviewed-by from Drew -v2 -> v3: - - use managed device resources - - update Kconfig description -v1 -> v2: - - removed .owner from platform_driver as per test bot's instruction - - added MODULE_AUTHOR, MODULE_DESCRIPTION, MODULE_LICENSE - - added gpio_mux_input_get_direction as it's recommended for all chips - - removed because this is input only chip: gpio_mux_input_set_value - - removed because they are not needed for input/output only chips: - gpio_mux_input_direction_input - gpio_mux_input_direction_output - - fixed typo in an error message - - added info message about successful registration - - removed can_sleep flag as this does not sleep while getting GPIO value - like I2C or SPI do - - Updated description in Kconfig ---- - drivers/gpio/Kconfig | 15 +++++ - drivers/gpio/Makefile | 1 + - drivers/gpio/gpio-cascade.c | 117 ++++++++++++++++++++++++++++++++++++ - 3 files changed, 133 insertions(+) - create mode 100644 drivers/gpio/gpio-cascade.c - ---- a/drivers/gpio/Kconfig -+++ b/drivers/gpio/Kconfig -@@ -1709,4 +1709,19 @@ config GPIO_SIM - - endmenu - -+comment "Other GPIO expanders" -+ -+config GPIO_CASCADE -+ tristate "General GPIO cascade" -+ select MULTIPLEXER -+ help -+ Say yes here to enable support for generic GPIO cascade. -+ -+ This allows building one-to-many cascades of GPIO lines using -+ different types of multiplexers readily available. At the -+ moment only input lines are supported. -+ -+ To build the driver as a module choose 'm' and the resulting module -+ will be called 'gpio-cascade'. -+ - endif ---- a/drivers/gpio/Makefile -+++ b/drivers/gpio/Makefile -@@ -44,6 +44,7 @@ obj-$(CONFIG_GPIO_BD9571MWV) += gpio-bd - obj-$(CONFIG_GPIO_BRCMSTB) += gpio-brcmstb.o - obj-$(CONFIG_GPIO_BT8XX) += gpio-bt8xx.o - obj-$(CONFIG_GPIO_CADENCE) += gpio-cadence.o -+obj-$(CONFIG_GPIO_CASCADE) += gpio-cascade.o - obj-$(CONFIG_GPIO_CLPS711X) += gpio-clps711x.o - obj-$(CONFIG_GPIO_SNPS_CREG) += gpio-creg-snps.o - obj-$(CONFIG_GPIO_CRYSTAL_COVE) += gpio-crystalcove.o ---- /dev/null -+++ b/drivers/gpio/gpio-cascade.c -@@ -0,0 +1,117 @@ -+// SPDX-License-Identifier: GPL-2.0-only -+/* -+ * A generic GPIO cascade driver -+ * -+ * Copyright (C) 2021 Mauri Sandberg -+ * -+ * This allows building cascades of GPIO lines in a manner illustrated -+ * below: -+ * -+ * /|---- Cascaded GPIO line 0 -+ * Upstream | |---- Cascaded GPIO line 1 -+ * GPIO line ----+ | . -+ * | | . -+ * \|---- Cascaded GPIO line n -+ * -+ * A multiplexer is being used to select, which cascaded line is being -+ * addressed at any given time. -+ * -+ * At the moment only input mode is supported due to lack of means for -+ * testing output functionality. At least theoretically output should be -+ * possible with open drain constructions. -+ */ -+ -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+struct gpio_cascade { -+ struct gpio_chip gpio_chip; -+ struct device *parent; -+ struct mux_control *mux_control; -+ struct gpio_desc *upstream_line; -+}; -+ -+static struct gpio_cascade *chip_to_cascade(struct gpio_chip *gc) -+{ -+ return container_of(gc, struct gpio_cascade, gpio_chip); -+} -+ -+static int gpio_cascade_get_direction(struct gpio_chip *gc, unsigned int offset) -+{ -+ return GPIO_LINE_DIRECTION_IN; -+} -+ -+static int gpio_cascade_get_value(struct gpio_chip *gc, unsigned int offset) -+{ -+ struct gpio_cascade *cas = chip_to_cascade(gc); -+ int ret; -+ -+ ret = mux_control_select(cas->mux_control, offset); -+ if (ret) -+ return ret; -+ -+ ret = gpiod_get_value(cas->upstream_line); -+ mux_control_deselect(cas->mux_control); -+ return ret; -+} -+ -+static int gpio_cascade_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct gpio_cascade *cas; -+ struct mux_control *mc; -+ struct gpio_desc *upstream; -+ struct gpio_chip *gc; -+ -+ cas = devm_kzalloc(dev, sizeof(*cas), GFP_KERNEL); -+ if (!cas) -+ return -ENOMEM; -+ -+ mc = devm_mux_control_get(dev, NULL); -+ if (IS_ERR(mc)) -+ return dev_err_probe(dev, PTR_ERR(mc), "unable to get mux-control\n"); -+ -+ cas->mux_control = mc; -+ upstream = devm_gpiod_get(dev, "upstream", GPIOD_IN); -+ if (IS_ERR(upstream)) -+ return dev_err_probe(dev, PTR_ERR(upstream), "unable to claim upstream GPIO line\n"); -+ -+ cas->upstream_line = upstream; -+ cas->parent = dev; -+ -+ gc = &cas->gpio_chip; -+ gc->get = gpio_cascade_get_value; -+ gc->get_direction = gpio_cascade_get_direction; -+ gc->base = -1; -+ gc->ngpio = mux_control_states(mc); -+ gc->label = dev_name(cas->parent); -+ gc->parent = cas->parent; -+ gc->owner = THIS_MODULE; -+ -+ platform_set_drvdata(pdev, cas); -+ return devm_gpiochip_add_data(dev, &cas->gpio_chip, NULL); -+} -+ -+static const struct of_device_id gpio_cascade_id[] = { -+ { .compatible = "gpio-cascade" }, -+ { /* sentinel */ } -+}; -+MODULE_DEVICE_TABLE(of, gpio_cascade_id); -+ -+static struct platform_driver gpio_cascade_driver = { -+ .driver = { -+ .name = "gpio-cascade", -+ .of_match_table = gpio_cascade_id, -+ }, -+ .probe = gpio_cascade_probe, -+}; -+module_platform_driver(gpio_cascade_driver); -+ -+MODULE_AUTHOR("Mauri Sandberg "); -+MODULE_DESCRIPTION("Generic GPIO cascade"); -+MODULE_LICENSE("GPL"); diff --git a/target/linux/generic/pending-5.18/810-pci_disable_common_quirks.patch b/target/linux/generic/pending-5.18/810-pci_disable_common_quirks.patch deleted file mode 100644 index 3f444e44f8e35d..00000000000000 --- a/target/linux/generic/pending-5.18/810-pci_disable_common_quirks.patch +++ /dev/null @@ -1,62 +0,0 @@ -From: Gabor Juhos -Subject: debloat: add kernel config option to disabling common PCI quirks - -Signed-off-by: Gabor Juhos ---- - drivers/pci/Kconfig | 6 ++++++ - drivers/pci/quirks.c | 6 ++++++ - 2 files changed, 12 insertions(+) - ---- a/drivers/pci/Kconfig -+++ b/drivers/pci/Kconfig -@@ -118,6 +118,13 @@ config XEN_PCIDEV_FRONTEND - The PCI device frontend driver allows the kernel to import arbitrary - PCI devices from a PCI backend to support PCI driver domains. - -+config PCI_DISABLE_COMMON_QUIRKS -+ bool "PCI disable common quirks" -+ depends on PCI -+ help -+ If you don't know what to do here, say N. -+ -+ - config PCI_ATS - bool - ---- a/drivers/pci/quirks.c -+++ b/drivers/pci/quirks.c -@@ -207,6 +207,7 @@ static void quirk_mmio_always_on(struct - DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_ANY_ID, PCI_ANY_ID, - PCI_CLASS_BRIDGE_HOST, 8, quirk_mmio_always_on); - -+#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS - /* - * The Mellanox Tavor device gives false positive parity errors. Disable - * parity error reporting. -@@ -3364,6 +3365,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I - DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65f9, quirk_intel_mc_errata); - DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65fa, quirk_intel_mc_errata); - -+#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */ -+ - /* - * Ivytown NTB BAR sizes are misreported by the hardware due to an erratum. - * To work around this, query the size it should be configured to by the -@@ -3389,6 +3392,8 @@ static void quirk_intel_ntb(struct pci_d - DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e08, quirk_intel_ntb); - DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e0d, quirk_intel_ntb); - -+#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS -+ - /* - * Some BIOS implementations leave the Intel GPU interrupts enabled, even - * though no one is handling them (e.g., if the i915 driver is never -@@ -3427,6 +3432,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_IN - DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x010a, disable_igfx_irq); - DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0152, disable_igfx_irq); - -+#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */ -+ - /* - * PCI devices which are on Intel chips can skip the 10ms delay - * before entering D3 mode. diff --git a/target/linux/generic/pending-5.18/811-pci_disable_usb_common_quirks.patch b/target/linux/generic/pending-5.18/811-pci_disable_usb_common_quirks.patch deleted file mode 100644 index 67406bac84c098..00000000000000 --- a/target/linux/generic/pending-5.18/811-pci_disable_usb_common_quirks.patch +++ /dev/null @@ -1,115 +0,0 @@ -From: Felix Fietkau -Subject: debloat: disable common USB quirks - -Signed-off-by: Felix Fietkau ---- - drivers/usb/host/pci-quirks.c | 16 ++++++++++++++++ - drivers/usb/host/pci-quirks.h | 18 +++++++++++++++++- - include/linux/usb/hcd.h | 7 +++++++ - 3 files changed, 40 insertions(+), 1 deletion(-) - ---- a/drivers/usb/host/pci-quirks.c -+++ b/drivers/usb/host/pci-quirks.c -@@ -128,6 +128,8 @@ struct amd_chipset_type { - u8 rev; - }; - -+#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS -+ - static struct amd_chipset_info { - struct pci_dev *nb_dev; - struct pci_dev *smbus_dev; -@@ -633,6 +635,10 @@ bool usb_amd_pt_check_port(struct device - } - EXPORT_SYMBOL_GPL(usb_amd_pt_check_port); - -+#endif /* CONFIG_PCI_DISABLE_COMMON_QUIRKS */ -+ -+#if IS_ENABLED(CONFIG_USB_UHCI_HCD) -+ - /* - * Make sure the controller is completely inactive, unable to - * generate interrupts or do DMA. -@@ -712,8 +718,17 @@ reset_needed: - uhci_reset_hc(pdev, base); - return 1; - } -+#else -+int uhci_check_and_reset_hc(struct pci_dev *pdev, unsigned long base) -+{ -+ return 0; -+} -+ -+#endif - EXPORT_SYMBOL_GPL(uhci_check_and_reset_hc); - -+#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS -+ - static inline int io_type_enabled(struct pci_dev *pdev, unsigned int mask) - { - u16 cmd; -@@ -1285,3 +1300,4 @@ static void quirk_usb_early_handoff(stru - } - DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_ANY_ID, PCI_ANY_ID, - PCI_CLASS_SERIAL_USB, 8, quirk_usb_early_handoff); -+#endif ---- a/drivers/usb/host/pci-quirks.h -+++ b/drivers/usb/host/pci-quirks.h -@@ -5,6 +5,9 @@ - #ifdef CONFIG_USB_PCI - void uhci_reset_hc(struct pci_dev *pdev, unsigned long base); - int uhci_check_and_reset_hc(struct pci_dev *pdev, unsigned long base); -+#endif /* CONFIG_USB_PCI */ -+ -+#if defined(CONFIG_USB_PCI) && !defined(CONFIG_PCI_DISABLE_COMMON_QUIRKS) - int usb_hcd_amd_remote_wakeup_quirk(struct pci_dev *pdev); - bool usb_amd_hang_symptom_quirk(void); - bool usb_amd_prefetch_quirk(void); -@@ -19,6 +22,18 @@ void sb800_prefetch(struct device *dev, - bool usb_amd_pt_check_port(struct device *device, int port); - #else - struct pci_dev; -+static inline int usb_amd_quirk_pll_check(void) -+{ -+ return 0; -+} -+static inline bool usb_amd_hang_symptom_quirk(void) -+{ -+ return false; -+} -+static inline bool usb_amd_prefetch_quirk(void) -+{ -+ return false; -+} - static inline void usb_amd_quirk_pll_disable(void) {} - static inline void usb_amd_quirk_pll_enable(void) {} - static inline void usb_asmedia_modifyflowcontrol(struct pci_dev *pdev) {} -@@ -29,6 +44,11 @@ static inline bool usb_amd_pt_check_port - { - return false; - } -+static inline void usb_enable_intel_xhci_ports(struct pci_dev *xhci_pdev) {} -+static inline bool usb_xhci_needs_pci_reset(struct pci_dev *pdev) -+{ -+ return false; -+} - #endif /* CONFIG_USB_PCI */ - - #endif /* __LINUX_USB_PCI_QUIRKS_H */ ---- a/include/linux/usb/hcd.h -+++ b/include/linux/usb/hcd.h -@@ -497,7 +497,14 @@ extern int usb_hcd_pci_probe(struct pci_ - extern void usb_hcd_pci_remove(struct pci_dev *dev); - extern void usb_hcd_pci_shutdown(struct pci_dev *dev); - -+#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS - extern int usb_hcd_amd_remote_wakeup_quirk(struct pci_dev *dev); -+#else -+static inline int usb_hcd_amd_remote_wakeup_quirk(struct pci_dev *dev) -+{ -+ return 0; -+} -+#endif - - #ifdef CONFIG_PM - extern const struct dev_pm_ops usb_hcd_pci_pm_ops; diff --git a/target/linux/generic/pending-5.18/820-w1-gpio-fix-problem-with-platfom-data-in-w1-gpio.patch b/target/linux/generic/pending-5.18/820-w1-gpio-fix-problem-with-platfom-data-in-w1-gpio.patch deleted file mode 100644 index 33eb34c913ea4a..00000000000000 --- a/target/linux/generic/pending-5.18/820-w1-gpio-fix-problem-with-platfom-data-in-w1-gpio.patch +++ /dev/null @@ -1,26 +0,0 @@ -From d9c8bc8c1408f3e8529db6e4e04017b4c579c342 Mon Sep 17 00:00:00 2001 -From: Pawel Dembicki -Date: Sun, 18 Feb 2018 17:08:04 +0100 -Subject: [PATCH] w1: gpio: fix problem with platfom data in w1-gpio - -In devices, where fdt is used, is impossible to apply platform data -without proper fdt node. - -This patch allow to use platform data in devices with fdt. - -Signed-off-by: Pawel Dembicki ---- - drivers/w1/masters/w1-gpio.c | 7 +++---- - 1 file changed, 3 insertions(+), 4 deletions(-) - ---- a/drivers/w1/masters/w1-gpio.c -+++ b/drivers/w1/masters/w1-gpio.c -@@ -76,7 +76,7 @@ static int w1_gpio_probe(struct platform - enum gpiod_flags gflags = GPIOD_OUT_LOW_OPEN_DRAIN; - int err; - -- if (of_have_populated_dt()) { -+ if (of_have_populated_dt() && !dev_get_platdata(&pdev->dev)) { - pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); - if (!pdata) - return -ENOMEM; diff --git a/target/linux/generic/pending-5.18/834-ledtrig-libata.patch b/target/linux/generic/pending-5.18/834-ledtrig-libata.patch deleted file mode 100644 index 6a2d0e3ee31d81..00000000000000 --- a/target/linux/generic/pending-5.18/834-ledtrig-libata.patch +++ /dev/null @@ -1,149 +0,0 @@ -From: Daniel Golle -Subject: libata: add ledtrig support - -This adds a LED trigger for each ATA port indicating disk activity. - -As this is needed only on specific platforms (NAS SoCs and such), -these platforms should define ARCH_WANTS_LIBATA_LEDS if there -are boards with LED(s) intended to indicate ATA disk activity and -need the OS to take care of that. -In that way, if not selected, LED trigger support not will be -included in libata-core and both, codepaths and structures remain -untouched. - -Signed-off-by: Daniel Golle ---- - drivers/ata/Kconfig | 16 ++++++++++++++++ - drivers/ata/libata-core.c | 41 +++++++++++++++++++++++++++++++++++++++++ - include/linux/libata.h | 9 +++++++++ - 3 files changed, 66 insertions(+) - ---- a/drivers/ata/Kconfig -+++ b/drivers/ata/Kconfig -@@ -67,6 +67,22 @@ config ATA_FORCE - - If unsure, say Y. - -+config ARCH_WANT_LIBATA_LEDS -+ bool -+ -+config ATA_LEDS -+ bool "support ATA port LED triggers" -+ depends on ARCH_WANT_LIBATA_LEDS -+ select NEW_LEDS -+ select LEDS_CLASS -+ select LEDS_TRIGGERS -+ default y -+ help -+ This option adds a LED trigger for each registered ATA port. -+ It is used to drive disk activity leds connected via GPIO. -+ -+ If unsure, say N. -+ - config ATA_ACPI - bool "ATA ACPI Support" - depends on ACPI ---- a/drivers/ata/libata-core.c -+++ b/drivers/ata/libata-core.c -@@ -656,6 +656,19 @@ u64 ata_tf_read_block(const struct ata_t - return block; - } - -+#ifdef CONFIG_ATA_LEDS -+#define LIBATA_BLINK_DELAY 20 /* ms */ -+static inline void ata_led_act(struct ata_port *ap) -+{ -+ unsigned long led_delay = LIBATA_BLINK_DELAY; -+ -+ if (unlikely(!ap->ledtrig)) -+ return; -+ -+ led_trigger_blink_oneshot(ap->ledtrig, &led_delay, &led_delay, 0); -+} -+#endif -+ - /** - * ata_build_rw_tf - Build ATA taskfile for given read/write request - * @tf: Target ATA taskfile -@@ -4595,6 +4608,9 @@ struct ata_queued_cmd *ata_qc_new_init(s - if (tag < 0) - return NULL; - } -+#ifdef CONFIG_ATA_LEDS -+ ata_led_act(ap); -+#endif - - qc = __ata_qc_from_tag(ap, tag); - qc->tag = qc->hw_tag = tag; -@@ -5362,6 +5378,9 @@ struct ata_port *ata_port_alloc(struct a - ap->stats.unhandled_irq = 1; - ap->stats.idle_irq = 1; - #endif -+#ifdef CONFIG_ATA_LEDS -+ ap->ledtrig = kzalloc(sizeof(struct led_trigger), GFP_KERNEL); -+#endif - ata_sff_port_init(ap); - - return ap; -@@ -5397,6 +5416,12 @@ static void ata_host_release(struct kref - - kfree(ap->pmp_link); - kfree(ap->slave_link); -+#ifdef CONFIG_ATA_LEDS -+ if (ap->ledtrig) { -+ led_trigger_unregister(ap->ledtrig); -+ kfree(ap->ledtrig); -+ }; -+#endif - kfree(ap); - host->ports[i] = NULL; - } -@@ -5799,7 +5824,23 @@ int ata_host_register(struct ata_host *h - host->ports[i]->print_id = atomic_inc_return(&ata_print_id); - host->ports[i]->local_port_no = i + 1; - } -+#ifdef CONFIG_ATA_LEDS -+ for (i = 0; i < host->n_ports; i++) { -+ if (unlikely(!host->ports[i]->ledtrig)) -+ continue; - -+ snprintf(host->ports[i]->ledtrig_name, -+ sizeof(host->ports[i]->ledtrig_name), "ata%u", -+ host->ports[i]->print_id); -+ -+ host->ports[i]->ledtrig->name = host->ports[i]->ledtrig_name; -+ -+ if (led_trigger_register(host->ports[i]->ledtrig)) { -+ kfree(host->ports[i]->ledtrig); -+ host->ports[i]->ledtrig = NULL; -+ } -+ } -+#endif - /* Create associated sysfs transport objects */ - for (i = 0; i < host->n_ports; i++) { - rc = ata_tport_add(host->dev,host->ports[i]); ---- a/include/linux/libata.h -+++ b/include/linux/libata.h -@@ -23,6 +23,9 @@ - #include - #include - #include -+#ifdef CONFIG_ATA_LEDS -+#include -+#endif - - /* - * Define if arch has non-standard setup. This is a _PCI_ standard -@@ -862,6 +865,12 @@ struct ata_port { - #ifdef CONFIG_ATA_ACPI - struct ata_acpi_gtm __acpi_init_gtm; /* use ata_acpi_init_gtm() */ - #endif -+ -+#ifdef CONFIG_ATA_LEDS -+ struct led_trigger *ledtrig; -+ char ledtrig_name[8]; -+#endif -+ - /* owned by EH */ - u8 sector_buf[ATA_SECT_SIZE] ____cacheline_aligned; - }; diff --git a/target/linux/generic/pending-5.18/840-hwrng-bcm2835-set-quality-to-1000.patch b/target/linux/generic/pending-5.18/840-hwrng-bcm2835-set-quality-to-1000.patch deleted file mode 100644 index 5ca8933d6fef4b..00000000000000 --- a/target/linux/generic/pending-5.18/840-hwrng-bcm2835-set-quality-to-1000.patch +++ /dev/null @@ -1,26 +0,0 @@ -From d6988cf1d16faac56899918bb2b1be8d85155e3f Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= -Date: Sat, 20 Feb 2021 18:36:38 +0100 -Subject: [PATCH] hwrng: bcm2835: set quality to 1000 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This allows devices without a high precission timer to reduce boot from >100s -to <30s. - -Signed-off-by: Álvaro Fernández Rojas ---- - drivers/char/hw_random/bcm2835-rng.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/drivers/char/hw_random/bcm2835-rng.c -+++ b/drivers/char/hw_random/bcm2835-rng.c -@@ -170,6 +170,7 @@ static int bcm2835_rng_probe(struct plat - priv->rng.init = bcm2835_rng_init; - priv->rng.read = bcm2835_rng_read; - priv->rng.cleanup = bcm2835_rng_cleanup; -+ priv->rng.quality = 1000; - - if (dev_of_node(dev)) { - rng_id = of_match_node(bcm2835_rng_of_match, dev->of_node); diff --git a/target/linux/generic/pending-5.18/920-mangle_bootargs.patch b/target/linux/generic/pending-5.18/920-mangle_bootargs.patch deleted file mode 100644 index 05e389faee1e34..00000000000000 --- a/target/linux/generic/pending-5.18/920-mangle_bootargs.patch +++ /dev/null @@ -1,71 +0,0 @@ -From: Imre Kaloz -Subject: init: add CONFIG_MANGLE_BOOTARGS and disable it by default - -Enabling this option renames the bootloader supplied root= -and rootfstype= variables, which might have to be know but -would break the automatisms OpenWrt uses. - -Signed-off-by: Imre Kaloz ---- - init/Kconfig | 9 +++++++++ - init/main.c | 24 ++++++++++++++++++++++++ - 2 files changed, 33 insertions(+) - ---- a/init/Kconfig -+++ b/init/Kconfig -@@ -1820,6 +1820,15 @@ config EMBEDDED - an embedded system so certain expert options are available - for configuration. - -+config MANGLE_BOOTARGS -+ bool "Rename offending bootargs" -+ depends on EXPERT -+ help -+ Sometimes the bootloader passed bogus root= and rootfstype= -+ parameters to the kernel, and while you want to ignore them, -+ you need to know the values f.e. to support dual firmware -+ layouts on the flash. -+ - config HAVE_PERF_EVENTS - bool - help ---- a/init/main.c -+++ b/init/main.c -@@ -606,6 +606,29 @@ static inline void setup_nr_cpu_ids(void - static inline void smp_prepare_cpus(unsigned int maxcpus) { } - #endif - -+#ifdef CONFIG_MANGLE_BOOTARGS -+static void __init mangle_bootargs(char *command_line) -+{ -+ char *rootdev; -+ char *rootfs; -+ -+ rootdev = strstr(command_line, "root=/dev/mtdblock"); -+ -+ if (rootdev) -+ strncpy(rootdev, "mangled_rootblock=", 18); -+ -+ rootfs = strstr(command_line, "rootfstype"); -+ -+ if (rootfs) -+ strncpy(rootfs, "mangled_fs", 10); -+ -+} -+#else -+static void __init mangle_bootargs(char *command_line) -+{ -+} -+#endif -+ - /* - * We need to store the untouched command line for future reference. - * We also need to store the touched command line since the parameter -@@ -949,6 +972,7 @@ asmlinkage __visible void __init __no_sa - pr_notice("%s", linux_banner); - early_security_init(); - setup_arch(&command_line); -+ mangle_bootargs(command_line); - setup_boot_config(); - setup_command_line(command_line); - setup_nr_cpu_ids(); diff --git a/target/linux/rockchip/armv8/config-5.18 b/target/linux/rockchip/armv8/config-5.18 deleted file mode 100644 index 774c9a1d7415a8..00000000000000 --- a/target/linux/rockchip/armv8/config-5.18 +++ /dev/null @@ -1,1906 +0,0 @@ -CONFIG_64BIT=y -CONFIG_AF_UNIX_OOB=y -# CONFIG_AHCI_BRCM is not set -# CONFIG_AHCI_DA850 is not set -# CONFIG_AHCI_DM816 is not set -# CONFIG_AHCI_MTK is not set -# CONFIG_AHCI_SUNXI is not set -# CONFIG_AHCI_TEGRA is not set -# CONFIG_AHCI_XGENE is not set -# CONFIG_AMD_SFH_HID is not set -# CONFIG_APPLE_DART is not set -# CONFIG_APPLE_MAILBOX is not set -# CONFIG_APPLE_PMGR_PWRSTATE is not set -CONFIG_ARCH_BINFMT_ELF_EXTRA_PHDRS=y -CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y -CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_KEEP_MEMBLOCK=y -CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y -CONFIG_ARCH_MMAP_RND_BITS=18 -CONFIG_ARCH_MMAP_RND_BITS_MAX=33 -CONFIG_ARCH_MMAP_RND_BITS_MIN=18 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 -CONFIG_ARCH_PROC_KCORE_TEXT=y -CONFIG_ARCH_ROCKCHIP=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_STACKWALK=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_WANTS_NO_INSTR=y -CONFIG_ARC_EMAC_CORE=y -# CONFIG_ARC_TIMERS is not set -CONFIG_ARM64=y -CONFIG_ARM64_CNP=y -CONFIG_ARM64_CRYPTO=y -CONFIG_ARM64_ERRATUM_1024718=y -CONFIG_ARM64_ERRATUM_1530923=y -CONFIG_ARM64_ERRATUM_2051678=y -CONFIG_ARM64_ERRATUM_2077057=y -CONFIG_ARM64_ERRATUM_819472=y -CONFIG_ARM64_ERRATUM_824069=y -CONFIG_ARM64_ERRATUM_826319=y -CONFIG_ARM64_ERRATUM_827319=y -CONFIG_ARM64_ERRATUM_832075=y -CONFIG_ARM64_ERRATUM_843419=y -CONFIG_ARM64_ERRATUM_845719=y -CONFIG_ARM64_ERRATUM_858921=y -CONFIG_ARM64_HW_AFDBM=y -CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y -CONFIG_ARM64_MODULE_PLTS=y -CONFIG_ARM64_PAGE_SHIFT=12 -CONFIG_ARM64_PAN=y -CONFIG_ARM64_PA_BITS=48 -CONFIG_ARM64_PA_BITS_48=y -CONFIG_ARM64_PTR_AUTH=y -CONFIG_ARM64_RAS_EXTN=y -CONFIG_ARM64_SVE=y -# CONFIG_ARM64_SW_TTBR0_PAN is not set -CONFIG_ARM64_TAGGED_ADDR_ABI=y -CONFIG_ARM64_VA_BITS=48 -# CONFIG_ARM64_VA_BITS_39 is not set -CONFIG_ARM64_VA_BITS_48=y -CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y -CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y -# CONFIG_ARMADA375_USBCLUSTER_PHY is not set -# CONFIG_ARMADA_37XX_RWTM_MBOX is not set -# CONFIG_ARMADA_THERMAL is not set -# CONFIG_ARMV7M_SYSTICK is not set -# CONFIG_ARMV8_DEPRECATED is not set -CONFIG_ARM_AMBA=y -CONFIG_ARM_ARCH_TIMER=y -CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y -CONFIG_ARM_BRCMSTB_AVS_CPUFREQ=y -# CONFIG_ARM_CLPS711X_CPUIDLE is not set -CONFIG_ARM_CPUIDLE=y -# CONFIG_ARM_EXYNOS_BUS_DEVFREQ is not set -CONFIG_ARM_FFA_SMCCC=y -CONFIG_ARM_FFA_TRANSPORT=y -CONFIG_ARM_GIC=y -CONFIG_ARM_GIC_V2M=y -CONFIG_ARM_GIC_V3=y -CONFIG_ARM_GIC_V3_ITS=y -CONFIG_ARM_GIC_V3_ITS_PCI=y -# CONFIG_ARM_IMX8M_DDRC_DEVFREQ is not set -# CONFIG_ARM_IMX_BUS_DEVFREQ is not set -# CONFIG_ARM_INTEGRATOR_LM is not set -CONFIG_ARM_MEDIATEK_CPUFREQ_HW=m -CONFIG_ARM_MHU=y -CONFIG_ARM_PSCI_CPUIDLE=y -CONFIG_ARM_PSCI_CPUIDLE_DOMAIN=y -CONFIG_ARM_PSCI_FW=y -# CONFIG_ARM_QCOM_CPUFREQ_HW is not set -# CONFIG_ARM_RASPBERRYPI_CPUFREQ is not set -# CONFIG_ARM_RK3328_DMC_DEVFREQ is not set -CONFIG_ARM_RK3399_DMC_DEVFREQ=y -CONFIG_ARM_SCMI_CPUFREQ=y -CONFIG_ARM_SCMI_HAVE_SHMEM=y -CONFIG_ARM_SCMI_HAVE_TRANSPORT=y -CONFIG_ARM_SCMI_POWER_DOMAIN=y -CONFIG_ARM_SCMI_PROTOCOL=y -CONFIG_ARM_SCMI_TRANSPORT_MAILBOX=y -CONFIG_ARM_SCMI_TRANSPORT_SMC=y -# CONFIG_ARM_SCMI_TRANSPORT_SMC_ATOMIC_ENABLE is not set -CONFIG_ARM_SCPI_CPUFREQ=y -CONFIG_ARM_SCPI_POWER_DOMAIN=y -CONFIG_ARM_SCPI_PROTOCOL=y -CONFIG_ARM_SMCCC_SOC_ID=y -CONFIG_ARM_SMMU=y -CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y -# CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS is not set -CONFIG_ARM_SMMU_V3=y -# CONFIG_ARM_SMMU_V3_SVA is not set -# CONFIG_ARM_SUN8I_A33_MBUS_DEVFREQ is not set -# CONFIG_ARM_TEGRA_DEVFREQ is not set -# CONFIG_ASPEED_BT_IPMI_BMC is not set -# CONFIG_ASPEED_KCS_IPMI_BMC is not set -# CONFIG_ASPEED_LPC_CTRL is not set -# CONFIG_ASPEED_LPC_SNOOP is not set -# CONFIG_ASPEED_P2A_CTRL is not set -# CONFIG_ASPEED_SOCINFO is not set -# CONFIG_ASPEED_UART_ROUTING is not set -# CONFIG_AT91_SOC_ID is not set -# CONFIG_AT91_SOC_SFR is not set -CONFIG_ATA=y -# CONFIG_ATMEL_ST is not set -CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y -# CONFIG_AXI_DMAC is not set -CONFIG_BACKLIGHT_CLASS_DEVICE=y -CONFIG_BACKLIGHT_GPIO=y -CONFIG_BACKLIGHT_PWM=y -# CONFIG_BATTERY_ACT8945A is not set -# CONFIG_BCM2711_THERMAL is not set -# CONFIG_BCM2835_POWER is not set -# CONFIG_BCM2835_THERMAL is not set -# CONFIG_BCM2835_TIMER is not set -# CONFIG_BCM2835_VCHIQ is not set -# CONFIG_BCM47XX_NVRAM is not set -# CONFIG_BCM4908_ENET is not set -# CONFIG_BCM_FLEXRM_MBOX is not set -# CONFIG_BCM_KONA_TIMER is not set -# CONFIG_BCM_NS_THERMAL is not set -# CONFIG_BCM_PDC_MBOX is not set -# CONFIG_BCM_PMB is not set -# CONFIG_BCM_SR_THERMAL is not set -CONFIG_BCM_VIDEOCORE=y -# CONFIG_BGMAC_PLATFORM is not set -CONFIG_BINARY_PRINTF=y -CONFIG_BLK_DEV_BSG=y -CONFIG_BLK_DEV_BSGLIB=y -CONFIG_BLK_DEV_BSG_COMMON=y -# CONFIG_BLK_DEV_INITRD is not set -CONFIG_BLK_DEV_INTEGRITY=y -CONFIG_BLK_DEV_INTEGRITY_T10=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_NBD=m -CONFIG_BLK_DEV_NVME=y -CONFIG_BLK_DEV_PCIESSD_MTIP32XX=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=4096 -CONFIG_BLK_DEV_SD=y -CONFIG_BLK_MQ_PCI=y -CONFIG_BLK_PM=y -CONFIG_BLOCK_COMPAT=y -CONFIG_BLOCK_LEGACY_AUTOLOAD=y -CONFIG_BRCMSTB_GISB_ARB=y -# CONFIG_BRCMSTB_THERMAL is not set -# CONFIG_BRCM_USB_PINMAP is not set -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_BSD_PROCESS_ACCT_V3=y -# CONFIG_BT1_APB is not set -# CONFIG_BT1_AXI is not set -# CONFIG_CADENCE_TTC_TIMER is not set -CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" -CONFIG_CHARGER_GPIO=y -# CONFIG_CHARGER_QCOM_SMBB is not set -# CONFIG_CHARGER_SC2731 is not set -# CONFIG_CLKSRC_DBX500_PRCMU is not set -# CONFIG_CLKSRC_EXYNOS_MCT is not set -# CONFIG_CLKSRC_IMX_GPT is not set -# CONFIG_CLKSRC_IMX_TPM is not set -# CONFIG_CLKSRC_JCORE_PIT is not set -CONFIG_CLKSRC_MMIO=y -# CONFIG_CLKSRC_MPS2 is not set -# CONFIG_CLKSRC_PISTACHIO is not set -# CONFIG_CLKSRC_PXA is not set -# CONFIG_CLKSRC_SAMSUNG_PWM is not set -# CONFIG_CLKSRC_STM32_LP is not set -# CONFIG_CLKSRC_ST_LPC is not set -# CONFIG_CLKSRC_TI_32K is not set -# CONFIG_CLK_ACTIONS is not set -# CONFIG_CLK_BAIKAL_T1 is not set -# CONFIG_CLK_BCM2711_DVP is not set -# CONFIG_CLK_BCM2835 is not set -# CONFIG_CLK_BCM_63XX is not set -# CONFIG_CLK_BCM_63XX_GATE is not set -# CONFIG_CLK_BCM_CYGNUS is not set -# CONFIG_CLK_BCM_HR2 is not set -# CONFIG_CLK_BCM_KONA is not set -# CONFIG_CLK_BCM_NS2 is not set -# CONFIG_CLK_BCM_NSP is not set -# CONFIG_CLK_BCM_SR is not set -# CONFIG_CLK_IMX8MM is not set -# CONFIG_CLK_IMX8MN is not set -# CONFIG_CLK_IMX8MP is not set -# CONFIG_CLK_IMX8MQ is not set -# CONFIG_CLK_IMX8ULP is not set -# CONFIG_CLK_IMX93 is not set -# CONFIG_CLK_INTEL_SOCFPGA is not set -# CONFIG_CLK_LGM_CGU is not set -# CONFIG_CLK_LS1028A_PLLDIG is not set -# CONFIG_CLK_MT7621 is not set -CONFIG_CLK_PX30=y -# CONFIG_CLK_RASPBERRYPI is not set -# CONFIG_CLK_RENESAS is not set -CONFIG_CLK_RK3036=y -CONFIG_CLK_RK312X=y -CONFIG_CLK_RK3188=y -CONFIG_CLK_RK322X=y -CONFIG_CLK_RK3288=y -CONFIG_CLK_RK3308=y -CONFIG_CLK_RK3328=y -CONFIG_CLK_RK3368=y -CONFIG_CLK_RK3399=y -CONFIG_CLK_RK3568=y -CONFIG_CLK_RV110X=y -# CONFIG_CLK_SIFIVE is not set -# CONFIG_CLK_STARFIVE_JH7100 is not set -CONFIG_CLK_SUNXI=y -CONFIG_CLK_SUNXI_CLOCKS=y -CONFIG_CLK_SUNXI_PRCM_SUN6I=y -CONFIG_CLK_SUNXI_PRCM_SUN8I=y -CONFIG_CLK_SUNXI_PRCM_SUN9I=y -# CONFIG_CLK_UNIPHIER is not set -CONFIG_CLONE_BACKWARDS=y -# CONFIG_CLPS711X_TIMER is not set -CONFIG_CMA=y -CONFIG_CMA_ALIGNMENT=8 -CONFIG_CMA_AREAS=7 -# CONFIG_CMA_DEBUG is not set -# CONFIG_CMA_DEBUGFS is not set -CONFIG_CMA_SIZE_MBYTES=5 -# CONFIG_CMA_SIZE_SEL_MAX is not set -CONFIG_CMA_SIZE_SEL_MBYTES=y -# CONFIG_CMA_SIZE_SEL_MIN is not set -# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set -CONFIG_COMMON_CLK=y -# CONFIG_COMMON_CLK_APPLE_NCO is not set -# CONFIG_COMMON_CLK_ASPEED is not set -CONFIG_COMMON_CLK_AXG=y -# CONFIG_COMMON_CLK_AXG_AUDIO is not set -# CONFIG_COMMON_CLK_BM1880 is not set -# CONFIG_COMMON_CLK_BOSTON is not set -# CONFIG_COMMON_CLK_FSL_FLEXSPI is not set -# CONFIG_COMMON_CLK_FSL_SAI is not set -CONFIG_COMMON_CLK_G12A=y -# CONFIG_COMMON_CLK_GEMINI is not set -CONFIG_COMMON_CLK_GXBB=y -# CONFIG_COMMON_CLK_HI3516CV300 is not set -# CONFIG_COMMON_CLK_HI3519 is not set -# CONFIG_COMMON_CLK_HI3559A is not set -# CONFIG_COMMON_CLK_HI3660 is not set -# CONFIG_COMMON_CLK_HI3670 is not set -# CONFIG_COMMON_CLK_HI3798CV200 is not set -# CONFIG_COMMON_CLK_HI6220 is not set -# CONFIG_COMMON_CLK_HI655X is not set -# CONFIG_COMMON_CLK_KEYSTONE is not set -# CONFIG_COMMON_CLK_MAX77686 is not set -CONFIG_COMMON_CLK_MEDIATEK=y -CONFIG_COMMON_CLK_MESON_AO_CLKC=y -CONFIG_COMMON_CLK_MESON_CPU_DYNDIV=y -CONFIG_COMMON_CLK_MESON_DUALDIV=y -CONFIG_COMMON_CLK_MESON_EE_CLKC=y -CONFIG_COMMON_CLK_MESON_MPLL=y -CONFIG_COMMON_CLK_MESON_PLL=y -CONFIG_COMMON_CLK_MESON_REGMAP=y -CONFIG_COMMON_CLK_MESON_VID_PLL_DIV=y -# CONFIG_COMMON_CLK_MMP2_AUDIO is not set -# CONFIG_COMMON_CLK_MT2701 is not set -# CONFIG_COMMON_CLK_MT2712 is not set -# CONFIG_COMMON_CLK_MT6779 is not set -# CONFIG_COMMON_CLK_MT6797 is not set -# CONFIG_COMMON_CLK_MT7622 is not set -# CONFIG_COMMON_CLK_MT7629 is not set -# CONFIG_COMMON_CLK_MT7986 is not set -# CONFIG_COMMON_CLK_MT8135 is not set -# CONFIG_COMMON_CLK_MT8173 is not set -# CONFIG_COMMON_CLK_MT8183 is not set -CONFIG_COMMON_CLK_MT8192=y -# CONFIG_COMMON_CLK_MT8192_AUDSYS is not set -# CONFIG_COMMON_CLK_MT8192_CAMSYS is not set -# CONFIG_COMMON_CLK_MT8192_IMGSYS is not set -# CONFIG_COMMON_CLK_MT8192_IMP_IIC_WRAP is not set -# CONFIG_COMMON_CLK_MT8192_IPESYS is not set -# CONFIG_COMMON_CLK_MT8192_MDPSYS is not set -# CONFIG_COMMON_CLK_MT8192_MFGCFG is not set -# CONFIG_COMMON_CLK_MT8192_MMSYS is not set -# CONFIG_COMMON_CLK_MT8192_MSDC is not set -# CONFIG_COMMON_CLK_MT8192_SCP_ADSP is not set -# CONFIG_COMMON_CLK_MT8192_VDECSYS is not set -# CONFIG_COMMON_CLK_MT8192_VENCSYS is not set -# CONFIG_COMMON_CLK_MT8195 is not set -# CONFIG_COMMON_CLK_MT8516 is not set -# CONFIG_COMMON_CLK_OXNAS is not set -# CONFIG_COMMON_CLK_PISTACHIO is not set -CONFIG_COMMON_CLK_RK808=y -CONFIG_COMMON_CLK_ROCKCHIP=y -# CONFIG_COMMON_CLK_RS9_PCIE is not set -# CONFIG_COMMON_CLK_S2MPS11 is not set -# CONFIG_COMMON_CLK_SAMSUNG is not set -# CONFIG_COMMON_CLK_SCMI is not set -CONFIG_COMMON_CLK_SCPI=y -# CONFIG_COMMON_CLK_TI_ADPLL is not set -# CONFIG_COMMON_CLK_TPS68470 is not set -# CONFIG_COMMON_CLK_VISCONTI is not set -# CONFIG_COMMON_CLK_ZYNQMP is not set -# CONFIG_COMMON_RESET_HI3660 is not set -# CONFIG_COMMON_RESET_HI6220 is not set -CONFIG_COMPAT=y -CONFIG_COMPAT_32BIT_TIME=y -CONFIG_COMPAT_BINFMT_ELF=y -CONFIG_COMPAT_NETLINK_MESSAGES=y -CONFIG_COMPAT_OLD_SIGACTION=y -CONFIG_COMPILE_TEST=y -CONFIG_CONFIGFS_FS=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_CONTIG_ALLOC=y -CONFIG_CPUFREQ_DT=y -CONFIG_CPUFREQ_DT_PLATDEV=y -CONFIG_CPU_FREQ=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y -CONFIG_CPU_FREQ_GOV_ATTR_SET=y -# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set -# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y -# CONFIG_CPU_FREQ_GOV_USERSPACE is not set -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_MENU=y -CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y -CONFIG_CPU_ISOLATION=y -CONFIG_CPU_PM=y -CONFIG_CPU_RMAP=y -CONFIG_CPU_THERMAL=y -CONFIG_CRASH_CORE=y -CONFIG_CRASH_DUMP=y -CONFIG_CRC16=y -# CONFIG_CRC32_SARWATE is not set -CONFIG_CRC32_SLICEBY8=y -CONFIG_CRC64=y -CONFIG_CRC64_ROCKSOFT=y -CONFIG_CRC_T10DIF=y -CONFIG_CROSS_MEMORY_ATTACH=y -CONFIG_CRYPTO_AES_ARM64=y -CONFIG_CRYPTO_AES_ARM64_CE=y -CONFIG_CRYPTO_AES_ARM64_CE_BLK=y -CONFIG_CRYPTO_AES_ARM64_CE_CCM=y -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_CRC64_ROCKSOFT=y -CONFIG_CRYPTO_CRCT10DIF=y -CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=y -CONFIG_CRYPTO_CRYPTD=y -CONFIG_CRYPTO_DES=y -# CONFIG_CRYPTO_DEV_ALLWINNER is not set -# CONFIG_CRYPTO_DEV_EXYNOS_RNG is not set -# CONFIG_CRYPTO_DEV_KEEMBAY_OCS_AES_SM4 is not set -# CONFIG_CRYPTO_DEV_KEEMBAY_OCS_ECC is not set -# CONFIG_CRYPTO_DEV_KEEMBAY_OCS_HCU is not set -# CONFIG_CRYPTO_DEV_OCTEONTX2_CPT is not set -# CONFIG_CRYPTO_DEV_OCTEONTX_CPT is not set -# CONFIG_CRYPTO_DEV_QCOM_RNG is not set -# CONFIG_CRYPTO_DEV_ROCKCHIP is not set -# CONFIG_CRYPTO_DEV_ROCKCHIP_DEBUG is not set -# CONFIG_CRYPTO_DEV_SA2UL is not set -# CONFIG_CRYPTO_DEV_SL3516 is not set -# CONFIG_CRYPTO_DEV_ZYNQMP_AES is not set -# CONFIG_CRYPTO_DEV_ZYNQMP_SHA3 is not set -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_ENGINE=y -CONFIG_CRYPTO_GHASH_ARM64_CE=y -CONFIG_CRYPTO_HW=y -CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y -CONFIG_CRYPTO_LIB_DES=y -CONFIG_CRYPTO_LIB_SHA256=y -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_SHA1=y -# CONFIG_CX_ECAT is not set -# CONFIG_DA9062_THERMAL is not set -# CONFIG_DAVINCI_TIMER is not set -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_DEBUG_BUGVERBOSE=y -CONFIG_DEBUG_INFO=y -# CONFIG_DEBUG_INFO_NONE is not set -# CONFIG_DEFAULT_FQ_CODEL is not set -CONFIG_DEFAULT_NET_SCH="pfifo_fast" -CONFIG_DEFAULT_PFIFO_FAST=y -# CONFIG_DEVFREQ_EVENT_EXYNOS_NOCP is not set -# CONFIG_DEVFREQ_EVENT_EXYNOS_PPMU is not set -CONFIG_DEVFREQ_EVENT_ROCKCHIP_DFI=y -# CONFIG_DEVFREQ_GOV_PASSIVE is not set -CONFIG_DEVFREQ_GOV_PERFORMANCE=y -CONFIG_DEVFREQ_GOV_POWERSAVE=y -CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y -CONFIG_DEVFREQ_GOV_USERSPACE=y -# CONFIG_DEVFREQ_THERMAL is not set -CONFIG_DEVMEM=y -# CONFIG_DEVPORT is not set -# CONFIG_DIGICOLOR_TIMER is not set -# CONFIG_DM9051 is not set -CONFIG_DMADEVICES=y -CONFIG_DMA_CMA=y -CONFIG_DMA_DIRECT_REMAP=y -CONFIG_DMA_ENGINE=y -CONFIG_DMA_OF=y -CONFIG_DMA_OMAP=y -CONFIG_DMA_OPS=y -# CONFIG_DMA_SA11X0 is not set -CONFIG_DMA_SHARED_BUFFER=y -# CONFIG_DMA_SUN6I is not set -CONFIG_DMA_VIRTUAL_CHANNELS=y -CONFIG_DNOTIFY=y -# CONFIG_DOVE_THERMAL is not set -CONFIG_DPAA2_CONSOLE=y -CONFIG_DRM=y -# CONFIG_DRM_ANALOGIX_ANX7625 is not set -# CONFIG_DRM_ASPEED_GFX is not set -CONFIG_DRM_BRIDGE=y -# CONFIG_DRM_CHIPONE_ICN6211 is not set -# CONFIG_DRM_CROS_EC_ANX7688 is not set -CONFIG_DRM_DEBUG_MODESET_LOCK=y -CONFIG_DRM_DP_HELPER=y -CONFIG_DRM_DW_HDMI=y -CONFIG_DRM_DW_MIPI_DSI=y -CONFIG_DRM_GEM_CMA_HELPER=y -# CONFIG_DRM_INGENIC is not set -# CONFIG_DRM_ITE_IT6505 is not set -# CONFIG_DRM_ITE_IT66121 is not set -# CONFIG_DRM_KMB_DISPLAY is not set -CONFIG_DRM_KMS_HELPER=y -# CONFIG_DRM_LONTIUM_LT8912B is not set -# CONFIG_DRM_LONTIUM_LT9611UXC is not set -# CONFIG_DRM_MESON is not set -CONFIG_DRM_MIPI_DSI=y -# CONFIG_DRM_MSM is not set -CONFIG_DRM_NOMODESET=y -CONFIG_DRM_PANEL=y -# CONFIG_DRM_PANEL_ABT_Y030XX067A is not set -# CONFIG_DRM_PANEL_BOE_BF060Y8M_AJ0 is not set -CONFIG_DRM_PANEL_BRIDGE=y -# CONFIG_DRM_PANEL_DSI_CM is not set -# CONFIG_DRM_PANEL_EDP is not set -# CONFIG_DRM_PANEL_ILITEK_ILI9341 is not set -# CONFIG_DRM_PANEL_INNOLUX_EJ030NA is not set -# CONFIG_DRM_PANEL_JDI_R63452 is not set -# CONFIG_DRM_PANEL_KHADAS_TS050 is not set -# CONFIG_DRM_PANEL_MIPI_DBI is not set -# CONFIG_DRM_PANEL_NOVATEK_NT35560 is not set -# CONFIG_DRM_PANEL_NOVATEK_NT35950 is not set -# CONFIG_DRM_PANEL_NOVATEK_NT36672A is not set -CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y -# CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20 is not set -# CONFIG_DRM_PANEL_SAMSUNG_DB7430 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6D27A1 is not set -# CONFIG_DRM_PANEL_SAMSUNG_SOFEF00 is not set -# CONFIG_DRM_PANEL_SHARP_LS060T1SX01 is not set -# CONFIG_DRM_PANEL_SONY_TULIP_TRULY_NT35521 is not set -# CONFIG_DRM_PANEL_TDO_TL070WSH30 is not set -# CONFIG_DRM_PANEL_WIDECHIPS_WS2401 is not set -# CONFIG_DRM_RCAR_DU is not set -# CONFIG_DRM_RCAR_MIPI_DSI is not set -# CONFIG_DRM_RCAR_USE_LVDS is not set -CONFIG_DRM_ROCKCHIP=y -# CONFIG_DRM_SIMPLEDRM is not set -# CONFIG_DRM_SPRD is not set -# CONFIG_DRM_SSD130X is not set -# CONFIG_DRM_TI_SN65DSI83 is not set -# CONFIG_DRM_V3D is not set -CONFIG_DTC=y -CONFIG_DT_IDLE_GENPD=y -CONFIG_DT_IDLE_STATES=y -CONFIG_DUMMY_CONSOLE=y -# CONFIG_DWMAC_ANARION is not set -CONFIG_DWMAC_DWC_QOS_ETH=y -CONFIG_DWMAC_GENERIC=y -# CONFIG_DWMAC_IMX8 is not set -# CONFIG_DWMAC_INGENIC is not set -# CONFIG_DWMAC_MEDIATEK is not set -# CONFIG_DWMAC_OXNAS is not set -# CONFIG_DWMAC_QCOM_ETHQOS is not set -CONFIG_DWMAC_ROCKCHIP=y -# CONFIG_DWMAC_STM32 is not set -# CONFIG_DWMAC_SUN8I is not set -# CONFIG_DWMAC_SUNXI is not set -# CONFIG_DWMAC_VISCONTI is not set -# CONFIG_DW_APB_TIMER is not set -CONFIG_EDAC_SUPPORT=y -CONFIG_EEPROM_AT24=y -# CONFIG_EFI_DISABLE_RUNTIME is not set -# CONFIG_EINT_MTK is not set -CONFIG_EMAC_ROCKCHIP=y -CONFIG_ENERGY_MODEL=y -# CONFIG_EP93XX_DMA is not set -# CONFIG_EP93XX_ETH is not set -CONFIG_EXCLUSIVE_SYSTEM_RAM=y -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_POSIX_ACL=y -CONFIG_EXTCON=y -# CONFIG_EXYNOS_IOMMU is not set -# CONFIG_EXYNOS_IRQ_COMBINER is not set -# CONFIG_EXYNOS_THERMAL is not set -CONFIG_F2FS_FS=y -CONFIG_FANOTIFY=y -CONFIG_FB_CMDLINE=y -# CONFIG_FEC is not set -CONFIG_FHANDLE=y -CONFIG_FIXED_PHY=y -CONFIG_FIX_EARLYCON_MEM=y -# CONFIG_FORTIFY_SOURCE is not set -CONFIG_FRAME_POINTER=y -CONFIG_FRAME_WARN=2048 -# CONFIG_FSL_DPAA2_SWITCH is not set -# CONFIG_FSL_ENETC is not set -# CONFIG_FSL_ENETC_IERB is not set -# CONFIG_FSL_ENETC_MDIO is not set -# CONFIG_FSL_ENETC_VF is not set -# CONFIG_FSL_FMAN is not set -# CONFIG_FSL_FTM_TIMER is not set -CONFIG_FS_IOMAP=y -CONFIG_FS_MBCACHE=y -CONFIG_FS_POSIX_ACL=y -# CONFIG_FTTMR010_TIMER is not set -# CONFIG_FUN_ETH is not set -CONFIG_FWNODE_MDIO=y -CONFIG_FW_LOADER_PAGED_BUF=y -CONFIG_GCC12_NO_ARRAY_BOUNDS=y -CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_REGS=y -# CONFIG_GEHC_ACHC is not set -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_ARCH_TOPOLOGY=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_CPU_VULNERABILITIES=y -CONFIG_GENERIC_CSUM=y -CONFIG_GENERIC_EARLY_IOREMAP=y -CONFIG_GENERIC_GETTIMEOFDAY=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MIGRATION=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_MSI_IRQ_DOMAIN=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PHY=y -CONFIG_GENERIC_PHY_MIPI_DPHY=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_TIME_VSYSCALL=y -# CONFIG_GIANFAR is not set -CONFIG_GLOB=y -CONFIG_GPIOLIB=y -CONFIG_GPIOLIB_IRQCHIP=y -# CONFIG_GPIO_ASPEED is not set -# CONFIG_GPIO_ASPEED_SGPIO is not set -# CONFIG_GPIO_ATH79 is not set -# CONFIG_GPIO_BCM_XGS_IPROC is not set -# CONFIG_GPIO_BRCMSTB is not set -# CONFIG_GPIO_CASCADE is not set -CONFIG_GPIO_CDEV=y -# CONFIG_GPIO_CLPS711X is not set -CONFIG_GPIO_DWAPB=y -# CONFIG_GPIO_EIC_SPRD is not set -CONFIG_GPIO_GENERIC=y -CONFIG_GPIO_GENERIC_PLATFORM=y -# CONFIG_GPIO_HISI is not set -# CONFIG_GPIO_IDT3243X is not set -# CONFIG_GPIO_IOP is not set -# CONFIG_GPIO_LPC18XX is not set -# CONFIG_GPIO_LPC32XX is not set -# CONFIG_GPIO_MLXBF is not set -# CONFIG_GPIO_MLXBF2 is not set -# CONFIG_GPIO_MT7621 is not set -# CONFIG_GPIO_MXC is not set -# CONFIG_GPIO_MXS is not set -# CONFIG_GPIO_PMIC_EIC_SPRD is not set -# CONFIG_GPIO_PXA is not set -# CONFIG_GPIO_RASPBERRYPI_EXP is not set -# CONFIG_GPIO_RDA is not set -CONFIG_GPIO_ROCKCHIP=y -# CONFIG_GPIO_SIM is not set -# CONFIG_GPIO_SL28CPLD is not set -# CONFIG_GPIO_SNPS_CREG is not set -# CONFIG_GPIO_SPRD is not set -# CONFIG_GPIO_STP_XWAY is not set -# CONFIG_GPIO_TEGRA is not set -# CONFIG_GPIO_TEGRA186 is not set -# CONFIG_GPIO_THUNDERX is not set -# CONFIG_GPIO_TQMX86 is not set -# CONFIG_GPIO_TS4800 is not set -# CONFIG_GPIO_UNIPHIER is not set -# CONFIG_GPIO_VISCONTI is not set -# CONFIG_GPIO_XGENE_SB is not set -# CONFIG_GPIO_XLP is not set -CONFIG_GRO_CELLS=y -# CONFIG_H8300_TMR16 is not set -# CONFIG_H8300_TMR8 is not set -# CONFIG_H8300_TPU is not set -# CONFIG_HARDENED_USERCOPY is not set -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HDMI=y -# CONFIG_HI3660_MBOX is not set -# CONFIG_HI6220_MBOX is not set -CONFIG_HID=y -CONFIG_HID_GENERIC=y -# CONFIG_HISILICON_LPC is not set -CONFIG_HISI_THERMAL=y -CONFIG_HOTPLUG_CPU=y -CONFIG_HOTPLUG_PCI=y -# CONFIG_HOTPLUG_PCI_CPCI is not set -CONFIG_HOTPLUG_PCI_PCIE=y -CONFIG_HOTPLUG_PCI_SHPC=y -# CONFIG_HSEM_U8500 is not set -CONFIG_HUGETLBFS=y -CONFIG_HUGETLB_PAGE=y -CONFIG_HWMON=y -CONFIG_HWSPINLOCK=y -# CONFIG_HWSPINLOCK_QCOM is not set -# CONFIG_HWSPINLOCK_SPRD is not set -# CONFIG_HWSPINLOCK_STM32 is not set -# CONFIG_HWSPINLOCK_SUN6I is not set -CONFIG_HW_CONSOLE=y -CONFIG_HZ=250 -# CONFIG_HZ_100 is not set -CONFIG_HZ_250=y -CONFIG_I2C=y -CONFIG_I2C_ALGOBIT=y -# CONFIG_I2C_ALTERA is not set -# CONFIG_I2C_APPLE is not set -# CONFIG_I2C_ASPEED is not set -# CONFIG_I2C_AT91 is not set -# CONFIG_I2C_AXXIA is not set -# CONFIG_I2C_BCM_KONA is not set -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_BRCMSTB=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_COMPAT=y -# CONFIG_I2C_DAVINCI is not set -# CONFIG_I2C_DIGICOLOR is not set -# CONFIG_I2C_EXYNOS5 is not set -CONFIG_I2C_HELPER_AUTO=y -# CONFIG_I2C_HIGHLANDER is not set -# CONFIG_I2C_HIX5HD2 is not set -# CONFIG_I2C_IMX is not set -# CONFIG_I2C_IMX_LPI2C is not set -# CONFIG_I2C_IOP3XX is not set -# CONFIG_I2C_LPC2K is not set -# CONFIG_I2C_MESON is not set -# CONFIG_I2C_MT7621 is not set -# CONFIG_I2C_MXS is not set -# CONFIG_I2C_NPCM7XX is not set -# CONFIG_I2C_OMAP is not set -# CONFIG_I2C_OWL is not set -# CONFIG_I2C_PNX is not set -# CONFIG_I2C_PXA is not set -# CONFIG_I2C_QCOM_CCI is not set -# CONFIG_I2C_QUP is not set -# CONFIG_I2C_RIIC is not set -CONFIG_I2C_RK3X=y -# CONFIG_I2C_SPRD is not set -# CONFIG_I2C_ST is not set -# CONFIG_I2C_STM32F4 is not set -# CONFIG_I2C_STM32F7 is not set -# CONFIG_I2C_SUN6I_P2WI is not set -# CONFIG_I2C_SYNQUACER is not set -# CONFIG_I2C_TEGRA is not set -# CONFIG_I2C_TEGRA_BPMP is not set -# CONFIG_I2C_UNIPHIER is not set -# CONFIG_I2C_UNIPHIER_F is not set -# CONFIG_I2C_WMT is not set -# CONFIG_I2C_XLP9XX is not set -CONFIG_IGB=y -CONFIG_IGB_HWMON=y -CONFIG_IGC=y -CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 -# CONFIG_IMX8MM_THERMAL is not set -# CONFIG_IMX_GPCV2_PM_DOMAINS is not set -# CONFIG_IMX_INTMUX is not set -# CONFIG_IMX_IRQSTEER is not set -# CONFIG_IMX_MBOX is not set -CONFIG_INDIRECT_PIO=y -# CONFIG_INGENIC_CGU_JZ4760 is not set -CONFIG_INPUT=y -# CONFIG_INPUT_ARIEL_PWRBUTTON is not set -CONFIG_INPUT_EVDEV=y -CONFIG_INPUT_FF_MEMLESS=y -# CONFIG_INPUT_HISI_POWERKEY is not set -CONFIG_INPUT_KEYBOARD=y -CONFIG_INPUT_LEDS=y -CONFIG_INPUT_MATRIXKMAP=y -CONFIG_INPUT_MOUSE=y -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -CONFIG_INPUT_RK805_PWRKEY=y -# CONFIG_INPUT_SC27XX_VIBRA is not set -CONFIG_INPUT_SPARSEKMAP=y -# CONFIG_INTEGRATOR_AP_TIMER is not set -# CONFIG_INTEL_IOP_ADMA is not set -# CONFIG_INTEL_IXP4XX_EB is not set -# CONFIG_INTEL_LDMA is not set -CONFIG_IOMMU_API=y -# CONFIG_IOMMU_DEBUGFS is not set -# CONFIG_IOMMU_DEFAULT_DMA_LAZY is not set -CONFIG_IOMMU_DEFAULT_DMA_STRICT=y -CONFIG_IOMMU_DMA=y -CONFIG_IOMMU_IOVA=y -CONFIG_IOMMU_IO_PGTABLE=y -# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set -CONFIG_IOMMU_IO_PGTABLE_LPAE=y -# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set -CONFIG_IOMMU_SUPPORT=y -# CONFIG_IO_STRICT_DEVMEM is not set -CONFIG_IO_URING=y -# CONFIG_IPMMU_VMSA is not set -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_MSI_IOMMU=y -CONFIG_IRQ_TIME_ACCOUNTING=y -# CONFIG_IRQ_UNIPHIER_AIDET is not set -CONFIG_IRQ_WORK=y -# CONFIG_IXP4XX_NPE is not set -# CONFIG_IXP4XX_QMGR is not set -# CONFIG_IXP4XX_TIMER is not set -CONFIG_JBD2=y -# CONFIG_JCORE_AIC is not set -CONFIG_JFFS2_ZLIB=y -CONFIG_JLSEMI_JL2XX1_PHY=y -CONFIG_JUMP_LABEL=y -# CONFIG_JZ4780_EFUSE is not set -# CONFIG_K3_DMA is not set -# CONFIG_K3_THERMAL is not set -CONFIG_KALLSYMS=y -CONFIG_KCMP=y -CONFIG_KEXEC_CORE=y -CONFIG_KEXEC_FILE=y -# CONFIG_KEXEC_SIG is not set -# CONFIG_KEYBOARD_CLPS711X is not set -# CONFIG_KEYBOARD_EP93XX is not set -# CONFIG_KEYBOARD_GOLDFISH_EVENTS is not set -# CONFIG_KEYBOARD_IMX is not set -# CONFIG_KEYBOARD_MT6779 is not set -# CONFIG_KEYBOARD_ST_KEYSCAN is not set -# CONFIG_KEYSTONE_TIMER is not set -# CONFIG_KEYSTONE_USB_PHY is not set -# CONFIG_KIRKWOOD_THERMAL is not set -# CONFIG_KORINA is not set -CONFIG_KSM=y -# CONFIG_LAN966X_SWITCH is not set -# CONFIG_LEDS_ARIEL is not set -# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set -# CONFIG_LEDS_COBALT_QUBE is not set -# CONFIG_LEDS_COBALT_RAQ is not set -CONFIG_LEDS_GPIO=y -# CONFIG_LEDS_IP30 is not set -# CONFIG_LEDS_LGM is not set -CONFIG_LEDS_NETXBIG=y -CONFIG_LEDS_PWM=y -# CONFIG_LEDS_S3C24XX is not set -CONFIG_LEDS_SYSCON=y -CONFIG_LEDS_TRIGGER_CPU=y -CONFIG_LEDS_TRIGGER_PANIC=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=16 -CONFIG_LIBCRC32C=y -CONFIG_LIBFDT=y -CONFIG_LIB_MEMNEQ=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_LOG_BUF_SHIFT=19 -# CONFIG_LOONGSON_PCH_MSI is not set -# CONFIG_LOONGSON_PCH_PIC is not set -# CONFIG_LPC_ENET is not set -CONFIG_LTO_NONE=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_MAGIC_SYSRQ_SERIAL=y -CONFIG_MAILBOX=y -# CONFIG_MAILBOX_TEST is not set -# CONFIG_MCF_EDMA is not set -# CONFIG_MCHP_CLK_MPFS is not set -# CONFIG_MCHP_EIC is not set -# CONFIG_MDIO_ASPEED is not set -# CONFIG_MDIO_BCM_IPROC is not set -CONFIG_MDIO_BUS=y -CONFIG_MDIO_BUS_MUX=y -# CONFIG_MDIO_BUS_MUX_BCM6368 is not set -# CONFIG_MDIO_BUS_MUX_BCM_IPROC is not set -CONFIG_MDIO_BUS_MUX_GPIO=y -# CONFIG_MDIO_BUS_MUX_MESON_G12A is not set -CONFIG_MDIO_BUS_MUX_MMIOREG=y -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_DEVRES=y -# CONFIG_MDIO_MOXART is not set -# CONFIG_MDIO_SUN4I is not set -# CONFIG_MDIO_XGENE is not set -CONFIG_MEDIATEK_GE_PHY=y -CONFIG_MEMFD_CREATE=y -CONFIG_MEMORY_ISOLATION=y -# CONFIG_MESON6_TIMER is not set -# CONFIG_MESON_CANVAS is not set -# CONFIG_MESON_CLK_MEASURE is not set -# CONFIG_MESON_EE_PM_DOMAINS is not set -# CONFIG_MESON_GXL_PHY is not set -# CONFIG_MESON_GX_PM_DOMAINS is not set -# CONFIG_MESON_GX_SOCINFO is not set -# CONFIG_MESON_IRQ_GPIO is not set -# CONFIG_MESON_MX_EFUSE is not set -# CONFIG_MESON_MX_SOCINFO is not set -# CONFIG_MFD_ACER_A500_EC is not set -# CONFIG_MFD_AT91_USART is not set -CONFIG_MFD_CORE=y -# CONFIG_MFD_ENE_KB3930 is not set -# CONFIG_MFD_HI655X_PMIC is not set -# CONFIG_MFD_KHADAS_MCU is not set -# CONFIG_MFD_MAX77714 is not set -# CONFIG_MFD_MX25_TSADC is not set -# CONFIG_MFD_MXS_LRADC is not set -CONFIG_MFD_RK808=y -# CONFIG_MFD_SC27XX_PMIC is not set -# CONFIG_MFD_SIMPLE_MFD_I2C is not set -# CONFIG_MFD_STM32_LPTIMER is not set -# CONFIG_MFD_STM32_TIMERS is not set -# CONFIG_MFD_STW481X is not set -# CONFIG_MFD_SUN4I_GPADC is not set -CONFIG_MFD_SUN6I_PRCM=y -CONFIG_MFD_SYSCON=y -CONFIG_MIGRATION=y -# CONFIG_MILBEAUT_HDMAC is not set -# CONFIG_MILBEAUT_XDMAC is not set -CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY=y -# CONFIG_MLXBF_GIGE is not set -CONFIG_MMC=y -# CONFIG_MMC_BCM2835 is not set -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_MINORS=32 -CONFIG_MMC_CQHCI=y -# CONFIG_MMC_DAVINCI is not set -CONFIG_MMC_DW=y -# CONFIG_MMC_DW_BLUEFIELD is not set -# CONFIG_MMC_DW_EXYNOS is not set -# CONFIG_MMC_DW_HI3798CV200 is not set -# CONFIG_MMC_DW_K3 is not set -# CONFIG_MMC_DW_PCI is not set -CONFIG_MMC_DW_PLTFM=y -CONFIG_MMC_DW_ROCKCHIP=y -# CONFIG_MMC_LITEX is not set -# CONFIG_MMC_MESON_GX is not set -# CONFIG_MMC_MESON_MX_SDHC is not set -# CONFIG_MMC_MESON_MX_SDIO is not set -# CONFIG_MMC_MOXART is not set -# CONFIG_MMC_OMAP_HS is not set -# CONFIG_MMC_OWL is not set -CONFIG_MMC_SDHCI=y -# CONFIG_MMC_SDHCI_CNS3XXX is not set -# CONFIG_MMC_SDHCI_DOVE is not set -# CONFIG_MMC_SDHCI_ESDHC_IMX is not set -CONFIG_MMC_SDHCI_OF_ARASAN=y -CONFIG_MMC_SDHCI_OF_DWCMSHC=y -# CONFIG_MMC_SDHCI_OF_SPARX5 is not set -# CONFIG_MMC_SDHCI_PCI is not set -CONFIG_MMC_SDHCI_PLTFM=y -# CONFIG_MMC_SDHCI_SPEAR is not set -# CONFIG_MMC_SDHCI_SPRD is not set -# CONFIG_MMC_SDHCI_ST is not set -# CONFIG_MMC_SDHCI_TEGRA is not set -# CONFIG_MMC_SDHI is not set -# CONFIG_MMC_SH_MMCIF is not set -# CONFIG_MMC_TMIO is not set -# CONFIG_MMC_UNIPHIER is not set -# CONFIG_MMP_DISP is not set -# CONFIG_MMP_PDMA is not set -# CONFIG_MMP_TDMA is not set -CONFIG_MODULES_USE_ELF_RELA=y -CONFIG_MOTORCOMM_PHY=y -# CONFIG_MOUSE_BCM5974 is not set -# CONFIG_MOUSE_CYAPA is not set -CONFIG_MOUSE_PS2=y -CONFIG_MOUSE_PS2_ALPS=y -CONFIG_MOUSE_PS2_BYD=y -CONFIG_MOUSE_PS2_CYPRESS=y -# CONFIG_MOUSE_PS2_ELANTECH is not set -CONFIG_MOUSE_PS2_LOGIPS2PP=y -CONFIG_MOUSE_PS2_SMBUS=y -CONFIG_MOUSE_PS2_SYNAPTICS=y -CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y -# CONFIG_MOUSE_PS2_TOUCHKIT is not set -CONFIG_MOUSE_PS2_TRACKPOINT=y -# CONFIG_MOUSE_SERIAL is not set -# CONFIG_MOUSE_VSXXXAA is not set -CONFIG_MQ_IOSCHED_DEADLINE=y -# CONFIG_MSC313E_TIMER is not set -# CONFIG_MSTAR_MSC313_MPLL is not set -# CONFIG_MTD_BCM63XX_PARTS is not set -# CONFIG_MTD_CFI is not set -CONFIG_MTD_CMDLINE_PARTS=y -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_NAND_ECC_MXIC is not set -# CONFIG_MTD_NAND_MTK_BMT is not set -# CONFIG_MTD_OF_PARTS_BCM4908 is not set -# CONFIG_MTD_OF_PARTS_LINKSYS_NS is not set -# CONFIG_MTD_PARSER_IMAGETAG is not set -# CONFIG_MTD_PARSER_TRX is not set -# CONFIG_MTD_SHARPSL_PARTS is not set -CONFIG_MTD_SPEAR_SMI=y -CONFIG_MTD_SPI_NOR=y -CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y -CONFIG_MTD_SPLIT_FIRMWARE=y -# CONFIG_MTD_TS5500 is not set -# CONFIG_MTK_ADSP_MBOX is not set -# CONFIG_MTK_CMDQ is not set -# CONFIG_MTK_CMDQ_MBOX is not set -# CONFIG_MTK_CQDMA is not set -# CONFIG_MTK_DEVAPC is not set -# CONFIG_MTK_EFUSE is not set -# CONFIG_MTK_HSDMA is not set -# CONFIG_MTK_INFRACFG is not set -# CONFIG_MTK_IOMMU is not set -# CONFIG_MTK_PMIC_WRAP is not set -# CONFIG_MTK_SCPSYS is not set -# CONFIG_MTK_SCPSYS_PM_DOMAINS is not set -CONFIG_MTK_THERMAL=y -# CONFIG_MTK_TIMER is not set -CONFIG_MUTEX_SPIN_ON_OWNER=y -# CONFIG_MVNETA is not set -# CONFIG_MVPP2 is not set -# CONFIG_MV_XOR is not set -# CONFIG_MXC_CLK is not set -# CONFIG_MXS_DMA is not set -# CONFIG_MXS_TIMER is not set -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEED_SG_DMA_LENGTH=y -CONFIG_NET_DEVLINK=y -CONFIG_NET_DSA=y -# CONFIG_NET_DSA_MSCC_FELIX is not set -CONFIG_NET_DSA_MT7530=y -# CONFIG_NET_DSA_REALTEK is not set -CONFIG_NET_DSA_TAG_MTK=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NET_PTP_CLASSIFY=y -CONFIG_NET_SELFTESTS=y -CONFIG_NET_SOCK_MSG=y -CONFIG_NET_SWITCHDEV=y -# CONFIG_NET_VENDOR_ACTIONS is not set -CONFIG_NET_VENDOR_DAVICOM=y -CONFIG_NET_VENDOR_FUNGIBLE=y -# CONFIG_NET_VENDOR_MEDIATEK is not set -# CONFIG_NET_XGENE_V2 is not set -CONFIG_NLS=y -CONFIG_NLS_ISO8859_1=y -CONFIG_NOP_USB_XCEIV=y -CONFIG_NO_HZ_COMMON=y -CONFIG_NO_HZ_IDLE=y -# CONFIG_NPCM7XX_KCS_IPMI_BMC is not set -# CONFIG_NPCM7XX_TIMER is not set -# CONFIG_NSPIRE_TIMER is not set -CONFIG_NVMEM=y -# CONFIG_NVMEM_BRCM_NVRAM is not set -# CONFIG_NVMEM_IMX_IIM is not set -# CONFIG_NVMEM_LAYERSCAPE_SFP is not set -# CONFIG_NVMEM_LPC18XX_EEPROM is not set -# CONFIG_NVMEM_LPC18XX_OTP is not set -# CONFIG_NVMEM_MXS_OCOTP is not set -# CONFIG_NVMEM_SNVS_LPGPR is not set -# CONFIG_NVMEM_STM32_ROMEM is not set -# CONFIG_NVMEM_SUNPLUS_OCOTP is not set -CONFIG_NVMEM_SYSFS=y -# CONFIG_NVMEM_VF610_OCOTP is not set -CONFIG_NVME_CORE=y -# CONFIG_NVME_HWMON is not set -# CONFIG_NVME_MULTIPATH is not set -# CONFIG_NVME_VERBOSE_ERRORS is not set -# CONFIG_OBJAGG is not set -# CONFIG_OCTEON_ETHERNET is not set -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -# CONFIG_OF_ALL_DTBS is not set -CONFIG_OF_DYNAMIC=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IOMMU=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_OF_OVERLAY=y -CONFIG_OF_RESOLVE=y -CONFIG_OLD_SIGSUSPEND3=y -# CONFIG_OLPC_XO175 is not set -# CONFIG_OMAP_CONTROL_PHY is not set -# CONFIG_OMAP_IOMMU is not set -# CONFIG_OPEN_DICE is not set -# CONFIG_OVERLAY_FS_XINO_AUTO is not set -# CONFIG_OWL_PM_DOMAINS is not set -# CONFIG_OWL_TIMER is not set -# CONFIG_OXNAS_RPS_TIMER is not set -CONFIG_PADATA=y -CONFIG_PAGE_POOL=y -# CONFIG_PAGE_POOL_STATS is not set -CONFIG_PAGE_SIZE_LESS_THAN_256KB=y -CONFIG_PAGE_SIZE_LESS_THAN_64KB=y -CONFIG_PAHOLE_VERSION=0 -# CONFIG_PANIC_ON_OOPS is not set -CONFIG_PANIC_ON_OOPS_VALUE=0 -CONFIG_PANIC_TIMEOUT=0 -# CONFIG_PARMAN is not set -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_PARTITION_PERCPU=y -# CONFIG_PATA_BK3710 is not set -# CONFIG_PATA_IXP4XX_CF is not set -# CONFIG_PATA_PXA is not set -# CONFIG_PATA_SAMSUNG_CF is not set -CONFIG_PATA_SIS=y -CONFIG_PCI=y -CONFIG_PCIEAER=y -CONFIG_PCIEASPM=y -CONFIG_PCIEASPM_DEFAULT=y -# CONFIG_PCIEASPM_PERFORMANCE is not set -# CONFIG_PCIEASPM_POWERSAVE is not set -# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set -CONFIG_PCIEPORTBUS=y -# CONFIG_PCIE_APPLE is not set -# CONFIG_PCIE_ARTPEC6_HOST is not set -# CONFIG_PCIE_BRCMSTB is not set -CONFIG_PCIE_DW=y -CONFIG_PCIE_DW_HOST=y -# CONFIG_PCIE_FU740 is not set -# CONFIG_PCIE_HISI_STB is not set -# CONFIG_PCIE_INTEL_GW is not set -# CONFIG_PCIE_KEEMBAY_HOST is not set -# CONFIG_PCIE_MEDIATEK is not set -# CONFIG_PCIE_MEDIATEK_GEN3 is not set -# CONFIG_PCIE_MOBIVEIL_PLAT is not set -# CONFIG_PCIE_MT7621 is not set -CONFIG_PCIE_PME=y -# CONFIG_PCIE_QCOM is not set -# CONFIG_PCIE_RCAR_HOST is not set -CONFIG_PCIE_ROCKCHIP=y -CONFIG_PCIE_ROCKCHIP_DW_HOST=y -CONFIG_PCIE_ROCKCHIP_HOST=y -# CONFIG_PCIE_SPEAR13XX is not set -# CONFIG_PCIE_TEGRA194_HOST is not set -# CONFIG_PCIE_UNIPHIER is not set -# CONFIG_PCIE_VISCONTI_HOST is not set -# CONFIG_PCIE_XILINX_CPM is not set -# CONFIG_PCIE_XILINX_NWL is not set -# CONFIG_PCI_AARDVARK is not set -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DOMAINS_GENERIC=y -# CONFIG_PCI_EXYNOS is not set -# CONFIG_PCI_IMX6 is not set -# CONFIG_PCI_KEYSTONE_HOST is not set -# CONFIG_PCI_LOONGSON is not set -CONFIG_PCI_MSI=y -CONFIG_PCI_MSI_IRQ_DOMAIN=y -CONFIG_PCI_STUB=y -# CONFIG_PCI_TEGRA is not set -# CONFIG_PCI_VERSATILE is not set -CONFIG_PCS_XPCS=y -# CONFIG_PECI is not set -CONFIG_PGTABLE_LEVELS=4 -CONFIG_PHYLIB=y -CONFIG_PHYLINK=y -CONFIG_PHYS_ADDR_T_64BIT=y -# CONFIG_PHY_AM654_SERDES is not set -CONFIG_PHY_ATH79_USB=y -# CONFIG_PHY_BCM63XX_USBH is not set -# CONFIG_PHY_BCM_NS_USB2 is not set -# CONFIG_PHY_BCM_NS_USB3 is not set -# CONFIG_PHY_BCM_SR_PCIE is not set -# CONFIG_PHY_BCM_SR_USB is not set -# CONFIG_PHY_BERLIN_SATA is not set -# CONFIG_PHY_BERLIN_USB is not set -# CONFIG_PHY_BRCM_SATA is not set -# CONFIG_PHY_BRCM_USB is not set -# CONFIG_PHY_CADENCE_DPHY_RX is not set -# CONFIG_PHY_CYGNUS_PCIE is not set -# CONFIG_PHY_DA8XX_USB is not set -# CONFIG_PHY_DM816X_USB is not set -# CONFIG_PHY_EXYNOS_PCIE is not set -# CONFIG_PHY_FSL_LYNX_28G is not set -# CONFIG_PHY_HI3660_USB is not set -# CONFIG_PHY_HI3670_PCIE is not set -# CONFIG_PHY_HI3670_USB is not set -# CONFIG_PHY_HI6220_USB is not set -# CONFIG_PHY_HISI_INNO_USB2 is not set -# CONFIG_PHY_HISTB_COMBPHY is not set -# CONFIG_PHY_INGENIC_USB is not set -# CONFIG_PHY_INTEL_KEEMBAY_USB is not set -# CONFIG_PHY_INTEL_LGM_COMBO is not set -# CONFIG_PHY_INTEL_LGM_EMMC is not set -# CONFIG_PHY_INTEL_THUNDERBAY_EMMC is not set -# CONFIG_PHY_J721E_WIZ is not set -# CONFIG_PHY_LANTIQ_RCU_USB2 is not set -# CONFIG_PHY_LANTIQ_VRX200_PCIE is not set -# CONFIG_PHY_LPC18XX_USB_OTG is not set -# CONFIG_PHY_MESON8B_USB2 is not set -# CONFIG_PHY_MESON8_HDMI_TX is not set -# CONFIG_PHY_MESON_AXG_MIPI_DPHY is not set -# CONFIG_PHY_MESON_AXG_MIPI_PCIE_ANALOG is not set -# CONFIG_PHY_MESON_AXG_PCIE is not set -# CONFIG_PHY_MESON_G12A_USB2 is not set -# CONFIG_PHY_MESON_G12A_USB3_PCIE is not set -# CONFIG_PHY_MESON_GXL_USB2 is not set -# CONFIG_PHY_MMP3_HSIC is not set -# CONFIG_PHY_MMP3_USB is not set -# CONFIG_PHY_MT7621_PCI is not set -# CONFIG_PHY_MTK_MIPI_DSI is not set -# CONFIG_PHY_MTK_TPHY is not set -# CONFIG_PHY_MTK_UFS is not set -# CONFIG_PHY_MTK_XSPHY is not set -CONFIG_PHY_MVEBU_A3700_COMPHY=y -CONFIG_PHY_MVEBU_A3700_UTMI=y -# CONFIG_PHY_MVEBU_A38X_COMPHY is not set -# CONFIG_PHY_MVEBU_CP110_COMPHY is not set -# CONFIG_PHY_NS2_PCIE is not set -# CONFIG_PHY_NS2_USB_DRD is not set -# CONFIG_PHY_PISTACHIO_USB is not set -# CONFIG_PHY_PXA_USB is not set -# CONFIG_PHY_QCOM_EDP is not set -# CONFIG_PHY_QCOM_IPQ4019_USB is not set -# CONFIG_PHY_QCOM_IPQ806X_USB is not set -# CONFIG_PHY_QCOM_PCIE2 is not set -# CONFIG_PHY_QCOM_QMP is not set -# CONFIG_PHY_QCOM_QUSB2 is not set -# CONFIG_PHY_QCOM_USB_HS_28NM is not set -# CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2 is not set -# CONFIG_PHY_QCOM_USB_SS is not set -# CONFIG_PHY_RALINK_USB is not set -# CONFIG_PHY_RCAR_GEN3_USB3 is not set -CONFIG_PHY_ROCKCHIP_DP=y -CONFIG_PHY_ROCKCHIP_DPHY_RX0=y -CONFIG_PHY_ROCKCHIP_EMMC=y -CONFIG_PHY_ROCKCHIP_INNO_CSIDPHY=y -CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY=y -CONFIG_PHY_ROCKCHIP_INNO_HDMI=y -CONFIG_PHY_ROCKCHIP_INNO_USB2=y -CONFIG_PHY_ROCKCHIP_NANENG_COMBO_PHY=y -CONFIG_PHY_ROCKCHIP_PCIE=y -CONFIG_PHY_ROCKCHIP_SNPS_PCIE3=y -CONFIG_PHY_ROCKCHIP_TYPEC=y -CONFIG_PHY_ROCKCHIP_USB=y -# CONFIG_PHY_SAMSUNG_UFS is not set -# CONFIG_PHY_SPARX5_SERDES is not set -# CONFIG_PHY_STIH407_USB is not set -# CONFIG_PHY_STM32_USBPHYC is not set -# CONFIG_PHY_ST_SPEAR1310_MIPHY is not set -# CONFIG_PHY_ST_SPEAR1340_MIPHY is not set -# CONFIG_PHY_SUN4I_USB is not set -# CONFIG_PHY_SUN50I_USB3 is not set -# CONFIG_PHY_SUN6I_MIPI_DPHY is not set -# CONFIG_PHY_SUN9I_USB is not set -# CONFIG_PHY_TEGRA194_P2U is not set -# CONFIG_PHY_UNIPHIER_AHCI is not set -# CONFIG_PHY_UNIPHIER_PCIE is not set -# CONFIG_PHY_UNIPHIER_USB2 is not set -# CONFIG_PHY_UNIPHIER_USB3 is not set -# CONFIG_PHY_XILINX_ZYNQMP is not set -CONFIG_PINCTRL=y -# CONFIG_PINCTRL_AS370 is not set -# CONFIG_PINCTRL_ASPEED_G4 is not set -# CONFIG_PINCTRL_ASPEED_G5 is not set -# CONFIG_PINCTRL_ASPEED_G6 is not set -# CONFIG_PINCTRL_AT91PIO4 is not set -# CONFIG_PINCTRL_BCM281XX is not set -# CONFIG_PINCTRL_BCM2835 is not set -# CONFIG_PINCTRL_BCM4908 is not set -# CONFIG_PINCTRL_BCM6318 is not set -# CONFIG_PINCTRL_BCM63268 is not set -# CONFIG_PINCTRL_BCM6328 is not set -# CONFIG_PINCTRL_BCM6358 is not set -# CONFIG_PINCTRL_BCM6362 is not set -# CONFIG_PINCTRL_BCM6368 is not set -# CONFIG_PINCTRL_BERLIN_BG4CT is not set -# CONFIG_PINCTRL_BM1880 is not set -# CONFIG_PINCTRL_CYGNUS_MUX is not set -# CONFIG_PINCTRL_DA850_PUPD is not set -# CONFIG_PINCTRL_EQUILIBRIUM is not set -# CONFIG_PINCTRL_IPROC_GPIO is not set -# CONFIG_PINCTRL_KEEMBAY is not set -# CONFIG_PINCTRL_LPASS_LPI is not set -# CONFIG_PINCTRL_LPC18XX is not set -# CONFIG_PINCTRL_MSM is not set -# CONFIG_PINCTRL_MT2701 is not set -# CONFIG_PINCTRL_MT2712 is not set -# CONFIG_PINCTRL_MT6397 is not set -# CONFIG_PINCTRL_MT6765 is not set -# CONFIG_PINCTRL_MT6797 is not set -# CONFIG_PINCTRL_MT7622 is not set -# CONFIG_PINCTRL_MT7623 is not set -# CONFIG_PINCTRL_MT7629 is not set -# CONFIG_PINCTRL_MT7986 is not set -# CONFIG_PINCTRL_MT8127 is not set -# CONFIG_PINCTRL_MT8135 is not set -# CONFIG_PINCTRL_MT8173 is not set -# CONFIG_PINCTRL_MT8183 is not set -# CONFIG_PINCTRL_MT8186 is not set -# CONFIG_PINCTRL_MT8195 is not set -# CONFIG_PINCTRL_MT8365 is not set -# CONFIG_PINCTRL_MT8516 is not set -# CONFIG_PINCTRL_NPCM7XX is not set -# CONFIG_PINCTRL_NS is not set -# CONFIG_PINCTRL_NS2_MUX is not set -# CONFIG_PINCTRL_NSP_GPIO is not set -# CONFIG_PINCTRL_NSP_MUX is not set -# CONFIG_PINCTRL_OWL is not set -# CONFIG_PINCTRL_PFC_EMEV2 is not set -# CONFIG_PINCTRL_PFC_R8A73A4 is not set -# CONFIG_PINCTRL_PFC_R8A7740 is not set -# CONFIG_PINCTRL_PFC_R8A7742 is not set -# CONFIG_PINCTRL_PFC_R8A7743 is not set -# CONFIG_PINCTRL_PFC_R8A7744 is not set -# CONFIG_PINCTRL_PFC_R8A7745 is not set -# CONFIG_PINCTRL_PFC_R8A77470 is not set -# CONFIG_PINCTRL_PFC_R8A774A1 is not set -# CONFIG_PINCTRL_PFC_R8A774B1 is not set -# CONFIG_PINCTRL_PFC_R8A774C0 is not set -# CONFIG_PINCTRL_PFC_R8A774E1 is not set -# CONFIG_PINCTRL_PFC_R8A7778 is not set -# CONFIG_PINCTRL_PFC_R8A7779 is not set -# CONFIG_PINCTRL_PFC_R8A7790 is not set -# CONFIG_PINCTRL_PFC_R8A7791 is not set -# CONFIG_PINCTRL_PFC_R8A7792 is not set -# CONFIG_PINCTRL_PFC_R8A7793 is not set -# CONFIG_PINCTRL_PFC_R8A7794 is not set -# CONFIG_PINCTRL_PFC_R8A77950 is not set -# CONFIG_PINCTRL_PFC_R8A77951 is not set -# CONFIG_PINCTRL_PFC_R8A77960 is not set -# CONFIG_PINCTRL_PFC_R8A77961 is not set -# CONFIG_PINCTRL_PFC_R8A77965 is not set -# CONFIG_PINCTRL_PFC_R8A77970 is not set -# CONFIG_PINCTRL_PFC_R8A77980 is not set -# CONFIG_PINCTRL_PFC_R8A77990 is not set -# CONFIG_PINCTRL_PFC_R8A77995 is not set -# CONFIG_PINCTRL_PFC_R8A779A0 is not set -# CONFIG_PINCTRL_PFC_R8A779F0 is not set -# CONFIG_PINCTRL_PFC_SH7203 is not set -# CONFIG_PINCTRL_PFC_SH7264 is not set -# CONFIG_PINCTRL_PFC_SH7269 is not set -# CONFIG_PINCTRL_PFC_SH73A0 is not set -# CONFIG_PINCTRL_PFC_SH7720 is not set -# CONFIG_PINCTRL_PFC_SH7722 is not set -# CONFIG_PINCTRL_PFC_SH7723 is not set -# CONFIG_PINCTRL_PFC_SH7724 is not set -# CONFIG_PINCTRL_PFC_SH7734 is not set -# CONFIG_PINCTRL_PFC_SH7757 is not set -# CONFIG_PINCTRL_PFC_SH7785 is not set -# CONFIG_PINCTRL_PFC_SH7786 is not set -# CONFIG_PINCTRL_PFC_SHX3 is not set -# CONFIG_PINCTRL_PISTACHIO is not set -# CONFIG_PINCTRL_PXA25X is not set -# CONFIG_PINCTRL_PXA27X is not set -# CONFIG_PINCTRL_QCOM_SSBI_PMIC is not set -# CONFIG_PINCTRL_RENESAS is not set -CONFIG_PINCTRL_RK805=y -CONFIG_PINCTRL_ROCKCHIP=y -# CONFIG_PINCTRL_RZA1 is not set -# CONFIG_PINCTRL_RZA2 is not set -# CONFIG_PINCTRL_RZG2L is not set -# CONFIG_PINCTRL_RZN1 is not set -# CONFIG_PINCTRL_S3C24XX is not set -# CONFIG_PINCTRL_S3C64XX is not set -# CONFIG_PINCTRL_SINGLE is not set -# CONFIG_PINCTRL_SM8450 is not set -# CONFIG_PINCTRL_SPRD_SC9860 is not set -# CONFIG_PINCTRL_STARFIVE is not set -# CONFIG_PINCTRL_STM32F429 is not set -# CONFIG_PINCTRL_STM32F469 is not set -# CONFIG_PINCTRL_STM32F746 is not set -# CONFIG_PINCTRL_STM32F769 is not set -# CONFIG_PINCTRL_STM32H743 is not set -# CONFIG_PINCTRL_STM32MP135 is not set -# CONFIG_PINCTRL_STM32MP157 is not set -# CONFIG_PINCTRL_THUNDERBAY is not set -# CONFIG_PINCTRL_TI_IODELAY is not set -# CONFIG_PINCTRL_TMPV7700 is not set -CONFIG_PINCTRL_UNIPHIER=y -CONFIG_PINCTRL_UNIPHIER_LD11=y -CONFIG_PINCTRL_UNIPHIER_LD20=y -# CONFIG_PINCTRL_UNIPHIER_LD4 is not set -# CONFIG_PINCTRL_UNIPHIER_LD6B is not set -CONFIG_PINCTRL_UNIPHIER_NX1=y -# CONFIG_PINCTRL_UNIPHIER_PRO4 is not set -# CONFIG_PINCTRL_UNIPHIER_PRO5 is not set -# CONFIG_PINCTRL_UNIPHIER_PXS2 is not set -CONFIG_PINCTRL_UNIPHIER_PXS3=y -# CONFIG_PINCTRL_UNIPHIER_SLD8 is not set -# CONFIG_PINCTRL_WPCM450 is not set -CONFIG_PL330_DMA=y -CONFIG_PLATFORM_MHU=y -CONFIG_PM=y -CONFIG_PM_CLK=y -CONFIG_PM_DEVFREQ=y -CONFIG_PM_DEVFREQ_EVENT=y -CONFIG_PM_GENERIC_DOMAINS=y -CONFIG_PM_GENERIC_DOMAINS_OF=y -CONFIG_PM_OPP=y -# CONFIG_POLARFIRE_SOC_MAILBOX is not set -CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y -CONFIG_POWER_RESET=y -# CONFIG_POWER_RESET_GEMINI_POWEROFF is not set -# CONFIG_POWER_RESET_KEYSTONE is not set -# CONFIG_POWER_RESET_OCELOT_RESET is not set -# CONFIG_POWER_RESET_RMOBILE is not set -# CONFIG_POWER_RESET_SC27XX is not set -CONFIG_POWER_SUPPLY=y -CONFIG_POWER_SUPPLY_HWMON=y -CONFIG_PPS=y -CONFIG_PREEMPT=y -CONFIG_PREEMPTION=y -CONFIG_PREEMPT_BUILD=y -CONFIG_PREEMPT_COUNT=y -# CONFIG_PREEMPT_DYNAMIC is not set -# CONFIG_PREEMPT_NONE is not set -CONFIG_PREEMPT_RCU=y -CONFIG_PRINTK_TIME=y -# CONFIG_PRINT_QUOTA_WARNING is not set -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_PROC_VMCORE=y -CONFIG_PTP_1588_CLOCK=y -CONFIG_PTP_1588_CLOCK_DTE=y -CONFIG_PTP_1588_CLOCK_OPTIONAL=y -CONFIG_PTP_1588_CLOCK_QORIQ=y -CONFIG_PWM=y -# CONFIG_PWM_ATMEL is not set -# CONFIG_PWM_BCM2835 is not set -# CONFIG_PWM_BCM_IPROC is not set -# CONFIG_PWM_BCM_KONA is not set -# CONFIG_PWM_BERLIN is not set -# CONFIG_PWM_BRCMSTB is not set -# CONFIG_PWM_CLPS711X is not set -# CONFIG_PWM_EP93XX is not set -# CONFIG_PWM_HIBVT is not set -# CONFIG_PWM_IMG is not set -# CONFIG_PWM_IMX1 is not set -# CONFIG_PWM_IMX27 is not set -# CONFIG_PWM_IMX_TPM is not set -# CONFIG_PWM_INTEL_LGM is not set -# CONFIG_PWM_IQS620A is not set -# CONFIG_PWM_JZ4740 is not set -# CONFIG_PWM_KEEMBAY is not set -# CONFIG_PWM_LPC18XX_SCT is not set -# CONFIG_PWM_LPC32XX is not set -# CONFIG_PWM_LPSS_PCI is not set -# CONFIG_PWM_LPSS_PLATFORM is not set -# CONFIG_PWM_MEDIATEK is not set -# CONFIG_PWM_MESON is not set -# CONFIG_PWM_MTK_DISP is not set -# CONFIG_PWM_MXS is not set -# CONFIG_PWM_OMAP_DMTIMER is not set -# CONFIG_PWM_PXA is not set -# CONFIG_PWM_RASPBERRYPI_POE is not set -# CONFIG_PWM_RCAR is not set -# CONFIG_PWM_RENESAS_TPU is not set -CONFIG_PWM_ROCKCHIP=y -# CONFIG_PWM_SAMSUNG is not set -# CONFIG_PWM_SIFIVE is not set -# CONFIG_PWM_SL28CPLD is not set -# CONFIG_PWM_SPEAR is not set -# CONFIG_PWM_SPRD is not set -# CONFIG_PWM_STI is not set -# CONFIG_PWM_STM32 is not set -# CONFIG_PWM_STM32_LP is not set -# CONFIG_PWM_SUN4I is not set -CONFIG_PWM_SYSFS=y -# CONFIG_PWM_TEGRA is not set -# CONFIG_PWM_TIECAP is not set -# CONFIG_PWM_TIEHRPWM is not set -# CONFIG_PWM_VISCONTI is not set -# CONFIG_PWM_VT8500 is not set -# CONFIG_PXA168_ETH is not set -# CONFIG_QCOM_AOSS_QMP is not set -# CONFIG_QCOM_APCS_IPC is not set -# CONFIG_QCOM_COINCELL is not set -# CONFIG_QCOM_COMMAND_DB is not set -# CONFIG_QCOM_EBI2 is not set -# CONFIG_QCOM_GENI_SE is not set -# CONFIG_QCOM_GSBI is not set -# CONFIG_QCOM_IOMMU is not set -# CONFIG_QCOM_IPCC is not set -# CONFIG_QCOM_LLCC is not set -# CONFIG_QCOM_QFPROM is not set -# CONFIG_QCOM_QMI_HELPERS is not set -# CONFIG_QCOM_RPMH is not set -# CONFIG_QCOM_SMEM is not set -# CONFIG_QCOM_SPM is not set -# CONFIG_QFMT_V1 is not set -# CONFIG_QFMT_V2 is not set -CONFIG_QUEUED_RWLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y -CONFIG_QUOTA=y -CONFIG_QUOTACTL=y -# CONFIG_QUOTA_NETLINK_INTERFACE is not set -CONFIG_RAID_ATTRS=y -CONFIG_RANDOMIZE_BASE=y -CONFIG_RANDOMIZE_KSTACK_OFFSET=y -CONFIG_RANDOMIZE_MODULE_REGION_FULL=y -CONFIG_RAS=y -CONFIG_RATIONAL=y -# CONFIG_RAVB is not set -# CONFIG_RAVE_SP_CORE is not set -# CONFIG_RCAR_DMAC is not set -# CONFIG_RCAR_GEN3_THERMAL is not set -# CONFIG_RCAR_THERMAL is not set -CONFIG_RCU_TRACE=y -# CONFIG_RDA_TIMER is not set -CONFIG_REALTEK_PHY=y -CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=y -CONFIG_REGMAP_IRQ=y -CONFIG_REGMAP_MMIO=y -CONFIG_REGULATOR=y -# CONFIG_REGULATOR_ARM_SCMI is not set -CONFIG_REGULATOR_FAN53555=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_REGULATOR_GPIO=y -# CONFIG_REGULATOR_MAX77650 is not set -# CONFIG_REGULATOR_MAX77686 is not set -# CONFIG_REGULATOR_MAX77693 is not set -# CONFIG_REGULATOR_MAX77802 is not set -# CONFIG_REGULATOR_MAX8907 is not set -# CONFIG_REGULATOR_PBIAS is not set -CONFIG_REGULATOR_PWM=y -# CONFIG_REGULATOR_QCOM_LABIBB is not set -# CONFIG_REGULATOR_QCOM_RPMH is not set -# CONFIG_REGULATOR_QCOM_SPMI is not set -# CONFIG_REGULATOR_QCOM_USB_VBUS is not set -CONFIG_REGULATOR_RK808=y -# CONFIG_REGULATOR_RT5190A is not set -# CONFIG_REGULATOR_S2MPA01 is not set -# CONFIG_REGULATOR_S2MPS11 is not set -# CONFIG_REGULATOR_S5M8767 is not set -# CONFIG_REGULATOR_SC2731 is not set -# CONFIG_REGULATOR_STM32_BOOSTER is not set -# CONFIG_REGULATOR_STM32_PWR is not set -# CONFIG_REGULATOR_STM32_VREFBUF is not set -# CONFIG_REGULATOR_STW481X_VMMC is not set -# CONFIG_REGULATOR_SY7636A is not set -# CONFIG_REGULATOR_TPS6286X is not set -# CONFIG_REGULATOR_TPS68470 is not set -# CONFIG_REGULATOR_UNIPHIER is not set -CONFIG_RELOCATABLE=y -CONFIG_RENESAS_DMA=y -# CONFIG_RENESAS_H8S_INTC is not set -# CONFIG_RENESAS_INTC_IRQPIN is not set -# CONFIG_RENESAS_IRQC is not set -# CONFIG_RENESAS_OSTM is not set -# CONFIG_RENESAS_RZA1_IRQC is not set -# CONFIG_RENESAS_USB_DMAC is not set -# CONFIG_RESET_AXS10X is not set -# CONFIG_RESET_BCM6345 is not set -# CONFIG_RESET_BRCMSTB is not set -CONFIG_RESET_CONTROLLER=y -# CONFIG_RESET_HISI is not set -# CONFIG_RESET_HSDK is not set -# CONFIG_RESET_K210 is not set -# CONFIG_RESET_MESON_AUDIO_ARB is not set -# CONFIG_RESET_NPCM is not set -# CONFIG_RESET_QCOM_AOSS is not set -# CONFIG_RESET_QCOM_PDC is not set -# CONFIG_RESET_RASPBERRYPI is not set -# CONFIG_RESET_RZG2L_USBPHY_CTRL is not set -CONFIG_RESET_SCMI=y -# CONFIG_RESET_SIMPLE is not set -# CONFIG_RESET_STARFIVE_JH7100 is not set -# CONFIG_RESET_TN48M_CPLD is not set -# CONFIG_RESET_UNIPHIER is not set -# CONFIG_RESET_UNIPHIER_GLUE is not set -CONFIG_RFS_ACCEL=y -# CONFIG_ROCKCHIP_ANALOGIX_DP is not set -# CONFIG_ROCKCHIP_CDN_DP is not set -CONFIG_ROCKCHIP_DW_HDMI=y -CONFIG_ROCKCHIP_DW_MIPI_DSI=y -CONFIG_ROCKCHIP_EFUSE=y -CONFIG_ROCKCHIP_GRF=y -CONFIG_ROCKCHIP_INNO_HDMI=y -CONFIG_ROCKCHIP_IODOMAIN=y -CONFIG_ROCKCHIP_IOMMU=y -# CONFIG_ROCKCHIP_LVDS is not set -CONFIG_ROCKCHIP_MBOX=y -# CONFIG_ROCKCHIP_OTP is not set -CONFIG_ROCKCHIP_PHY=y -CONFIG_ROCKCHIP_PM_DOMAINS=y -# CONFIG_ROCKCHIP_RGB is not set -CONFIG_ROCKCHIP_RK3066_HDMI=y -CONFIG_ROCKCHIP_THERMAL=y -CONFIG_ROCKCHIP_TIMER=y -CONFIG_ROCKCHIP_VOP=y -CONFIG_ROCKCHIP_VOP2=y -CONFIG_RODATA_FULL_DEFAULT_ENABLED=y -CONFIG_RPS=y -CONFIG_RSEQ=y -CONFIG_RTC_CLASS=y -# CONFIG_RTC_DRV_ASM9260 is not set -# CONFIG_RTC_DRV_ASPEED is not set -# CONFIG_RTC_DRV_AT91RM9200 is not set -# CONFIG_RTC_DRV_AT91SAM9 is not set -# CONFIG_RTC_DRV_BRCMSTB is not set -# CONFIG_RTC_DRV_DAVINCI is not set -# CONFIG_RTC_DRV_DIGICOLOR is not set -# CONFIG_RTC_DRV_FSL_FTM_ALARM is not set -# CONFIG_RTC_DRV_GAMECUBE is not set -# CONFIG_RTC_DRV_LPC24XX is not set -# CONFIG_RTC_DRV_LPC32XX is not set -# CONFIG_RTC_DRV_MAX77686 is not set -# CONFIG_RTC_DRV_MAX8907 is not set -# CONFIG_RTC_DRV_MESON is not set -# CONFIG_RTC_DRV_MESON_VRTC is not set -# CONFIG_RTC_DRV_MSC313 is not set -# CONFIG_RTC_DRV_MT6397 is not set -# CONFIG_RTC_DRV_MT7622 is not set -# CONFIG_RTC_DRV_MV is not set -# CONFIG_RTC_DRV_MXC is not set -# CONFIG_RTC_DRV_MXC_V2 is not set -# CONFIG_RTC_DRV_PM8XXX is not set -CONFIG_RTC_DRV_RK808=y -# CONFIG_RTC_DRV_RTD119X is not set -# CONFIG_RTC_DRV_S3C is not set -# CONFIG_RTC_DRV_S5M is not set -# CONFIG_RTC_DRV_SC27XX is not set -CONFIG_RTC_DRV_SPEAR=y -# CONFIG_RTC_DRV_STM32 is not set -# CONFIG_RTC_DRV_STMP is not set -# CONFIG_RTC_DRV_SUNXI is not set -# CONFIG_RTC_DRV_TEGRA is not set -# CONFIG_RTC_DRV_VR41XX is not set -# CONFIG_RTC_DRV_VT8500 is not set -CONFIG_RTC_I2C_AND_SPI=y -CONFIG_RTC_NVMEM=y -# CONFIG_RUNTIME_TESTING_MENU is not set -CONFIG_RWSEM_SPIN_ON_OWNER=y -# CONFIG_RZG2L_THERMAL is not set -# CONFIG_RZ_DMAC is not set -# CONFIG_S390_AP_IOMMU is not set -# CONFIG_S390_CCW_IOMMU is not set -# CONFIG_S3C2410_COMMON_CLK is not set -# CONFIG_S3C2412_COMMON_CLK is not set -# CONFIG_S3C2443_COMMON_CLK is not set -# CONFIG_S3C24XX_DMAC is not set -CONFIG_SATA_AHCI=y -# CONFIG_SATA_AHCI_SEATTLE is not set -# CONFIG_SATA_GEMINI is not set -CONFIG_SATA_HOST=y -CONFIG_SATA_PMP=y -CONFIG_SATA_SIS=y -# CONFIG_SC27XX_EFUSE is not set -CONFIG_SCHED_MC=y -CONFIG_SCSI=y -CONFIG_SCSI_COMMON=y -# CONFIG_SCSI_LOWLEVEL is not set -# CONFIG_SCSI_PROC_FS is not set -# CONFIG_SCSI_SAS_ATA is not set -CONFIG_SCSI_SAS_ATTRS=y -CONFIG_SCSI_SAS_HOST_SMP=y -CONFIG_SCSI_SAS_LIBSAS=y -# CONFIG_SECURITY_DMESG_RESTRICT is not set -# CONFIG_SENSORS_ARM_SCMI is not set -CONFIG_SENSORS_ARM_SCPI=y -# CONFIG_SENSORS_BT1_PVT is not set -# CONFIG_SENSORS_RASPBERRYPI_HWMON is not set -# CONFIG_SENSORS_SL28CPLD is not set -# CONFIG_SENSORS_SPARX5 is not set -# CONFIG_SENSORS_SY7636A is not set -# CONFIG_SENSORS_TMP464 is not set -CONFIG_SERIAL_8250_ASPEED_VUART=y -# CONFIG_SERIAL_8250_BCM2835AUX is not set -# CONFIG_SERIAL_8250_BCM7271 is not set -CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y -CONFIG_SERIAL_8250_DW=y -CONFIG_SERIAL_8250_DWLIB=y -CONFIG_SERIAL_8250_EXAR=y -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_FINTEK=y -CONFIG_SERIAL_8250_FSL=y -# CONFIG_SERIAL_8250_IOC3 is not set -# CONFIG_SERIAL_8250_LPC18XX is not set -# CONFIG_SERIAL_8250_MT6577 is not set -CONFIG_SERIAL_8250_NR_UARTS=4 -# CONFIG_SERIAL_8250_OMAP is not set -CONFIG_SERIAL_8250_PCI=y -# CONFIG_SERIAL_8250_PXA is not set -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_TEGRA=y -# CONFIG_SERIAL_8250_UNIPHIER is not set -CONFIG_SERIAL_AMBA_PL011=y -CONFIG_SERIAL_AMBA_PL011_CONSOLE=y -# CONFIG_SERIAL_ATMEL is not set -# CONFIG_SERIAL_CLPS711X is not set -CONFIG_SERIAL_DEV_BUS=y -CONFIG_SERIAL_DEV_CTRL_TTYPORT=y -# CONFIG_SERIAL_HS_LPC32XX is not set -# CONFIG_SERIAL_ICOM is not set -# CONFIG_SERIAL_IMX is not set -# CONFIG_SERIAL_IMX_EARLYCON is not set -# CONFIG_SERIAL_LANTIQ is not set -# CONFIG_SERIAL_LITEUART is not set -CONFIG_SERIAL_MCTRL_GPIO=y -# CONFIG_SERIAL_MESON is not set -# CONFIG_SERIAL_MILBEAUT_USIO is not set -# CONFIG_SERIAL_MPS2_UART is not set -# CONFIG_SERIAL_MSM is not set -# CONFIG_SERIAL_MVEBU_UART is not set -# CONFIG_SERIAL_MXS_AUART is not set -CONFIG_SERIAL_OF_PLATFORM=y -# CONFIG_SERIAL_OMAP is not set -# CONFIG_SERIAL_OWL is not set -# CONFIG_SERIAL_RDA is not set -# CONFIG_SERIAL_SAMSUNG is not set -# CONFIG_SERIAL_SUNPLUS is not set -# CONFIG_SERIAL_TEGRA is not set -# CONFIG_SERIAL_TEGRA_TCU is not set -# CONFIG_SERIAL_VT8500 is not set -CONFIG_SERIO=y -CONFIG_SERIO_AMBAKMI=y -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_OLPC_APSP is not set -CONFIG_SERIO_PCIPS2=y -CONFIG_SERIO_RAW=y -CONFIG_SG_POOL=y -# CONFIG_SHORTCUT_FE is not set -# CONFIG_SH_DMAE is not set -CONFIG_SH_DMAE_BASE=y -# CONFIG_SL28CPLD_INTC is not set -CONFIG_SLUB_DEBUG=y -CONFIG_SMP=y -# CONFIG_SNI_AVE is not set -# CONFIG_SNI_NETSEC is not set -CONFIG_SOCK_RX_QUEUE_MAPPING=y -# CONFIG_SOC_BCM63XX is not set -CONFIG_SOC_BUS=y -# CONFIG_SOC_IMX8M is not set -# CONFIG_SOC_RENESAS is not set -# CONFIG_SOC_SAMSUNG is not set -# CONFIG_SOC_TEGRA20_VOLTAGE_COUPLER is not set -# CONFIG_SOC_TEGRA30_VOLTAGE_COUPLER is not set -CONFIG_SPARSEMEM=y -CONFIG_SPARSEMEM_EXTREME=y -CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y -CONFIG_SPARSE_IRQ=y -# CONFIG_SPARX5_SWITCH is not set -# CONFIG_SPEAR_THERMAL is not set -CONFIG_SPI=y -# CONFIG_SPI_AR934X is not set -# CONFIG_SPI_ARMADA_3700 is not set -# CONFIG_SPI_ASPEED_SMC is not set -# CONFIG_SPI_ATH79 is not set -# CONFIG_SPI_ATMEL is not set -# CONFIG_SPI_ATMEL_QUADSPI is not set -# CONFIG_SPI_BCM2835AUX is not set -# CONFIG_SPI_BCM63XX is not set -# CONFIG_SPI_BCM63XX_HSSPI is not set -CONFIG_SPI_BITBANG=y -# CONFIG_SPI_CLPS711X is not set -CONFIG_SPI_DYNAMIC=y -# CONFIG_SPI_EP93XX is not set -# CONFIG_SPI_FSL_LPSPI is not set -# CONFIG_SPI_FSL_QUADSPI is not set -# CONFIG_SPI_HISI_KUNPENG is not set -# CONFIG_SPI_HISI_SFC is not set -# CONFIG_SPI_HISI_SFC_V3XX is not set -# CONFIG_SPI_IMX is not set -# CONFIG_SPI_INGENIC is not set -# CONFIG_SPI_INTEL_PCI is not set -# CONFIG_SPI_INTEL_PLATFORM is not set -# CONFIG_SPI_JCORE is not set -# CONFIG_SPI_LP8841_RTC is not set -CONFIG_SPI_MASTER=y -CONFIG_SPI_MEM=y -# CONFIG_SPI_MESON_SPICC is not set -# CONFIG_SPI_MESON_SPIFC is not set -# CONFIG_SPI_MT65XX is not set -# CONFIG_SPI_MT7621 is not set -# CONFIG_SPI_MTK_NOR is not set -# CONFIG_SPI_NPCM_FIU is not set -# CONFIG_SPI_NPCM_PSPI is not set -# CONFIG_SPI_NXP_SPIFI is not set -# CONFIG_SPI_OMAP24XX is not set -# CONFIG_SPI_OMAP_100K is not set -# CONFIG_SPI_PIC32 is not set -# CONFIG_SPI_PIC32_SQI is not set -# CONFIG_SPI_QUP is not set -CONFIG_SPI_ROCKCHIP=y -# CONFIG_SPI_RSPI is not set -# CONFIG_SPI_SH is not set -# CONFIG_SPI_SH_HSPI is not set -# CONFIG_SPI_SH_MSIOF is not set -CONFIG_SPI_SPIDEV=y -# CONFIG_SPI_SPRD is not set -# CONFIG_SPI_SPRD_ADI is not set -# CONFIG_SPI_STM32 is not set -# CONFIG_SPI_STM32_QSPI is not set -# CONFIG_SPI_ST_SSC4 is not set -# CONFIG_SPI_SUN4I is not set -# CONFIG_SPI_SUN6I is not set -# CONFIG_SPI_SUNPLUS_SP7021 is not set -# CONFIG_SPI_SYNQUACER is not set -# CONFIG_SPI_TEGRA114 is not set -# CONFIG_SPI_TEGRA20_SFLASH is not set -# CONFIG_SPI_TEGRA20_SLINK is not set -# CONFIG_SPI_TEGRA210_QUAD is not set -# CONFIG_SPI_UNIPHIER is not set -# CONFIG_SPI_XLP is not set -# CONFIG_SPI_XTENSA_XTFPGA is not set -# CONFIG_SPI_ZYNQ_QSPI is not set -# CONFIG_SPRD_COMMON_CLK is not set -# CONFIG_SPRD_DMA is not set -# CONFIG_SPRD_EFUSE is not set -# CONFIG_SPRD_IOMMU is not set -# CONFIG_SPRD_MBOX is not set -# CONFIG_SPRD_THERMAL is not set -# CONFIG_SPRD_TIMER is not set -# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set -CONFIG_SQUASHFS_DECOMP_SINGLE=y -# CONFIG_SQUASHFS_EMBEDDED is not set -CONFIG_SQUASHFS_FILE_CACHE=y -# CONFIG_SQUASHFS_FILE_DIRECT is not set -CONFIG_SRAM=y -CONFIG_SRCU=y -CONFIG_STACKDEPOT=y -CONFIG_STACKPROTECTOR=y -CONFIG_STACKPROTECTOR_STRONG=y -CONFIG_STACKTRACE=y -# CONFIG_STM32_DMA is not set -# CONFIG_STM32_DMAMUX is not set -# CONFIG_STM32_IPCC is not set -# CONFIG_STM32_MDMA is not set -CONFIG_STMMAC_ETH=y -CONFIG_STMMAC_PLATFORM=y -# CONFIG_STMMAC_SELFTESTS is not set -CONFIG_STRICT_DEVMEM=y -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_STUB_CLK_HI3660 is not set -# CONFIG_STUB_CLK_HI6220 is not set -# CONFIG_SUN4I_TIMER is not set -# CONFIG_SUN50I_IOMMU is not set -# CONFIG_SUN5I_HSTIMER is not set -# CONFIG_SUN6I_MSGBOX is not set -# CONFIG_SUN8I_THERMAL is not set -# CONFIG_SUNXI_CCU is not set -# CONFIG_SWAP is not set -CONFIG_SWIOTLB=y -CONFIG_SWPHY=y -CONFIG_SYNC_FILE=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_SYSFS_SYSCALL=y -CONFIG_SYSVIPC_COMPAT=y -# CONFIG_TEGRA20_APB_DMA is not set -# CONFIG_TEGRA210_ADMA is not set -# CONFIG_TEGRA30_TSENSOR is not set -# CONFIG_TEGRA_BPMP_THERMAL is not set -# CONFIG_TEGRA_SOCTHERM is not set -# CONFIG_TEGRA_TIMER is not set -# CONFIG_TEXTSEARCH is not set -CONFIG_THERMAL=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 -CONFIG_THERMAL_EMULATION=y -CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THERMAL_HWMON=y -CONFIG_THERMAL_OF=y -CONFIG_THREAD_INFO_IN_TASK=y -CONFIG_TICK_CPU_ACCOUNTING=y -# CONFIG_TIMER_IMX_SYS_CTR is not set -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -# CONFIG_TINYDRM_ILI9163 is not set -# CONFIG_TI_CPSW_SWITCHDEV is not set -# CONFIG_TI_DAVINCI_EMAC is not set -CONFIG_TI_DMA_CROSSBAR=y -CONFIG_TI_EDMA=y -# CONFIG_TI_PIPE3 is not set -# CONFIG_TI_SOC_THERMAL is not set -# CONFIG_TI_SYSCON_CLK is not set -CONFIG_TRACE_CLOCK=y -CONFIG_TRANSPARENT_HUGEPAGE=y -CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y -# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set -CONFIG_TRANS_TABLE=y -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y -# CONFIG_TS4800_IRQ is not set -# CONFIG_TURRIS_MOX_RWTM is not set -CONFIG_TYPEC=y -# CONFIG_TYPEC_DP_ALTMODE is not set -CONFIG_TYPEC_FUSB302=y -# CONFIG_TYPEC_HD3SS3220 is not set -# CONFIG_TYPEC_MUX_PI3USB30532 is not set -# CONFIG_TYPEC_QCOM_PMIC is not set -# CONFIG_TYPEC_RT1719 is not set -# CONFIG_TYPEC_STUSB160X is not set -# CONFIG_TYPEC_TCPCI is not set -CONFIG_TYPEC_TCPM=y -# CONFIG_TYPEC_TPS6598X is not set -# CONFIG_TYPEC_WUSB3801 is not set -# CONFIG_UACCE is not set -# CONFIG_UCLAMP_TASK is not set -# CONFIG_UEVENT_HELPER is not set -CONFIG_UNINLINE_SPIN_UNLOCK=y -# CONFIG_UNIPHIER_EFUSE is not set -# CONFIG_UNIPHIER_MDMAC is not set -# CONFIG_UNIPHIER_THERMAL is not set -# CONFIG_UNIPHIER_XDMAC is not set -CONFIG_UNMAP_KERNEL_AT_EL0=y -CONFIG_USB=y -# CONFIG_USB_BRCMSTB is not set -# CONFIG_USB_CNS3XXX_EHCI is not set -# CONFIG_USB_CNS3XXX_OHCI is not set -CONFIG_USB_COMMON=y -CONFIG_USB_DWC3=y -CONFIG_USB_DWC3_HOST=y -CONFIG_USB_DWC3_IMX8MP=y -CONFIG_USB_DWC3_MESON_G12A=y -CONFIG_USB_DWC3_OF_SIMPLE=y -CONFIG_USB_DWC3_OMAP=y -CONFIG_USB_DWC3_ST=y -# CONFIG_USB_EHCI_EXYNOS is not set -CONFIG_USB_EHCI_HCD=y -# CONFIG_USB_EHCI_HCD_NPCM7XX is not set -# CONFIG_USB_EHCI_HCD_ORION is not set -CONFIG_USB_EHCI_HCD_PLATFORM=y -# CONFIG_USB_EHCI_HCD_SPEAR is not set -# CONFIG_USB_EHCI_HCD_STI is not set -# CONFIG_USB_EHCI_ROOT_HUB_TT is not set -# CONFIG_USB_EHCI_SH is not set -CONFIG_USB_HID=y -# CONFIG_USB_OHCI_EXYNOS is not set -CONFIG_USB_OHCI_HCD=y -# CONFIG_USB_OHCI_HCD_AT91 is not set -# CONFIG_USB_OHCI_HCD_DAVINCI is not set -# CONFIG_USB_OHCI_HCD_OMAP3 is not set -CONFIG_USB_OHCI_HCD_PLATFORM=y -# CONFIG_USB_OHCI_HCD_S3C2410 is not set -# CONFIG_USB_OHCI_HCD_SPEAR is not set -# CONFIG_USB_OHCI_HCD_STI is not set -# CONFIG_USB_OHCI_SH is not set -CONFIG_USB_PHY=y -# CONFIG_USB_QCOM_EUD is not set -CONFIG_USB_ROLE_SWITCH=y -CONFIG_USB_STORAGE=y -CONFIG_USB_SUPPORT=y -# CONFIG_USB_TEGRA_PHY is not set -CONFIG_USB_ULPI=y -CONFIG_USB_ULPI_BUS=y -CONFIG_USB_ULPI_VIEWPORT=y -CONFIG_USB_XHCI_HCD=y -# CONFIG_USB_XHCI_HISTB is not set -# CONFIG_USB_XHCI_MTK is not set -CONFIG_USB_XHCI_PLATFORM=y -# CONFIG_USB_XHCI_RCAR is not set -CONFIG_USERIO=y -# CONFIG_UX500_SOC_ID is not set -CONFIG_VIDEOMODE_HELPERS=y -# CONFIG_VIRTIO_MENU is not set -CONFIG_VMAP_STACK=y -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_VT=y -# CONFIG_VT8500_TIMER is not set -CONFIG_VT_CONSOLE=y -CONFIG_VT_HW_CONSOLE_BINDING=y -# CONFIG_WARN_ABI_ERRORS is not set -# CONFIG_WARN_MISSING_DOCUMENTS is not set -# CONFIG_WATCHDOG is not set -CONFIG_XARRAY_MULTI=y -# CONFIG_XGENE_DMA is not set -CONFIG_XPS=y -CONFIG_XXHASH=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_ARMTHUMB=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZONE_DMA32=y diff --git a/target/linux/rockchip/files-5.18/arch/arm64/boot/dts/rockchip/rk3328-doornet1.dts b/target/linux/rockchip/files-5.18/arch/arm64/boot/dts/rockchip/rk3328-doornet1.dts deleted file mode 100644 index 6f9cf81f89370a..00000000000000 --- a/target/linux/rockchip/files-5.18/arch/arm64/boot/dts/rockchip/rk3328-doornet1.dts +++ /dev/null @@ -1,495 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2021 EmbedFire - */ - -/dts-v1/; - -#include -#include -#include "rk3328-dram-nanopi2-timing.dtsi" -#include "rk3328.dtsi" - -/ { - model = "EmbedFire DoorNet1"; - compatible = "embedfire,doornet1", "rockchip,rk3328"; - - aliases { - led-boot = &sys_led; - led-failsafe = &sys_led; - led-running = &sys_led; - led-upgrade = &sys_led; - // mmc1 = &sdmmc; - // mmc0 = &emmc; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - gmac_clk: gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "gmac_clkin"; - #clock-cells = <0>; - }; - - keys { - compatible = "gpio-keys"; - pinctrl-0 = <&reset_button_pin>; - pinctrl-names = "default"; - - reset { - label = "reset"; - gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; - linux,code = ; - debounce-interval = <50>; - }; - }; - - vcc_rtl8153: vcc-rtl8153-regulator { - compatible = "regulator-fixed"; - gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&rtl8153_en_drv>; - regulator-always-on; - regulator-name = "vcc_rtl8153"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - }; - - dmc: dmc { - compatible = "rockchip,rk3328-dmc"; - devfreq-events = <&dfi>; - center-supply = <&vdd_log>; - clocks = <&cru SCLK_DDRCLK>; - clock-names = "dmc_clk"; - operating-points-v2 = <&dmc_opp_table>; - ddr_timing = <&ddr_timing>; - upthreshold = <40>; - downdifferential = <20>; - auto-min-freq = <786000>; - auto-freq-en = <1>; - #cooling-cells = <2>; - status = "okay"; - - ddr_power_model: ddr_power_model { - compatible = "ddr_power_model"; - dynamic-power-coefficient = <120>; - static-power-coefficient = <200>; - ts = <32000 4700 (-80) 2>; - thermal-zone = "soc-thermal"; - }; - }; - - dmc_opp_table: dmc-opp-table { - compatible = "operating-points-v2"; - - rockchip,leakage-voltage-sel = < - 1 10 0 - 11 254 1 - >; - nvmem-cells = <&logic_leakage>; - nvmem-cell-names = "ddr_leakage"; - - opp-786000000 { - opp-hz = /bits/ 64 <786000000>; - opp-microvolt = <1075000>; - opp-microvolt-L0 = <1075000>; - opp-microvolt-L1 = <1050000>; - }; - opp-798000000 { - opp-hz = /bits/ 64 <798000000>; - opp-microvolt = <1075000>; - opp-microvolt-L0 = <1075000>; - opp-microvolt-L1 = <1050000>; - }; - opp-840000000 { - opp-hz = /bits/ 64 <840000000>; - opp-microvolt = <1075000>; - opp-microvolt-L0 = <1075000>; - opp-microvolt-L1 = <1050000>; - }; - opp-924000000 { - opp-hz = /bits/ 64 <924000000>; - opp-microvolt = <1100000>; - opp-microvolt-L0 = <1100000>; - opp-microvolt-L1 = <1075000>; - }; - opp-1056000000 { - opp-hz = /bits/ 64 <1056000000>; - opp-microvolt = <1175000>; - opp-microvolt-L0 = <1175000>; - opp-microvolt-L1 = <1150000>; - }; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; - pinctrl-names = "default"; - - lan_led: led-0 { - gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; - label = "doornet1:green:lan"; - }; - - sys_led: led-1 { - gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; - label = "doornet1:red:sys"; - }; - - wan_led: led-2 { - gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; - label = "doornet1:green:wan"; - }; - - wifi_enable: wifi_enable { - gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>; - label = "wifi-enable"; - }; - }; - - vcc_io_sdio: sdmmcio-regulator { - compatible = "regulator-gpio"; - enable-active-high; - gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>; - pinctrl-0 = <&sdio_vcc_pin>; - pinctrl-names = "default"; - regulator-name = "vcc_io_sdio"; - regulator-always-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-settling-time-us = <5000>; - regulator-type = "voltage"; - startup-delay-us = <2000>; - states = <1800000 0x1 - 3300000 0x0>; - vin-supply = <&vcc_io_33>; - }; - - vcc_sd: sdmmc-regulator { - compatible = "regulator-fixed"; - gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; - pinctrl-0 = <&sdmmc0m1_pin>; - pinctrl-names = "default"; - regulator-name = "vcc_sd"; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc_io_33>; - }; - - vdd_5v: vdd-5v { - compatible = "regulator-fixed"; - regulator-name = "vdd_5v"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; -}; - -&cpu0 { - cpu-supply = <&vdd_arm>; -}; - -&cpu1 { - cpu-supply = <&vdd_arm>; -}; - -&cpu2 { - cpu-supply = <&vdd_arm>; -}; - -&cpu3 { - cpu-supply = <&vdd_arm>; -}; - -&dfi { - status = "okay"; -}; - -&gmac2io { - assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; - assigned-clock-parents = <&gmac_clk>, <&gmac_clk>; - clock_in_out = "input"; - phy-mode = "rgmii"; - phy-supply = <&vcc_io_33>; - pinctrl-0 = <&rgmiim1_pins>; - pinctrl-names = "default"; - snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; - snps,reset-delays-us = <0 1000000 50000>; - snps,reset-active-low; - tx_delay = <0x18>; - rx_delay = <0x24>; - status = "okay"; -}; - -&i2c1 { - status = "okay"; - - rk805: pmic@18 { - compatible = "rockchip,rk805"; - reg = <0x18>; - interrupt-parent = <&gpio1>; - interrupts = <24 IRQ_TYPE_LEVEL_LOW>; - #clock-cells = <1>; - clock-output-names = "xin32k", "rk805-clkout2"; - gpio-controller; - #gpio-cells = <2>; - pinctrl-0 = <&pmic_int_l>; - pinctrl-names = "default"; - rockchip,system-power-controller; - wakeup-source; - - vcc1-supply = <&vdd_5v>; - vcc2-supply = <&vdd_5v>; - vcc3-supply = <&vdd_5v>; - vcc4-supply = <&vdd_5v>; - vcc5-supply = <&vcc_io_33>; - vcc6-supply = <&vdd_5v>; - - regulators { - vdd_log: DCDC_REG1 { - regulator-name = "vdd_log"; - regulator-always-on; - regulator-boot-on; - regulator-init-microvolt = <1075000>; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1000000>; - }; - }; - - vdd_arm: DCDC_REG2 { - regulator-name = "vdd_arm"; - regulator-always-on; - regulator-boot-on; - regulator-init-microvolt = <1225000>; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <950000>; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_io_33: DCDC_REG4 { - regulator-name = "vcc_io_33"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcc_18: LDO_REG1 { - regulator-name = "vcc_18"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc18_emmc: LDO_REG2 { - regulator-name = "vcc18_emmc"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdd_10: LDO_REG3 { - regulator-name = "vdd_10"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1000000>; - }; - }; - }; - }; - usb { - rtl8153_en_drv: rtl8153-en-drv { - rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&io_domains { - pmuio-supply = <&vcc_io_33>; - vccio1-supply = <&vcc_io_33>; - vccio2-supply = <&vcc18_emmc>; - vccio3-supply = <&vcc_io_sdio>; - vccio4-supply = <&vcc_18>; - vccio5-supply = <&vcc_io_33>; - vccio6-supply = <&vcc_io_33>; - status = "okay"; -}; - -&pinctrl { - button { - reset_button_pin: reset-button-pin { - rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - ethernet-phy { - eth_phy_reset_pin: eth-phy-reset-pin { - rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; - }; - }; - - leds { - lan_led_pin: lan-led-pin { - rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - sys_led_pin: sys-led-pin { - rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - wan_led_pin: wan-led-pin { - rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - wifi_pin: wifi_pin{ - rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - sd { - sdio_vcc_pin: sdio-vcc-pin { - rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; -}; - -&pwm2 { - status = "okay"; -}; - -&sdmmc { - bus-width = <4>; - cap-sd-highspeed; - disable-wp; - pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; - pinctrl-names = "default"; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vmmc-supply = <&vcc_sd>; - vqmmc-supply = <&vcc_io_sdio>; - status = "okay"; -}; - -&emmc { - bus-width = <8>; - cap-mmc-highspeed; - max-frequency = <150000000>; - mmc-ddr-1_8v; - mmc-hs200-1_8v; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; - vmmc-supply = <&vcc_io_33>; - vqmmc-supply = <&vcc18_emmc>; - status = "okay"; -}; - -&tsadc { - rockchip,hw-tshut-mode = <0>; - rockchip,hw-tshut-polarity = <0>; - status = "okay"; -}; - -&u2phy { - status = "okay"; -}; - -&u2phy_host { - status = "okay"; -}; - -&u2phy_otg { - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&usb20_otg { - status = "okay"; - dr_mode = "host"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usbdrd3 { - status = "okay"; -}; - -&usbdrd3 { - dr_mode = "host"; - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; - - /* Second port is for USB 3.0 */ - rtl8153: device@2 { - compatible = "usbbda,8153"; - reg = <2>; - - realtek,led-data = <0x87>; - }; -}; diff --git a/target/linux/rockchip/files-5.18/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c.dts b/target/linux/rockchip/files-5.18/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c.dts deleted file mode 100644 index adf91a0306cc45..00000000000000 --- a/target/linux/rockchip/files-5.18/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c.dts +++ /dev/null @@ -1,47 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2021 FriendlyElec Computer Tech. Co., Ltd. - * (http://www.friendlyarm.com) - * - * Copyright (c) 2021 Tianling Shen - */ - -/dts-v1/; - -#include "rk3328-nanopi-r2s.dts" - -/ { - model = "FriendlyElec NanoPi R2C"; - compatible = "friendlyarm,nanopi-r2c", "rockchip,rk3328"; -}; - -&gmac2io { - phy-handle = <&yt8521s>; - - mdio { - /delete-node/ ethernet-phy@1; - - yt8521s: ethernet-phy@3 { - compatible = "ethernet-phy-id0000.011a", - "ethernet-phy-ieee802.3-c22"; - reg = <3>; - pinctrl-0 = <ð_phy_reset_pin>; - pinctrl-names = "default"; - reset-assert-us = <10000>; - reset-deassert-us = <50000>; - reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; - }; - }; -}; - -&lan_led { - label = "nanopi-r2c:green:lan"; -}; - -&sys_led { - label = "nanopi-r2c:red:sys"; -}; - -&wan_led { - label = "nanopi-r2c:green:wan"; -}; diff --git a/target/linux/rockchip/files-5.18/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts b/target/linux/rockchip/files-5.18/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts deleted file mode 100644 index ee37573d6a8b58..00000000000000 --- a/target/linux/rockchip/files-5.18/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts +++ /dev/null @@ -1,70 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -#include "rk3328-orangepi-r1-plus.dts" - -/ { - model = "Xunlong Orange Pi R1 Plus LTS"; - compatible = "xunlong,orangepi-r1-plus-lts", "rockchip,rk3328"; -}; - -/delete-node/ &rtl8211e; -&gmac2io { - phy-handle = <ðphy3>; - snps,reset-delays-us = <0 15000 50000>; - tx_delay = <0x19>; - rx_delay = <0x05>; - status = "okay"; - - mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - - ethphy3: ethernet-phy@0 { - reg = <0x0>; - keep-clkout-on; - reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; - }; - }; -}; - -&sdmmc { - bus-width = <4>; - cap-sd-highspeed; - disable-wp; - pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; - pinctrl-names = "default"; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vmmc-supply = <&vcc_sd>; - vqmmc-supply = <&vcc_io_sdio>; - status = "okay"; -}; - -&dmc_opp_table { - opp-1056000000 { - status = "disabled"; - }; - opp-924000000 { - status = "disabled"; - }; - opp-840000000 { - status = "disabled"; - }; - opp-798000000 { - status = "disabled"; - }; -}; - -&sys_led { - label = "orangepi-r1-plus-lts:red:sys"; -}; - -&wan_led { - label = "orangepi-r1-plus-lts:green:wan"; -}; - -&lan_led { - label = "orangepi-r1-plus-lts:green:lan"; -}; diff --git a/target/linux/rockchip/files-5.18/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts b/target/linux/rockchip/files-5.18/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts deleted file mode 100644 index ed585daf438d64..00000000000000 --- a/target/linux/rockchip/files-5.18/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts +++ /dev/null @@ -1,39 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -#include "rk3328-nanopi-r2s.dts" - -/ { - model = "Xunlong Orange Pi R1 Plus"; - compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328"; -}; - -&lan_led { - label = "orangepi-r1-plus:green:lan"; -}; - -&spi0 { - max-freq = <48000000>; - status = "okay"; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <10000000>; - }; -}; - -&sys_led { - gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; - label = "orangepi-r1-plus:red:sys"; -}; - -&sys_led_pin { - rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; -}; - -&uart1 { - status = "okay"; -}; - -&wan_led { - label = "orangepi-r1-plus:green:wan"; -}; diff --git a/target/linux/rockchip/files-5.18/arch/arm64/boot/dts/rockchip/rk3399-doornet2.dts b/target/linux/rockchip/files-5.18/arch/arm64/boot/dts/rockchip/rk3399-doornet2.dts deleted file mode 100644 index 7b9d5efafaac94..00000000000000 --- a/target/linux/rockchip/files-5.18/arch/arm64/boot/dts/rockchip/rk3399-doornet2.dts +++ /dev/null @@ -1,113 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) - -/dts-v1/; -#include "rk3399-doornet2.dtsi" - -/ { - model = "EmbedFire DoorNet2 1GB"; - compatible = "embedfire,doornet2", "rockchip,rk3399"; - - aliases { - led-boot = &sys_led; - led-failsafe = &sys_led; - led-running = &sys_led; - led-upgrade = &sys_led; - }; - - /delete-node/ display-subsystem; - - gpio-leds { - pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; - - /delete-node/ status; - - lan_led: led-lan { - gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>; - label = "green:lan"; - }; - - sys_led: led-sys { - gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; - label = "red:sys"; - default-state = "on"; - }; - - wan_led: led-wan { - gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>; - label = "green:wan"; - }; - }; - - gpio-keys { - pinctrl-0 = <&reset_button_pin>; - - /delete-node/ power; - - reset { - debounce-interval = <50>; - gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>; - label = "reset"; - linux,code = ; - }; - }; - - vdd_5v: vdd-5v { - compatible = "regulator-fixed"; - regulator-name = "vdd_5v"; - regulator-always-on; - regulator-boot-on; - }; -}; - -&pcie0 { - max-link-speed = <1>; - num-lanes = <1>; - vpcie3v3-supply = <&vcc3v3_sys>; - - pcie@0 { - reg = <0x00000000 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - - pcie-eth@0,0 { - compatible = "realtek,r8168"; - reg = <0x000000 0 0 0 0>; - - realtek,led-data = <0x870>; - }; - }; -}; - -&pinctrl { - gpio-leds { - /delete-node/ leds-gpio; - - lan_led_pin: lan-led-pin { - rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - sys_led_pin: sys-led-pin { - rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - wan_led_pin: wan-led-pin { - rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - rockchip-key { - /delete-node/ power-key; - - reset_button_pin: reset-button-pin { - rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; -}; - -&u2phy0_host { - phy-supply = <&vdd_5v>; -}; - -&vcc3v3_sys { - vin-supply = <&vcc5v0_sys>; -}; diff --git a/target/linux/rockchip/files-5.18/arch/arm64/boot/dts/rockchip/rk3399-doornet2.dtsi b/target/linux/rockchip/files-5.18/arch/arm64/boot/dts/rockchip/rk3399-doornet2.dtsi deleted file mode 100644 index 4f6bddafe68171..00000000000000 --- a/target/linux/rockchip/files-5.18/arch/arm64/boot/dts/rockchip/rk3399-doornet2.dtsi +++ /dev/null @@ -1,636 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) - -/dts-v1/; -#include -#include "rk3399.dtsi" - -/ { - chosen { - stdout-path = "serial2:1500000n8"; - }; - - clkin_gmac: external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "clkin_gmac"; - #clock-cells = <0>; - }; - - vcc3v3_sys: vcc3v3-sys { - compatible = "regulator-fixed"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc3v3_sys"; - }; - - vcc5v0_sys: vcc5v0-sys { - compatible = "regulator-fixed"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-name = "vcc5v0_sys"; - vin-supply = <&vdd_5v>; - }; - - /* switched by pmic_sleep */ - vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 { - compatible = "regulator-fixed"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc1v8_s3"; - vin-supply = <&vcc_1v8>; - }; - - vcc3v0_sd: vcc3v0-sd { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_pwr_h>; - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "vcc3v0_sd"; - vin-supply = <&vcc3v3_sys>; - }; - - vbus_typec: vbus-typec { - compatible = "regulator-fixed"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-name = "vbus_typec"; - }; - - gpio-keys { - compatible = "gpio-keys"; - autorepeat; - pinctrl-names = "default"; - pinctrl-0 = <&power_key>; - - power { - debounce-interval = <100>; - gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; - label = "GPIO Key Power"; - linux,code = ; - wakeup-source; - }; - }; - - leds: gpio-leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&leds_gpio>; - - status { - gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; - label = "status_led"; - linux,default-trigger = "heartbeat"; - }; - }; - - sdio_pwrseq: sdio-pwrseq { - compatible = "mmc-pwrseq-simple"; - clocks = <&rk808 1>; - clock-names = "ext_clock"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_reg_on_h>; - reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; - }; -}; - -&cpu_b0 { - cpu-supply = <&vdd_cpu_b>; -}; - -&cpu_b1 { - cpu-supply = <&vdd_cpu_b>; -}; - -&cpu_l0 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l1 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l2 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l3 { - cpu-supply = <&vdd_cpu_l>; -}; - -&emmc_phy { - status = "okay"; -}; - -&gmac { - assigned-clocks = <&cru SCLK_RMII_SRC>; - assigned-clock-parents = <&clkin_gmac>; - clock_in_out = "input"; - phy-supply = <&vcc3v3_s3>; - phy-mode = "rgmii"; - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; - snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - snps,reset-delays-us = <0 100000 50000>; - tx_delay = <0x28>; - rx_delay = <0x11>; - status = "okay"; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&hdmi { - ddc-i2c-bus = <&i2c7>; - pinctrl-names = "default"; - pinctrl-0 = <&hdmi_cec>; - status = "okay"; -}; - -&i2c0 { - clock-frequency = <400000>; - i2c-scl-rising-time-ns = <160>; - i2c-scl-falling-time-ns = <30>; - status = "okay"; - - vdd_cpu_b: regulator@40 { - compatible = "silergy,syr827"; - reg = <0x40>; - fcs,suspend-voltage-selector = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&cpu_b_sleep>; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-name = "vdd_cpu_b"; - regulator-ramp-delay = <1000>; - vin-supply = <&vcc3v3_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: regulator@41 { - compatible = "silergy,syr828"; - reg = <0x41>; - fcs,suspend-voltage-selector = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&gpu_sleep>; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-name = "vdd_gpu"; - regulator-ramp-delay = <1000>; - vin-supply = <&vcc3v3_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - rk808: pmic@1b { - compatible = "rockchip,rk808"; - reg = <0x1b>; - clock-output-names = "xin32k", "rtc_clko_wifi"; - #clock-cells = <1>; - interrupt-parent = <&gpio1>; - interrupts = <21 IRQ_TYPE_LEVEL_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l>; - rockchip,system-power-controller; - wakeup-source; - - vcc1-supply = <&vcc3v3_sys>; - vcc2-supply = <&vcc3v3_sys>; - vcc3-supply = <&vcc3v3_sys>; - vcc4-supply = <&vcc3v3_sys>; - vcc6-supply = <&vcc3v3_sys>; - vcc7-supply = <&vcc3v3_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc3v3_sys>; - vcc10-supply = <&vcc3v3_sys>; - vcc11-supply = <&vcc3v3_sys>; - vcc12-supply = <&vcc3v3_sys>; - vddio-supply = <&vcc_3v0>; - - regulators { - vdd_center: DCDC_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-name = "vdd_center"; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_l: DCDC_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-name = "vdd_cpu_l"; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vcc_ddr"; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc_1v8"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc1v8_cam: LDO_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc1v8_cam"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v0_touch: LDO_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "vcc3v0_touch"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc1v8_pmupll: LDO_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc1v8_pmupll"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc_sdio: LDO_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-init-microvolt = <3000000>; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc_sdio"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3000000>; - }; - }; - - vcca3v0_codec: LDO_REG5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "vcca3v0_codec"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v5: LDO_REG6 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-name = "vcc_1v5"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1500000>; - }; - }; - - vcca1v8_codec: LDO_REG7 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcca1v8_codec"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v0: LDO_REG8 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "vcc_3v0"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3000000>; - }; - }; - - vcc3v3_s3: SWITCH_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vcc3v3_s3"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_s0: SWITCH_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vcc3v3_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; -}; - -&i2c1 { - clock-frequency = <200000>; - i2c-scl-rising-time-ns = <150>; - i2c-scl-falling-time-ns = <30>; - status = "okay"; -}; - -&i2c2 { - status = "okay"; -}; - -&i2c7 { - status = "okay"; -}; - -&io_domains { - bt656-supply = <&vcc_1v8>; - audio-supply = <&vcca1v8_codec>; - sdmmc-supply = <&vcc_sdio>; - gpio1830-supply = <&vcc_3v0>; - status = "okay"; -}; - -&pcie_phy { - assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>; - assigned-clock-rates = <100000000>; - assigned-clocks = <&cru SCLK_PCIEPHY_REF>; - status = "okay"; -}; - -&pcie0 { - ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>; - max-link-speed = <2>; - num-lanes = <4>; - status = "okay"; -}; - -&pinctrl { - fusb30x { - fusb0_int: fusb0-int { - rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - gpio-leds { - leds_gpio: leds-gpio { - rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - ethernet-phy { - eth_phy_reset_pin: eth-phy-reset-pin { - rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>; - }; - }; - - pmic { - cpu_b_sleep: cpu-b-sleep { - rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; - }; - - gpu_sleep: gpu-sleep { - rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; - }; - - pmic_int_l: pmic-int-l { - rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - rockchip-key { - power_key: power-key { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - sdio { - bt_host_wake_l: bt-host-wake-l { - rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_reg_on_h: bt-reg-on-h { - /* external pullup to VCC1V8_PMUPLL */ - rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_wake_l: bt-wake-l { - rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - wifi_reg_on_h: wifi-reg_on-h { - rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - sdmmc { - sdmmc0_det_l: sdmmc0-det-l { - rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - sdmmc0_pwr_h: sdmmc0-pwr-h { - rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pmu_io_domains { - pmu1830-supply = <&vcc_3v0>; - status = "okay"; -}; - -&pwm1 { - status = "okay"; -}; - -&saradc { - vref-supply = <&vcca1v8_s3>; - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - mmc-ddr-1_8v; - mmc-hs200-1_8v; - non-removable; - status = "okay"; -}; - -&sdmmc { - bus-width = <4>; - cap-sd-highspeed; - cap-mmc-highspeed; - cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; - disable-wp; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc0_det_l>; - sd-uhs-sdr104; - vmmc-supply = <&vcc3v0_sd>; - vqmmc-supply = <&vcc_sdio>; - status = "okay"; -}; - -&tcphy0 { - status = "okay"; -}; - -&tcphy1 { - status = "okay"; -}; - -&tsadc { - /* tshut mode 0:CRU 1:GPIO */ - rockchip,hw-tshut-mode = <1>; - /* tshut polarity 0:LOW 1:HIGH */ - rockchip,hw-tshut-polarity = <1>; - status = "okay"; -}; - -&u2phy0 { - status = "okay"; -}; - -&u2phy0_host { - status = "okay"; -}; - -&u2phy0_otg { - status = "okay"; -}; - -&u2phy1 { - status = "okay"; -}; - -&u2phy1_otg { - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&usbdrd3_0 { - status = "okay"; -}; - -&usbdrd3_1 { - status = "okay"; -}; - -&usbdrd_dwc3_0 { - dr_mode = "host"; - status = "okay"; -}; - -&usbdrd_dwc3_1 { - dr_mode = "host"; - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&vopb { - status = "okay"; -}; - -&vopb_mmu { - status = "okay"; -}; - -&vopl { - status = "okay"; -}; - -&vopl_mmu { - status = "okay"; -}; - diff --git a/target/linux/rockchip/files-5.18/arch/arm64/boot/dts/rockchip/rk3399-nanopi4-opp.dtsi b/target/linux/rockchip/files-5.18/arch/arm64/boot/dts/rockchip/rk3399-nanopi4-opp.dtsi deleted file mode 100644 index 0c700e32ddbc71..00000000000000 --- a/target/linux/rockchip/files-5.18/arch/arm64/boot/dts/rockchip/rk3399-nanopi4-opp.dtsi +++ /dev/null @@ -1,152 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd - * - * Copyright (c) 2020 Tianling Shen - * Copyright (c) 2020 gzelvis - */ - -/ { - cluster0_opp: opp-table-0 { - compatible = "operating-points-v2"; - opp-shared; - - opp00 { - opp-hz = /bits/ 64 <408000000>; - opp-microvolt = <800000>; - clock-latency-ns = <40000>; - }; - opp01 { - opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <800000>; - }; - opp02 { - opp-hz = /bits/ 64 <816000000>; - opp-microvolt = <850000>; - }; - opp03 { - opp-hz = /bits/ 64 <1008000000>; - opp-microvolt = <925000>; - }; - opp04 { - opp-hz = /bits/ 64 <1200000000>; - opp-microvolt = <1000000>; - }; - opp05 { - opp-hz = /bits/ 64 <1416000000>; - opp-microvolt = <1125000>; - }; - opp06 { - opp-hz = /bits/ 64 <1608000000>; - opp-microvolt = <1225000>; - }; - opp07 { - opp-hz = /bits/ 64 <1800000000>; - opp-microvolt = <1275000>; - }; - }; - - cluster1_opp: opp-table-1 { - compatible = "operating-points-v2"; - opp-shared; - - opp00 { - opp-hz = /bits/ 64 <408000000>; - opp-microvolt = <800000>; - clock-latency-ns = <40000>; - }; - opp01 { - opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <800000>; - }; - opp02 { - opp-hz = /bits/ 64 <816000000>; - opp-microvolt = <825000>; - }; - opp03 { - opp-hz = /bits/ 64 <1008000000>; - opp-microvolt = <875000>; - }; - opp04 { - opp-hz = /bits/ 64 <1200000000>; - opp-microvolt = <950000>; - }; - opp05 { - opp-hz = /bits/ 64 <1416000000>; - opp-microvolt = <1025000>; - }; - opp06 { - opp-hz = /bits/ 64 <1608000000>; - opp-microvolt = <1100000>; - }; - opp07 { - opp-hz = /bits/ 64 <1800000000>; - opp-microvolt = <1200000>; - }; - opp08 { - opp-hz = /bits/ 64 <2016000000>; - opp-microvolt = <1250000>; - }; - opp09 { - opp-hz = /bits/ 64 <2208000000>; - opp-microvolt = <1325000>; - }; - }; - - gpu_opp_table: opp-table-2 { - compatible = "operating-points-v2"; - - opp00 { - opp-hz = /bits/ 64 <200000000>; - opp-microvolt = <800000>; - }; - opp01 { - opp-hz = /bits/ 64 <297000000>; - opp-microvolt = <800000>; - }; - opp02 { - opp-hz = /bits/ 64 <400000000>; - opp-microvolt = <825000>; - }; - opp03 { - opp-hz = /bits/ 64 <500000000>; - opp-microvolt = <875000>; - }; - opp04 { - opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <925000>; - }; - opp05 { - opp-hz = /bits/ 64 <800000000>; - opp-microvolt = <1100000>; - }; - }; -}; - -&cpu_l0 { - operating-points-v2 = <&cluster0_opp>; -}; - -&cpu_l1 { - operating-points-v2 = <&cluster0_opp>; -}; - -&cpu_l2 { - operating-points-v2 = <&cluster0_opp>; -}; - -&cpu_l3 { - operating-points-v2 = <&cluster0_opp>; -}; - -&cpu_b0 { - operating-points-v2 = <&cluster1_opp>; -}; - -&cpu_b1 { - operating-points-v2 = <&cluster1_opp>; -}; - -&gpu { - operating-points-v2 = <&gpu_opp_table>; -}; diff --git a/target/linux/rockchip/files-5.18/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts b/target/linux/rockchip/files-5.18/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts deleted file mode 100644 index f6e7710a01cb4f..00000000000000 --- a/target/linux/rockchip/files-5.18/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts +++ /dev/null @@ -1,19 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2019 Akash Gajjar - * Copyright (c) 2019 Pragnesh Patel - */ - -/* TODO - * Delete this file and migrate RockPi 4 to RockPi 4A after - * removing Kernel 5.4. - */ - - -/dts-v1/; -#include "rk3399-rock-pi-4.dtsi" - -/ { - model = "Radxa ROCK Pi 4"; - compatible = "radxa,rockpi4", "rockchip,rk3399"; -}; diff --git a/target/linux/rockchip/patches-5.18/005-arm64-dts-rockchip-add-EEPROM-node-for-NanoPi-R4S.patch b/target/linux/rockchip/patches-5.18/005-arm64-dts-rockchip-add-EEPROM-node-for-NanoPi-R4S.patch deleted file mode 100644 index 792028b29290f5..00000000000000 --- a/target/linux/rockchip/patches-5.18/005-arm64-dts-rockchip-add-EEPROM-node-for-NanoPi-R4S.patch +++ /dev/null @@ -1,31 +0,0 @@ -From af20b3384e8723077cc6484160b0cf4e9be321de Mon Sep 17 00:00:00 2001 -From: Tianling Shen -Date: Mon, 7 Jun 2021 15:45:37 +0800 -Subject: [PATCH] arm64: dts: rockchip: add EEPROM node for NanoPi R4S - -NanoPi R4S has a EEPROM attached to the 2nd I2C bus (U92), which -stores the MAC address. - -Signed-off-by: Tianling Shen ---- - arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts | 9 +++++++++ - 1 file changed, 9 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts -@@ -68,6 +68,15 @@ - status = "disabled"; - }; - -+&i2c2 { -+ eeprom@51 { -+ compatible = "microchip,24c02", "atmel,24c02"; -+ reg = <0x51>; -+ pagesize = <16>; -+ read-only; /* This holds our MAC */ -+ }; -+}; -+ - &i2c4 { - status = "disabled"; - }; diff --git a/target/linux/rockchip/patches-5.18/100-rockchip-use-system-LED-for-OpenWrt.patch b/target/linux/rockchip/patches-5.18/100-rockchip-use-system-LED-for-OpenWrt.patch deleted file mode 100644 index 5ec7952bfeaf88..00000000000000 --- a/target/linux/rockchip/patches-5.18/100-rockchip-use-system-LED-for-OpenWrt.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 6731d2c9039fbe1ecf21915eab3acee0a999508a Mon Sep 17 00:00:00 2001 -From: David Bauer -Date: Fri, 10 Jul 2020 21:38:20 +0200 -Subject: [PATCH] rockchip: use system LED for OpenWrt - -Use the SYS LED on the casing for showing system status. - -This patch is kept separate from the NanoPi R2S support patch, as i plan -on submitting the device support upstream. - -Signed-off-by: David Bauer ---- - arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts | 9 ++++++++- - 1 file changed, 8 insertions(+), 1 deletion(-) - ---- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -@@ -18,6 +18,13 @@ - mmc0 = &sdmmc; - }; - -+ aliases { -+ led-boot = &sys_led; -+ led-failsafe = &sys_led; -+ led-running = &sys_led; -+ led-upgrade = &sys_led; -+ }; -+ - chosen { - stdout-path = "serial2:1500000n8"; - }; diff --git a/target/linux/rockchip/patches-5.18/103-arm64-rockchip-add-OF-node-for-USB-eth-on-NanoPi-R2S.patch b/target/linux/rockchip/patches-5.18/103-arm64-rockchip-add-OF-node-for-USB-eth-on-NanoPi-R2S.patch deleted file mode 100644 index 06e593a5a2b1c3..00000000000000 --- a/target/linux/rockchip/patches-5.18/103-arm64-rockchip-add-OF-node-for-USB-eth-on-NanoPi-R2S.patch +++ /dev/null @@ -1,24 +0,0 @@ -From 2795c8b31a686bdb8338f9404d18ef7a154f0d75 Mon Sep 17 00:00:00 2001 -From: David Bauer -Date: Sun, 26 Jul 2020 13:32:59 +0200 -Subject: [PATCH] arm64: rockchip: add OF node for USB eth on NanoPi R2S - -This adds the OF node for the USB3 ethernet adapter on the FriendlyARM -NanoPi R2S. Add the correct value for the RTL8153 LED configuration -register to match the blink behavior of the other port on the device. - -Signed-off-by: David Bauer ---- - arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts | 7 +++++++ - 1 file changed, 7 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -@@ -404,6 +404,7 @@ - rtl8153: device@2 { - compatible = "usbbda,8153"; - reg = <2>; -+ realtek,led-data = <0x87>; - }; - }; - diff --git a/target/linux/rockchip/patches-5.18/111-rockchip-rk3328-add-support-for-FriendlyARM-NanoPi-N.patch b/target/linux/rockchip/patches-5.18/111-rockchip-rk3328-add-support-for-FriendlyARM-NanoPi-N.patch deleted file mode 100644 index 56d2ea02a10d52..00000000000000 --- a/target/linux/rockchip/patches-5.18/111-rockchip-rk3328-add-support-for-FriendlyARM-NanoPi-N.patch +++ /dev/null @@ -1,397 +0,0 @@ -From ac8fa7a4d6e548cd4d4719f12cefb664191a41c2 Mon Sep 17 00:00:00 2001 -From: Marty Jones -Date: Wed, 12 May 2021 13:04:20 -0400 -Subject: [PATCH] rockchip: rk3328: add support for FriendlyARM NanoPi NEO3 - -This patch adds support for FriendlyARM NanoPi NEO3 - -Soc: RockChip RK3328 -RAM: 1GB/2GB DDR4 -LAN: 10/100/1000M Ethernet with unique MAC -USB Host: 1x USB3.0 Type A and 2x USB2.0 on 2.54mm pin header -MicroSD: x 1 for system boot and storage -LED: Power LED x 1, System LED x 1 -Key: User Button x 1 -Fan: 2 Pin JST ZH 1.5mm Connector for 5V Fan -GPIO: 26 pin-header, include I2C, UART, SPI, I2S, GPIO -Power: 5V/1A, via Type-C or GPIO - -Signed-off-by: Marty Jones ---- - arch/arm64/boot/dts/rockchip/Makefile | 1 + - .../boot/dts/rockchip/rk3328-nanopi-neo3.dts | 359 ++++++++++++++++++ - 2 files changed, 360 insertions(+) - create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-nanopi-neo3.dts - ---- a/arch/arm64/boot/dts/rockchip/Makefile -+++ b/arch/arm64/boot/dts/rockchip/Makefile -@@ -9,6 +9,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3318-a9 - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb -+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-neo3.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock-pi-e.dtb ---- /dev/null -+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-neo3.dts -@@ -0,0 +1,359 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2020 David Bauer -+ */ -+ -+/dts-v1/; -+ -+#include -+#include -+#include "rk3328.dtsi" -+ -+/ { -+ model = "FriendlyElec NanoPi NEO3"; -+ compatible = "friendlyarm,nanopi-neo3", "rockchip,rk3328"; -+ -+ chosen { -+ stdout-path = "serial2:1500000n8"; -+ }; -+ -+ gmac_clk: gmac-clock { -+ compatible = "fixed-clock"; -+ clock-frequency = <125000000>; -+ clock-output-names = "gmac_clkin"; -+ #clock-cells = <0>; -+ }; -+ -+ keys { -+ compatible = "gpio-keys"; -+ pinctrl-0 = <&reset_button_pin>; -+ pinctrl-names = "default"; -+ -+ reset { -+ label = "reset"; -+ gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; -+ linux,code = ; -+ debounce-interval = <50>; -+ }; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ pinctrl-0 = <&stat_led_pin>; -+ pinctrl-names = "default"; -+ -+ stat_led: led-1 { -+ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; -+ label = "nanopi-neo3:green:stat"; -+ }; -+ }; -+ -+ vcc_io_sdio: sdmmcio-regulator { -+ compatible = "regulator-gpio"; -+ enable-active-high; -+ gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>; -+ pinctrl-0 = <&sdio_vcc_pin>; -+ pinctrl-names = "default"; -+ regulator-name = "vcc_io_sdio"; -+ regulator-always-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-settling-time-us = <5000>; -+ regulator-type = "voltage"; -+ startup-delay-us = <2000>; -+ states = <1800000 0x1>, -+ <3300000 0x0>; -+ vin-supply = <&vcc_io_33>; -+ }; -+ -+ vcc_sd: sdmmc-regulator { -+ compatible = "regulator-fixed"; -+ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; -+ pinctrl-0 = <&sdmmc0m1_pin>; -+ pinctrl-names = "default"; -+ regulator-name = "vcc_sd"; -+ regulator-boot-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ vin-supply = <&vcc_io_33>; -+ }; -+ -+ vdd_5v: vdd-5v { -+ compatible = "regulator-fixed"; -+ regulator-name = "vdd_5v"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ }; -+}; -+ -+&cpu0 { -+ cpu-supply = <&vdd_arm>; -+}; -+ -+&cpu1 { -+ cpu-supply = <&vdd_arm>; -+}; -+ -+&cpu2 { -+ cpu-supply = <&vdd_arm>; -+}; -+ -+&cpu3 { -+ cpu-supply = <&vdd_arm>; -+}; -+ -+&display_subsystem { -+ status = "disabled"; -+}; -+ -+&gmac2io { -+ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; -+ assigned-clock-parents = <&gmac_clk>, <&gmac_clk>; -+ clock_in_out = "input"; -+ phy-handle = <&rtl8211e>; -+ phy-mode = "rgmii"; -+ phy-supply = <&vcc_io_33>; -+ pinctrl-0 = <&rgmiim1_pins>; -+ pinctrl-names = "default"; -+ rx_delay = <0x18>; -+ snps,aal; -+ tx_delay = <0x24>; -+ status = "okay"; -+ -+ mdio { -+ compatible = "snps,dwmac-mdio"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ rtl8211e: ethernet-phy@1 { -+ reg = <1>; -+ pinctrl-0 = <ð_phy_reset_pin>; -+ pinctrl-names = "default"; -+ reset-assert-us = <10000>; -+ reset-deassert-us = <50000>; -+ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+}; -+ -+&i2c1 { -+ status = "okay"; -+ -+ rk805: pmic@18 { -+ compatible = "rockchip,rk805"; -+ reg = <0x18>; -+ interrupt-parent = <&gpio1>; -+ interrupts = <24 IRQ_TYPE_LEVEL_LOW>; -+ #clock-cells = <1>; -+ clock-output-names = "xin32k", "rk805-clkout2"; -+ gpio-controller; -+ #gpio-cells = <2>; -+ pinctrl-0 = <&pmic_int_l>; -+ pinctrl-names = "default"; -+ rockchip,system-power-controller; -+ wakeup-source; -+ -+ vcc1-supply = <&vdd_5v>; -+ vcc2-supply = <&vdd_5v>; -+ vcc3-supply = <&vdd_5v>; -+ vcc4-supply = <&vdd_5v>; -+ vcc5-supply = <&vcc_io_33>; -+ vcc6-supply = <&vdd_5v>; -+ -+ regulators { -+ vdd_log: DCDC_REG1 { -+ regulator-name = "vdd_log"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <712500>; -+ regulator-max-microvolt = <1450000>; -+ regulator-ramp-delay = <12500>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1000000>; -+ }; -+ }; -+ -+ vdd_arm: DCDC_REG2 { -+ regulator-name = "vdd_arm"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <712500>; -+ regulator-max-microvolt = <1450000>; -+ regulator-ramp-delay = <12500>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <950000>; -+ }; -+ }; -+ -+ vcc_ddr: DCDC_REG3 { -+ regulator-name = "vcc_ddr"; -+ regulator-always-on; -+ regulator-boot-on; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ vcc_io_33: DCDC_REG4 { -+ regulator-name = "vcc_io_33"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3300000>; -+ }; -+ }; -+ -+ vcc_18: LDO_REG1 { -+ regulator-name = "vcc_18"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vcc18_emmc: LDO_REG2 { -+ regulator-name = "vcc18_emmc"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vdd_10: LDO_REG3 { -+ regulator-name = "vdd_10"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1000000>; -+ regulator-max-microvolt = <1000000>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1000000>; -+ }; -+ }; -+ }; -+ }; -+}; -+ -+&io_domains { -+ pmuio-supply = <&vcc_io_33>; -+ vccio1-supply = <&vcc_io_33>; -+ vccio2-supply = <&vcc18_emmc>; -+ vccio3-supply = <&vcc_io_sdio>; -+ vccio4-supply = <&vcc_18>; -+ vccio5-supply = <&vcc_io_33>; -+ vccio6-supply = <&vcc_io_33>; -+ status = "okay"; -+}; -+ -+&pinctrl { -+ button { -+ reset_button_pin: reset-button-pin { -+ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ gmac2io { -+ eth_phy_reset_pin: eth-phy-reset-pin { -+ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; -+ }; -+ }; -+ -+ leds { -+ stat_led_pin: stat-led-pin { -+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ pmic { -+ pmic_int_l: pmic-int-l { -+ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+ -+ sd { -+ sdio_vcc_pin: sdio-vcc-pin { -+ rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+}; -+ -+&pwm2 { -+ status = "okay"; -+}; -+ -+&sdmmc { -+ bus-width = <4>; -+ cap-sd-highspeed; -+ disable-wp; -+ pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; -+ pinctrl-names = "default"; -+ sd-uhs-sdr12; -+ sd-uhs-sdr25; -+ sd-uhs-sdr50; -+ sd-uhs-sdr104; -+ vmmc-supply = <&vcc_sd>; -+ vqmmc-supply = <&vcc_io_sdio>; -+ status = "okay"; -+}; -+ -+&tsadc { -+ rockchip,hw-tshut-mode = <0>; -+ rockchip,hw-tshut-polarity = <0>; -+ status = "okay"; -+}; -+ -+&u2phy { -+ status = "okay"; -+}; -+ -+&u2phy_host { -+ status = "okay"; -+}; -+ -+&u2phy_otg { -+ status = "okay"; -+}; -+ -+&uart2 { -+ status = "okay"; -+}; -+ -+&usb20_otg { -+ status = "okay"; -+ dr_mode = "host"; -+}; -+ -+&usb_host0_ehci { -+ status = "okay"; -+}; -+ -+&usb_host0_ohci { -+ status = "okay"; -+}; -+ -+&usbdrd3 { -+ dr_mode = "host"; -+ status = "okay"; -+}; diff --git a/target/linux/rockchip/patches-5.18/112-rockchip-Add-sata-nodes-to-rk356x.patch b/target/linux/rockchip/patches-5.18/112-rockchip-Add-sata-nodes-to-rk356x.patch deleted file mode 100644 index 7d2a55801f2f36..00000000000000 --- a/target/linux/rockchip/patches-5.18/112-rockchip-Add-sata-nodes-to-rk356x.patch +++ /dev/null @@ -1,78 +0,0 @@ -From 16c0f95d9ed14f033b5f1bd37e96d257b60c198c Mon Sep 17 00:00:00 2001 -From: Frank Wunderlich -Date: Fri, 11 Mar 2022 22:03:57 +0100 -Subject: arm64: dts: rockchip: Add sata nodes to rk356x - -RK356x supports up to 3 sata controllers which were compatible with the -existing snps,dwc-ahci binding. - -Signed-off-by: Frank Wunderlich -Link: https://lore.kernel.org/r/20220311210357.222830-7-linux@fw-web.de -Signed-off-by: Heiko Stuebner ---- - arch/arm64/boot/dts/rockchip/rk3568.dtsi | 14 ++++++++++++++ - arch/arm64/boot/dts/rockchip/rk356x.dtsi | 28 ++++++++++++++++++++++++++++ - 2 files changed, 42 insertions(+) - -(limited to 'arch/arm64/boot/dts/rockchip') - ---- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi -@@ -8,6 +8,20 @@ - / { - compatible = "rockchip,rk3568"; - -+ sata0: sata@fc000000 { -+ compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci"; -+ reg = <0 0xfc000000 0 0x1000>; -+ clocks = <&cru ACLK_SATA0>, <&cru CLK_SATA0_PMALIVE>, -+ <&cru CLK_SATA0_RXOOB>; -+ clock-names = "sata", "pmalive", "rxoob"; -+ interrupts = ; -+ phys = <&combphy0 PHY_TYPE_SATA>; -+ phy-names = "sata-phy"; -+ ports-implemented = <0x1>; -+ power-domains = <&power RK3568_PD_PIPE>; -+ status = "disabled"; -+ }; -+ - pipe_phy_grf0: syscon@fdc70000 { - compatible = "rockchip,rk3568-pipe-phy-grf", "syscon"; - reg = <0x0 0xfdc70000 0x0 0x1000>; ---- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi -@@ -230,6 +230,34 @@ - }; - }; - -+ sata1: sata@fc400000 { -+ compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci"; -+ reg = <0 0xfc400000 0 0x1000>; -+ clocks = <&cru ACLK_SATA1>, <&cru CLK_SATA1_PMALIVE>, -+ <&cru CLK_SATA1_RXOOB>; -+ clock-names = "sata", "pmalive", "rxoob"; -+ interrupts = ; -+ phys = <&combphy1 PHY_TYPE_SATA>; -+ phy-names = "sata-phy"; -+ ports-implemented = <0x1>; -+ power-domains = <&power RK3568_PD_PIPE>; -+ status = "disabled"; -+ }; -+ -+ sata2: sata@fc800000 { -+ compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci"; -+ reg = <0 0xfc800000 0 0x1000>; -+ clocks = <&cru ACLK_SATA2>, <&cru CLK_SATA2_PMALIVE>, -+ <&cru CLK_SATA2_RXOOB>; -+ clock-names = "sata", "pmalive", "rxoob"; -+ interrupts = ; -+ phys = <&combphy2 PHY_TYPE_SATA>; -+ phy-names = "sata-phy"; -+ ports-implemented = <0x1>; -+ power-domains = <&power RK3568_PD_PIPE>; -+ status = "disabled"; -+ }; -+ - gic: interrupt-controller@fd400000 { - compatible = "arm,gic-v3"; - reg = <0x0 0xfd400000 0 0x10000>, /* GICD */ diff --git a/target/linux/rockchip/patches-5.18/113-rockchip-add-rk356x-dwc3-usb3-nodes.patch b/target/linux/rockchip/patches-5.18/113-rockchip-add-rk356x-dwc3-usb3-nodes.patch deleted file mode 100644 index 1972e99edabadf..00000000000000 --- a/target/linux/rockchip/patches-5.18/113-rockchip-add-rk356x-dwc3-usb3-nodes.patch +++ /dev/null @@ -1,120 +0,0 @@ -From 9f4c480f24e2ce1d464ff9d5f8a249a485acdc7f Mon Sep 17 00:00:00 2001 -From: Peter Geis -Date: Fri, 8 Apr 2022 11:12:35 -0400 -Subject: arm64: dts: rockchip: add rk356x dwc3 usb3 nodes - -Add the dwc3 device nodes to the rk356x device trees. -The rk3566 has one usb2 capable dwc3 otg controller and one usb3 capable -dwc3 host controller. -The rk3568 has one usb3 capable dwc3 otg controller and one usb3 capable -dwc3 host controller. - -Signed-off-by: Peter Geis -Tested-by: Frank Wunderlich -Link: https://lore.kernel.org/r/20220408151237.3165046-4-pgwipeout@gmail.com -Signed-off-by: Heiko Stuebner ---- - arch/arm64/boot/dts/rockchip/rk3566.dtsi | 11 ++++++++++ - arch/arm64/boot/dts/rockchip/rk3568.dtsi | 9 ++++++++ - arch/arm64/boot/dts/rockchip/rk356x.dtsi | 35 +++++++++++++++++++++++++++++++- - 3 files changed, 54 insertions(+), 1 deletion(-) - -(limited to 'arch/arm64/boot/dts/rockchip') - ---- a/arch/arm64/boot/dts/rockchip/rk3566.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3566.dtsi -@@ -6,6 +6,10 @@ - compatible = "rockchip,rk3566"; - }; - -+&pipegrf { -+ compatible = "rockchip,rk3566-pipe-grf", "syscon"; -+}; -+ - &power { - power-domain@RK3568_PD_PIPE { - reg = ; -@@ -18,3 +22,10 @@ - #power-domain-cells = <0>; - }; - }; -+ -+&usb_host0_xhci { -+ phys = <&usb2phy0_otg>; -+ phy-names = "usb2-phy"; -+ extcon = <&usb2phy0>; -+ maximum-speed = "high-speed"; -+}; ---- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi -@@ -113,6 +113,10 @@ - }; - }; - -+&pipegrf { -+ compatible = "rockchip,rk3568-pipe-grf", "syscon"; -+}; -+ - &power { - power-domain@RK3568_PD_PIPE { - reg = ; -@@ -128,3 +132,8 @@ - #power-domain-cells = <0>; - }; - }; -+ -+&usb_host0_xhci { -+ phys = <&usb2phy0_otg>, <&combphy0 PHY_TYPE_USB3>; -+ phy-names = "usb2-phy", "usb3-phy"; -+}; ---- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi -@@ -258,6 +258,40 @@ - status = "disabled"; - }; - -+ usb_host0_xhci: usb@fcc00000 { -+ compatible = "rockchip,rk3568-dwc3", "snps,dwc3"; -+ reg = <0x0 0xfcc00000 0x0 0x400000>; -+ interrupts = ; -+ clocks = <&cru CLK_USB3OTG0_REF>, <&cru CLK_USB3OTG0_SUSPEND>, -+ <&cru ACLK_USB3OTG0>; -+ clock-names = "ref_clk", "suspend_clk", -+ "bus_clk"; -+ dr_mode = "host"; -+ phy_type = "utmi_wide"; -+ power-domains = <&power RK3568_PD_PIPE>; -+ resets = <&cru SRST_USB3OTG0>; -+ snps,dis_u2_susphy_quirk; -+ status = "disabled"; -+ }; -+ -+ usb_host1_xhci: usb@fd000000 { -+ compatible = "rockchip,rk3568-dwc3", "snps,dwc3"; -+ reg = <0x0 0xfd000000 0x0 0x400000>; -+ interrupts = ; -+ clocks = <&cru CLK_USB3OTG1_REF>, <&cru CLK_USB3OTG1_SUSPEND>, -+ <&cru ACLK_USB3OTG1>; -+ clock-names = "ref_clk", "suspend_clk", -+ "bus_clk"; -+ dr_mode = "host"; -+ phys = <&usb2phy0_host>, <&combphy1 PHY_TYPE_USB3>; -+ phy-names = "usb2-phy", "usb3-phy"; -+ phy_type = "utmi_wide"; -+ power-domains = <&power RK3568_PD_PIPE>; -+ resets = <&cru SRST_USB3OTG1>; -+ snps,dis_u2_susphy_quirk; -+ status = "disabled"; -+ }; -+ - gic: interrupt-controller@fd400000 { - compatible = "arm,gic-v3"; - reg = <0x0 0xfd400000 0 0x10000>, /* GICD */ -@@ -325,7 +359,6 @@ - }; - - pipegrf: syscon@fdc50000 { -- compatible = "rockchip,rk3568-pipe-grf", "syscon"; - reg = <0x0 0xfdc50000 0x0 0x1000>; - }; - diff --git a/target/linux/rockchip/patches-5.18/114-rockchip-enable-dwc3-on-quartz64-a.patch b/target/linux/rockchip/patches-5.18/114-rockchip-enable-dwc3-on-quartz64-a.patch deleted file mode 100644 index ed55eebc944452..00000000000000 --- a/target/linux/rockchip/patches-5.18/114-rockchip-enable-dwc3-on-quartz64-a.patch +++ /dev/null @@ -1,78 +0,0 @@ -From e432309ff8bf2a148bbdd4946ca1580c6b5b610c Mon Sep 17 00:00:00 2001 -From: Peter Geis -Date: Fri, 8 Apr 2022 11:12:36 -0400 -Subject: arm64: dts: rockchip: enable dwc3 on quartz64-a - -The quartz64 model a has support for both the dwc3 otg port and the dwc3 -host port. Add the otg power supply and dwc3 nodes to the device tree to -enable support for these. - -Signed-off-by: Peter Geis -Link: https://lore.kernel.org/r/20220408151237.3165046-5-pgwipeout@gmail.com -Signed-off-by: Heiko Stuebner ---- - arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | 37 ++++++++++++++++++++++ - 1 file changed, 37 insertions(+) - -(limited to 'arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts') - ---- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts -@@ -151,6 +151,16 @@ - vin-supply = <&vcc5v0_usb>; - }; - -+ vcc5v0_usb20_otg: vcc5v0_usb20_otg { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>; -+ regulator-name = "vcc5v0_usb20_otg"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ vin-supply = <&dcdc_boost>; -+ }; -+ - vcc3v3_sd: vcc3v3_sd { - compatible = "regulator-fixed"; - enable-active-low; -@@ -187,6 +197,10 @@ - }; - }; - -+&combphy1 { -+ status = "okay"; -+}; -+ - &cpu0 { - cpu-supply = <&vdd_cpu>; - }; -@@ -672,6 +686,29 @@ - status = "okay"; - }; - -+&usb_host0_xhci { -+ status = "okay"; -+}; -+ -+/* usb3 controller is muxed with sata1 */ -+&usb_host1_xhci { -+ status = "okay"; -+}; -+ -+&usb2phy0 { -+ status = "okay"; -+}; -+ -+&usb2phy0_host { -+ phy-supply = <&vcc5v0_usb20_host>; -+ status = "okay"; -+}; -+ -+&usb2phy0_otg { -+ phy-supply = <&vcc5v0_usb20_otg>; -+ status = "okay"; -+}; -+ - &usb2phy1 { - status = "okay"; - }; diff --git a/target/linux/rockchip/patches-5.18/115-soc-rockchip-set-dwc3-clock-for-rk3566.patch b/target/linux/rockchip/patches-5.18/115-soc-rockchip-set-dwc3-clock-for-rk3566.patch deleted file mode 100644 index 979daa4175fa62..00000000000000 --- a/target/linux/rockchip/patches-5.18/115-soc-rockchip-set-dwc3-clock-for-rk3566.patch +++ /dev/null @@ -1,49 +0,0 @@ -From 8c3089f4a9e38f73baa68f0b3cbec667ff09c0dd Mon Sep 17 00:00:00 2001 -From: Peter Geis -Date: Fri, 25 Feb 2022 09:16:51 -0500 -Subject: [PATCH] soc: rockchip: set dwc3 clock for rk3566 - -The rk3566 dwc3 otg port clock is unavailable at boot, as it defaults to -the combophy as the clock source. As combophy0 doesn't exist on rk3566, -we need to set the clock source to the usb2 phy instead. - -Add handling to the grf driver to handle this on boot. - -Signed-off-by: Peter Geis ---- - drivers/soc/rockchip/grf.c | 17 +++++++++++++++++ - 1 file changed, 17 insertions(+) - ---- a/drivers/soc/rockchip/grf.c -+++ b/drivers/soc/rockchip/grf.c -@@ -108,6 +108,20 @@ static const struct rockchip_grf_info rk - .num_values = ARRAY_SIZE(rk3399_defaults), - }; - -+#define RK3566_GRF_USB3OTG0_CON1 0x0104 -+ -+static const struct rockchip_grf_value rk3566_defaults[] __initconst = { -+ { "usb3otg port switch", RK3566_GRF_USB3OTG0_CON1, HIWORD_UPDATE(0, 1, 12) }, -+ { "usb3otg clock switch", RK3566_GRF_USB3OTG0_CON1, HIWORD_UPDATE(1, 1, 7) }, -+ { "usb3otg disable usb3", RK3566_GRF_USB3OTG0_CON1, HIWORD_UPDATE(1, 1, 0) }, -+}; -+ -+static const struct rockchip_grf_info rk3566_pipegrf __initconst = { -+ .values = rk3566_defaults, -+ .num_values = ARRAY_SIZE(rk3566_defaults), -+}; -+ -+ - static const struct of_device_id rockchip_grf_dt_match[] __initconst = { - { - .compatible = "rockchip,rk3036-grf", -@@ -130,6 +144,9 @@ static const struct of_device_id rockchi - }, { - .compatible = "rockchip,rk3399-grf", - .data = (void *)&rk3399_grf, -+ }, { -+ .compatible = "rockchip,rk3566-pipe-grf", -+ .data = (void *)&rk3566_pipegrf, - }, - { /* sentinel */ }, - }; diff --git a/target/linux/rockchip/patches-5.18/116-dt-bindings-PCI-Remove-fallback-from-Rockchip-DesignWare-binding.patch b/target/linux/rockchip/patches-5.18/116-dt-bindings-PCI-Remove-fallback-from-Rockchip-DesignWare-binding.patch deleted file mode 100644 index 2dcf9403e79f20..00000000000000 --- a/target/linux/rockchip/patches-5.18/116-dt-bindings-PCI-Remove-fallback-from-Rockchip-DesignWare-binding.patch +++ /dev/null @@ -1,46 +0,0 @@ -Subject: [PATCH] dt-bindings: PCI: Remove fallback from Rockchip DesignWare binding - -The snps,dw-pcie binds to a standalone driver. It is not fully -compatible with the Rockchip implementation and causes a hang if it -binds to the device. - -Remove this binding as a valid fallback. - -Signed-off-by: Peter Geis -Reviewed-by: Rob Herring ---- - .../devicetree/bindings/pci/rockchip-dw-pcie.yaml | 12 +----------- - 1 file changed, 1 insertion(+), 11 deletions(-) ---- ---- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml -+++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml -@@ -19,20 +19,10 @@ description: |+ - allOf: - - $ref: /schemas/pci/pci-bus.yaml# - --# We need a select here so we don't match all nodes with 'snps,dw-pcie' --select: -- properties: -- compatible: -- contains: -- const: rockchip,rk3568-pcie -- required: -- - compatible -- - properties: - compatible: - items: - - const: rockchip,rk3568-pcie -- - const: snps,dw-pcie - - reg: - items: -@@ -110,7 +100,7 @@ examples: - #size-cells = <2>; - - pcie3x2: pcie@fe280000 { -- compatible = "rockchip,rk3568-pcie", "snps,dw-pcie"; -+ compatible = "rockchip,rk3568-pcie"; - reg = <0x3 0xc0800000 0x0 0x390000>, - <0x0 0xfe280000 0x0 0x10000>, - <0x3 0x80000000 0x0 0x100000>; diff --git a/target/linux/rockchip/patches-5.18/117-03arm64-dts-rockchip-Add-USB-nodes-for-BPI-R2-Pro.patch b/target/linux/rockchip/patches-5.18/117-03arm64-dts-rockchip-Add-USB-nodes-for-BPI-R2-Pro.patch deleted file mode 100644 index 61248a114cac30..00000000000000 --- a/target/linux/rockchip/patches-5.18/117-03arm64-dts-rockchip-Add-USB-nodes-for-BPI-R2-Pro.patch +++ /dev/null @@ -1,127 +0,0 @@ -From f29ffce32b4e1204b67f82fd80584ec4173cca54 Mon Sep 17 00:00:00 2001 -From: Frank Wunderlich -Date: Sat, 9 Apr 2022 13:21:35 +0200 -Subject: [PATCH] arm64: dts: rockchip: Add USB nodes for BPI-R2-Pro - -Add usb2 nodes to Bananapi R2 Pro board - -Signed-off-by: Frank Wunderlich -Link: https://lore.kernel.org/r/20220409112136.164481-2-linux@fw-web.de -Signed-off-by: Heiko Stuebner ---- - .../boot/dts/rockchip/rk3568-bpi-r2-pro.dts | 93 +++++++++++++++++++ - 1 file changed, 93 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts -@@ -73,6 +73,50 @@ - regulator-max-microvolt = <5000000>; - vin-supply = <&dc_12v>; - }; -+ -+ vcc5v0_usb: vcc5v0_usb { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc5v0_usb"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ vin-supply = <&dc_12v>; -+ }; -+ -+ vcc5v0_usb_host: vcc5v0-usb-host { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&vcc5v0_usb_host_en>; -+ regulator-name = "vcc5v0_usb_host"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ vin-supply = <&vcc5v0_usb>; -+ }; -+ -+ vcc5v0_usb_otg: vcc5v0-usb-otg { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&vcc5v0_usb_otg_en>; -+ regulator-name = "vcc5v0_usb_otg"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ vin-supply = <&vcc5v0_usb>; -+ }; -+}; -+ -+&combphy0 { -+ /* used for USB3 */ -+ status = "okay"; -+}; -+ -+&combphy1 { -+ /* used for USB3 */ -+ status = "okay"; - }; - - &gmac0 { -@@ -368,6 +412,16 @@ - <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; -+ -+ usb { -+ vcc5v0_usb_host_en: vcc5v0_usb_host_en { -+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ vcc5v0_usb_otg_en: vcc5v0_usb_otg_en { -+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; - }; - - &pmu_io_domains { -@@ -485,3 +539,42 @@ - pinctrl-0 = <&uart9m1_xfer>; - status = "disabled"; - }; -+ -+&usb_host0_ehci { -+ status = "okay"; -+}; -+ -+&usb_host0_ohci { -+ status = "okay"; -+}; -+ -+&usb_host0_xhci { -+ extcon = <&usb2phy0>; -+ status = "okay"; -+}; -+ -+&usb_host1_ehci { -+ status = "okay"; -+}; -+ -+&usb_host1_ohci { -+ status = "okay"; -+}; -+ -+&usb_host1_xhci { -+ status = "okay"; -+}; -+ -+&usb2phy0 { -+ status = "okay"; -+}; -+ -+&usb2phy0_host { -+ phy-supply = <&vcc5v0_usb_host>; -+ status = "okay"; -+}; -+ -+&usb2phy0_otg { -+ phy-supply = <&vcc5v0_usb_otg>; -+ status = "okay"; -+}; diff --git a/target/linux/rockchip/patches-5.18/117-04-arm64-dts-rockchip-Add-SATAsupport-to-BPI-R2-Pro.patch b/target/linux/rockchip/patches-5.18/117-04-arm64-dts-rockchip-Add-SATAsupport-to-BPI-R2-Pro.patch deleted file mode 100644 index a4478a30f8ae32..00000000000000 --- a/target/linux/rockchip/patches-5.18/117-04-arm64-dts-rockchip-Add-SATAsupport-to-BPI-R2-Pro.patch +++ /dev/null @@ -1,39 +0,0 @@ -From 551e645fed5dd2ed4c81c9e3d3b4827862f51dc6 Mon Sep 17 00:00:00 2001 -From: Frank Wunderlich -Date: Sat, 9 Apr 2022 13:21:36 +0200 -Subject: [PATCH] arm64: dts: rockchip: Add SATA support to BPI-R2-Pro - -Enable the Combphy and Sata nodes in Bananapi R2 Pro Board. - -Signed-off-by: Frank Wunderlich -Link: https://lore.kernel.org/r/20220409112136.164481-3-linux@fw-web.de -Signed-off-by: Heiko Stuebner ---- - arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts | 9 +++++++++ - 1 file changed, 9 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts -@@ -119,6 +119,11 @@ - status = "okay"; - }; - -+&combphy2 { -+ /* used for SATA */ -+ status = "okay"; -+}; -+ - &gmac0 { - assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; - assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; -@@ -484,6 +489,10 @@ - status = "okay"; - }; - -+&sata2 { -+ status = "okay"; -+}; -+ - &sdhci { - bus-width = <8>; - max-frequency = <200000000>; diff --git a/target/linux/rockchip/patches-5.18/117-PCI-rockchip-dwc-Reset-core-at-driver-probe.patch b/target/linux/rockchip/patches-5.18/117-PCI-rockchip-dwc-Reset-core-at-driver-probe.patch deleted file mode 100644 index 12138e89cf1fc4..00000000000000 --- a/target/linux/rockchip/patches-5.18/117-PCI-rockchip-dwc-Reset-core-at-driver-probe.patch +++ /dev/null @@ -1,66 +0,0 @@ -Subject: [PATCH] PCI: rockchip-dwc: Reset core at driver probe -The PCIe controller is in an unknown state at driver probe. This can -lead to undesireable effects when the driver attempts to configure the -controller. - -Prevent issues in the future by resetting the core during probe. - -Signed-off-by: Peter Geis -Tested-by: Nicolas Frattaroli ---- - drivers/pci/controller/dwc/pcie-dw-rockchip.c | 23 ++++++++----------- - 1 file changed, 10 insertions(+), 13 deletions(-) - ---- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c -+++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c -@@ -152,6 +152,11 @@ static int rockchip_pcie_resource_get(st - if (IS_ERR(rockchip->rst_gpio)) - return PTR_ERR(rockchip->rst_gpio); - -+ rockchip->rst = devm_reset_control_array_get_exclusive(&pdev->dev); -+ if (IS_ERR(rockchip->rst)) -+ return dev_err_probe(&pdev->dev, PTR_ERR(rockchip->rst), -+ "failed to get reset lines\n"); -+ - return 0; - } - -@@ -182,18 +187,6 @@ static void rockchip_pcie_phy_deinit(str - phy_power_off(rockchip->phy); - } - --static int rockchip_pcie_reset_control_release(struct rockchip_pcie *rockchip) --{ -- struct device *dev = rockchip->pci.dev; -- -- rockchip->rst = devm_reset_control_array_get_exclusive(dev); -- if (IS_ERR(rockchip->rst)) -- return dev_err_probe(dev, PTR_ERR(rockchip->rst), -- "failed to get reset lines\n"); -- -- return reset_control_deassert(rockchip->rst); --} -- - static const struct dw_pcie_ops dw_pcie_ops = { - .link_up = rockchip_pcie_link_up, - .start_link = rockchip_pcie_start_link, -@@ -222,6 +215,10 @@ static int rockchip_pcie_probe(struct pl - if (ret) - return ret; - -+ ret = reset_control_assert(rockchip->rst); -+ if (ret) -+ return ret; -+ - /* DON'T MOVE ME: must be enable before PHY init */ - rockchip->vpcie3v3 = devm_regulator_get_optional(dev, "vpcie3v3"); - if (IS_ERR(rockchip->vpcie3v3)) { -@@ -241,7 +238,7 @@ static int rockchip_pcie_probe(struct pl - if (ret) - goto disable_regulator; - -- ret = rockchip_pcie_reset_control_release(rockchip); -+ ret = reset_control_deassert(rockchip->rst); - if (ret) - goto deinit_phy; - diff --git a/target/linux/rockchip/patches-5.18/118-PCI-rockchip-dwc-Add-legacy-interrupt-support.patch b/target/linux/rockchip/patches-5.18/118-PCI-rockchip-dwc-Add-legacy-interrupt-support.patch deleted file mode 100644 index b413ead7fb1bd4..00000000000000 --- a/target/linux/rockchip/patches-5.18/118-PCI-rockchip-dwc-Add-legacy-interrupt-support.patch +++ /dev/null @@ -1,155 +0,0 @@ -Subject: [PATCH] PCI: rockchip-dwc: Add legacy interrupt support -The legacy interrupts on the rk356x PCIe controller are handled by a -single muxed interrupt. Add IRQ domain support to the pcie-dw-rockchip -driver to support the virtual domain. - -Signed-off-by: Peter Geis ---- - drivers/pci/controller/dwc/pcie-dw-rockchip.c | 96 ++++++++++++++++++- - 1 file changed, 94 insertions(+), 2 deletions(-) ---- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c -+++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c -@@ -10,9 +10,12 @@ - - #include - #include -+#include -+#include - #include - #include - #include -+#include - #include - #include - #include -@@ -26,6 +29,7 @@ - */ - #define HIWORD_UPDATE(mask, val) (((mask) << 16) | (val)) - #define HIWORD_UPDATE_BIT(val) HIWORD_UPDATE(val, val) -+#define HIWORD_DISABLE_BIT(val) HIWORD_UPDATE(val, ~val) - - #define to_rockchip_pcie(x) dev_get_drvdata((x)->dev) - -@@ -36,10 +40,12 @@ - #define PCIE_LINKUP (PCIE_SMLH_LINKUP | PCIE_RDLH_LINKUP) - #define PCIE_L0S_ENTRY 0x11 - #define PCIE_CLIENT_GENERAL_CONTROL 0x0 -+#define PCIE_CLIENT_INTR_STATUS_LEGACY 0x8 -+#define PCIE_CLIENT_INTR_MASK_LEGACY 0x1c - #define PCIE_CLIENT_GENERAL_DEBUG 0x104 --#define PCIE_CLIENT_HOT_RESET_CTRL 0x180 -+#define PCIE_CLIENT_HOT_RESET_CTRL 0x180 - #define PCIE_CLIENT_LTSSM_STATUS 0x300 --#define PCIE_LTSSM_ENABLE_ENHANCE BIT(4) -+#define PCIE_LTSSM_ENABLE_ENHANCE BIT(4) - #define PCIE_LTSSM_STATUS_MASK GENMASK(5, 0) - - struct rockchip_pcie { -@@ -51,6 +57,7 @@ struct rockchip_pcie { - struct reset_control *rst; - struct gpio_desc *rst_gpio; - struct regulator *vpcie3v3; -+ struct irq_domain *irq_domain; - }; - - static int rockchip_pcie_readl_apb(struct rockchip_pcie *rockchip, -@@ -65,6 +72,78 @@ static void rockchip_pcie_writel_apb(str - writel_relaxed(val, rockchip->apb_base + reg); - } - -+static void rockchip_pcie_legacy_int_handler(struct irq_desc *desc) -+{ -+ struct irq_chip *chip = irq_desc_get_chip(desc); -+ struct rockchip_pcie *rockchip = irq_desc_get_handler_data(desc); -+ unsigned long reg, hwirq; -+ -+ chained_irq_enter(chip, desc); -+ -+ reg = rockchip_pcie_readl_apb(rockchip, PCIE_CLIENT_INTR_STATUS_LEGACY); -+ -+ for_each_set_bit(hwirq, ®, 4) -+ generic_handle_domain_irq(rockchip->irq_domain, hwirq); -+ -+ chained_irq_exit(chip, desc); -+} -+ -+static void rockchip_intx_mask(struct irq_data *data) -+{ -+ rockchip_pcie_writel_apb(irq_data_get_irq_chip_data(data), -+ HIWORD_UPDATE_BIT(BIT(data->hwirq)), -+ PCIE_CLIENT_INTR_MASK_LEGACY); -+}; -+ -+static void rockchip_intx_unmask(struct irq_data *data) -+{ -+ rockchip_pcie_writel_apb(irq_data_get_irq_chip_data(data), -+ HIWORD_DISABLE_BIT(BIT(data->hwirq)), -+ PCIE_CLIENT_INTR_MASK_LEGACY); -+}; -+ -+static struct irq_chip rockchip_intx_irq_chip = { -+ .name = "INTx", -+ .irq_mask = rockchip_intx_mask, -+ .irq_unmask = rockchip_intx_unmask, -+ .flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND, -+}; -+ -+static int rockchip_pcie_intx_map(struct irq_domain *domain, unsigned int irq, -+ irq_hw_number_t hwirq) -+{ -+ irq_set_chip_and_handler(irq, &rockchip_intx_irq_chip, handle_level_irq); -+ irq_set_chip_data(irq, domain->host_data); -+ -+ return 0; -+} -+ -+static const struct irq_domain_ops intx_domain_ops = { -+ .map = rockchip_pcie_intx_map, -+}; -+ -+static int rockchip_pcie_init_irq_domain(struct rockchip_pcie *rockchip) -+{ -+ struct device *dev = rockchip->pci.dev; -+ struct device_node *intc; -+ -+ intc = of_get_child_by_name(dev->of_node, "legacy-interrupt-controller"); -+ if (!intc) { -+ dev_err(dev, "missing child interrupt-controller node\n"); -+ return -EINVAL; -+ } -+ -+ rockchip->irq_domain = irq_domain_add_linear(intc, PCI_NUM_INTX, -+ &intx_domain_ops, rockchip); -+ of_node_put(intc); -+ if (!rockchip->irq_domain) { -+ dev_err(dev, "failed to get a INTx IRQ domain\n"); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ - static void rockchip_pcie_enable_ltssm(struct rockchip_pcie *rockchip) - { - rockchip_pcie_writel_apb(rockchip, PCIE_CLIENT_ENABLE_LTSSM, -@@ -111,7 +190,20 @@ static int rockchip_pcie_host_init(struc - { - struct dw_pcie *pci = to_dw_pcie_from_pp(pp); - struct rockchip_pcie *rockchip = to_rockchip_pcie(pci); -+ struct device *dev = rockchip->pci.dev; - u32 val = HIWORD_UPDATE_BIT(PCIE_LTSSM_ENABLE_ENHANCE); -+ int irq, ret; -+ -+ irq = of_irq_get_byname(dev->of_node, "legacy"); -+ if (irq < 0) -+ return irq; -+ -+ ret = rockchip_pcie_init_irq_domain(rockchip); -+ if (ret < 0) -+ dev_err(dev, "failed to init irq domain\n"); -+ -+ irq_set_chained_handler_and_data(irq, rockchip_pcie_legacy_int_handler, -+ rockchip); - - /* LTSSM enable control mode */ - rockchip_pcie_writel_apb(rockchip, val, PCIE_CLIENT_HOT_RESET_CTRL); diff --git a/target/linux/rockchip/patches-5.18/119-arm64-dts-rockchip-Add-rk3568-PCIe2x1-controller.patch b/target/linux/rockchip/patches-5.18/119-arm64-dts-rockchip-Add-rk3568-PCIe2x1-controller.patch deleted file mode 100644 index 3804db1d28655e..00000000000000 --- a/target/linux/rockchip/patches-5.18/119-arm64-dts-rockchip-Add-rk3568-PCIe2x1-controller.patch +++ /dev/null @@ -1,69 +0,0 @@ -Subject: [PATCH] arm64: dts: rockchip: Add rk3568 PCIe2x1 controller -The PCIe2x1 controller is common between the rk3568 and rk3566. It is a -single lane PCIe2 compliant controller. - -Signed-off-by: Peter Geis ---- - arch/arm64/boot/dts/rockchip/rk356x.dtsi | 52 ++++++++++++++++++++++++ - 1 file changed, 52 insertions(+) ---- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi -@@ -750,6 +750,58 @@ - reg = <0x0 0xfe1a8100 0x0 0x20>; - }; - -+ pcie2x1: pcie@fe260000 { -+ compatible = "rockchip,rk3568-pcie"; -+ #address-cells = <3>; -+ #size-cells = <2>; -+ bus-range = <0x0 0xf>; -+ clocks = <&cru ACLK_PCIE20_MST>, <&cru ACLK_PCIE20_SLV>, -+ <&cru ACLK_PCIE20_DBI>, <&cru PCLK_PCIE20>, -+ <&cru CLK_PCIE20_AUX_NDFT>; -+ clock-names = "aclk_mst", "aclk_slv", -+ "aclk_dbi", "pclk", "aux"; -+ device_type = "pci"; -+ interrupts = , -+ , -+ , -+ , -+ ; -+ interrupt-names = "sys", "pmc", "msi", "legacy", "err"; -+ #interrupt-cells = <1>; -+ interrupt-map-mask = <0 0 0 7>; -+ interrupt-map = <0 0 0 1 &pcie_intc 0>, -+ <0 0 0 2 &pcie_intc 1>, -+ <0 0 0 3 &pcie_intc 2>, -+ <0 0 0 4 &pcie_intc 3>; -+ linux,pci-domain = <0>; -+ num-ib-windows = <6>; -+ num-ob-windows = <2>; -+ max-link-speed = <2>; -+ msi-map = <0x0 &gic 0x0 0x1000>; -+ num-lanes = <1>; -+ phys = <&combphy2 PHY_TYPE_PCIE>; -+ phy-names = "pcie-phy"; -+ power-domains = <&power RK3568_PD_PIPE>; -+ reg = <0x3 0xc0000000 0x0 0x00400000>, -+ <0x0 0xfe260000 0x0 0x00010000>, -+ <0x3 0x00000000 0x0 0x01000000>; -+ ranges = <0x01000000 0x0 0x01000000 0x3 0x01000000 0x0 0x00100000 -+ 0x02000000 0x0 0x02000000 0x3 0x01100000 0x0 0x3ef00000>; -+ reg-names = "dbi", "apb", "config"; -+ resets = <&cru SRST_PCIE20_POWERUP>; -+ reset-names = "pipe"; -+ status = "disabled"; -+ -+ pcie_intc: legacy-interrupt-controller { -+ #address-cells = <0>; -+ #interrupt-cells = <1>; -+ interrupt-controller; -+ interrupt-parent = <&gic>; -+ interrupts = ; -+ }; -+ -+ }; -+ - sdmmc0: mmc@fe2b0000 { - compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc"; - reg = <0x0 0xfe2b0000 0x0 0x4000>; diff --git a/target/linux/rockchip/patches-5.18/120-arm64-dts-rockchip-Enable-PCIe-controller-on-quartz64-a.patch b/target/linux/rockchip/patches-5.18/120-arm64-dts-rockchip-Enable-PCIe-controller-on-quartz64-a.patch deleted file mode 100644 index 84f345c5db8297..00000000000000 --- a/target/linux/rockchip/patches-5.18/120-arm64-dts-rockchip-Enable-PCIe-controller-on-quartz64-a.patch +++ /dev/null @@ -1,75 +0,0 @@ -Subject: [PATCH] arm64: dts: rockchip: Enable PCIe controller on quartz64-a -Add the nodes to enable the PCIe controller on the Quartz64 Model A -board. - -Signed-off-by: Peter Geis ---- - .../boot/dts/rockchip/rk3566-quartz64-a.dts | 34 +++++++++++++++++++ - 1 file changed, 34 insertions(+) - - - ---- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts -@@ -125,6 +125,18 @@ - vin-supply = <&vcc12v_dcin>; - }; - -+ vcc3v3_pcie_p: vcc3v3_pcie_p { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pcie_enable_h>; -+ regulator-name = "vcc3v3_pcie_p"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ vin-supply = <&vcc_3v3>; -+ }; -+ - vcc5v0_usb: vcc5v0_usb { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usb"; -@@ -201,6 +213,10 @@ - status = "okay"; - }; - -+&combphy2 { -+ status = "okay"; -+}; -+ - &cpu0 { - cpu-supply = <&vdd_cpu>; - }; -@@ -509,6 +525,14 @@ - }; - }; - -+&pcie2x1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pcie_reset_h>; -+ reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; -+ vpcie3v3-supply = <&vcc3v3_pcie_p>; -+ status = "okay"; -+}; -+ - &pinctrl { - bt { - bt_enable_h: bt-enable-h { -@@ -534,6 +558,16 @@ - }; - }; - -+ pcie { -+ pcie_enable_h: pcie-enable-h { -+ rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ pcie_reset_h: pcie-reset-h { -+ rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; diff --git a/target/linux/rockchip/patches-5.18/121-arm64-dts-rockchip-add-rk356x-sfc-support.patch b/target/linux/rockchip/patches-5.18/121-arm64-dts-rockchip-add-rk356x-sfc-support.patch deleted file mode 100644 index 5f91000d8a1501..00000000000000 --- a/target/linux/rockchip/patches-5.18/121-arm64-dts-rockchip-add-rk356x-sfc-support.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 13e0ee34f39c01948a7bbaab0b3c225d9b00a5bb Mon Sep 17 00:00:00 2001 -From: Peter Geis -Date: Fri, 29 Apr 2022 07:52:49 -0400 -Subject: [PATCH] arm64: dts: rockchip: add rk356x sfc support - -Add the sfc node to the rk356x device tree. This enables spi flash -support for this soc. - -Signed-off-by: Peter Geis -Link: https://lore.kernel.org/r/20220429115252.2360496-5-pgwipeout@gmail.com -Signed-off-by: Heiko Stuebner ---- - arch/arm64/boot/dts/rockchip/rk356x.dtsi | 11 +++++++++++ - 1 file changed, 11 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi -@@ -830,6 +830,17 @@ - status = "disabled"; - }; - -+ sfc: spi@fe300000 { -+ compatible = "rockchip,sfc"; -+ reg = <0x0 0xfe300000 0x0 0x4000>; -+ interrupts = ; -+ clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>; -+ clock-names = "clk_sfc", "hclk_sfc"; -+ pinctrl-0 = <&fspi_pins>; -+ pinctrl-names = "default"; -+ status = "disabled"; -+ }; -+ - sdhci: mmc@fe310000 { - compatible = "rockchip,rk3568-dwcmshc"; - reg = <0x0 0xfe310000 0x0 0x10000>; diff --git a/target/linux/rockchip/patches-5.18/219-arm64-dts-rockchip-enable-otg-drd-operation-of-usb_h.patch b/target/linux/rockchip/patches-5.18/219-arm64-dts-rockchip-enable-otg-drd-operation-of-usb_h.patch deleted file mode 100644 index 85bb462e15f1ec..00000000000000 --- a/target/linux/rockchip/patches-5.18/219-arm64-dts-rockchip-enable-otg-drd-operation-of-usb_h.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 72bac38408c6fbbc8af77f62e6f528c4b1cb5d98 Mon Sep 17 00:00:00 2001 -From: Michael Riesch -Date: Mon, 25 Apr 2022 15:35:00 +0200 -Subject: [PATCH 19/50] arm64: dts: rockchip: enable otg/drd operation of - usb_host0_xhci in rk356x - -This USB 3.0 controller is capable of OTG/DRD operation. Enable it in the -device tree. - -Signed-off-by: Michael Riesch -Link: https://lore.kernel.org/r/20220425133502.405512-1-michael.riesch@wolfvision.net -Signed-off-by: Heiko Stuebner ---- - arch/arm64/boot/dts/rockchip/rk356x.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi -@@ -266,7 +266,7 @@ - <&cru ACLK_USB3OTG0>; - clock-names = "ref_clk", "suspend_clk", - "bus_clk"; -- dr_mode = "host"; -+ dr_mode = "otg"; - phy_type = "utmi_wide"; - power-domains = <&power RK3568_PD_PIPE>; - resets = <&cru SRST_USB3OTG0>; diff --git a/target/linux/rockchip/patches-5.18/220-arm64-dts-rockchip-add-clocks-to-rk356x-cru.patch b/target/linux/rockchip/patches-5.18/220-arm64-dts-rockchip-add-clocks-to-rk356x-cru.patch deleted file mode 100644 index b884675011dba7..00000000000000 --- a/target/linux/rockchip/patches-5.18/220-arm64-dts-rockchip-add-clocks-to-rk356x-cru.patch +++ /dev/null @@ -1,26 +0,0 @@ -From fbdfb63842751de7d32202542c25410e0f42688f Mon Sep 17 00:00:00 2001 -From: Peter Geis -Date: Wed, 11 May 2022 11:01:13 -0400 -Subject: [PATCH 20/50] arm64: dts: rockchip: add clocks to rk356x cru - -The rk356x cru requires a 24m clock input to function. Add the clocks -properties to the cru to clear some dtbs_check warnings. - -Signed-off-by: Peter Geis -Link: https://lore.kernel.org/r/20220511150117.113070-3-pgwipeout@gmail.com -Signed-off-by: Heiko Stuebner ---- - arch/arm64/boot/dts/rockchip/rk356x.dtsi | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi -@@ -397,6 +397,8 @@ - cru: clock-controller@fdd20000 { - compatible = "rockchip,rk3568-cru"; - reg = <0x0 0xfdd20000 0x0 0x1000>; -+ clocks = <&xin24m>; -+ clock-names = "xin24m"; - #clock-cells = <1>; - #reset-cells = <1>; - assigned-clocks = <&cru PLL_GPLL>, <&pmucru PLL_PPLL>; diff --git a/target/linux/rockchip/patches-5.18/221-arm64-dts-rockchip-rename-Quartz64-A-bluetooth-gpios.patch b/target/linux/rockchip/patches-5.18/221-arm64-dts-rockchip-rename-Quartz64-A-bluetooth-gpios.patch deleted file mode 100644 index fa33be1055bd0c..00000000000000 --- a/target/linux/rockchip/patches-5.18/221-arm64-dts-rockchip-rename-Quartz64-A-bluetooth-gpios.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 319683942f42e6857535b9c5d0392dec193d72b4 Mon Sep 17 00:00:00 2001 -From: Peter Geis -Date: Wed, 11 May 2022 11:01:14 -0400 -Subject: [PATCH 21/50] arm64: dts: rockchip: rename Quartz64-A bluetooth gpios - -The bluetooth binding for the Quartz64 Model A has incorrectly named -host-wakeup and device-wakeup gpios. Rename them to clear some dtbs_check -warnings. - -Signed-off-by: Peter Geis -Link: https://lore.kernel.org/r/20220511150117.113070-4-pgwipeout@gmail.com -Signed-off-by: Heiko Stuebner ---- - arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - ---- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts -@@ -686,8 +686,8 @@ - compatible = "brcm,bcm43438-bt"; - clocks = <&rk817 1>; - clock-names = "lpo"; -- device-wake-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; -- host-wake-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; -+ device-wakeup-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; -+ host-wakeup-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; - shutdown-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>; diff --git a/target/linux/rockchip/patches-5.18/222-arm64-dts-rockchip-add-Quartz64-A-fan-pinctrl.patch b/target/linux/rockchip/patches-5.18/222-arm64-dts-rockchip-add-Quartz64-A-fan-pinctrl.patch deleted file mode 100644 index 42c0dc209bc593..00000000000000 --- a/target/linux/rockchip/patches-5.18/222-arm64-dts-rockchip-add-Quartz64-A-fan-pinctrl.patch +++ /dev/null @@ -1,39 +0,0 @@ -From 29347ccca4124943160073419bcf581f74d8a722 Mon Sep 17 00:00:00 2001 -From: Peter Geis -Date: Wed, 11 May 2022 11:01:15 -0400 -Subject: [PATCH 22/50] arm64: dts: rockchip: add Quartz64-A fan pinctrl - -The Quartz64 Model A fan is bound to a single gpio. Prevent pinctrl -issues in the future by binding the pinctrl assignment for the gpio. - -Signed-off-by: Peter Geis -Link: https://lore.kernel.org/r/20220511150117.113070-5-pgwipeout@gmail.com -Signed-off-by: Heiko Stuebner ---- - arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | 8 ++++++++ - 1 file changed, 8 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts -@@ -32,6 +32,8 @@ - gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; - gpio-fan,speed-map = <0 0 - 4500 1>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&fan_en_h>; - #cooling-cells = <2>; - }; - -@@ -548,6 +550,12 @@ - }; - }; - -+ fan { -+ fan_en_h: fan-en-h { -+ rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ - leds { - work_led_enable_h: work-led-enable-h { - rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; diff --git a/target/linux/rockchip/patches-5.18/223-arm64-dts-rockchip-enable-sdr-104-for-sdmmc-on-Quart.patch b/target/linux/rockchip/patches-5.18/223-arm64-dts-rockchip-enable-sdr-104-for-sdmmc-on-Quart.patch deleted file mode 100644 index 2e7d388174fbe7..00000000000000 --- a/target/linux/rockchip/patches-5.18/223-arm64-dts-rockchip-enable-sdr-104-for-sdmmc-on-Quart.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 8fd0ad58558f01b7b3bef42659dd94b6fa2c3aa7 Mon Sep 17 00:00:00 2001 -From: Peter Geis -Date: Wed, 11 May 2022 11:01:16 -0400 -Subject: [PATCH 23/50] arm64: dts: rockchip: enable sdr-104 for sdmmc on - Quartz A - -Now that we have working io-domain support, we can enable higher date -rates on the sdmmc card. - -Before: -Timing buffered disk reads: 68 MB in 3.08 seconds = 22.07 MB/sec - -After: -Timing buffered disk reads: 188 MB in 3.02 seconds = 62.29 MB/sec - -Signed-off-by: Peter Geis -Link: https://lore.kernel.org/r/20220511150117.113070-6-pgwipeout@gmail.com -Signed-off-by: Heiko Stuebner ---- - arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | 1 + - 1 file changed, 1 insertion(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts -@@ -630,6 +630,7 @@ - disable-wp; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; -+ sd-uhs-sdr104; - vmmc-supply = <&vcc3v3_sd>; - vqmmc-supply = <&vccio_sd>; - status = "okay"; diff --git a/target/linux/rockchip/patches-5.18/224-arm64-dts-rockchip-enable-sfc-controller-on-Quartz64.patch b/target/linux/rockchip/patches-5.18/224-arm64-dts-rockchip-enable-sfc-controller-on-Quartz64.patch deleted file mode 100644 index 7795cc8fd91c98..00000000000000 --- a/target/linux/rockchip/patches-5.18/224-arm64-dts-rockchip-enable-sfc-controller-on-Quartz64.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 9981e62d40223e6ec7887db0c283ab404c9e9619 Mon Sep 17 00:00:00 2001 -From: Peter Geis -Date: Wed, 11 May 2022 11:01:17 -0400 -Subject: [PATCH 24/50] arm64: dts: rockchip: enable sfc controller on Quartz64 - Model A - -Add the sfc controller binding for the Quartz64 Model A. This is not -populated by default, so leave it disabled. - -Signed-off-by: Peter Geis -Link: https://lore.kernel.org/r/20220511150117.113070-7-pgwipeout@gmail.com -Signed-off-by: Heiko Stuebner ---- - .../boot/dts/rockchip/rk3566-quartz64-a.dts | 16 ++++++++++++++++ - 1 file changed, 16 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts -@@ -651,6 +651,22 @@ - status = "okay"; - }; - -+&sfc { -+ pinctrl-0 = <&fspi_pins>; -+ pinctrl-names = "default"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ -+ flash@0 { -+ compatible = "jedec,spi-nor"; -+ reg = <0>; -+ spi-max-frequency = <24000000>; -+ spi-rx-bus-width = <4>; -+ spi-tx-bus-width = <1>; -+ }; -+}; -+ - /* spdif is exposed on con40 pin 18 */ - &spdif { - status = "okay"; diff --git a/target/linux/rockchip/patches-5.18/225-drm-rockchip-Refactor-IOMMU-initialisation.patch b/target/linux/rockchip/patches-5.18/225-drm-rockchip-Refactor-IOMMU-initialisation.patch deleted file mode 100644 index 1bbf511df05064..00000000000000 --- a/target/linux/rockchip/patches-5.18/225-drm-rockchip-Refactor-IOMMU-initialisation.patch +++ /dev/null @@ -1,201 +0,0 @@ -From 2ed40a293d246987d6009718cdcb5af73474822f Mon Sep 17 00:00:00 2001 -From: Robin Murphy -Date: Tue, 5 Apr 2022 15:32:50 +0100 -Subject: [PATCH 25/50] drm/rockchip: Refactor IOMMU initialisation - -Defer the IOMMU domain setup until after successfully binding -components, so we can figure out IOMMU support directly from the VOP -devices themselves, rather than manually inferring it from the DT (which -also fails to account for whether the IOMMU driver is actually loaded). -Although this is somewhat of a logical cleanup, the main motivation is -to prepare for a change in the iommu_domain_alloc() interface. - -Signed-off-by: Robin Murphy ---- - drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 60 +++++++++------------ - drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 3 ++ - drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 2 + - 3 files changed, 31 insertions(+), 34 deletions(-) - ---- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c -+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c -@@ -7,7 +7,6 @@ - */ - - #include --#include - #include - #include - #include -@@ -34,7 +33,6 @@ - #define DRIVER_MAJOR 1 - #define DRIVER_MINOR 0 - --static bool is_support_iommu = true; - static const struct drm_driver rockchip_drm_driver; - - /* -@@ -48,7 +46,7 @@ int rockchip_drm_dma_attach_device(struc - struct rockchip_drm_private *private = drm_dev->dev_private; - int ret; - -- if (!is_support_iommu) -+ if (!private->domain) - return 0; - - ret = iommu_attach_device(private->domain, dev); -@@ -64,12 +62,22 @@ void rockchip_drm_dma_detach_device(stru - struct device *dev) - { - struct rockchip_drm_private *private = drm_dev->dev_private; -- struct iommu_domain *domain = private->domain; - -- if (!is_support_iommu) -+ if (!private->domain) - return; - -- iommu_detach_device(domain, dev); -+ iommu_detach_device(private->domain, dev); -+} -+ -+void rockchip_drm_dma_init_device(struct drm_device *drm_dev, -+ struct device *dev) -+{ -+ struct rockchip_drm_private *private = drm_dev->dev_private; -+ -+ if (!device_iommu_mapped(dev)) -+ private->iommu_dev = ERR_PTR(-ENODEV); -+ else if (!private->iommu_dev) -+ private->iommu_dev = dev; - } - - static int rockchip_drm_init_iommu(struct drm_device *drm_dev) -@@ -78,10 +86,10 @@ static int rockchip_drm_init_iommu(struc - struct iommu_domain_geometry *geometry; - u64 start, end; - -- if (!is_support_iommu) -+ if (IS_ERR_OR_NULL(private->iommu_dev)) - return 0; - -- private->domain = iommu_domain_alloc(&platform_bus_type); -+ private->domain = iommu_domain_alloc(private->iommu_dev->bus); - if (!private->domain) - return -ENOMEM; - -@@ -101,7 +109,7 @@ static void rockchip_iommu_cleanup(struc - { - struct rockchip_drm_private *private = drm_dev->dev_private; - -- if (!is_support_iommu) -+ if (!private->domain) - return; - - drm_mm_takedown(&private->mm); -@@ -137,25 +145,25 @@ static int rockchip_drm_bind(struct devi - - drm_dev->dev_private = private; - -- ret = rockchip_drm_init_iommu(drm_dev); -- if (ret) -- goto err_free; -- - ret = drmm_mode_config_init(drm_dev); - if (ret) -- goto err_iommu_cleanup; -+ goto err_free; - - rockchip_drm_mode_config_init(drm_dev); - - /* Try to bind all sub drivers. */ - ret = component_bind_all(dev, drm_dev); - if (ret) -- goto err_iommu_cleanup; -+ goto err_free; - -- ret = drm_vblank_init(drm_dev, drm_dev->mode_config.num_crtc); -+ ret = rockchip_drm_init_iommu(drm_dev); - if (ret) - goto err_unbind_all; - -+ ret = drm_vblank_init(drm_dev, drm_dev->mode_config.num_crtc); -+ if (ret) -+ goto err_iommu_cleanup; -+ - drm_mode_config_reset(drm_dev); - - /* init kms poll for handling hpd */ -@@ -170,10 +178,10 @@ static int rockchip_drm_bind(struct devi - return 0; - err_kms_helper_poll_fini: - drm_kms_helper_poll_fini(drm_dev); --err_unbind_all: -- component_unbind_all(dev, drm_dev); - err_iommu_cleanup: - rockchip_iommu_cleanup(drm_dev); -+err_unbind_all: -+ component_unbind_all(dev, drm_dev); - err_free: - drm_dev_put(drm_dev); - return ret; -@@ -342,8 +350,6 @@ static int rockchip_drm_platform_of_prob - return -ENODEV; - - for (i = 0;; i++) { -- struct device_node *iommu; -- - port = of_parse_phandle(np, "ports", i); - if (!port) - break; -@@ -353,21 +359,7 @@ static int rockchip_drm_platform_of_prob - continue; - } - -- iommu = of_parse_phandle(port->parent, "iommus", 0); -- if (!iommu || !of_device_is_available(iommu)) { -- DRM_DEV_DEBUG(dev, -- "no iommu attached for %pOF, using non-iommu buffers\n", -- port->parent); -- /* -- * if there is a crtc not support iommu, force set all -- * crtc use non-iommu buffer. -- */ -- is_support_iommu = false; -- } -- - found = true; -- -- of_node_put(iommu); - of_node_put(port); - } - ---- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h -+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h -@@ -44,6 +44,7 @@ struct rockchip_crtc_state { - */ - struct rockchip_drm_private { - struct iommu_domain *domain; -+ struct device *iommu_dev; - struct mutex mm_lock; - struct drm_mm mm; - }; -@@ -52,6 +53,8 @@ int rockchip_drm_dma_attach_device(struc - struct device *dev); - void rockchip_drm_dma_detach_device(struct drm_device *drm_dev, - struct device *dev); -+void rockchip_drm_dma_init_device(struct drm_device *drm_dev, -+ struct device *dev); - int rockchip_drm_wait_vact_end(struct drm_crtc *crtc, unsigned int mstimeout); - - int rockchip_drm_endpoint_is_subdriver(struct device_node *ep); ---- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -@@ -2175,6 +2175,8 @@ static int vop_bind(struct device *dev, - } - } - -+ rockchip_drm_dma_init_device(drm_dev, dev); -+ - return 0; - - err_disable_pm_runtime: diff --git a/target/linux/rockchip/patches-5.18/226-clk-rk3568-Mark-hclk_vo-as-critical.patch b/target/linux/rockchip/patches-5.18/226-clk-rk3568-Mark-hclk_vo-as-critical.patch deleted file mode 100644 index bf96d00feba9da..00000000000000 --- a/target/linux/rockchip/patches-5.18/226-clk-rk3568-Mark-hclk_vo-as-critical.patch +++ /dev/null @@ -1,63 +0,0 @@ -From 2028e2bad127e43bee0bed0b2c7ce39745366b88 Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Fri, 8 Apr 2022 13:22:15 +0200 -Subject: [PATCH 26/50] clk: rk3568: Mark hclk_vo as critical - -Whenever pclk_vo is enabled hclk_vo must be enabled as well. This is -described in the Reference Manual as: - -| 2.8.6 NIU Clock gating reliance -| -| A part of niu clocks have a dependence on another niu clock in order to -| sharing the internal bus. When these clocks are in use, another niu -| clock must be opened, and cannot be gated. These clocks and the special -| clock on which they are relied are as following: -| -| Clocks which have dependency The clock which can not be gated -| ----------------------------------------------------------------- -| ... -| pclk_vo_niu, hclk_vo_s_niu hclk_vo_niu -| ... - -The clock framework doesn't offer a way to enable clock B whenever clock A is -enabled, at least not when B is not an ancestor of A. Workaround this by -marking hclk_vo as critical so it is never disabled. This is suboptimal in -terms of power consumption, but a stop gap solution until the clock framework -has a way to deal with this. - -We have this clock tree: - -| aclk_vo 2 2 0 300000000 0 0 50000 Y -| aclk_hdcp 0 0 0 300000000 0 0 50000 N -| pclk_vo 2 3 0 75000000 0 0 50000 Y -| pclk_edp_ctrl 0 0 0 75000000 0 0 50000 N -| pclk_dsitx_1 0 0 0 75000000 0 0 50000 N -| pclk_dsitx_0 1 2 0 75000000 0 0 50000 Y -| pclk_hdmi_host 1 2 0 75000000 0 0 50000 Y -| pclk_hdcp 0 0 0 75000000 0 0 50000 N -| hclk_vo 2 5 0 150000000 0 0 50000 Y -| hclk_hdcp 0 0 0 150000000 0 0 50000 N -| hclk_vop 0 2 0 150000000 0 0 50000 N - -Without this patch the edp, dsitx, hdmi and hdcp driver would enable their -clocks which then enables pclk_vo, but hclk_vo stays disabled and register -accesses just hang. hclk_vo is enabled by the VOP2 driver, so reproducibility -of this issue depends on the probe order. - -Signed-off-by: Sascha Hauer -Reviewed-by: Dmitry Osipenko -Reviewed-by: Robin Murphy ---- - drivers/clk/rockchip/clk-rk3568.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/drivers/clk/rockchip/clk-rk3568.c -+++ b/drivers/clk/rockchip/clk-rk3568.c -@@ -1591,6 +1591,7 @@ static const char *const rk3568_cru_crit - "hclk_php", - "pclk_php", - "hclk_usb", -+ "hclk_vo", - }; - - static const char *const rk3568_pmucru_critical_clocks[] __initconst = { diff --git a/target/linux/rockchip/patches-5.18/227-drm-rockchip-Embed-drm_encoder-into-rockchip_decoder.patch b/target/linux/rockchip/patches-5.18/227-drm-rockchip-Embed-drm_encoder-into-rockchip_decoder.patch deleted file mode 100644 index 753f1b8c04a6e4..00000000000000 --- a/target/linux/rockchip/patches-5.18/227-drm-rockchip-Embed-drm_encoder-into-rockchip_decoder.patch +++ /dev/null @@ -1,598 +0,0 @@ -From de2c94373a27286225543c0bbe6d00950c568963 Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Fri, 8 Apr 2022 13:22:16 +0200 -Subject: [PATCH 27/50] drm/rockchip: Embed drm_encoder into rockchip_decoder - -The VOP2 driver needs rockchip specific information for a drm_encoder. - -This patch creates a struct rockchip_encoder with a struct drm_encoder -embedded in it. This is used throughout the rockchip driver instead of -struct drm_encoder directly. - -The information the VOP2 drivers needs is the of_graph endpoint node -of the encoder. To ease bisectability this is added here. - -While at it convert the different encoder-to-driverdata macros to -static inline functions in order to gain type safety and readability. - -Signed-off-by: Sascha Hauer ---- - .../gpu/drm/rockchip/analogix_dp-rockchip.c | 32 +++++++++++------ - drivers/gpu/drm/rockchip/cdn-dp-core.c | 18 ++++++---- - drivers/gpu/drm/rockchip/cdn-dp-core.h | 2 +- - .../gpu/drm/rockchip/dw-mipi-dsi-rockchip.c | 17 ++++++---- - drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 11 ++++-- - drivers/gpu/drm/rockchip/inno_hdmi.c | 32 +++++++++++------ - drivers/gpu/drm/rockchip/rk3066_hdmi.c | 34 ++++++++++++------- - drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 10 ++++++ - drivers/gpu/drm/rockchip/rockchip_lvds.c | 26 ++++++++------ - 9 files changed, 122 insertions(+), 60 deletions(-) - ---- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c -+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c -@@ -40,8 +40,6 @@ - - #define PSR_WAIT_LINE_FLAG_TIMEOUT_MS 100 - --#define to_dp(nm) container_of(nm, struct rockchip_dp_device, nm) -- - /** - * struct rockchip_dp_chip_data - splite the grf setting of kind of chips - * @lcdsel_grf_reg: grf register offset of lcdc select -@@ -59,7 +57,7 @@ struct rockchip_dp_chip_data { - struct rockchip_dp_device { - struct drm_device *drm_dev; - struct device *dev; -- struct drm_encoder encoder; -+ struct rockchip_encoder encoder; - struct drm_display_mode mode; - - struct clk *pclk; -@@ -73,6 +71,18 @@ struct rockchip_dp_device { - struct analogix_dp_plat_data plat_data; - }; - -+static struct rockchip_dp_device *encoder_to_dp(struct drm_encoder *encoder) -+{ -+ struct rockchip_encoder *rkencoder = to_rockchip_encoder(encoder); -+ -+ return container_of(rkencoder, struct rockchip_dp_device, encoder); -+} -+ -+static struct rockchip_dp_device *pdata_encoder_to_dp(struct analogix_dp_plat_data *plat_data) -+{ -+ return container_of(plat_data, struct rockchip_dp_device, plat_data); -+} -+ - static int rockchip_dp_pre_init(struct rockchip_dp_device *dp) - { - reset_control_assert(dp->rst); -@@ -84,7 +94,7 @@ static int rockchip_dp_pre_init(struct r - - static int rockchip_dp_poweron_start(struct analogix_dp_plat_data *plat_data) - { -- struct rockchip_dp_device *dp = to_dp(plat_data); -+ struct rockchip_dp_device *dp = pdata_encoder_to_dp(plat_data); - int ret; - - ret = clk_prepare_enable(dp->pclk); -@@ -105,7 +115,7 @@ static int rockchip_dp_poweron_start(str - - static int rockchip_dp_powerdown(struct analogix_dp_plat_data *plat_data) - { -- struct rockchip_dp_device *dp = to_dp(plat_data); -+ struct rockchip_dp_device *dp = pdata_encoder_to_dp(plat_data); - - clk_disable_unprepare(dp->pclk); - -@@ -166,7 +176,7 @@ struct drm_crtc *rockchip_dp_drm_get_new - static void rockchip_dp_drm_encoder_enable(struct drm_encoder *encoder, - struct drm_atomic_state *state) - { -- struct rockchip_dp_device *dp = to_dp(encoder); -+ struct rockchip_dp_device *dp = encoder_to_dp(encoder); - struct drm_crtc *crtc; - struct drm_crtc_state *old_crtc_state; - int ret; -@@ -208,7 +218,7 @@ static void rockchip_dp_drm_encoder_enab - static void rockchip_dp_drm_encoder_disable(struct drm_encoder *encoder, - struct drm_atomic_state *state) - { -- struct rockchip_dp_device *dp = to_dp(encoder); -+ struct rockchip_dp_device *dp = encoder_to_dp(encoder); - struct drm_crtc *crtc; - struct drm_crtc_state *new_crtc_state = NULL; - int ret; -@@ -297,7 +307,7 @@ static int rockchip_dp_of_probe(struct r - - static int rockchip_dp_drm_create_encoder(struct rockchip_dp_device *dp) - { -- struct drm_encoder *encoder = &dp->encoder; -+ struct drm_encoder *encoder = &dp->encoder.encoder; - struct drm_device *drm_dev = dp->drm_dev; - struct device *dev = dp->dev; - int ret; -@@ -333,7 +343,7 @@ static int rockchip_dp_bind(struct devic - return ret; - } - -- dp->plat_data.encoder = &dp->encoder; -+ dp->plat_data.encoder = &dp->encoder.encoder; - - ret = analogix_dp_bind(dp->adp, drm_dev); - if (ret) -@@ -341,7 +351,7 @@ static int rockchip_dp_bind(struct devic - - return 0; - err_cleanup_encoder: -- dp->encoder.funcs->destroy(&dp->encoder); -+ dp->encoder.encoder.funcs->destroy(&dp->encoder.encoder); - return ret; - } - -@@ -351,7 +361,7 @@ static void rockchip_dp_unbind(struct de - struct rockchip_dp_device *dp = dev_get_drvdata(dev); - - analogix_dp_unbind(dp->adp); -- dp->encoder.funcs->destroy(&dp->encoder); -+ dp->encoder.encoder.funcs->destroy(&dp->encoder.encoder); - } - - static const struct component_ops rockchip_dp_component_ops = { ---- a/drivers/gpu/drm/rockchip/cdn-dp-core.c -+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c -@@ -26,11 +26,17 @@ - #include "cdn-dp-reg.h" - #include "rockchip_drm_vop.h" - --#define connector_to_dp(c) \ -- container_of(c, struct cdn_dp_device, connector) -+static inline struct cdn_dp_device *connector_to_dp(struct drm_connector *connector) -+{ -+ return container_of(connector, struct cdn_dp_device, connector); -+} - --#define encoder_to_dp(c) \ -- container_of(c, struct cdn_dp_device, encoder) -+static inline struct cdn_dp_device *encoder_to_dp(struct drm_encoder *encoder) -+{ -+ struct rockchip_encoder *rkencoder = to_rockchip_encoder(encoder); -+ -+ return container_of(rkencoder, struct cdn_dp_device, encoder); -+} - - #define GRF_SOC_CON9 0x6224 - #define DP_SEL_VOP_LIT BIT(12) -@@ -1050,7 +1056,7 @@ static int cdn_dp_bind(struct device *de - - INIT_WORK(&dp->event_work, cdn_dp_pd_event_work); - -- encoder = &dp->encoder; -+ encoder = &dp->encoder.encoder; - - encoder->possible_crtcs = drm_of_find_possible_crtcs(drm_dev, - dev->of_node); -@@ -1115,7 +1121,7 @@ err_free_encoder: - static void cdn_dp_unbind(struct device *dev, struct device *master, void *data) - { - struct cdn_dp_device *dp = dev_get_drvdata(dev); -- struct drm_encoder *encoder = &dp->encoder; -+ struct drm_encoder *encoder = &dp->encoder.encoder; - struct drm_connector *connector = &dp->connector; - - cancel_work_sync(&dp->event_work); ---- a/drivers/gpu/drm/rockchip/cdn-dp-core.h -+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.h -@@ -66,7 +66,7 @@ struct cdn_dp_device { - struct device *dev; - struct drm_device *drm_dev; - struct drm_connector connector; -- struct drm_encoder encoder; -+ struct rockchip_encoder encoder; - struct drm_display_mode mode; - struct platform_device *audio_pdev; - struct work_struct event_work; ---- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c -+++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c -@@ -181,8 +181,6 @@ - - #define HIWORD_UPDATE(val, mask) (val | (mask) << 16) - --#define to_dsi(nm) container_of(nm, struct dw_mipi_dsi_rockchip, nm) -- - enum { - DW_DSI_USAGE_IDLE, - DW_DSI_USAGE_DSI, -@@ -236,7 +234,7 @@ struct rockchip_dw_dsi_chip_data { - - struct dw_mipi_dsi_rockchip { - struct device *dev; -- struct drm_encoder encoder; -+ struct rockchip_encoder encoder; - void __iomem *base; - - struct regmap *grf_regmap; -@@ -271,6 +269,13 @@ struct dw_mipi_dsi_rockchip { - bool dsi_bound; - }; - -+static struct dw_mipi_dsi_rockchip *to_dsi(struct drm_encoder *encoder) -+{ -+ struct rockchip_encoder *rkencoder = to_rockchip_encoder(encoder); -+ -+ return container_of(rkencoder, struct dw_mipi_dsi_rockchip, encoder); -+} -+ - struct dphy_pll_parameter_map { - unsigned int max_mbps; - u8 hsfreqrange; -@@ -770,7 +775,7 @@ static void dw_mipi_dsi_encoder_enable(s - int ret, mux; - - mux = drm_of_encoder_active_endpoint_id(dsi->dev->of_node, -- &dsi->encoder); -+ &dsi->encoder.encoder); - if (mux < 0) - return; - -@@ -801,7 +806,7 @@ dw_mipi_dsi_encoder_helper_funcs = { - static int rockchip_dsi_drm_create_encoder(struct dw_mipi_dsi_rockchip *dsi, - struct drm_device *drm_dev) - { -- struct drm_encoder *encoder = &dsi->encoder; -+ struct drm_encoder *encoder = &dsi->encoder.encoder; - int ret; - - encoder->possible_crtcs = drm_of_find_possible_crtcs(drm_dev, -@@ -959,7 +964,7 @@ static int dw_mipi_dsi_rockchip_bind(str - goto out_pll_clk; - } - -- ret = dw_mipi_dsi_bind(dsi->dmd, &dsi->encoder); -+ ret = dw_mipi_dsi_bind(dsi->dmd, &dsi->encoder.encoder); - if (ret) { - DRM_DEV_ERROR(dev, "Failed to bind: %d\n", ret); - goto out_pll_clk; ---- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -@@ -67,7 +67,7 @@ struct rockchip_hdmi_chip_data { - struct rockchip_hdmi { - struct device *dev; - struct regmap *regmap; -- struct drm_encoder encoder; -+ struct rockchip_encoder encoder; - const struct rockchip_hdmi_chip_data *chip_data; - struct clk *vpll_clk; - struct clk *grf_clk; -@@ -75,7 +75,12 @@ struct rockchip_hdmi { - struct phy *phy; - }; - --#define to_rockchip_hdmi(x) container_of(x, struct rockchip_hdmi, x) -+static struct rockchip_hdmi *to_rockchip_hdmi(struct drm_encoder *encoder) -+{ -+ struct rockchip_encoder *rkencoder = to_rockchip_encoder(encoder); -+ -+ return container_of(rkencoder, struct rockchip_hdmi, encoder); -+} - - static const struct dw_hdmi_mpll_config rockchip_mpll_cfg[] = { - { -@@ -511,7 +516,7 @@ static int dw_hdmi_rockchip_bind(struct - hdmi->dev = &pdev->dev; - hdmi->chip_data = plat_data->phy_data; - plat_data->phy_data = hdmi; -- encoder = &hdmi->encoder; -+ encoder = &hdmi->encoder.encoder; - - encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node); - /* ---- a/drivers/gpu/drm/rockchip/inno_hdmi.c -+++ b/drivers/gpu/drm/rockchip/inno_hdmi.c -@@ -26,8 +26,6 @@ - - #include "inno_hdmi.h" - --#define to_inno_hdmi(x) container_of(x, struct inno_hdmi, x) -- - struct hdmi_data_info { - int vic; - bool sink_is_hdmi; -@@ -56,7 +54,7 @@ struct inno_hdmi { - void __iomem *regs; - - struct drm_connector connector; -- struct drm_encoder encoder; -+ struct rockchip_encoder encoder; - - struct inno_hdmi_i2c *i2c; - struct i2c_adapter *ddc; -@@ -67,6 +65,18 @@ struct inno_hdmi { - struct drm_display_mode previous_mode; - }; - -+static struct inno_hdmi *encoder_to_inno_hdmi(struct drm_encoder *encoder) -+{ -+ struct rockchip_encoder *rkencoder = to_rockchip_encoder(encoder); -+ -+ return container_of(rkencoder, struct inno_hdmi, encoder); -+} -+ -+static struct inno_hdmi *connector_to_inno_hdmi(struct drm_connector *connector) -+{ -+ return container_of(connector, struct inno_hdmi, connector); -+} -+ - enum { - CSC_ITU601_16_235_TO_RGB_0_255_8BIT, - CSC_ITU601_0_255_TO_RGB_0_255_8BIT, -@@ -483,7 +493,7 @@ static void inno_hdmi_encoder_mode_set(s - struct drm_display_mode *mode, - struct drm_display_mode *adj_mode) - { -- struct inno_hdmi *hdmi = to_inno_hdmi(encoder); -+ struct inno_hdmi *hdmi = encoder_to_inno_hdmi(encoder); - - inno_hdmi_setup(hdmi, adj_mode); - -@@ -493,14 +503,14 @@ static void inno_hdmi_encoder_mode_set(s - - static void inno_hdmi_encoder_enable(struct drm_encoder *encoder) - { -- struct inno_hdmi *hdmi = to_inno_hdmi(encoder); -+ struct inno_hdmi *hdmi = encoder_to_inno_hdmi(encoder); - - inno_hdmi_set_pwr_mode(hdmi, NORMAL); - } - - static void inno_hdmi_encoder_disable(struct drm_encoder *encoder) - { -- struct inno_hdmi *hdmi = to_inno_hdmi(encoder); -+ struct inno_hdmi *hdmi = encoder_to_inno_hdmi(encoder); - - inno_hdmi_set_pwr_mode(hdmi, LOWER_PWR); - } -@@ -536,7 +546,7 @@ static struct drm_encoder_helper_funcs i - static enum drm_connector_status - inno_hdmi_connector_detect(struct drm_connector *connector, bool force) - { -- struct inno_hdmi *hdmi = to_inno_hdmi(connector); -+ struct inno_hdmi *hdmi = connector_to_inno_hdmi(connector); - - return (hdmi_readb(hdmi, HDMI_STATUS) & m_HOTPLUG) ? - connector_status_connected : connector_status_disconnected; -@@ -544,7 +554,7 @@ inno_hdmi_connector_detect(struct drm_co - - static int inno_hdmi_connector_get_modes(struct drm_connector *connector) - { -- struct inno_hdmi *hdmi = to_inno_hdmi(connector); -+ struct inno_hdmi *hdmi = connector_to_inno_hdmi(connector); - struct edid *edid; - int ret = 0; - -@@ -599,7 +609,7 @@ static struct drm_connector_helper_funcs - - static int inno_hdmi_register(struct drm_device *drm, struct inno_hdmi *hdmi) - { -- struct drm_encoder *encoder = &hdmi->encoder; -+ struct drm_encoder *encoder = &hdmi->encoder.encoder; - struct device *dev = hdmi->dev; - - encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node); -@@ -879,7 +889,7 @@ static int inno_hdmi_bind(struct device - return 0; - err_cleanup_hdmi: - hdmi->connector.funcs->destroy(&hdmi->connector); -- hdmi->encoder.funcs->destroy(&hdmi->encoder); -+ hdmi->encoder.encoder.funcs->destroy(&hdmi->encoder.encoder); - err_put_adapter: - i2c_put_adapter(hdmi->ddc); - err_disable_clk: -@@ -893,7 +903,7 @@ static void inno_hdmi_unbind(struct devi - struct inno_hdmi *hdmi = dev_get_drvdata(dev); - - hdmi->connector.funcs->destroy(&hdmi->connector); -- hdmi->encoder.funcs->destroy(&hdmi->encoder); -+ hdmi->encoder.encoder.funcs->destroy(&hdmi->encoder.encoder); - - i2c_put_adapter(hdmi->ddc); - clk_disable_unprepare(hdmi->pclk); ---- a/drivers/gpu/drm/rockchip/rk3066_hdmi.c -+++ b/drivers/gpu/drm/rockchip/rk3066_hdmi.c -@@ -47,7 +47,7 @@ struct rk3066_hdmi { - void __iomem *regs; - - struct drm_connector connector; -- struct drm_encoder encoder; -+ struct rockchip_encoder encoder; - - struct rk3066_hdmi_i2c *i2c; - struct i2c_adapter *ddc; -@@ -58,7 +58,17 @@ struct rk3066_hdmi { - struct drm_display_mode previous_mode; - }; - --#define to_rk3066_hdmi(x) container_of(x, struct rk3066_hdmi, x) -+static struct rk3066_hdmi *encoder_to_rk3066_hdmi(struct drm_encoder *encoder) -+{ -+ struct rockchip_encoder *rkencoder = to_rockchip_encoder(encoder); -+ -+ return container_of(rkencoder, struct rk3066_hdmi, encoder); -+} -+ -+static struct rk3066_hdmi *connector_to_rk3066_hdmi(struct drm_connector *connector) -+{ -+ return container_of(connector, struct rk3066_hdmi, connector); -+} - - static inline u8 hdmi_readb(struct rk3066_hdmi *hdmi, u16 offset) - { -@@ -380,7 +390,7 @@ rk3066_hdmi_encoder_mode_set(struct drm_ - struct drm_display_mode *mode, - struct drm_display_mode *adj_mode) - { -- struct rk3066_hdmi *hdmi = to_rk3066_hdmi(encoder); -+ struct rk3066_hdmi *hdmi = encoder_to_rk3066_hdmi(encoder); - - /* Store the display mode for plugin/DPMS poweron events. */ - memcpy(&hdmi->previous_mode, adj_mode, sizeof(hdmi->previous_mode)); -@@ -388,7 +398,7 @@ rk3066_hdmi_encoder_mode_set(struct drm_ - - static void rk3066_hdmi_encoder_enable(struct drm_encoder *encoder) - { -- struct rk3066_hdmi *hdmi = to_rk3066_hdmi(encoder); -+ struct rk3066_hdmi *hdmi = encoder_to_rk3066_hdmi(encoder); - int mux, val; - - mux = drm_of_encoder_active_endpoint_id(hdmi->dev->of_node, encoder); -@@ -407,7 +417,7 @@ static void rk3066_hdmi_encoder_enable(s - - static void rk3066_hdmi_encoder_disable(struct drm_encoder *encoder) - { -- struct rk3066_hdmi *hdmi = to_rk3066_hdmi(encoder); -+ struct rk3066_hdmi *hdmi = encoder_to_rk3066_hdmi(encoder); - - DRM_DEV_DEBUG(hdmi->dev, "hdmi encoder disable\n"); - -@@ -455,7 +465,7 @@ struct drm_encoder_helper_funcs rk3066_h - static enum drm_connector_status - rk3066_hdmi_connector_detect(struct drm_connector *connector, bool force) - { -- struct rk3066_hdmi *hdmi = to_rk3066_hdmi(connector); -+ struct rk3066_hdmi *hdmi = connector_to_rk3066_hdmi(connector); - - return (hdmi_readb(hdmi, HDMI_HPG_MENS_STA) & HDMI_HPG_IN_STATUS_HIGH) ? - connector_status_connected : connector_status_disconnected; -@@ -463,7 +473,7 @@ rk3066_hdmi_connector_detect(struct drm_ - - static int rk3066_hdmi_connector_get_modes(struct drm_connector *connector) - { -- struct rk3066_hdmi *hdmi = to_rk3066_hdmi(connector); -+ struct rk3066_hdmi *hdmi = connector_to_rk3066_hdmi(connector); - struct edid *edid; - int ret = 0; - -@@ -496,9 +506,9 @@ rk3066_hdmi_connector_mode_valid(struct - static struct drm_encoder * - rk3066_hdmi_connector_best_encoder(struct drm_connector *connector) - { -- struct rk3066_hdmi *hdmi = to_rk3066_hdmi(connector); -+ struct rk3066_hdmi *hdmi = connector_to_rk3066_hdmi(connector); - -- return &hdmi->encoder; -+ return &hdmi->encoder.encoder; - } - - static int -@@ -538,7 +548,7 @@ struct drm_connector_helper_funcs rk3066 - static int - rk3066_hdmi_register(struct drm_device *drm, struct rk3066_hdmi *hdmi) - { -- struct drm_encoder *encoder = &hdmi->encoder; -+ struct drm_encoder *encoder = &hdmi->encoder.encoder; - struct device *dev = hdmi->dev; - - encoder->possible_crtcs = -@@ -816,7 +826,7 @@ static int rk3066_hdmi_bind(struct devic - - err_cleanup_hdmi: - hdmi->connector.funcs->destroy(&hdmi->connector); -- hdmi->encoder.funcs->destroy(&hdmi->encoder); -+ hdmi->encoder.encoder.funcs->destroy(&hdmi->encoder.encoder); - err_disable_i2c: - i2c_put_adapter(hdmi->ddc); - err_disable_hclk: -@@ -831,7 +841,7 @@ static void rk3066_hdmi_unbind(struct de - struct rk3066_hdmi *hdmi = dev_get_drvdata(dev); - - hdmi->connector.funcs->destroy(&hdmi->connector); -- hdmi->encoder.funcs->destroy(&hdmi->encoder); -+ hdmi->encoder.encoder.funcs->destroy(&hdmi->encoder.encoder); - - i2c_put_adapter(hdmi->ddc); - clk_disable_unprepare(hdmi->hclk); ---- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h -+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h -@@ -49,6 +49,10 @@ struct rockchip_drm_private { - struct drm_mm mm; - }; - -+struct rockchip_encoder { -+ struct drm_encoder encoder; -+}; -+ - int rockchip_drm_dma_attach_device(struct drm_device *drm_dev, - struct device *dev); - void rockchip_drm_dma_detach_device(struct drm_device *drm_dev, -@@ -66,4 +70,10 @@ extern struct platform_driver rockchip_d - extern struct platform_driver rockchip_lvds_driver; - extern struct platform_driver vop_platform_driver; - extern struct platform_driver rk3066_hdmi_driver; -+ -+static inline struct rockchip_encoder *to_rockchip_encoder(struct drm_encoder *encoder) -+{ -+ return container_of(encoder, struct rockchip_encoder, encoder); -+} -+ - #endif /* _ROCKCHIP_DRM_DRV_H_ */ ---- a/drivers/gpu/drm/rockchip/rockchip_lvds.c -+++ b/drivers/gpu/drm/rockchip/rockchip_lvds.c -@@ -36,12 +36,6 @@ - - struct rockchip_lvds; - --#define connector_to_lvds(c) \ -- container_of(c, struct rockchip_lvds, connector) -- --#define encoder_to_lvds(c) \ -- container_of(c, struct rockchip_lvds, encoder) -- - /** - * struct rockchip_lvds_soc_data - rockchip lvds Soc private data - * @probe: LVDS platform probe function -@@ -65,10 +59,22 @@ struct rockchip_lvds { - struct drm_panel *panel; - struct drm_bridge *bridge; - struct drm_connector connector; -- struct drm_encoder encoder; -+ struct rockchip_encoder encoder; - struct dev_pin_info *pins; - }; - -+static inline struct rockchip_lvds *connector_to_lvds(struct drm_connector *connector) -+{ -+ return container_of(connector, struct rockchip_lvds, connector); -+} -+ -+static inline struct rockchip_lvds *encoder_to_lvds(struct drm_encoder *encoder) -+{ -+ struct rockchip_encoder *rkencoder = to_rockchip_encoder(encoder); -+ -+ return container_of(rkencoder, struct rockchip_lvds, encoder); -+} -+ - static inline void rk3288_writel(struct rockchip_lvds *lvds, u32 offset, - u32 val) - { -@@ -599,7 +605,7 @@ static int rockchip_lvds_bind(struct dev - goto err_put_remote; - } - -- encoder = &lvds->encoder; -+ encoder = &lvds->encoder.encoder; - encoder->possible_crtcs = drm_of_find_possible_crtcs(drm_dev, - dev->of_node); - -@@ -674,10 +680,10 @@ static void rockchip_lvds_unbind(struct - const struct drm_encoder_helper_funcs *encoder_funcs; - - encoder_funcs = lvds->soc_data->helper_funcs; -- encoder_funcs->disable(&lvds->encoder); -+ encoder_funcs->disable(&lvds->encoder.encoder); - pm_runtime_disable(dev); - drm_connector_cleanup(&lvds->connector); -- drm_encoder_cleanup(&lvds->encoder); -+ drm_encoder_cleanup(&lvds->encoder.encoder); - } - - static const struct component_ops rockchip_lvds_component_ops = { diff --git a/target/linux/rockchip/patches-5.18/228-drm-rockchip-Add-crtc_endpoint_id-to-rockchip_encode.patch b/target/linux/rockchip/patches-5.18/228-drm-rockchip-Add-crtc_endpoint_id-to-rockchip_encode.patch deleted file mode 100644 index 7dfce79e925749..00000000000000 --- a/target/linux/rockchip/patches-5.18/228-drm-rockchip-Add-crtc_endpoint_id-to-rockchip_encode.patch +++ /dev/null @@ -1,85 +0,0 @@ -From 09a20d5d90f1e6f260a2564b645bda913048f85b Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Fri, 8 Apr 2022 13:22:17 +0200 -Subject: [PATCH 28/50] drm/rockchip: Add crtc_endpoint_id to rockchip_encoder - -The VOP2 has an interface mux which decides to which encoder(s) a CRTC -is routed to. The encoders and CRTCs are connected via of_graphs in the -device tree. When given an encoder the VOP2 driver needs to know to -which internal register setting this encoder matches. For this the VOP2 -binding offers different endpoints, one for each possible encoder. The -endpoint ids of these endpoints are used as a key from an encoders -device tree description to the internal register setting. - -This patch adds the key aka endpoint id to struct rockchip_encoder plus -a function to read the endpoint id starting from the encoders device -node. - -Signed-off-by: Sascha Hauer ---- - drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 33 +++++++++++++++++++++ - drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 4 ++- - 2 files changed, 36 insertions(+), 1 deletion(-) - ---- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c -+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c -@@ -245,6 +245,39 @@ static struct platform_driver *rockchip_ - static int num_rockchip_sub_drivers; - - /* -+ * Get the endpoint id of the remote endpoint of the given encoder. This -+ * information is used by the VOP2 driver to identify the encoder. -+ * -+ * @rkencoder: The encoder to get the remote endpoint id from -+ * @np: The encoder device node -+ * @port: The number of the port leading to the VOP2 -+ * @reg: The endpoint number leading to the VOP2 -+ */ -+int rockchip_drm_encoder_set_crtc_endpoint_id(struct rockchip_encoder *rkencoder, -+ struct device_node *np, int port, int reg) -+{ -+ struct of_endpoint ep; -+ struct device_node *en, *ren; -+ int ret; -+ -+ en = of_graph_get_endpoint_by_regs(np, port, reg); -+ if (!en) -+ return -ENOENT; -+ -+ ren = of_graph_get_remote_endpoint(en); -+ if (!ren) -+ return -ENOENT; -+ -+ ret = of_graph_parse_endpoint(ren, &ep); -+ if (ret) -+ return ret; -+ -+ rkencoder->crtc_endpoint_id = ep.id; -+ -+ return 0; -+} -+ -+/* - * Check if a vop endpoint is leading to a rockchip subdriver or bridge. - * Should be called from the component bind stage of the drivers - * to ensure that all subdrivers are probed. ---- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h -+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h -@@ -50,6 +50,7 @@ struct rockchip_drm_private { - }; - - struct rockchip_encoder { -+ int crtc_endpoint_id; - struct drm_encoder encoder; - }; - -@@ -60,7 +61,8 @@ void rockchip_drm_dma_detach_device(stru - void rockchip_drm_dma_init_device(struct drm_device *drm_dev, - struct device *dev); - int rockchip_drm_wait_vact_end(struct drm_crtc *crtc, unsigned int mstimeout); -- -+int rockchip_drm_encoder_set_crtc_endpoint_id(struct rockchip_encoder *rencoder, -+ struct device_node *np, int port, int reg); - int rockchip_drm_endpoint_is_subdriver(struct device_node *ep); - extern struct platform_driver cdn_dp_driver; - extern struct platform_driver dw_hdmi_rockchip_pltfm_driver; diff --git a/target/linux/rockchip/patches-5.18/229-drm-rockchip-dw_hdmi-rename-vpll-clock-to-reference-.patch b/target/linux/rockchip/patches-5.18/229-drm-rockchip-dw_hdmi-rename-vpll-clock-to-reference-.patch deleted file mode 100644 index e6bb3b8f0f44e9..00000000000000 --- a/target/linux/rockchip/patches-5.18/229-drm-rockchip-dw_hdmi-rename-vpll-clock-to-reference-.patch +++ /dev/null @@ -1,91 +0,0 @@ -From ac6f3d88fd9f6fd241bf6cfacb850f6c644a97d7 Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Fri, 8 Apr 2022 13:22:18 +0200 -Subject: [PATCH 29/50] drm/rockchip: dw_hdmi: rename vpll clock to reference - clock - -"vpll" is a misnomer. A clock input to a device should be named after -the usage in the device, not after the clock that drives it. On the -rk3568 the same clock is driven by the HPLL. -To fix that, this patch renames the vpll clock to ref clock. The clock -name "vpll" is left for compatibility to old device trees. - -Signed-off-by: Sascha Hauer -Reviewed-by: Dmitry Osipenko ---- - drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 27 +++++++++++---------- - 1 file changed, 14 insertions(+), 13 deletions(-) - ---- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -@@ -69,7 +69,7 @@ struct rockchip_hdmi { - struct regmap *regmap; - struct rockchip_encoder encoder; - const struct rockchip_hdmi_chip_data *chip_data; -- struct clk *vpll_clk; -+ struct clk *ref_clk; - struct clk *grf_clk; - struct dw_hdmi *hdmi; - struct phy *phy; -@@ -201,14 +201,15 @@ static int rockchip_hdmi_parse_dt(struct - return PTR_ERR(hdmi->regmap); - } - -- hdmi->vpll_clk = devm_clk_get(hdmi->dev, "vpll"); -- if (PTR_ERR(hdmi->vpll_clk) == -ENOENT) { -- hdmi->vpll_clk = NULL; -- } else if (PTR_ERR(hdmi->vpll_clk) == -EPROBE_DEFER) { -+ hdmi->ref_clk = devm_clk_get_optional(hdmi->dev, "ref"); -+ if (!hdmi->ref_clk) -+ hdmi->ref_clk = devm_clk_get_optional(hdmi->dev, "vpll"); -+ -+ if (PTR_ERR(hdmi->ref_clk) == -EPROBE_DEFER) { - return -EPROBE_DEFER; -- } else if (IS_ERR(hdmi->vpll_clk)) { -- DRM_DEV_ERROR(hdmi->dev, "failed to get vpll clock\n"); -- return PTR_ERR(hdmi->vpll_clk); -+ } else if (IS_ERR(hdmi->ref_clk)) { -+ DRM_DEV_ERROR(hdmi->dev, "failed to get reference clock\n"); -+ return PTR_ERR(hdmi->ref_clk); - } - - hdmi->grf_clk = devm_clk_get(hdmi->dev, "grf"); -@@ -262,7 +263,7 @@ static void dw_hdmi_rockchip_encoder_mod - { - struct rockchip_hdmi *hdmi = to_rockchip_hdmi(encoder); - -- clk_set_rate(hdmi->vpll_clk, adj_mode->clock * 1000); -+ clk_set_rate(hdmi->ref_clk, adj_mode->clock * 1000); - } - - static void dw_hdmi_rockchip_encoder_enable(struct drm_encoder *encoder) -@@ -542,9 +543,9 @@ static int dw_hdmi_rockchip_bind(struct - return ret; - } - -- ret = clk_prepare_enable(hdmi->vpll_clk); -+ ret = clk_prepare_enable(hdmi->ref_clk); - if (ret) { -- DRM_DEV_ERROR(hdmi->dev, "Failed to enable HDMI vpll: %d\n", -+ DRM_DEV_ERROR(hdmi->dev, "Failed to enable HDMI reference clock: %d\n", - ret); - return ret; - } -@@ -563,7 +564,7 @@ static int dw_hdmi_rockchip_bind(struct - if (IS_ERR(hdmi->hdmi)) { - ret = PTR_ERR(hdmi->hdmi); - drm_encoder_cleanup(encoder); -- clk_disable_unprepare(hdmi->vpll_clk); -+ clk_disable_unprepare(hdmi->ref_clk); - } - - return ret; -@@ -575,7 +576,7 @@ static void dw_hdmi_rockchip_unbind(stru - struct rockchip_hdmi *hdmi = dev_get_drvdata(dev); - - dw_hdmi_unbind(hdmi->hdmi); -- clk_disable_unprepare(hdmi->vpll_clk); -+ clk_disable_unprepare(hdmi->ref_clk); - } - - static const struct component_ops dw_hdmi_rockchip_ops = { diff --git a/target/linux/rockchip/patches-5.18/230-dt-bindings-display-rockchip-dw-hdmi-use-ref-as-cloc.patch b/target/linux/rockchip/patches-5.18/230-dt-bindings-display-rockchip-dw-hdmi-use-ref-as-cloc.patch deleted file mode 100644 index 3f321fd2bb28d6..00000000000000 --- a/target/linux/rockchip/patches-5.18/230-dt-bindings-display-rockchip-dw-hdmi-use-ref-as-cloc.patch +++ /dev/null @@ -1,45 +0,0 @@ -From d06891fd7ea0600086ab9b1fff5bf158372163e3 Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Fri, 8 Apr 2022 13:22:19 +0200 -Subject: [PATCH 30/50] dt-bindings: display: rockchip: dw-hdmi: use "ref" as - clock name - -"vpll" is a misnomer. A clock input to a device should be named after -the usage in the device, not after the clock that drives it. On the -rk3568 the same clock is driven by the HPLL. -This patch adds "ref" as a new alternative clock name for "vpll" - -Signed-off-by: Sascha Hauer -Acked-by: Rob Herring ---- - .../bindings/display/rockchip/rockchip,dw-hdmi.yaml | 9 +++++++-- - 1 file changed, 7 insertions(+), 2 deletions(-) - ---- a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml -+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml -@@ -36,7 +36,8 @@ properties: - # order when present. - - description: The HDMI CEC controller main clock - - description: Power for GRF IO -- - description: External clock for some HDMI PHY -+ - description: External clock for some HDMI PHY (old clock name, deprecated) -+ - description: External clock for some HDMI PHY (new name) - - clock-names: - minItems: 2 -@@ -47,10 +48,14 @@ properties: - - cec - - grf - - vpll -+ - ref - - enum: - - grf - - vpll -- - const: vpll -+ - ref -+ - enum: -+ - vpll -+ - ref - - ddc-i2c-bus: - $ref: /schemas/types.yaml#/definitions/phandle diff --git a/target/linux/rockchip/patches-5.18/231-arm64-dts-rockchip-rk3399-rename-HDMI-ref-clock-to-r.patch b/target/linux/rockchip/patches-5.18/231-arm64-dts-rockchip-rk3399-rename-HDMI-ref-clock-to-r.patch deleted file mode 100644 index da32e575ee4bb1..00000000000000 --- a/target/linux/rockchip/patches-5.18/231-arm64-dts-rockchip-rk3399-rename-HDMI-ref-clock-to-r.patch +++ /dev/null @@ -1,26 +0,0 @@ -From cc0c0e69cedb3891ad422962e5d78808d9d4c1d1 Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Fri, 8 Apr 2022 13:22:20 +0200 -Subject: [PATCH 31/50] arm64: dts: rockchip: rk3399: rename HDMI ref clock to - 'ref' - -The reference clock for the HDMI controller has been renamed to 'ref', -the previous 'vpll' name is only left for compatibility in the driver. -Rename the clock to the new name. - -Signed-off-by: Sascha Hauer ---- - arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -@@ -1884,7 +1884,7 @@ - <&cru SCLK_HDMI_CEC>, - <&cru PCLK_VIO_GRF>, - <&cru PLL_VPLL>; -- clock-names = "iahb", "isfr", "cec", "grf", "vpll"; -+ clock-names = "iahb", "isfr", "cec", "grf", "ref"; - power-domains = <&power RK3399_PD_HDCP>; - reg-io-width = <4>; - rockchip,grf = <&grf>; diff --git a/target/linux/rockchip/patches-5.18/232-drm-rockchip-dw_hdmi-add-rk3568-support.patch b/target/linux/rockchip/patches-5.18/232-drm-rockchip-dw_hdmi-add-rk3568-support.patch deleted file mode 100644 index 4aa73786347feb..00000000000000 --- a/target/linux/rockchip/patches-5.18/232-drm-rockchip-dw_hdmi-add-rk3568-support.patch +++ /dev/null @@ -1,81 +0,0 @@ -From d746208026235a92adb8d32d838f5aad23f33312 Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Fri, 8 Apr 2022 13:22:21 +0200 -Subject: [PATCH 32/50] drm/rockchip: dw_hdmi: add rk3568 support - -Add a new dw_hdmi_plat_data struct and new compatible for rk3568. - -Signed-off-by: Benjamin Gaignard -Signed-off-by: Sascha Hauer ---- - drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 31 +++++++++++++++++++++ - 1 file changed, 31 insertions(+) - ---- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -@@ -50,6 +50,10 @@ - #define RK3399_GRF_SOC_CON20 0x6250 - #define RK3399_HDMI_LCDC_SEL BIT(6) - -+#define RK3568_GRF_VO_CON1 0x0364 -+#define RK3568_HDMI_SDAIN_MSK BIT(15) -+#define RK3568_HDMI_SCLIN_MSK BIT(14) -+ - #define HIWORD_UPDATE(val, mask) (val | (mask) << 16) - - /** -@@ -473,6 +477,19 @@ static const struct dw_hdmi_plat_data rk - .use_drm_infoframe = true, - }; - -+static struct rockchip_hdmi_chip_data rk3568_chip_data = { -+ .lcdsel_grf_reg = -1, -+}; -+ -+static const struct dw_hdmi_plat_data rk3568_hdmi_drv_data = { -+ .mode_valid = dw_hdmi_rockchip_mode_valid, -+ .mpll_cfg = rockchip_mpll_cfg, -+ .cur_ctr = rockchip_cur_ctr, -+ .phy_config = rockchip_phy_config, -+ .phy_data = &rk3568_chip_data, -+ .use_drm_infoframe = true, -+}; -+ - static const struct of_device_id dw_hdmi_rockchip_dt_ids[] = { - { .compatible = "rockchip,rk3228-dw-hdmi", - .data = &rk3228_hdmi_drv_data -@@ -486,6 +503,9 @@ static const struct of_device_id dw_hdmi - { .compatible = "rockchip,rk3399-dw-hdmi", - .data = &rk3399_hdmi_drv_data - }, -+ { .compatible = "rockchip,rk3568-dw-hdmi", -+ .data = &rk3568_hdmi_drv_data -+ }, - {}, - }; - MODULE_DEVICE_TABLE(of, dw_hdmi_rockchip_dt_ids); -@@ -520,6 +540,9 @@ static int dw_hdmi_rockchip_bind(struct - encoder = &hdmi->encoder.encoder; - - encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node); -+ rockchip_drm_encoder_set_crtc_endpoint_id(&hdmi->encoder, -+ dev->of_node, 0, 0); -+ - /* - * If we failed to find the CRTC(s) which this encoder is - * supposed to be connected to, it's because the CRTC has -@@ -550,6 +573,14 @@ static int dw_hdmi_rockchip_bind(struct - return ret; - } - -+ if (hdmi->chip_data == &rk3568_chip_data) { -+ regmap_write(hdmi->regmap, RK3568_GRF_VO_CON1, -+ HIWORD_UPDATE(RK3568_HDMI_SDAIN_MSK | -+ RK3568_HDMI_SCLIN_MSK, -+ RK3568_HDMI_SDAIN_MSK | -+ RK3568_HDMI_SCLIN_MSK)); -+ } -+ - drm_encoder_helper_add(encoder, &dw_hdmi_rockchip_encoder_helper_funcs); - drm_simple_encoder_init(drm, encoder, DRM_MODE_ENCODER_TMDS); - diff --git a/target/linux/rockchip/patches-5.18/233-dt-bindings-display-rockchip-dw-hdmi-Add-compatible-.patch b/target/linux/rockchip/patches-5.18/233-dt-bindings-display-rockchip-dw-hdmi-Add-compatible-.patch deleted file mode 100644 index 1e88afbf65c80e..00000000000000 --- a/target/linux/rockchip/patches-5.18/233-dt-bindings-display-rockchip-dw-hdmi-Add-compatible-.patch +++ /dev/null @@ -1,27 +0,0 @@ -From e38f7e13f12eec345462ae67e8009b94a41be116 Mon Sep 17 00:00:00 2001 -From: Benjamin Gaignard -Date: Fri, 8 Apr 2022 13:22:22 +0200 -Subject: [PATCH 33/50] dt-bindings: display: rockchip: dw-hdmi: Add compatible - for rk3568 HDMI - -Define a new compatible for rk3568 HDMI. -This version of HDMI hardware block needs two new clocks hclk_vio and hclk -to provide phy reference clocks. - -Signed-off-by: Benjamin Gaignard -Reviewed-by: Rob Herring -Signed-off-by: Sascha Hauer ---- - .../devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml | 1 + - 1 file changed, 1 insertion(+) - ---- a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml -+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml -@@ -23,6 +23,7 @@ properties: - - rockchip,rk3288-dw-hdmi - - rockchip,rk3328-dw-hdmi - - rockchip,rk3399-dw-hdmi -+ - rockchip,rk3568-dw-hdmi - - reg-io-width: - const: 4 diff --git a/target/linux/rockchip/patches-5.18/234-drm-rockchip-dw_hdmi-add-regulator-support.patch b/target/linux/rockchip/patches-5.18/234-drm-rockchip-dw_hdmi-add-regulator-support.patch deleted file mode 100644 index 357ae41441ab05..00000000000000 --- a/target/linux/rockchip/patches-5.18/234-drm-rockchip-dw_hdmi-add-regulator-support.patch +++ /dev/null @@ -1,106 +0,0 @@ -From 414fe5e5ddd91f3977617464c09a6af04e3d38ae Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Fri, 8 Apr 2022 13:22:23 +0200 -Subject: [PATCH 34/50] drm/rockchip: dw_hdmi: add regulator support - -The RK3568 has HDMI_TX_AVDD0V9 and HDMI_TX_AVDD_1V8 supply inputs needed -for the HDMI port. add support for these to the driver for boards which -have them supplied by switchable regulators. - -Signed-off-by: Sascha Hauer -Reviewed-by: Dmitry Osipenko ---- - drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 41 +++++++++++++++++++-- - 1 file changed, 38 insertions(+), 3 deletions(-) - ---- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -@@ -9,6 +9,7 @@ - #include - #include - #include -+#include - - #include - #include -@@ -76,6 +77,8 @@ struct rockchip_hdmi { - struct clk *ref_clk; - struct clk *grf_clk; - struct dw_hdmi *hdmi; -+ struct regulator *avdd_0v9; -+ struct regulator *avdd_1v8; - struct phy *phy; - }; - -@@ -226,6 +229,14 @@ static int rockchip_hdmi_parse_dt(struct - return PTR_ERR(hdmi->grf_clk); - } - -+ hdmi->avdd_0v9 = devm_regulator_get(hdmi->dev, "avdd-0v9"); -+ if (IS_ERR(hdmi->avdd_0v9)) -+ return PTR_ERR(hdmi->avdd_0v9); -+ -+ hdmi->avdd_1v8 = devm_regulator_get(hdmi->dev, "avdd-1v8"); -+ if (IS_ERR(hdmi->avdd_1v8)) -+ return PTR_ERR(hdmi->avdd_1v8); -+ - return 0; - } - -@@ -566,11 +577,23 @@ static int dw_hdmi_rockchip_bind(struct - return ret; - } - -+ ret = regulator_enable(hdmi->avdd_0v9); -+ if (ret) { -+ DRM_DEV_ERROR(hdmi->dev, "failed to enable avdd0v9: %d\n", ret); -+ goto err_avdd_0v9; -+ } -+ -+ ret = regulator_enable(hdmi->avdd_1v8); -+ if (ret) { -+ DRM_DEV_ERROR(hdmi->dev, "failed to enable avdd1v8: %d\n", ret); -+ goto err_avdd_1v8; -+ } -+ - ret = clk_prepare_enable(hdmi->ref_clk); - if (ret) { - DRM_DEV_ERROR(hdmi->dev, "Failed to enable HDMI reference clock: %d\n", - ret); -- return ret; -+ goto err_clk; - } - - if (hdmi->chip_data == &rk3568_chip_data) { -@@ -594,10 +617,19 @@ static int dw_hdmi_rockchip_bind(struct - */ - if (IS_ERR(hdmi->hdmi)) { - ret = PTR_ERR(hdmi->hdmi); -- drm_encoder_cleanup(encoder); -- clk_disable_unprepare(hdmi->ref_clk); -+ goto err_bind; - } - -+ return 0; -+ -+err_bind: -+ clk_disable_unprepare(hdmi->ref_clk); -+ drm_encoder_cleanup(encoder); -+err_clk: -+ regulator_disable(hdmi->avdd_1v8); -+err_avdd_1v8: -+ regulator_disable(hdmi->avdd_0v9); -+err_avdd_0v9: - return ret; - } - -@@ -608,6 +640,9 @@ static void dw_hdmi_rockchip_unbind(stru - - dw_hdmi_unbind(hdmi->hdmi); - clk_disable_unprepare(hdmi->ref_clk); -+ -+ regulator_disable(hdmi->avdd_1v8); -+ regulator_disable(hdmi->avdd_0v9); - } - - static const struct component_ops dw_hdmi_rockchip_ops = { diff --git a/target/linux/rockchip/patches-5.18/235-dt-bindings-display-rockchip-dw-hdmi-Add-regulator-s.patch b/target/linux/rockchip/patches-5.18/235-dt-bindings-display-rockchip-dw-hdmi-Add-regulator-s.patch deleted file mode 100644 index 7299ba8f2f29e8..00000000000000 --- a/target/linux/rockchip/patches-5.18/235-dt-bindings-display-rockchip-dw-hdmi-Add-regulator-s.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 32118137e182b52fdda4054673d49a7a9ed27b07 Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Fri, 8 Apr 2022 13:22:24 +0200 -Subject: [PATCH 35/50] dt-bindings: display: rockchip: dw-hdmi: Add regulator - support - -The RK3568 has HDMI_TX_AVDD0V9 and HDMI_TX_AVDD_1V8 supply inputs -needed for the HDMI port. Add the binding for these supplies. - -Signed-off-by: Sascha Hauer -Acked-by: Rob Herring ---- - .../bindings/display/rockchip/rockchip,dw-hdmi.yaml | 11 +++++++++++ - 1 file changed, 11 insertions(+) - ---- a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml -+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml -@@ -28,6 +28,17 @@ properties: - reg-io-width: - const: 4 - -+ avdd-0v9-supply: -+ description: -+ A 0.9V supply that powers up the SoC internal circuitry. The actual pin name -+ varies between the different SoCs and is usually HDMI_TX_AVDD_0V9 or sometimes -+ HDMI_AVDD_1V0. -+ -+ avdd-1v8-supply: -+ description: -+ A 1.8V supply that powers up the SoC internal circuitry. The pin name on the -+ SoC usually is HDMI_TX_AVDD_1V8. -+ - clocks: - minItems: 2 - items: diff --git a/target/linux/rockchip/patches-5.18/236-drm-rockchip-dw_hdmi-Use-auto-generated-tables.patch b/target/linux/rockchip/patches-5.18/236-drm-rockchip-dw_hdmi-Use-auto-generated-tables.patch deleted file mode 100644 index 5388bac573dfa1..00000000000000 --- a/target/linux/rockchip/patches-5.18/236-drm-rockchip-dw_hdmi-Use-auto-generated-tables.patch +++ /dev/null @@ -1,193 +0,0 @@ -From 2e1285fea641313f28766fbd7d0723e33ffdeba8 Mon Sep 17 00:00:00 2001 -From: Douglas Anderson -Date: Fri, 8 Apr 2022 13:22:25 +0200 -Subject: [PATCH 36/50] drm/rockchip: dw_hdmi: Use auto-generated tables - -The previous tables for mpll_cfg and curr_ctrl were created using the -20-pages of example settings provided by the PHY vendor. Those -example settings weren't particularly dense, so there were places -where we were guessing what the settings would be for 10-bit and -12-bit (not that we use those anyway). It was also always a lot of -extra work every time we wanted to add a new clock rate since we had -to cross-reference several tables. - -In I've gone through the work to figure -out how to generate this table automatically. Let's now use the -automatically generated table and then we'll never need to look at it -again. - -We only support 8-bit mode right now and only support a small number -of clock rates and I've verified that the only 8-bit rate that was -affected was 148.5. That mode appears to have been wrong in the old -table. - -Signed-off-by: Douglas Anderson -Signed-off-by: Yakir Yang -Signed-off-by: Sascha Hauer ---- - drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 130 +++++++++++--------- - 1 file changed, 69 insertions(+), 61 deletions(-) - ---- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -@@ -91,80 +91,88 @@ static struct rockchip_hdmi *to_rockchip - - static const struct dw_hdmi_mpll_config rockchip_mpll_cfg[] = { - { -- 27000000, { -- { 0x00b3, 0x0000}, -- { 0x2153, 0x0000}, -- { 0x40f3, 0x0000} -- }, -- }, { -- 36000000, { -- { 0x00b3, 0x0000}, -- { 0x2153, 0x0000}, -- { 0x40f3, 0x0000} -- }, -- }, { -- 40000000, { -- { 0x00b3, 0x0000}, -- { 0x2153, 0x0000}, -- { 0x40f3, 0x0000} -- }, -- }, { -- 54000000, { -- { 0x0072, 0x0001}, -- { 0x2142, 0x0001}, -- { 0x40a2, 0x0001}, -- }, -- }, { -- 65000000, { -- { 0x0072, 0x0001}, -- { 0x2142, 0x0001}, -- { 0x40a2, 0x0001}, -- }, -- }, { -- 66000000, { -- { 0x013e, 0x0003}, -- { 0x217e, 0x0002}, -- { 0x4061, 0x0002} -- }, -- }, { -- 74250000, { -- { 0x0072, 0x0001}, -- { 0x2145, 0x0002}, -- { 0x4061, 0x0002} -- }, -- }, { -- 83500000, { -- { 0x0072, 0x0001}, -- }, -- }, { -- 108000000, { -- { 0x0051, 0x0002}, -- { 0x2145, 0x0002}, -- { 0x4061, 0x0002} -- }, -- }, { -- 106500000, { -- { 0x0051, 0x0002}, -- { 0x2145, 0x0002}, -- { 0x4061, 0x0002} -- }, -- }, { -- 146250000, { -- { 0x0051, 0x0002}, -- { 0x2145, 0x0002}, -- { 0x4061, 0x0002} -- }, -- }, { -- 148500000, { -- { 0x0051, 0x0003}, -- { 0x214c, 0x0003}, -- { 0x4064, 0x0003} -+ 30666000, { -+ { 0x00b3, 0x0000 }, -+ { 0x2153, 0x0000 }, -+ { 0x40f3, 0x0000 }, -+ }, -+ }, { -+ 36800000, { -+ { 0x00b3, 0x0000 }, -+ { 0x2153, 0x0000 }, -+ { 0x40a2, 0x0001 }, -+ }, -+ }, { -+ 46000000, { -+ { 0x00b3, 0x0000 }, -+ { 0x2142, 0x0001 }, -+ { 0x40a2, 0x0001 }, -+ }, -+ }, { -+ 61333000, { -+ { 0x0072, 0x0001 }, -+ { 0x2142, 0x0001 }, -+ { 0x40a2, 0x0001 }, -+ }, -+ }, { -+ 73600000, { -+ { 0x0072, 0x0001 }, -+ { 0x2142, 0x0001 }, -+ { 0x4061, 0x0002 }, -+ }, -+ }, { -+ 92000000, { -+ { 0x0072, 0x0001 }, -+ { 0x2145, 0x0002 }, -+ { 0x4061, 0x0002 }, -+ }, -+ }, { -+ 122666000, { -+ { 0x0051, 0x0002 }, -+ { 0x2145, 0x0002 }, -+ { 0x4061, 0x0002 }, -+ }, -+ }, { -+ 147200000, { -+ { 0x0051, 0x0002 }, -+ { 0x2145, 0x0002 }, -+ { 0x4064, 0x0003 }, -+ }, -+ }, { -+ 184000000, { -+ { 0x0051, 0x0002 }, -+ { 0x214c, 0x0003 }, -+ { 0x4064, 0x0003 }, -+ }, -+ }, { -+ 226666000, { -+ { 0x0040, 0x0003 }, -+ { 0x214c, 0x0003 }, -+ { 0x4064, 0x0003 }, -+ }, -+ }, { -+ 272000000, { -+ { 0x0040, 0x0003 }, -+ { 0x214c, 0x0003 }, -+ { 0x5a64, 0x0003 }, -+ }, -+ }, { -+ 340000000, { -+ { 0x0040, 0x0003 }, -+ { 0x3b4c, 0x0003 }, -+ { 0x5a64, 0x0003 }, -+ }, -+ }, { -+ 600000000, { -+ { 0x1a40, 0x0003 }, -+ { 0x3b4c, 0x0003 }, -+ { 0x5a64, 0x0003 }, - }, -- }, { -+ }, { - ~0UL, { -- { 0x00a0, 0x000a }, -- { 0x2001, 0x000f }, -- { 0x4002, 0x000f }, -+ { 0x0000, 0x0000 }, -+ { 0x0000, 0x0000 }, -+ { 0x0000, 0x0000 }, - }, - } - }; diff --git a/target/linux/rockchip/patches-5.18/237-drm-rockchip-dw_hdmi-drop-mode_valid-hook.patch b/target/linux/rockchip/patches-5.18/237-drm-rockchip-dw_hdmi-drop-mode_valid-hook.patch deleted file mode 100644 index 5dd1f030bff108..00000000000000 --- a/target/linux/rockchip/patches-5.18/237-drm-rockchip-dw_hdmi-drop-mode_valid-hook.patch +++ /dev/null @@ -1,85 +0,0 @@ -From ac7d452ab34962172f64ad1ecf244b42fdb4bccf Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Fri, 8 Apr 2022 13:22:26 +0200 -Subject: [PATCH 37/50] drm/rockchip: dw_hdmi: drop mode_valid hook - -The driver checks if the pixel clock of the given mode matches an entry -in the mpll config table. The frequencies in the mpll table are meant as -a frequency range up to which the entry works, not as a frequency that -must match the pixel clock. The downstream Kernel also does not have -this check, so drop it to allow for more display resolutions. - -Signed-off-by: Sascha Hauer ---- - drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 25 --------------------- - 1 file changed, 25 deletions(-) - ---- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -@@ -248,26 +248,6 @@ static int rockchip_hdmi_parse_dt(struct - return 0; - } - --static enum drm_mode_status --dw_hdmi_rockchip_mode_valid(struct dw_hdmi *hdmi, void *data, -- const struct drm_display_info *info, -- const struct drm_display_mode *mode) --{ -- const struct dw_hdmi_mpll_config *mpll_cfg = rockchip_mpll_cfg; -- int pclk = mode->clock * 1000; -- bool valid = false; -- int i; -- -- for (i = 0; mpll_cfg[i].mpixelclock != (~0UL); i++) { -- if (pclk == mpll_cfg[i].mpixelclock) { -- valid = true; -- break; -- } -- } -- -- return (valid) ? MODE_OK : MODE_BAD; --} -- - static void dw_hdmi_rockchip_encoder_disable(struct drm_encoder *encoder) - { - } -@@ -433,7 +413,6 @@ static struct rockchip_hdmi_chip_data rk - }; - - static const struct dw_hdmi_plat_data rk3228_hdmi_drv_data = { -- .mode_valid = dw_hdmi_rockchip_mode_valid, - .mpll_cfg = rockchip_mpll_cfg, - .cur_ctr = rockchip_cur_ctr, - .phy_config = rockchip_phy_config, -@@ -450,7 +429,6 @@ static struct rockchip_hdmi_chip_data rk - }; - - static const struct dw_hdmi_plat_data rk3288_hdmi_drv_data = { -- .mode_valid = dw_hdmi_rockchip_mode_valid, - .mpll_cfg = rockchip_mpll_cfg, - .cur_ctr = rockchip_cur_ctr, - .phy_config = rockchip_phy_config, -@@ -470,7 +448,6 @@ static struct rockchip_hdmi_chip_data rk - }; - - static const struct dw_hdmi_plat_data rk3328_hdmi_drv_data = { -- .mode_valid = dw_hdmi_rockchip_mode_valid, - .mpll_cfg = rockchip_mpll_cfg, - .cur_ctr = rockchip_cur_ctr, - .phy_config = rockchip_phy_config, -@@ -488,7 +465,6 @@ static struct rockchip_hdmi_chip_data rk - }; - - static const struct dw_hdmi_plat_data rk3399_hdmi_drv_data = { -- .mode_valid = dw_hdmi_rockchip_mode_valid, - .mpll_cfg = rockchip_mpll_cfg, - .cur_ctr = rockchip_cur_ctr, - .phy_config = rockchip_phy_config, -@@ -501,7 +477,6 @@ static struct rockchip_hdmi_chip_data rk - }; - - static const struct dw_hdmi_plat_data rk3568_hdmi_drv_data = { -- .mode_valid = dw_hdmi_rockchip_mode_valid, - .mpll_cfg = rockchip_mpll_cfg, - .cur_ctr = rockchip_cur_ctr, - .phy_config = rockchip_phy_config, diff --git a/target/linux/rockchip/patches-5.18/238-drm-rockchip-dw_hdmi-Set-cur_ctr-to-0-always.patch b/target/linux/rockchip/patches-5.18/238-drm-rockchip-dw_hdmi-Set-cur_ctr-to-0-always.patch deleted file mode 100644 index fa2808b8481a78..00000000000000 --- a/target/linux/rockchip/patches-5.18/238-drm-rockchip-dw_hdmi-Set-cur_ctr-to-0-always.patch +++ /dev/null @@ -1,42 +0,0 @@ -From b6d0ebd771c8309839ff4d478ee1e58d701384ef Mon Sep 17 00:00:00 2001 -From: Douglas Anderson -Date: Fri, 8 Apr 2022 13:22:27 +0200 -Subject: [PATCH 38/50] drm/rockchip: dw_hdmi: Set cur_ctr to 0 always - -Jitter was improved by lowering the MPLL bandwidth to account for high -frequency noise in the rk3288 PLL. In each case MPLL bandwidth was -lowered only enough to get us a comfortable margin. We believe that -lowering the bandwidth like this is safe given sufficient testing. - -Signed-off-by: Douglas Anderson -Signed-off-by: Yakir Yang -Signed-off-by: Sascha Hauer ---- - drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 16 ++-------------- - 1 file changed, 2 insertions(+), 14 deletions(-) - ---- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -@@ -180,20 +180,8 @@ static const struct dw_hdmi_mpll_config - static const struct dw_hdmi_curr_ctrl rockchip_cur_ctr[] = { - /* pixelclk bpp8 bpp10 bpp12 */ - { -- 40000000, { 0x0018, 0x0018, 0x0018 }, -- }, { -- 65000000, { 0x0028, 0x0028, 0x0028 }, -- }, { -- 66000000, { 0x0038, 0x0038, 0x0038 }, -- }, { -- 74250000, { 0x0028, 0x0038, 0x0038 }, -- }, { -- 83500000, { 0x0028, 0x0038, 0x0038 }, -- }, { -- 146250000, { 0x0038, 0x0038, 0x0038 }, -- }, { -- 148500000, { 0x0000, 0x0038, 0x0038 }, -- }, { -+ 600000000, { 0x0000, 0x0000, 0x0000 }, -+ }, { - ~0UL, { 0x0000, 0x0000, 0x0000}, - } - }; diff --git a/target/linux/rockchip/patches-5.18/239-drm-rockchip-dw_hdmi-add-default-594Mhz-clk-for-4K-6.patch b/target/linux/rockchip/patches-5.18/239-drm-rockchip-dw_hdmi-add-default-594Mhz-clk-for-4K-6.patch deleted file mode 100644 index 2b0c5e272826ae..00000000000000 --- a/target/linux/rockchip/patches-5.18/239-drm-rockchip-dw_hdmi-add-default-594Mhz-clk-for-4K-6.patch +++ /dev/null @@ -1,24 +0,0 @@ -From f4cfa5e962d5d537751f42d23151c12598349716 Mon Sep 17 00:00:00 2001 -From: Nickey Yang -Date: Fri, 8 Apr 2022 13:22:28 +0200 -Subject: [PATCH 39/50] drm/rockchip: dw_hdmi: add default 594Mhz clk for - 4K@60hz - -add 594Mhz configuration parameters in rockchip_phy_config - -Signed-off-by: Nickey Yang -Signed-off-by: Sascha Hauer ---- - drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -@@ -191,6 +191,7 @@ static const struct dw_hdmi_phy_config r - { 74250000, 0x8009, 0x0004, 0x0272}, - { 148500000, 0x802b, 0x0004, 0x028d}, - { 297000000, 0x8039, 0x0005, 0x028d}, -+ { 594000000, 0x8039, 0x0000, 0x019d}, - { ~0UL, 0x0000, 0x0000, 0x0000} - }; - diff --git a/target/linux/rockchip/patches-5.18/240-dt-bindings-display-rockchip-dw-hdmi-Make-unwedge-pi.patch b/target/linux/rockchip/patches-5.18/240-dt-bindings-display-rockchip-dw-hdmi-Make-unwedge-pi.patch deleted file mode 100644 index a8c2efeaf93b5f..00000000000000 --- a/target/linux/rockchip/patches-5.18/240-dt-bindings-display-rockchip-dw-hdmi-Make-unwedge-pi.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 25d65f298b8d1c95a3e231c97272d8b930a85a5b Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Fri, 8 Apr 2022 13:22:29 +0200 -Subject: [PATCH 40/50] dt-bindings: display: rockchip: dw-hdmi: Make unwedge - pinctrl optional - -None of the upstream device tree files has a "unwedge" pinctrl -specified. Make it optional. - -Signed-off-by: Sascha Hauer -Acked-by: Rob Herring ---- - .../devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml | 1 + - 1 file changed, 1 insertion(+) - ---- a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml -+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml -@@ -89,6 +89,7 @@ properties: - The unwedge pinctrl entry shall drive the DDC SDA line low. This is - intended to work around a hardware errata that can cause the DDC I2C - bus to be wedged. -+ minItems: 1 - items: - - const: default - - const: unwedge diff --git a/target/linux/rockchip/patches-5.18/241-arm64-dts-rockchip-rk356x-Add-VOP2-nodes.patch b/target/linux/rockchip/patches-5.18/241-arm64-dts-rockchip-rk356x-Add-VOP2-nodes.patch deleted file mode 100644 index 838af4144260a9..00000000000000 --- a/target/linux/rockchip/patches-5.18/241-arm64-dts-rockchip-rk356x-Add-VOP2-nodes.patch +++ /dev/null @@ -1,123 +0,0 @@ -From 62ff79396d8d4137b65195fcd20e3010b96b0902 Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Fri, 8 Apr 2022 13:22:30 +0200 -Subject: [PATCH 41/50] arm64: dts: rockchip: rk356x: Add VOP2 nodes - -The VOP2 is the display output controller on the RK3568. Add the node -for it to the dtsi file along with the required display-subsystem node -and the iommu node. - -Signed-off-by: Sascha Hauer -Acked-by: Rob Herring ---- - arch/arm64/boot/dts/rockchip/rk3566.dtsi | 4 ++ - arch/arm64/boot/dts/rockchip/rk3568.dtsi | 4 ++ - arch/arm64/boot/dts/rockchip/rk356x.dtsi | 51 ++++++++++++++++++++++++ - include/dt-bindings/soc/rockchip,vop2.h | 14 +++++++ - 4 files changed, 73 insertions(+) - create mode 100644 include/dt-bindings/soc/rockchip,vop2.h - ---- a/arch/arm64/boot/dts/rockchip/rk3566.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3566.dtsi -@@ -29,3 +29,7 @@ - extcon = <&usb2phy0>; - maximum-speed = "high-speed"; - }; -+ -+&vop { -+ compatible = "rockchip,rk3566-vop"; -+}; ---- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi -@@ -137,3 +137,7 @@ - phys = <&usb2phy0_otg>, <&combphy0 PHY_TYPE_USB3>; - phy-names = "usb2-phy", "usb3-phy"; - }; -+ -+&vop { -+ compatible = "rockchip,rk3568-vop"; -+}; ---- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi -@@ -129,6 +129,11 @@ - }; - }; - -+ display_subsystem: display-subsystem { -+ compatible = "rockchip,display-subsystem"; -+ ports = <&vop_out>; -+ }; -+ - firmware { - scmi: scmi { - compatible = "arm,scmi-smc"; -@@ -632,6 +637,52 @@ - }; - }; - -+ vop: vop@fe040000 { -+ reg = <0x0 0xfe040000 0x0 0x3000>, <0x0 0xfe044000 0x0 0x1000>; -+ reg-names = "regs", "gamma_lut"; -+ interrupts = ; -+ clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>, <&cru DCLK_VOP0>, -+ <&cru DCLK_VOP1>, <&cru DCLK_VOP2>; -+ clock-names = "aclk", "hclk", "dclk_vp0", "dclk_vp1", "dclk_vp2"; -+ iommus = <&vop_mmu>; -+ power-domains = <&power RK3568_PD_VO>; -+ rockchip,grf = <&grf>; -+ status = "disabled"; -+ -+ vop_out: ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ vp0: port@0 { -+ reg = <0>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ -+ vp1: port@1 { -+ reg = <1>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ -+ vp2: port@2 { -+ reg = <2>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ }; -+ }; -+ -+ vop_mmu: iommu@fe043e00 { -+ compatible = "rockchip,rk3568-iommu"; -+ reg = <0x0 0xfe043e00 0x0 0x100>, <0x0 0xfe043f00 0x0 0x100>; -+ interrupts = ; -+ clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; -+ clock-names = "aclk", "iface"; -+ #iommu-cells = <0>; -+ status = "disabled"; -+ }; -+ - qos_gpu: qos@fe128000 { - compatible = "rockchip,rk3568-qos", "syscon"; - reg = <0x0 0xfe128000 0x0 0x20>; ---- /dev/null -+++ b/include/dt-bindings/soc/rockchip,vop2.h -@@ -0,0 +1,14 @@ -+/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */ -+ -+#ifndef __DT_BINDINGS_ROCKCHIP_VOP2_H -+#define __DT_BINDINGS_ROCKCHIP_VOP2_H -+ -+#define ROCKCHIP_VOP2_EP_RGB0 1 -+#define ROCKCHIP_VOP2_EP_HDMI0 2 -+#define ROCKCHIP_VOP2_EP_EDP0 3 -+#define ROCKCHIP_VOP2_EP_MIPI0 4 -+#define ROCKCHIP_VOP2_EP_LVDS0 5 -+#define ROCKCHIP_VOP2_EP_MIPI1 6 -+#define ROCKCHIP_VOP2_EP_LVDS1 7 -+ -+#endif /* __DT_BINDINGS_ROCKCHIP_VOP2_H */ diff --git a/target/linux/rockchip/patches-5.18/242-arm64-dts-rockchip-rk356x-Add-HDMI-nodes.patch b/target/linux/rockchip/patches-5.18/242-arm64-dts-rockchip-rk356x-Add-HDMI-nodes.patch deleted file mode 100644 index 634bed0acce54e..00000000000000 --- a/target/linux/rockchip/patches-5.18/242-arm64-dts-rockchip-rk356x-Add-HDMI-nodes.patch +++ /dev/null @@ -1,53 +0,0 @@ -From 193346cae13e4d78d144ccf75451611779630274 Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Fri, 8 Apr 2022 13:22:31 +0200 -Subject: [PATCH 42/50] arm64: dts: rockchip: rk356x: Add HDMI nodes - -Add support for the HDMI port found on RK3568. - -Signed-off-by: Sascha Hauer ---- - arch/arm64/boot/dts/rockchip/rk356x.dtsi | 32 ++++++++++++++++++++++++ - 1 file changed, 32 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi -@@ -683,6 +683,38 @@ - status = "disabled"; - }; - -+ hdmi: hdmi@fe0a0000 { -+ compatible = "rockchip,rk3568-dw-hdmi"; -+ reg = <0x0 0xfe0a0000 0x0 0x20000>; -+ interrupts = ; -+ clocks = <&cru PCLK_HDMI_HOST>, -+ <&cru CLK_HDMI_SFR>, -+ <&cru CLK_HDMI_CEC>, -+ <&pmucru CLK_HDMI_REF>, -+ <&cru HCLK_VO>; -+ clock-names = "iahb", "isfr", "cec", "ref"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&hdmitx_scl &hdmitx_sda &hdmitxm0_cec>; -+ power-domains = <&power RK3568_PD_VO>; -+ reg-io-width = <4>; -+ rockchip,grf = <&grf>; -+ #sound-dai-cells = <0>; -+ status = "disabled"; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ hdmi_in: port@0 { -+ reg = <0>; -+ }; -+ -+ hdmi_out: port@1 { -+ reg = <1>; -+ }; -+ }; -+ }; -+ - qos_gpu: qos@fe128000 { - compatible = "rockchip,rk3568-qos", "syscon"; - reg = <0x0 0xfe128000 0x0 0x20>; diff --git a/target/linux/rockchip/patches-5.18/243-arm64-dts-rockchip-rk3568-evb-Enable-VOP2-and-hdmi.patch b/target/linux/rockchip/patches-5.18/243-arm64-dts-rockchip-rk3568-evb-Enable-VOP2-and-hdmi.patch deleted file mode 100644 index f05a9b0fe4375d..00000000000000 --- a/target/linux/rockchip/patches-5.18/243-arm64-dts-rockchip-rk3568-evb-Enable-VOP2-and-hdmi.patch +++ /dev/null @@ -1,88 +0,0 @@ -From 9e34cf6dd7d8ede178ed8c216735eeeb6db892a7 Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Fri, 8 Apr 2022 13:22:32 +0200 -Subject: [PATCH 43/50] arm64: dts: rockchip: rk3568-evb: Enable VOP2 and hdmi - -This enabled the VOP2 display controller along with hdmi and the -required port routes which is enough to get a picture out of the -hdmi port of the board. - -Signed-off-by: Sascha Hauer ---- - .../boot/dts/rockchip/rk3568-evb1-v10.dts | 47 +++++++++++++++++++ - 1 file changed, 47 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts -@@ -8,6 +8,7 @@ - #include - #include - #include -+#include - #include "rk3568.dtsi" - - / { -@@ -34,6 +35,17 @@ - regulator-max-microvolt = <12000000>; - }; - -+ hdmi-con { -+ compatible = "hdmi-connector"; -+ type = "a"; -+ -+ port { -+ hdmi_con_in: endpoint { -+ remote-endpoint = <&hdmi_out_con>; -+ }; -+ }; -+ }; -+ - leds { - compatible = "gpio-leds"; - -@@ -189,6 +201,24 @@ - status = "okay"; - }; - -+&hdmi { -+ avdd-0v9-supply = <&vdda0v9_image>; -+ avdd-1v8-supply = <&vcca1v8_image>; -+ status = "okay"; -+}; -+ -+&hdmi_in { -+ hdmi_in_vp0: endpoint { -+ remote-endpoint = <&vp0_out_hdmi>; -+ }; -+}; -+ -+&hdmi_out { -+ hdmi_out_con: endpoint { -+ remote-endpoint = <&hdmi_con_in>; -+ }; -+}; -+ - &i2c0 { - status = "okay"; - -@@ -589,3 +619,20 @@ - phy-supply = <&vcc5v0_usb_host>; - status = "okay"; - }; -+ -+&vop { -+ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; -+ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; -+ status = "okay"; -+}; -+ -+&vop_mmu { -+ status = "okay"; -+}; -+ -+&vp0 { -+ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { -+ reg = ; -+ remote-endpoint = <&hdmi_in_vp0>; -+ }; -+}; diff --git a/target/linux/rockchip/patches-5.18/244-arm64-dts-rockchip-enable-vop2-and-hdmi-tx-on-quartz.patch b/target/linux/rockchip/patches-5.18/244-arm64-dts-rockchip-enable-vop2-and-hdmi-tx-on-quartz.patch deleted file mode 100644 index 4a51a0c91fe286..00000000000000 --- a/target/linux/rockchip/patches-5.18/244-arm64-dts-rockchip-enable-vop2-and-hdmi-tx-on-quartz.patch +++ /dev/null @@ -1,89 +0,0 @@ -From db058732d929fd685c14f848246eac70f7e1da71 Mon Sep 17 00:00:00 2001 -From: Michael Riesch -Date: Fri, 8 Apr 2022 13:22:33 +0200 -Subject: [PATCH 44/50] arm64: dts: rockchip: enable vop2 and hdmi tx on - quartz64a - -Enable the RK356x Video Output Processor (VOP) 2 on the Pine64 -Quartz64 Model A. - -Signed-off-by: Michael Riesch -Signed-off-by: Sascha Hauer ---- - .../boot/dts/rockchip/rk3566-quartz64-a.dts | 47 +++++++++++++++++++ - 1 file changed, 47 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts -@@ -4,6 +4,7 @@ - - #include - #include -+#include - #include "rk3566.dtsi" - - / { -@@ -37,6 +38,17 @@ - #cooling-cells = <2>; - }; - -+ hdmi-con { -+ compatible = "hdmi-connector"; -+ type = "a"; -+ -+ port { -+ hdmi_con_in: endpoint { -+ remote-endpoint = <&hdmi_out_con>; -+ }; -+ }; -+ }; -+ - leds { - compatible = "gpio-leds"; - -@@ -280,6 +292,24 @@ - status = "okay"; - }; - -+&hdmi { -+ avdd-0v9-supply = <&vdda_0v9>; -+ avdd-1v8-supply = <&vcc_1v8>; -+ status = "okay"; -+}; -+ -+&hdmi_in { -+ hdmi_in_vp0: endpoint { -+ remote-endpoint = <&vp0_out_hdmi>; -+ }; -+}; -+ -+&hdmi_out { -+ hdmi_out_con: endpoint { -+ remote-endpoint = <&hdmi_con_in>; -+ }; -+}; -+ - &i2c0 { - status = "okay"; - -@@ -781,3 +811,20 @@ - phy-supply = <&vcc5v0_usb20_host>; - status = "okay"; - }; -+ -+&vop { -+ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; -+ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; -+ status = "okay"; -+}; -+ -+&vop_mmu { -+ status = "okay"; -+}; -+ -+&vp0 { -+ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { -+ reg = ; -+ remote-endpoint = <&hdmi_in_vp0>; -+ }; -+}; diff --git a/target/linux/rockchip/patches-5.18/245-drm-rockchip-Make-VOP-driver-optional.patch b/target/linux/rockchip/patches-5.18/245-drm-rockchip-Make-VOP-driver-optional.patch deleted file mode 100644 index d60d1ad9059dcc..00000000000000 --- a/target/linux/rockchip/patches-5.18/245-drm-rockchip-Make-VOP-driver-optional.patch +++ /dev/null @@ -1,61 +0,0 @@ -From c1dd77c13169d70bbfd79f69c1f57ac5601ae68c Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Fri, 8 Apr 2022 13:22:35 +0200 -Subject: [PATCH 45/50] drm/rockchip: Make VOP driver optional - -With upcoming VOP2 support VOP won't be the only choice anymore, so make -the VOP driver optional. - -This also adds a dependency from ROCKCHIP_ANALOGIX_DP to ROCKCHIP_VOP, -because that driver currently only links and works with the VOP driver. - -Signed-off-by: Sascha Hauer ---- - drivers/gpu/drm/rockchip/Kconfig | 8 ++++++++ - drivers/gpu/drm/rockchip/Makefile | 3 ++- - drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 2 +- - 3 files changed, 11 insertions(+), 2 deletions(-) - ---- a/drivers/gpu/drm/rockchip/Kconfig -+++ b/drivers/gpu/drm/rockchip/Kconfig -@@ -23,8 +23,16 @@ config DRM_ROCKCHIP - - if DRM_ROCKCHIP - -+config ROCKCHIP_VOP -+ bool "Rockchip VOP driver" -+ default y -+ help -+ This selects support for the VOP driver. You should enable it -+ on older SoCs. -+ - config ROCKCHIP_ANALOGIX_DP - bool "Rockchip specific extensions for Analogix DP driver" -+ depends on ROCKCHIP_VOP - help - This selects support for Rockchip SoC specific extensions - for the Analogix Core DP driver. If you want to enable DP ---- a/drivers/gpu/drm/rockchip/Makefile -+++ b/drivers/gpu/drm/rockchip/Makefile -@@ -4,8 +4,9 @@ - # Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher. - - rockchipdrm-y := rockchip_drm_drv.o rockchip_drm_fb.o \ -- rockchip_drm_gem.o rockchip_drm_vop.o rockchip_vop_reg.o -+ rockchip_drm_gem.o - -+rockchipdrm-$(CONFIG_ROCKCHIP_VOP) += rockchip_drm_vop.o rockchip_vop_reg.o - rockchipdrm-$(CONFIG_ROCKCHIP_ANALOGIX_DP) += analogix_dp-rockchip.o - rockchipdrm-$(CONFIG_ROCKCHIP_CDN_DP) += cdn-dp-core.o cdn-dp-reg.o - rockchipdrm-$(CONFIG_ROCKCHIP_DW_HDMI) += dw_hdmi-rockchip.o ---- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c -+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c -@@ -481,7 +481,7 @@ static int __init rockchip_drm_init(void - return -ENODEV; - - num_rockchip_sub_drivers = 0; -- ADD_ROCKCHIP_SUB_DRIVER(vop_platform_driver, CONFIG_DRM_ROCKCHIP); -+ ADD_ROCKCHIP_SUB_DRIVER(vop_platform_driver, CONFIG_ROCKCHIP_VOP); - ADD_ROCKCHIP_SUB_DRIVER(rockchip_lvds_driver, - CONFIG_ROCKCHIP_LVDS); - ADD_ROCKCHIP_SUB_DRIVER(rockchip_dp_driver, diff --git a/target/linux/rockchip/patches-5.18/246-drm-rockchip-Add-VOP2-driver.patch b/target/linux/rockchip/patches-5.18/246-drm-rockchip-Add-VOP2-driver.patch deleted file mode 100644 index 869926b61ac5f8..00000000000000 --- a/target/linux/rockchip/patches-5.18/246-drm-rockchip-Add-VOP2-driver.patch +++ /dev/null @@ -1,3619 +0,0 @@ -From 7b08706f8e27edbb5610c0b5a8453fc4309b7fca Mon Sep 17 00:00:00 2001 -From: Andy Yan -Date: Fri, 8 Apr 2022 13:22:36 +0200 -Subject: [PATCH 46/50] drm: rockchip: Add VOP2 driver - -The VOP2 unit is found on Rockchip SoCs beginning with rk3566/rk3568. -It replaces the VOP unit found in the older Rockchip SoCs. - -This driver has been derived from the downstream Rockchip Kernel and -heavily modified: - -- All nonstandard DRM properties have been removed -- dropped struct vop2_plane_state and pass around less data between - functions -- Dropped all DRM_FORMAT_* not known on upstream -- rework register access to get rid of excessively used macros -- Drop all waiting for framesyncs - -The driver is tested with HDMI and MIPI-DSI display on a RK3568-EVB -board. Overlay support is tested with the modetest utility. AFBC support -on the cluster windows is tested with weston-simple-dmabuf-egl on -weston using the (yet to be upstreamed) panfrost driver support. - -Signed-off-by: Andy Yan -Co-Developed-by: Sascha Hauer -Signed-off-by: Sascha Hauer ---- - drivers/gpu/drm/rockchip/Kconfig | 6 + - drivers/gpu/drm/rockchip/Makefile | 1 + - drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 1 + - drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 6 +- - drivers/gpu/drm/rockchip/rockchip_drm_fb.c | 2 + - drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 15 + - drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 2706 ++++++++++++++++++ - drivers/gpu/drm/rockchip/rockchip_drm_vop2.h | 477 +++ - drivers/gpu/drm/rockchip/rockchip_vop2_reg.c | 281 ++ - 9 files changed, 3494 insertions(+), 1 deletion(-) - create mode 100644 drivers/gpu/drm/rockchip/rockchip_drm_vop2.c - create mode 100644 drivers/gpu/drm/rockchip/rockchip_drm_vop2.h - create mode 100644 drivers/gpu/drm/rockchip/rockchip_vop2_reg.c - ---- a/drivers/gpu/drm/rockchip/Kconfig -+++ b/drivers/gpu/drm/rockchip/Kconfig -@@ -30,6 +30,12 @@ config ROCKCHIP_VOP - This selects support for the VOP driver. You should enable it - on older SoCs. - -+config ROCKCHIP_VOP2 -+ bool "Rockchip VOP2 driver" -+ help -+ This selects support for the VOP2 driver. The VOP2 hardware is -+ first found on the RK3568. -+ - config ROCKCHIP_ANALOGIX_DP - bool "Rockchip specific extensions for Analogix DP driver" - depends on ROCKCHIP_VOP ---- a/drivers/gpu/drm/rockchip/Makefile -+++ b/drivers/gpu/drm/rockchip/Makefile -@@ -6,6 +6,7 @@ - rockchipdrm-y := rockchip_drm_drv.o rockchip_drm_fb.o \ - rockchip_drm_gem.o - -+rockchipdrm-$(CONFIG_ROCKCHIP_VOP2) += rockchip_drm_vop2.o rockchip_vop2_reg.o - rockchipdrm-$(CONFIG_ROCKCHIP_VOP) += rockchip_drm_vop.o rockchip_vop_reg.o - rockchipdrm-$(CONFIG_ROCKCHIP_ANALOGIX_DP) += analogix_dp-rockchip.o - rockchipdrm-$(CONFIG_ROCKCHIP_CDN_DP) += cdn-dp-core.o cdn-dp-reg.o ---- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c -+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c -@@ -482,6 +482,7 @@ static int __init rockchip_drm_init(void - - num_rockchip_sub_drivers = 0; - ADD_ROCKCHIP_SUB_DRIVER(vop_platform_driver, CONFIG_ROCKCHIP_VOP); -+ ADD_ROCKCHIP_SUB_DRIVER(vop2_platform_driver, CONFIG_ROCKCHIP_VOP2); - ADD_ROCKCHIP_SUB_DRIVER(rockchip_lvds_driver, - CONFIG_ROCKCHIP_LVDS); - ADD_ROCKCHIP_SUB_DRIVER(rockchip_dp_driver, ---- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h -+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h -@@ -18,7 +18,7 @@ - - #define ROCKCHIP_MAX_FB_BUFFER 3 - #define ROCKCHIP_MAX_CONNECTOR 2 --#define ROCKCHIP_MAX_CRTC 2 -+#define ROCKCHIP_MAX_CRTC 4 - - struct drm_device; - struct drm_connector; -@@ -31,6 +31,9 @@ struct rockchip_crtc_state { - int output_bpc; - int output_flags; - bool enable_afbc; -+ u32 bus_format; -+ u32 bus_flags; -+ int color_space; - }; - #define to_rockchip_crtc_state(s) \ - container_of(s, struct rockchip_crtc_state, base) -@@ -72,6 +75,7 @@ extern struct platform_driver rockchip_d - extern struct platform_driver rockchip_lvds_driver; - extern struct platform_driver vop_platform_driver; - extern struct platform_driver rk3066_hdmi_driver; -+extern struct platform_driver vop2_platform_driver; - - static inline struct rockchip_encoder *to_rockchip_encoder(struct drm_encoder *encoder) - { ---- a/drivers/gpu/drm/rockchip/rockchip_drm_fb.c -+++ b/drivers/gpu/drm/rockchip/rockchip_drm_fb.c -@@ -134,4 +134,6 @@ void rockchip_drm_mode_config_init(struc - - dev->mode_config.funcs = &rockchip_drm_mode_config_funcs; - dev->mode_config.helper_private = &rockchip_mode_config_helpers; -+ -+ dev->mode_config.normalize_zpos = true; - } ---- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h -+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h -@@ -54,9 +54,23 @@ struct vop_afbc { - struct vop_reg enable; - struct vop_reg win_sel; - struct vop_reg format; -+ struct vop_reg rb_swap; -+ struct vop_reg uv_swap; -+ struct vop_reg auto_gating_en; -+ struct vop_reg block_split_en; -+ struct vop_reg pic_vir_width; -+ struct vop_reg tile_num; - struct vop_reg hreg_block_split; -+ struct vop_reg pic_offset; - struct vop_reg pic_size; -+ struct vop_reg dsp_offset; -+ struct vop_reg transform_offset; - struct vop_reg hdr_ptr; -+ struct vop_reg half_block_en; -+ struct vop_reg xmirror; -+ struct vop_reg ymirror; -+ struct vop_reg rotate_270; -+ struct vop_reg rotate_90; - struct vop_reg rstn; - }; - -@@ -410,4 +424,5 @@ static inline int scl_vop_cal_lb_mode(in - } - - extern const struct component_ops vop_component_ops; -+ - #endif /* _ROCKCHIP_DRM_VOP_H */ ---- /dev/null -+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c -@@ -0,0 +1,2706 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2020 Rockchip Electronics Co., Ltd. -+ * Author: Andy Yan -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+#include "rockchip_drm_drv.h" -+#include "rockchip_drm_gem.h" -+#include "rockchip_drm_fb.h" -+#include "rockchip_drm_vop2.h" -+ -+/* -+ * VOP2 architecture -+ * -+ +----------+ +-------------+ +-----------+ -+ | Cluster | | Sel 1 from 6| | 1 from 3 | -+ | window0 | | Layer0 | | RGB | -+ +----------+ +-------------+ +---------------+ +-------------+ +-----------+ -+ +----------+ +-------------+ |N from 6 layers| | | -+ | Cluster | | Sel 1 from 6| | Overlay0 +--->| Video Port0 | +-----------+ -+ | window1 | | Layer1 | | | | | | 1 from 3 | -+ +----------+ +-------------+ +---------------+ +-------------+ | LVDS | -+ +----------+ +-------------+ +-----------+ -+ | Esmart | | Sel 1 from 6| -+ | window0 | | Layer2 | +---------------+ +-------------+ +-----------+ -+ +----------+ +-------------+ |N from 6 Layers| | | +--> | 1 from 3 | -+ +----------+ +-------------+ --------> | Overlay1 +--->| Video Port1 | | MIPI | -+ | Esmart | | Sel 1 from 6| --------> | | | | +-----------+ -+ | Window1 | | Layer3 | +---------------+ +-------------+ -+ +----------+ +-------------+ +-----------+ -+ +----------+ +-------------+ | 1 from 3 | -+ | Smart | | Sel 1 from 6| +---------------+ +-------------+ | HDMI | -+ | Window0 | | Layer4 | |N from 6 Layers| | | +-----------+ -+ +----------+ +-------------+ | Overlay2 +--->| Video Port2 | -+ +----------+ +-------------+ | | | | +-----------+ -+ | Smart | | Sel 1 from 6| +---------------+ +-------------+ | 1 from 3 | -+ | Window1 | | Layer5 | | eDP | -+ +----------+ +-------------+ +-----------+ -+ * -+ */ -+ -+enum vop2_data_format { -+ VOP2_FMT_ARGB8888 = 0, -+ VOP2_FMT_RGB888, -+ VOP2_FMT_RGB565, -+ VOP2_FMT_XRGB101010, -+ VOP2_FMT_YUV420SP, -+ VOP2_FMT_YUV422SP, -+ VOP2_FMT_YUV444SP, -+ VOP2_FMT_YUYV422 = 8, -+ VOP2_FMT_YUYV420, -+ VOP2_FMT_VYUY422, -+ VOP2_FMT_VYUY420, -+ VOP2_FMT_YUV420SP_TILE_8x4 = 0x10, -+ VOP2_FMT_YUV420SP_TILE_16x2, -+ VOP2_FMT_YUV422SP_TILE_8x4, -+ VOP2_FMT_YUV422SP_TILE_16x2, -+ VOP2_FMT_YUV420SP_10, -+ VOP2_FMT_YUV422SP_10, -+ VOP2_FMT_YUV444SP_10, -+}; -+ -+enum vop2_afbc_format { -+ VOP2_AFBC_FMT_RGB565, -+ VOP2_AFBC_FMT_ARGB2101010 = 2, -+ VOP2_AFBC_FMT_YUV420_10BIT, -+ VOP2_AFBC_FMT_RGB888, -+ VOP2_AFBC_FMT_ARGB8888, -+ VOP2_AFBC_FMT_YUV420 = 9, -+ VOP2_AFBC_FMT_YUV422 = 0xb, -+ VOP2_AFBC_FMT_YUV422_10BIT = 0xe, -+ VOP2_AFBC_FMT_INVALID = -1, -+}; -+ -+union vop2_alpha_ctrl { -+ u32 val; -+ struct { -+ /* [0:1] */ -+ u32 color_mode:1; -+ u32 alpha_mode:1; -+ /* [2:3] */ -+ u32 blend_mode:2; -+ u32 alpha_cal_mode:1; -+ /* [5:7] */ -+ u32 factor_mode:3; -+ /* [8:9] */ -+ u32 alpha_en:1; -+ u32 src_dst_swap:1; -+ u32 reserved:6; -+ /* [16:23] */ -+ u32 glb_alpha:8; -+ } bits; -+}; -+ -+struct vop2_alpha { -+ union vop2_alpha_ctrl src_color_ctrl; -+ union vop2_alpha_ctrl dst_color_ctrl; -+ union vop2_alpha_ctrl src_alpha_ctrl; -+ union vop2_alpha_ctrl dst_alpha_ctrl; -+}; -+ -+struct vop2_alpha_config { -+ bool src_premulti_en; -+ bool dst_premulti_en; -+ bool src_pixel_alpha_en; -+ bool dst_pixel_alpha_en; -+ u16 src_glb_alpha_value; -+ u16 dst_glb_alpha_value; -+}; -+ -+struct vop2_win { -+ struct vop2 *vop2; -+ struct drm_plane base; -+ const struct vop2_win_data *data; -+ struct regmap_field *reg[VOP2_WIN_MAX_REG]; -+ -+ /** -+ * @win_id: graphic window id, a cluster may be split into two -+ * graphics windows. -+ */ -+ u8 win_id; -+ u8 delay; -+ u32 offset; -+ -+ enum drm_plane_type type; -+}; -+ -+struct vop2_video_port { -+ struct drm_crtc crtc; -+ struct vop2 *vop2; -+ struct clk *dclk; -+ unsigned int id; -+ const struct vop2_video_port_regs *regs; -+ const struct vop2_video_port_data *data; -+ -+ struct completion dsp_hold_completion; -+ -+ /** -+ * @win_mask: Bitmask of windows attached to the video port; -+ */ -+ u32 win_mask; -+ -+ struct vop2_win *primary_plane; -+ struct drm_pending_vblank_event *event; -+ -+ unsigned int nlayers; -+}; -+ -+struct vop2 { -+ struct device *dev; -+ struct drm_device *drm; -+ struct vop2_video_port vps[ROCKCHIP_MAX_CRTC]; -+ -+ const struct vop2_data *data; -+ /* -+ * Number of windows that are registered as plane, may be less than the -+ * total number of hardware windows. -+ */ -+ u32 registered_num_wins; -+ -+ void __iomem *regs; -+ struct regmap *map; -+ -+ struct regmap *grf; -+ -+ /* physical map length of vop2 register */ -+ u32 len; -+ -+ void __iomem *lut_regs; -+ -+ /* protects crtc enable/disable */ -+ struct mutex vop2_lock; -+ -+ int irq; -+ -+ /* -+ * Some global resources are shared between all video ports(crtcs), so -+ * we need a ref counter here. -+ */ -+ unsigned int enable_count; -+ struct clk *hclk; -+ struct clk *aclk; -+ -+ /* must be put at the end of the struct */ -+ struct vop2_win win[]; -+}; -+ -+static struct vop2_video_port *to_vop2_video_port(struct drm_crtc *crtc) -+{ -+ return container_of(crtc, struct vop2_video_port, crtc); -+} -+ -+static struct vop2_win *to_vop2_win(struct drm_plane *p) -+{ -+ return container_of(p, struct vop2_win, base); -+} -+ -+static void vop2_lock(struct vop2 *vop2) -+{ -+ mutex_lock(&vop2->vop2_lock); -+} -+ -+static void vop2_unlock(struct vop2 *vop2) -+{ -+ mutex_unlock(&vop2->vop2_lock); -+} -+ -+static void vop2_writel(struct vop2 *vop2, u32 offset, u32 v) -+{ -+ regmap_write(vop2->map, offset, v); -+} -+ -+static void vop2_vp_write(struct vop2_video_port *vp, u32 offset, u32 v) -+{ -+ regmap_write(vp->vop2->map, vp->data->offset + offset, v); -+} -+ -+static u32 vop2_readl(struct vop2 *vop2, u32 offset) -+{ -+ u32 val; -+ -+ regmap_read(vop2->map, offset, &val); -+ -+ return val; -+} -+ -+static void vop2_win_write(const struct vop2_win *win, unsigned int reg, u32 v) -+{ -+ regmap_field_write(win->reg[reg], v); -+} -+ -+static bool vop2_cluster_window(const struct vop2_win *win) -+{ -+ return win->data->feature & WIN_FEATURE_CLUSTER; -+} -+ -+static void vop2_cfg_done(struct vop2_video_port *vp) -+{ -+ struct vop2 *vop2 = vp->vop2; -+ -+ regmap_set_bits(vop2->map, RK3568_REG_CFG_DONE, -+ BIT(vp->id) | RK3568_REG_CFG_DONE__GLB_CFG_DONE_EN); -+} -+ -+static void vop2_win_disable(struct vop2_win *win) -+{ -+ vop2_win_write(win, VOP2_WIN_ENABLE, 0); -+ -+ if (vop2_cluster_window(win)) -+ vop2_win_write(win, VOP2_WIN_CLUSTER_ENABLE, 0); -+} -+ -+static enum vop2_data_format vop2_convert_format(u32 format) -+{ -+ switch (format) { -+ case DRM_FORMAT_XRGB8888: -+ case DRM_FORMAT_ARGB8888: -+ case DRM_FORMAT_XBGR8888: -+ case DRM_FORMAT_ABGR8888: -+ return VOP2_FMT_ARGB8888; -+ case DRM_FORMAT_RGB888: -+ case DRM_FORMAT_BGR888: -+ return VOP2_FMT_RGB888; -+ case DRM_FORMAT_RGB565: -+ case DRM_FORMAT_BGR565: -+ return VOP2_FMT_RGB565; -+ case DRM_FORMAT_NV12: -+ return VOP2_FMT_YUV420SP; -+ case DRM_FORMAT_NV16: -+ return VOP2_FMT_YUV422SP; -+ case DRM_FORMAT_NV24: -+ return VOP2_FMT_YUV444SP; -+ case DRM_FORMAT_YUYV: -+ case DRM_FORMAT_YVYU: -+ return VOP2_FMT_VYUY422; -+ case DRM_FORMAT_VYUY: -+ case DRM_FORMAT_UYVY: -+ return VOP2_FMT_YUYV422; -+ default: -+ DRM_ERROR("unsupported format[%08x]\n", format); -+ return -EINVAL; -+ } -+} -+ -+static enum vop2_afbc_format vop2_convert_afbc_format(u32 format) -+{ -+ switch (format) { -+ case DRM_FORMAT_XRGB8888: -+ case DRM_FORMAT_ARGB8888: -+ case DRM_FORMAT_XBGR8888: -+ case DRM_FORMAT_ABGR8888: -+ return VOP2_AFBC_FMT_ARGB8888; -+ case DRM_FORMAT_RGB888: -+ case DRM_FORMAT_BGR888: -+ return VOP2_AFBC_FMT_RGB888; -+ case DRM_FORMAT_RGB565: -+ case DRM_FORMAT_BGR565: -+ return VOP2_AFBC_FMT_RGB565; -+ case DRM_FORMAT_NV12: -+ return VOP2_AFBC_FMT_YUV420; -+ case DRM_FORMAT_NV16: -+ return VOP2_AFBC_FMT_YUV422; -+ default: -+ return VOP2_AFBC_FMT_INVALID; -+ } -+ -+ return VOP2_AFBC_FMT_INVALID; -+} -+ -+static bool vop2_win_rb_swap(u32 format) -+{ -+ switch (format) { -+ case DRM_FORMAT_XBGR8888: -+ case DRM_FORMAT_ABGR8888: -+ case DRM_FORMAT_BGR888: -+ case DRM_FORMAT_BGR565: -+ return true; -+ default: -+ return false; -+ } -+} -+ -+static bool vop2_afbc_rb_swap(u32 format) -+{ -+ switch (format) { -+ case DRM_FORMAT_NV24: -+ return true; -+ default: -+ return false; -+ } -+} -+ -+static bool vop2_afbc_uv_swap(u32 format) -+{ -+ switch (format) { -+ case DRM_FORMAT_NV12: -+ case DRM_FORMAT_NV16: -+ return true; -+ default: -+ return false; -+ } -+} -+ -+static bool vop2_win_uv_swap(u32 format) -+{ -+ switch (format) { -+ case DRM_FORMAT_NV12: -+ case DRM_FORMAT_NV16: -+ case DRM_FORMAT_NV24: -+ return true; -+ default: -+ return false; -+ } -+} -+ -+static bool vop2_win_dither_up(u32 format) -+{ -+ switch (format) { -+ case DRM_FORMAT_BGR565: -+ case DRM_FORMAT_RGB565: -+ return true; -+ default: -+ return false; -+ } -+} -+ -+static bool vop2_output_uv_swap(u32 bus_format, u32 output_mode) -+{ -+ /* -+ * FIXME: -+ * -+ * There is no media type for YUV444 output, -+ * so when out_mode is AAAA or P888, assume output is YUV444 on -+ * yuv format. -+ * -+ * From H/W testing, YUV444 mode need a rb swap. -+ */ -+ if (bus_format == MEDIA_BUS_FMT_YVYU8_1X16 || -+ bus_format == MEDIA_BUS_FMT_VYUY8_1X16 || -+ bus_format == MEDIA_BUS_FMT_YVYU8_2X8 || -+ bus_format == MEDIA_BUS_FMT_VYUY8_2X8 || -+ ((bus_format == MEDIA_BUS_FMT_YUV8_1X24 || -+ bus_format == MEDIA_BUS_FMT_YUV10_1X30) && -+ (output_mode == ROCKCHIP_OUT_MODE_AAAA || -+ output_mode == ROCKCHIP_OUT_MODE_P888))) -+ return true; -+ else -+ return false; -+} -+ -+static bool is_yuv_output(u32 bus_format) -+{ -+ switch (bus_format) { -+ case MEDIA_BUS_FMT_YUV8_1X24: -+ case MEDIA_BUS_FMT_YUV10_1X30: -+ case MEDIA_BUS_FMT_UYYVYY8_0_5X24: -+ case MEDIA_BUS_FMT_UYYVYY10_0_5X30: -+ case MEDIA_BUS_FMT_YUYV8_2X8: -+ case MEDIA_BUS_FMT_YVYU8_2X8: -+ case MEDIA_BUS_FMT_UYVY8_2X8: -+ case MEDIA_BUS_FMT_VYUY8_2X8: -+ case MEDIA_BUS_FMT_YUYV8_1X16: -+ case MEDIA_BUS_FMT_YVYU8_1X16: -+ case MEDIA_BUS_FMT_UYVY8_1X16: -+ case MEDIA_BUS_FMT_VYUY8_1X16: -+ return true; -+ default: -+ return false; -+ } -+} -+ -+static bool rockchip_afbc(struct drm_plane *plane, u64 modifier) -+{ -+ int i; -+ -+ if (modifier == DRM_FORMAT_MOD_LINEAR) -+ return false; -+ -+ for (i = 0 ; i < plane->modifier_count; i++) -+ if (plane->modifiers[i] == modifier) -+ return true; -+ -+ return false; -+ -+} -+ -+static bool rockchip_vop2_mod_supported(struct drm_plane *plane, u32 format, -+ u64 modifier) -+{ -+ struct vop2_win *win = to_vop2_win(plane); -+ struct vop2 *vop2 = win->vop2; -+ -+ if (modifier == DRM_FORMAT_MOD_INVALID) -+ return false; -+ -+ if (modifier == DRM_FORMAT_MOD_LINEAR) -+ return true; -+ -+ if (!rockchip_afbc(plane, modifier)) { -+ drm_err(vop2->drm, "Unsupported format modifier 0x%llx\n", -+ modifier); -+ -+ return false; -+ } -+ -+ return vop2_convert_afbc_format(format) >= 0; -+} -+ -+static u32 vop2_afbc_transform_offset(struct drm_plane_state *pstate, -+ bool afbc_half_block_en) -+{ -+ struct drm_rect *src = &pstate->src; -+ struct drm_framebuffer *fb = pstate->fb; -+ u32 bpp = fb->format->cpp[0] * 8; -+ u32 vir_width = (fb->pitches[0] << 3) / bpp; -+ u32 width = drm_rect_width(src) >> 16; -+ u32 height = drm_rect_height(src) >> 16; -+ u32 act_xoffset = src->x1 >> 16; -+ u32 act_yoffset = src->y1 >> 16; -+ u32 align16_crop = 0; -+ u32 align64_crop = 0; -+ u32 height_tmp; -+ u8 tx, ty; -+ u8 bottom_crop_line_num = 0; -+ -+ /* 16 pixel align */ -+ if (height & 0xf) -+ align16_crop = 16 - (height & 0xf); -+ -+ height_tmp = height + align16_crop; -+ -+ /* 64 pixel align */ -+ if (height_tmp & 0x3f) -+ align64_crop = 64 - (height_tmp & 0x3f); -+ -+ bottom_crop_line_num = align16_crop + align64_crop; -+ -+ switch (pstate->rotation & -+ (DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y | -+ DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_270)) { -+ case DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y: -+ tx = 16 - ((act_xoffset + width) & 0xf); -+ ty = bottom_crop_line_num - act_yoffset; -+ break; -+ case DRM_MODE_REFLECT_X | DRM_MODE_ROTATE_90: -+ tx = bottom_crop_line_num - act_yoffset; -+ ty = vir_width - width - act_xoffset; -+ break; -+ case DRM_MODE_REFLECT_X | DRM_MODE_ROTATE_270: -+ tx = act_yoffset; -+ ty = act_xoffset; -+ break; -+ case DRM_MODE_REFLECT_X: -+ tx = 16 - ((act_xoffset + width) & 0xf); -+ ty = act_yoffset; -+ break; -+ case DRM_MODE_REFLECT_Y: -+ tx = act_xoffset; -+ ty = bottom_crop_line_num - act_yoffset; -+ break; -+ case DRM_MODE_ROTATE_90: -+ tx = bottom_crop_line_num - act_yoffset; -+ ty = act_xoffset; -+ break; -+ case DRM_MODE_ROTATE_270: -+ tx = act_yoffset; -+ ty = vir_width - width - act_xoffset; -+ break; -+ case 0: -+ tx = act_xoffset; -+ ty = act_yoffset; -+ break; -+ } -+ -+ if (afbc_half_block_en) -+ ty &= 0x7f; -+ -+#define TRANSFORM_XOFFSET GENMASK(7, 0) -+#define TRANSFORM_YOFFSET GENMASK(23, 16) -+ return FIELD_PREP(TRANSFORM_XOFFSET, tx) | -+ FIELD_PREP(TRANSFORM_YOFFSET, ty); -+} -+ -+/* -+ * A Cluster window has 2048 x 16 line buffer, which can -+ * works at 2048 x 16(Full) or 4096 x 8 (Half) mode. -+ * for Cluster_lb_mode register: -+ * 0: half mode, for plane input width range 2048 ~ 4096 -+ * 1: half mode, for cluster work at 2 * 2048 plane mode -+ * 2: half mode, for rotate_90/270 mode -+ * -+ */ -+static int vop2_get_cluster_lb_mode(struct vop2_win *win, -+ struct drm_plane_state *pstate) -+{ -+ if ((pstate->rotation & DRM_MODE_ROTATE_270) || -+ (pstate->rotation & DRM_MODE_ROTATE_90)) -+ return 2; -+ else -+ return 0; -+} -+ -+static u16 vop2_scale_factor(u32 src, u32 dst) -+{ -+ u32 fac; -+ int shift; -+ -+ if (src == dst) -+ return 0; -+ -+ if (dst < 2) -+ return U16_MAX; -+ -+ if (src < 2) -+ return 0; -+ -+ if (src > dst) -+ shift = 12; -+ else -+ shift = 16; -+ -+ src--; -+ dst--; -+ -+ fac = DIV_ROUND_UP(src << shift, dst) - 1; -+ -+ if (fac > U16_MAX) -+ return U16_MAX; -+ -+ return fac; -+} -+ -+static void vop2_setup_scale(struct vop2 *vop2, const struct vop2_win *win, -+ u32 src_w, u32 src_h, u32 dst_w, -+ u32 dst_h, u32 pixel_format) -+{ -+ const struct drm_format_info *info; -+ u16 hor_scl_mode, ver_scl_mode; -+ u16 hscl_filter_mode, vscl_filter_mode; -+ u8 gt2 = 0; -+ u8 gt4 = 0; -+ u32 val; -+ -+ info = drm_format_info(pixel_format); -+ -+ if (src_h >= (4 * dst_h)) { -+ gt4 = 1; -+ src_h >>= 2; -+ } else if (src_h >= (2 * dst_h)) { -+ gt2 = 1; -+ src_h >>= 1; -+ } -+ -+ hor_scl_mode = scl_get_scl_mode(src_w, dst_w); -+ ver_scl_mode = scl_get_scl_mode(src_h, dst_h); -+ -+ if (hor_scl_mode == SCALE_UP) -+ hscl_filter_mode = VOP2_SCALE_UP_BIC; -+ else -+ hscl_filter_mode = VOP2_SCALE_DOWN_BIL; -+ -+ if (ver_scl_mode == SCALE_UP) -+ vscl_filter_mode = VOP2_SCALE_UP_BIL; -+ else -+ vscl_filter_mode = VOP2_SCALE_DOWN_BIL; -+ -+ /* -+ * RK3568 VOP Esmart/Smart dsp_w should be even pixel -+ * at scale down mode -+ */ -+ if (!(win->data->feature & WIN_FEATURE_AFBDC)) { -+ if ((hor_scl_mode == SCALE_DOWN) && (dst_w & 0x1)) { -+ drm_dbg(vop2->drm, "%s dst_w[%d] should align as 2 pixel\n", -+ win->data->name, dst_w); -+ dst_w++; -+ } -+ } -+ -+ val = vop2_scale_factor(src_w, dst_w); -+ vop2_win_write(win, VOP2_WIN_SCALE_YRGB_X, val); -+ val = vop2_scale_factor(src_h, dst_h); -+ vop2_win_write(win, VOP2_WIN_SCALE_YRGB_Y, val); -+ -+ vop2_win_write(win, VOP2_WIN_VSD_YRGB_GT4, gt4); -+ vop2_win_write(win, VOP2_WIN_VSD_YRGB_GT2, gt2); -+ -+ vop2_win_write(win, VOP2_WIN_YRGB_HOR_SCL_MODE, hor_scl_mode); -+ vop2_win_write(win, VOP2_WIN_YRGB_VER_SCL_MODE, ver_scl_mode); -+ -+ if (vop2_cluster_window(win)) -+ return; -+ -+ vop2_win_write(win, VOP2_WIN_YRGB_HSCL_FILTER_MODE, hscl_filter_mode); -+ vop2_win_write(win, VOP2_WIN_YRGB_VSCL_FILTER_MODE, vscl_filter_mode); -+ -+ if (info->is_yuv) { -+ src_w /= info->hsub; -+ src_h /= info->vsub; -+ -+ gt4 = gt2 = 0; -+ -+ if (src_h >= (4 * dst_h)) { -+ gt4 = 1; -+ src_h >>= 2; -+ } else if (src_h >= (2 * dst_h)) { -+ gt2 = 1; -+ src_h >>= 1; -+ } -+ -+ hor_scl_mode = scl_get_scl_mode(src_w, dst_w); -+ ver_scl_mode = scl_get_scl_mode(src_h, dst_h); -+ -+ val = vop2_scale_factor(src_w, dst_w); -+ vop2_win_write(win, VOP2_WIN_SCALE_CBCR_X, val); -+ -+ val = vop2_scale_factor(src_h, dst_h); -+ vop2_win_write(win, VOP2_WIN_SCALE_CBCR_Y, val); -+ -+ vop2_win_write(win, VOP2_WIN_VSD_CBCR_GT4, gt4); -+ vop2_win_write(win, VOP2_WIN_VSD_CBCR_GT2, gt2); -+ vop2_win_write(win, VOP2_WIN_CBCR_HOR_SCL_MODE, hor_scl_mode); -+ vop2_win_write(win, VOP2_WIN_CBCR_VER_SCL_MODE, ver_scl_mode); -+ vop2_win_write(win, VOP2_WIN_CBCR_HSCL_FILTER_MODE, hscl_filter_mode); -+ vop2_win_write(win, VOP2_WIN_CBCR_VSCL_FILTER_MODE, vscl_filter_mode); -+ } -+} -+ -+static int vop2_convert_csc_mode(int csc_mode) -+{ -+ switch (csc_mode) { -+ case V4L2_COLORSPACE_SMPTE170M: -+ case V4L2_COLORSPACE_470_SYSTEM_M: -+ case V4L2_COLORSPACE_470_SYSTEM_BG: -+ return CSC_BT601L; -+ case V4L2_COLORSPACE_REC709: -+ case V4L2_COLORSPACE_SMPTE240M: -+ case V4L2_COLORSPACE_DEFAULT: -+ return CSC_BT709L; -+ case V4L2_COLORSPACE_JPEG: -+ return CSC_BT601F; -+ case V4L2_COLORSPACE_BT2020: -+ return CSC_BT2020; -+ default: -+ return CSC_BT709L; -+ } -+} -+ -+/* -+ * colorspace path: -+ * Input Win csc Output -+ * 1. YUV(2020) --> Y2R->2020To709->R2Y --> YUV_OUTPUT(601/709) -+ * RGB --> R2Y __/ -+ * -+ * 2. YUV(2020) --> bypasss --> YUV_OUTPUT(2020) -+ * RGB --> 709To2020->R2Y __/ -+ * -+ * 3. YUV(2020) --> Y2R->2020To709 --> RGB_OUTPUT(709) -+ * RGB --> R2Y __/ -+ * -+ * 4. YUV(601/709)-> Y2R->709To2020->R2Y --> YUV_OUTPUT(2020) -+ * RGB --> 709To2020->R2Y __/ -+ * -+ * 5. YUV(601/709)-> bypass --> YUV_OUTPUT(709) -+ * RGB --> R2Y __/ -+ * -+ * 6. YUV(601/709)-> bypass --> YUV_OUTPUT(601) -+ * RGB --> R2Y(601) __/ -+ * -+ * 7. YUV --> Y2R(709) --> RGB_OUTPUT(709) -+ * RGB --> bypass __/ -+ * -+ * 8. RGB --> 709To2020->R2Y --> YUV_OUTPUT(2020) -+ * -+ * 9. RGB --> R2Y(709) --> YUV_OUTPUT(709) -+ * -+ * 10. RGB --> R2Y(601) --> YUV_OUTPUT(601) -+ * -+ * 11. RGB --> bypass --> RGB_OUTPUT(709) -+ */ -+ -+static void vop2_setup_csc_mode(struct vop2_video_port *vp, -+ struct vop2_win *win, -+ struct drm_plane_state *pstate) -+{ -+ struct rockchip_crtc_state *vcstate = to_rockchip_crtc_state(vp->crtc.state); -+ int is_input_yuv = pstate->fb->format->is_yuv; -+ int is_output_yuv = is_yuv_output(vcstate->bus_format); -+ int input_csc = V4L2_COLORSPACE_DEFAULT; -+ int output_csc = vcstate->color_space; -+ bool r2y_en, y2r_en; -+ int csc_mode; -+ -+ if (is_input_yuv && !is_output_yuv) { -+ y2r_en = true; -+ r2y_en = false; -+ csc_mode = vop2_convert_csc_mode(input_csc); -+ } else if (!is_input_yuv && is_output_yuv) { -+ y2r_en = false; -+ r2y_en = true; -+ csc_mode = vop2_convert_csc_mode(output_csc); -+ } else { -+ y2r_en = false; -+ r2y_en = false; -+ csc_mode = false; -+ } -+ -+ vop2_win_write(win, VOP2_WIN_Y2R_EN, y2r_en); -+ vop2_win_write(win, VOP2_WIN_R2Y_EN, r2y_en); -+ vop2_win_write(win, VOP2_WIN_CSC_MODE, csc_mode); -+} -+ -+static void vop2_crtc_enable_irq(struct vop2_video_port *vp, u32 irq) -+{ -+ struct vop2 *vop2 = vp->vop2; -+ -+ vop2_writel(vop2, RK3568_VP_INT_CLR(vp->id), irq << 16 | irq); -+ vop2_writel(vop2, RK3568_VP_INT_EN(vp->id), irq << 16 | irq); -+} -+ -+static void vop2_crtc_disable_irq(struct vop2_video_port *vp, u32 irq) -+{ -+ struct vop2 *vop2 = vp->vop2; -+ -+ vop2_writel(vop2, RK3568_VP_INT_EN(vp->id), irq << 16); -+} -+ -+static int vop2_core_clks_prepare_enable(struct vop2 *vop2) -+{ -+ int ret; -+ -+ ret = clk_prepare_enable(vop2->hclk); -+ if (ret < 0) { -+ drm_err(vop2->drm, "failed to enable hclk - %d\n", ret); -+ return ret; -+ } -+ -+ ret = clk_prepare_enable(vop2->aclk); -+ if (ret < 0) { -+ drm_err(vop2->drm, "failed to enable aclk - %d\n", ret); -+ goto err; -+ } -+ -+ return 0; -+err: -+ clk_disable_unprepare(vop2->hclk); -+ -+ return ret; -+} -+ -+static void vop2_enable(struct vop2 *vop2) -+{ -+ int ret; -+ -+ ret = pm_runtime_get_sync(vop2->dev); -+ if (ret < 0) { -+ drm_err(vop2->drm, "failed to get pm runtime: %d\n", ret); -+ return; -+ } -+ -+ ret = vop2_core_clks_prepare_enable(vop2); -+ if (ret) { -+ pm_runtime_put_sync(vop2->dev); -+ return; -+ } -+ -+ ret = rockchip_drm_dma_attach_device(vop2->drm, vop2->dev); -+ if (ret) { -+ drm_err(vop2->drm, "failed to attach dma mapping, %d\n", ret); -+ return; -+ } -+ -+ if (vop2->data->soc_id == 3566) -+ vop2_writel(vop2, RK3568_OTP_WIN_EN, 1); -+ -+ vop2_writel(vop2, RK3568_REG_CFG_DONE, RK3568_REG_CFG_DONE__GLB_CFG_DONE_EN); -+ -+ /* -+ * Disable auto gating, this is a workaround to -+ * avoid display image shift when a window enabled. -+ */ -+ regmap_clear_bits(vop2->map, RK3568_SYS_AUTO_GATING_CTRL, -+ RK3568_SYS_AUTO_GATING_CTRL__AUTO_GATING_EN); -+ -+ vop2_writel(vop2, RK3568_SYS0_INT_CLR, -+ VOP2_INT_BUS_ERRPR << 16 | VOP2_INT_BUS_ERRPR); -+ vop2_writel(vop2, RK3568_SYS0_INT_EN, -+ VOP2_INT_BUS_ERRPR << 16 | VOP2_INT_BUS_ERRPR); -+ vop2_writel(vop2, RK3568_SYS1_INT_CLR, -+ VOP2_INT_BUS_ERRPR << 16 | VOP2_INT_BUS_ERRPR); -+ vop2_writel(vop2, RK3568_SYS1_INT_EN, -+ VOP2_INT_BUS_ERRPR << 16 | VOP2_INT_BUS_ERRPR); -+} -+ -+static void vop2_disable(struct vop2 *vop2) -+{ -+ rockchip_drm_dma_detach_device(vop2->drm, vop2->dev); -+ -+ pm_runtime_put_sync(vop2->dev); -+ -+ clk_disable_unprepare(vop2->aclk); -+ clk_disable_unprepare(vop2->hclk); -+} -+ -+static void vop2_crtc_atomic_disable(struct drm_crtc *crtc, -+ struct drm_atomic_state *state) -+{ -+ struct vop2_video_port *vp = to_vop2_video_port(crtc); -+ struct vop2 *vop2 = vp->vop2; -+ int ret; -+ -+ vop2_lock(vop2); -+ -+ drm_crtc_vblank_off(crtc); -+ -+ /* -+ * Vop standby will take effect at end of current frame, -+ * if dsp hold valid irq happen, it means standby complete. -+ * -+ * we must wait standby complete when we want to disable aclk, -+ * if not, memory bus maybe dead. -+ */ -+ reinit_completion(&vp->dsp_hold_completion); -+ -+ vop2_crtc_enable_irq(vp, VP_INT_DSP_HOLD_VALID); -+ -+ vop2_vp_write(vp, RK3568_VP_DSP_CTRL, RK3568_VP_DSP_CTRL__STANDBY); -+ -+ ret = wait_for_completion_timeout(&vp->dsp_hold_completion, -+ msecs_to_jiffies(50)); -+ if (!ret) -+ drm_info(vop2->drm, "wait for vp%d dsp_hold timeout\n", vp->id); -+ -+ vop2_crtc_disable_irq(vp, VP_INT_DSP_HOLD_VALID); -+ -+ clk_disable_unprepare(vp->dclk); -+ -+ vop2->enable_count--; -+ -+ if (!vop2->enable_count) -+ vop2_disable(vop2); -+ -+ vop2_unlock(vop2); -+ -+ if (crtc->state->event && !crtc->state->active) { -+ spin_lock_irq(&crtc->dev->event_lock); -+ drm_crtc_send_vblank_event(crtc, crtc->state->event); -+ spin_unlock_irq(&crtc->dev->event_lock); -+ -+ crtc->state->event = NULL; -+ } -+} -+ -+static int vop2_plane_atomic_check(struct drm_plane *plane, -+ struct drm_atomic_state *astate) -+{ -+ struct drm_plane_state *pstate = drm_atomic_get_new_plane_state(astate, plane); -+ struct drm_framebuffer *fb = pstate->fb; -+ struct drm_crtc *crtc = pstate->crtc; -+ struct drm_crtc_state *cstate; -+ struct vop2_video_port *vp; -+ struct vop2 *vop2; -+ const struct vop2_data *vop2_data; -+ struct drm_rect *dest = &pstate->dst; -+ struct drm_rect *src = &pstate->src; -+ int min_scale = FRAC_16_16(1, 8); -+ int max_scale = FRAC_16_16(8, 1); -+ int format; -+ int ret; -+ -+ if (!crtc) -+ return 0; -+ -+ vp = to_vop2_video_port(crtc); -+ vop2 = vp->vop2; -+ vop2_data = vop2->data; -+ -+ cstate = drm_atomic_get_existing_crtc_state(pstate->state, crtc); -+ if (WARN_ON(!cstate)) -+ return -EINVAL; -+ -+ ret = drm_atomic_helper_check_plane_state(pstate, cstate, -+ min_scale, max_scale, -+ true, true); -+ if (ret) -+ return ret; -+ -+ if (!pstate->visible) -+ return 0; -+ -+ format = vop2_convert_format(fb->format->format); -+ if (format < 0) -+ return format; -+ -+ if (drm_rect_width(src) >> 16 < 4 || drm_rect_height(src) >> 16 < 4 || -+ drm_rect_width(dest) < 4 || drm_rect_width(dest) < 4) { -+ drm_err(vop2->drm, "Invalid size: %dx%d->%dx%d, min size is 4x4\n", -+ drm_rect_width(src) >> 16, drm_rect_height(src) >> 16, -+ drm_rect_width(dest), drm_rect_height(dest)); -+ pstate->visible = false; -+ return 0; -+ } -+ -+ if (drm_rect_width(src) >> 16 > vop2_data->max_input.width || -+ drm_rect_height(src) >> 16 > vop2_data->max_input.height) { -+ drm_err(vop2->drm, "Invalid source: %dx%d. max input: %dx%d\n", -+ drm_rect_width(src) >> 16, -+ drm_rect_height(src) >> 16, -+ vop2_data->max_input.width, -+ vop2_data->max_input.height); -+ return -EINVAL; -+ } -+ -+ /* -+ * Src.x1 can be odd when do clip, but yuv plane start point -+ * need align with 2 pixel. -+ */ -+ if (fb->format->is_yuv && ((pstate->src.x1 >> 16) % 2)) { -+ drm_err(vop2->drm, "Invalid Source: Yuv format not support odd xpos\n"); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static void vop2_plane_atomic_disable(struct drm_plane *plane, -+ struct drm_atomic_state *state) -+{ -+ struct drm_plane_state *old_pstate = drm_atomic_get_old_plane_state(state, plane); -+ struct vop2_win *win = to_vop2_win(plane); -+ struct vop2 *vop2 = win->vop2; -+ -+ drm_dbg(vop2->drm, "%s disable\n", win->data->name); -+ -+ if (!old_pstate->crtc) -+ return; -+ -+ vop2_win_disable(win); -+ vop2_win_write(win, VOP2_WIN_YUV_CLIP, 0); -+} -+ -+/* -+ * The color key is 10 bit, so all format should -+ * convert to 10 bit here. -+ */ -+static void vop2_plane_setup_color_key(struct drm_plane *plane, u32 color_key) -+{ -+ struct drm_plane_state *pstate = plane->state; -+ struct drm_framebuffer *fb = pstate->fb; -+ struct vop2_win *win = to_vop2_win(plane); -+ u32 color_key_en = 0; -+ u32 r = 0; -+ u32 g = 0; -+ u32 b = 0; -+ -+ if (!(color_key & VOP2_COLOR_KEY_MASK) || fb->format->is_yuv) { -+ vop2_win_write(win, VOP2_WIN_COLOR_KEY_EN, 0); -+ return; -+ } -+ -+ switch (fb->format->format) { -+ case DRM_FORMAT_RGB565: -+ case DRM_FORMAT_BGR565: -+ r = (color_key & 0xf800) >> 11; -+ g = (color_key & 0x7e0) >> 5; -+ b = (color_key & 0x1f); -+ r <<= 5; -+ g <<= 4; -+ b <<= 5; -+ color_key_en = 1; -+ break; -+ case DRM_FORMAT_XRGB8888: -+ case DRM_FORMAT_ARGB8888: -+ case DRM_FORMAT_XBGR8888: -+ case DRM_FORMAT_ABGR8888: -+ case DRM_FORMAT_RGB888: -+ case DRM_FORMAT_BGR888: -+ r = (color_key & 0xff0000) >> 16; -+ g = (color_key & 0xff00) >> 8; -+ b = (color_key & 0xff); -+ r <<= 2; -+ g <<= 2; -+ b <<= 2; -+ color_key_en = 1; -+ break; -+ } -+ -+ vop2_win_write(win, VOP2_WIN_COLOR_KEY_EN, color_key_en); -+ vop2_win_write(win, VOP2_WIN_COLOR_KEY, (r << 20) | (g << 10) | b); -+} -+ -+static void vop2_plane_atomic_update(struct drm_plane *plane, -+ struct drm_atomic_state *state) -+{ -+ struct drm_plane_state *pstate = plane->state; -+ struct drm_crtc *crtc = pstate->crtc; -+ struct vop2_win *win = to_vop2_win(plane); -+ struct vop2_video_port *vp = to_vop2_video_port(crtc); -+ struct drm_display_mode *adjusted_mode = &crtc->state->adjusted_mode; -+ struct vop2 *vop2 = win->vop2; -+ struct drm_framebuffer *fb = pstate->fb; -+ u32 bpp = fb->format->cpp[0] * 8; -+ u32 actual_w, actual_h, dsp_w, dsp_h; -+ u32 act_info, dsp_info; -+ u32 format; -+ u32 afbc_format; -+ u32 rb_swap; -+ u32 uv_swap; -+ struct drm_rect *src = &pstate->src; -+ struct drm_rect *dest = &pstate->dst; -+ u32 afbc_tile_num; -+ u32 transform_offset; -+ bool dither_up; -+ bool xmirror = pstate->rotation & DRM_MODE_REFLECT_X ? true : false; -+ bool ymirror = pstate->rotation & DRM_MODE_REFLECT_Y ? true : false; -+ bool rotate_270 = pstate->rotation & DRM_MODE_ROTATE_270; -+ bool rotate_90 = pstate->rotation & DRM_MODE_ROTATE_90; -+ struct rockchip_gem_object *rk_obj; -+ unsigned long offset; -+ bool afbc_en; -+ dma_addr_t yrgb_mst; -+ dma_addr_t uv_mst; -+ -+ /* -+ * can't update plane when vop2 is disabled. -+ */ -+ if (WARN_ON(!crtc)) -+ return; -+ -+ if (!pstate->visible) { -+ vop2_plane_atomic_disable(plane, state); -+ return; -+ } -+ -+ afbc_en = rockchip_afbc(plane, fb->modifier); -+ -+ offset = (src->x1 >> 16) * fb->format->cpp[0]; -+ -+ /* -+ * AFBC HDR_PTR must set to the zero offset of the framebuffer. -+ */ -+ if (afbc_en) -+ offset = 0; -+ else if (pstate->rotation & DRM_MODE_REFLECT_Y) -+ offset += ((src->y2 >> 16) - 1) * fb->pitches[0]; -+ else -+ offset += (src->y1 >> 16) * fb->pitches[0]; -+ -+ rk_obj = to_rockchip_obj(fb->obj[0]); -+ -+ yrgb_mst = rk_obj->dma_addr + offset + fb->offsets[0]; -+ if (fb->format->is_yuv) { -+ int hsub = fb->format->hsub; -+ int vsub = fb->format->vsub; -+ -+ offset = (src->x1 >> 16) * fb->format->cpp[1] / hsub; -+ offset += (src->y1 >> 16) * fb->pitches[1] / vsub; -+ -+ if ((pstate->rotation & DRM_MODE_REFLECT_Y) && !afbc_en) -+ offset += fb->pitches[1] * ((pstate->src_h >> 16) - 2) / vsub; -+ -+ rk_obj = to_rockchip_obj(fb->obj[0]); -+ uv_mst = rk_obj->dma_addr + offset + fb->offsets[1]; -+ } -+ -+ actual_w = drm_rect_width(src) >> 16; -+ actual_h = drm_rect_height(src) >> 16; -+ dsp_w = drm_rect_width(dest); -+ -+ if (dest->x1 + dsp_w > adjusted_mode->hdisplay) { -+ drm_err(vop2->drm, "vp%d %s dest->x1[%d] + dsp_w[%d] exceed mode hdisplay[%d]\n", -+ vp->id, win->data->name, dest->x1, dsp_w, adjusted_mode->hdisplay); -+ dsp_w = adjusted_mode->hdisplay - dest->x1; -+ if (dsp_w < 4) -+ dsp_w = 4; -+ actual_w = dsp_w * actual_w / drm_rect_width(dest); -+ } -+ -+ dsp_h = drm_rect_height(dest); -+ -+ if (dest->y1 + dsp_h > adjusted_mode->vdisplay) { -+ drm_err(vop2->drm, "vp%d %s dest->y1[%d] + dsp_h[%d] exceed mode vdisplay[%d]\n", -+ vp->id, win->data->name, dest->y1, dsp_h, adjusted_mode->vdisplay); -+ dsp_h = adjusted_mode->vdisplay - dest->y1; -+ if (dsp_h < 4) -+ dsp_h = 4; -+ actual_h = dsp_h * actual_h / drm_rect_height(dest); -+ } -+ -+ /* -+ * This is workaround solution for IC design: -+ * esmart can't support scale down when actual_w % 16 == 1. -+ */ -+ if (!(win->data->feature & WIN_FEATURE_AFBDC)) { -+ if (actual_w > dsp_w && (actual_w & 0xf) == 1) { -+ drm_err(vop2->drm, "vp%d %s act_w[%d] MODE 16 == 1\n", -+ vp->id, win->data->name, actual_w); -+ actual_w -= 1; -+ } -+ } -+ -+ if (afbc_en && actual_w % 4) { -+ drm_err(vop2->drm, "vp%d %s actual_w[%d] not 4 pixel aligned\n", -+ vp->id, win->data->name, actual_w); -+ actual_w = ALIGN_DOWN(actual_w, 4); -+ } -+ -+ act_info = (actual_h - 1) << 16 | ((actual_w - 1) & 0xffff); -+ dsp_info = (dsp_h - 1) << 16 | ((dsp_w - 1) & 0xffff); -+ -+ format = vop2_convert_format(fb->format->format); -+ -+ drm_dbg(vop2->drm, "vp%d update %s[%dx%d->%dx%d@%dx%d] fmt[%p4cc_%s] addr[%pad]\n", -+ vp->id, win->data->name, actual_w, actual_h, dsp_w, dsp_h, -+ dest->x1, dest->y1, -+ &fb->format->format, -+ afbc_en ? "AFBC" : "", &yrgb_mst); -+ -+ if (afbc_en) { -+ u32 stride; -+ -+ /* the afbc superblock is 16 x 16 */ -+ afbc_format = vop2_convert_afbc_format(fb->format->format); -+ -+ /* Enable color transform for YTR */ -+ if (fb->modifier & AFBC_FORMAT_MOD_YTR) -+ afbc_format |= (1 << 4); -+ -+ afbc_tile_num = ALIGN(actual_w, 16) >> 4; -+ -+ /* -+ * AFBC pic_vir_width is count by pixel, this is different -+ * with WIN_VIR_STRIDE. -+ */ -+ stride = (fb->pitches[0] << 3) / bpp; -+ if ((stride & 0x3f) && (xmirror || rotate_90 || rotate_270)) -+ drm_err(vop2->drm, "vp%d %s stride[%d] not 64 pixel aligened\n", -+ vp->id, win->data->name, stride); -+ -+ rb_swap = vop2_afbc_rb_swap(fb->format->format); -+ uv_swap = vop2_afbc_uv_swap(fb->format->format); -+ /* -+ * This is a workaround for crazy IC design, Cluster -+ * and Esmart/Smart use different format configuration map: -+ * YUV420_10BIT: 0x10 for Cluster, 0x14 for Esmart/Smart. -+ * -+ * This is one thing we can make the convert simple: -+ * AFBCD decode all the YUV data to YUV444. So we just -+ * set all the yuv 10 bit to YUV444_10. -+ */ -+ if (fb->format->is_yuv && (bpp == 10)) -+ format = VOP2_CLUSTER_YUV444_10; -+ -+ if (vop2_cluster_window(win)) -+ vop2_win_write(win, VOP2_WIN_AFBC_ENABLE, 1); -+ vop2_win_write(win, VOP2_WIN_AFBC_FORMAT, afbc_format); -+ vop2_win_write(win, VOP2_WIN_AFBC_RB_SWAP, rb_swap); -+ vop2_win_write(win, VOP2_WIN_AFBC_UV_SWAP, uv_swap); -+ vop2_win_write(win, VOP2_WIN_AFBC_AUTO_GATING_EN, 0); -+ vop2_win_write(win, VOP2_WIN_AFBC_BLOCK_SPLIT_EN, 0); -+ if (pstate->rotation & (DRM_MODE_ROTATE_270 | DRM_MODE_ROTATE_90)) { -+ vop2_win_write(win, VOP2_WIN_AFBC_HALF_BLOCK_EN, 0); -+ transform_offset = vop2_afbc_transform_offset(pstate, false); -+ } else { -+ vop2_win_write(win, VOP2_WIN_AFBC_HALF_BLOCK_EN, 1); -+ transform_offset = vop2_afbc_transform_offset(pstate, true); -+ } -+ vop2_win_write(win, VOP2_WIN_AFBC_HDR_PTR, yrgb_mst); -+ vop2_win_write(win, VOP2_WIN_AFBC_PIC_SIZE, act_info); -+ vop2_win_write(win, VOP2_WIN_AFBC_TRANSFORM_OFFSET, transform_offset); -+ vop2_win_write(win, VOP2_WIN_AFBC_PIC_OFFSET, ((src->x1 >> 16) | src->y1)); -+ vop2_win_write(win, VOP2_WIN_AFBC_DSP_OFFSET, (dest->x1 | (dest->y1 << 16))); -+ vop2_win_write(win, VOP2_WIN_AFBC_PIC_VIR_WIDTH, stride); -+ vop2_win_write(win, VOP2_WIN_AFBC_TILE_NUM, afbc_tile_num); -+ vop2_win_write(win, VOP2_WIN_XMIRROR, xmirror); -+ vop2_win_write(win, VOP2_WIN_AFBC_ROTATE_270, rotate_270); -+ vop2_win_write(win, VOP2_WIN_AFBC_ROTATE_90, rotate_90); -+ } else { -+ vop2_win_write(win, VOP2_WIN_YRGB_VIR, DIV_ROUND_UP(fb->pitches[0], 4)); -+ } -+ -+ vop2_win_write(win, VOP2_WIN_YMIRROR, ymirror); -+ -+ if (rotate_90 || rotate_270) { -+ act_info = swahw32(act_info); -+ actual_w = drm_rect_height(src) >> 16; -+ actual_h = drm_rect_width(src) >> 16; -+ } -+ -+ vop2_win_write(win, VOP2_WIN_FORMAT, format); -+ vop2_win_write(win, VOP2_WIN_YRGB_MST, yrgb_mst); -+ -+ rb_swap = vop2_win_rb_swap(fb->format->format); -+ vop2_win_write(win, VOP2_WIN_RB_SWAP, rb_swap); -+ if (!vop2_cluster_window(win)) { -+ uv_swap = vop2_win_uv_swap(fb->format->format); -+ vop2_win_write(win, VOP2_WIN_UV_SWAP, uv_swap); -+ } -+ -+ if (fb->format->is_yuv) { -+ vop2_win_write(win, VOP2_WIN_UV_VIR, DIV_ROUND_UP(fb->pitches[1], 4)); -+ vop2_win_write(win, VOP2_WIN_UV_MST, uv_mst); -+ } -+ -+ vop2_setup_scale(vop2, win, actual_w, actual_h, dsp_w, dsp_h, fb->format->format); -+ if (!vop2_cluster_window(win)) -+ vop2_plane_setup_color_key(plane, 0); -+ vop2_win_write(win, VOP2_WIN_ACT_INFO, act_info); -+ vop2_win_write(win, VOP2_WIN_DSP_INFO, dsp_info); -+ vop2_win_write(win, VOP2_WIN_DSP_ST, dest->y1 << 16 | (dest->x1 & 0xffff)); -+ -+ vop2_setup_csc_mode(vp, win, pstate); -+ -+ dither_up = vop2_win_dither_up(fb->format->format); -+ vop2_win_write(win, VOP2_WIN_DITHER_UP, dither_up); -+ -+ vop2_win_write(win, VOP2_WIN_ENABLE, 1); -+ -+ if (vop2_cluster_window(win)) { -+ int lb_mode = vop2_get_cluster_lb_mode(win, pstate); -+ -+ vop2_win_write(win, VOP2_WIN_CLUSTER_LB_MODE, lb_mode); -+ vop2_win_write(win, VOP2_WIN_CLUSTER_ENABLE, 1); -+ } -+} -+ -+static const struct drm_plane_helper_funcs vop2_plane_helper_funcs = { -+ .atomic_check = vop2_plane_atomic_check, -+ .atomic_update = vop2_plane_atomic_update, -+ .atomic_disable = vop2_plane_atomic_disable, -+}; -+ -+static const struct drm_plane_funcs vop2_plane_funcs = { -+ .update_plane = drm_atomic_helper_update_plane, -+ .disable_plane = drm_atomic_helper_disable_plane, -+ .destroy = drm_plane_cleanup, -+ .reset = drm_atomic_helper_plane_reset, -+ .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state, -+ .atomic_destroy_state = drm_atomic_helper_plane_destroy_state, -+ .format_mod_supported = rockchip_vop2_mod_supported, -+}; -+ -+static int vop2_crtc_enable_vblank(struct drm_crtc *crtc) -+{ -+ struct vop2_video_port *vp = to_vop2_video_port(crtc); -+ -+ vop2_crtc_enable_irq(vp, VP_INT_FS_FIELD); -+ -+ return 0; -+} -+ -+static void vop2_crtc_disable_vblank(struct drm_crtc *crtc) -+{ -+ struct vop2_video_port *vp = to_vop2_video_port(crtc); -+ -+ vop2_crtc_disable_irq(vp, VP_INT_FS_FIELD); -+} -+ -+static bool vop2_crtc_mode_fixup(struct drm_crtc *crtc, -+ const struct drm_display_mode *mode, -+ struct drm_display_mode *adj_mode) -+{ -+ drm_mode_set_crtcinfo(adj_mode, CRTC_INTERLACE_HALVE_V | -+ CRTC_STEREO_DOUBLE); -+ -+ return true; -+} -+ -+static void vop2_dither_setup(struct drm_crtc *crtc, u32 *dsp_ctrl) -+{ -+ struct rockchip_crtc_state *vcstate = to_rockchip_crtc_state(crtc->state); -+ -+ switch (vcstate->bus_format) { -+ case MEDIA_BUS_FMT_RGB565_1X16: -+ *dsp_ctrl |= RK3568_VP_DSP_CTRL__DITHER_DOWN_EN; -+ break; -+ case MEDIA_BUS_FMT_RGB666_1X18: -+ case MEDIA_BUS_FMT_RGB666_1X24_CPADHI: -+ case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG: -+ *dsp_ctrl |= RK3568_VP_DSP_CTRL__DITHER_DOWN_EN; -+ *dsp_ctrl |= RGB888_TO_RGB666; -+ break; -+ case MEDIA_BUS_FMT_YUV8_1X24: -+ case MEDIA_BUS_FMT_UYYVYY8_0_5X24: -+ *dsp_ctrl |= RK3568_VP_DSP_CTRL__PRE_DITHER_DOWN_EN; -+ break; -+ default: -+ break; -+ } -+ -+ if (vcstate->output_mode != ROCKCHIP_OUT_MODE_AAAA) -+ *dsp_ctrl |= RK3568_VP_DSP_CTRL__PRE_DITHER_DOWN_EN; -+ -+ *dsp_ctrl |= FIELD_PREP(RK3568_VP_DSP_CTRL__DITHER_DOWN_SEL, -+ DITHER_DOWN_ALLEGRO); -+} -+ -+static void vop2_post_config(struct drm_crtc *crtc) -+{ -+ struct vop2_video_port *vp = to_vop2_video_port(crtc); -+ struct drm_display_mode *mode = &crtc->state->adjusted_mode; -+ u16 vtotal = mode->crtc_vtotal; -+ u16 hdisplay = mode->crtc_hdisplay; -+ u16 hact_st = mode->crtc_htotal - mode->crtc_hsync_start; -+ u16 vdisplay = mode->crtc_vdisplay; -+ u16 vact_st = mode->crtc_vtotal - mode->crtc_vsync_start; -+ u32 left_margin = 100, right_margin = 100; -+ u32 top_margin = 100, bottom_margin = 100; -+ u16 hsize = hdisplay * (left_margin + right_margin) / 200; -+ u16 vsize = vdisplay * (top_margin + bottom_margin) / 200; -+ u16 hact_end, vact_end; -+ u32 val; -+ -+ vsize = rounddown(vsize, 2); -+ hsize = rounddown(hsize, 2); -+ hact_st += hdisplay * (100 - left_margin) / 200; -+ hact_end = hact_st + hsize; -+ val = hact_st << 16; -+ val |= hact_end; -+ vop2_vp_write(vp, RK3568_VP_POST_DSP_HACT_INFO, val); -+ vact_st += vdisplay * (100 - top_margin) / 200; -+ vact_end = vact_st + vsize; -+ val = vact_st << 16; -+ val |= vact_end; -+ vop2_vp_write(vp, RK3568_VP_POST_DSP_VACT_INFO, val); -+ val = scl_cal_scale2(vdisplay, vsize) << 16; -+ val |= scl_cal_scale2(hdisplay, hsize); -+ vop2_vp_write(vp, RK3568_VP_POST_SCL_FACTOR_YRGB, val); -+ -+ val = 0; -+ if (hdisplay != hsize) -+ val |= RK3568_VP_POST_SCL_CTRL__HSCALEDOWN; -+ if (vdisplay != vsize) -+ val |= RK3568_VP_POST_SCL_CTRL__VSCALEDOWN; -+ vop2_vp_write(vp, RK3568_VP_POST_SCL_CTRL, val); -+ -+ if (mode->flags & DRM_MODE_FLAG_INTERLACE) { -+ u16 vact_st_f1 = vtotal + vact_st + 1; -+ u16 vact_end_f1 = vact_st_f1 + vsize; -+ -+ val = vact_st_f1 << 16 | vact_end_f1; -+ vop2_vp_write(vp, RK3568_VP_POST_DSP_VACT_INFO_F1, val); -+ } -+ -+ vop2_vp_write(vp, RK3568_VP_DSP_BG, 0); -+} -+ -+static void rk3568_set_intf_mux(struct vop2_video_port *vp, int id, -+ u32 polflags) -+{ -+ struct vop2 *vop2 = vp->vop2; -+ u32 die, dip; -+ -+ die = vop2_readl(vop2, RK3568_DSP_IF_EN); -+ dip = vop2_readl(vop2, RK3568_DSP_IF_POL); -+ -+ switch (id) { -+ case ROCKCHIP_VOP2_EP_RGB0: -+ die &= ~RK3568_SYS_DSP_INFACE_EN_RGB_MUX; -+ die |= RK3568_SYS_DSP_INFACE_EN_RGB | -+ FIELD_PREP(RK3568_SYS_DSP_INFACE_EN_RGB_MUX, vp->id); -+ if (polflags & POLFLAG_DCLK_INV) -+ regmap_write(vop2->grf, RK3568_GRF_VO_CON1, BIT(3 + 16) | BIT(3)); -+ else -+ regmap_write(vop2->grf, RK3568_GRF_VO_CON1, BIT(3 + 16)); -+ break; -+ case ROCKCHIP_VOP2_EP_HDMI0: -+ die &= ~RK3568_SYS_DSP_INFACE_EN_HDMI_MUX; -+ die |= RK3568_SYS_DSP_INFACE_EN_HDMI | -+ FIELD_PREP(RK3568_SYS_DSP_INFACE_EN_HDMI_MUX, vp->id); -+ break; -+ case ROCKCHIP_VOP2_EP_EDP0: -+ die &= ~RK3568_SYS_DSP_INFACE_EN_EDP_MUX; -+ die |= RK3568_SYS_DSP_INFACE_EN_EDP | -+ FIELD_PREP(RK3568_SYS_DSP_INFACE_EN_EDP_MUX, vp->id); -+ break; -+ case ROCKCHIP_VOP2_EP_MIPI0: -+ die &= ~RK3568_SYS_DSP_INFACE_EN_MIPI0_MUX; -+ die |= RK3568_SYS_DSP_INFACE_EN_MIPI0 | -+ FIELD_PREP(RK3568_SYS_DSP_INFACE_EN_MIPI0_MUX, vp->id); -+ dip &= ~RK3568_DSP_IF_POL__MIPI_PIN_POL; -+ dip |= FIELD_PREP(RK3568_DSP_IF_POL__MIPI_PIN_POL, polflags); -+ break; -+ case ROCKCHIP_VOP2_EP_MIPI1: -+ die &= ~RK3568_SYS_DSP_INFACE_EN_MIPI1_MUX; -+ die |= RK3568_SYS_DSP_INFACE_EN_MIPI1 | -+ FIELD_PREP(RK3568_SYS_DSP_INFACE_EN_MIPI1_MUX, vp->id); -+ dip &= ~RK3568_DSP_IF_POL__MIPI_PIN_POL; -+ dip |= FIELD_PREP(RK3568_DSP_IF_POL__MIPI_PIN_POL, polflags); -+ break; -+ case ROCKCHIP_VOP2_EP_LVDS0: -+ die &= ~RK3568_SYS_DSP_INFACE_EN_LVDS0_MUX; -+ die |= RK3568_SYS_DSP_INFACE_EN_LVDS0 | -+ FIELD_PREP(RK3568_SYS_DSP_INFACE_EN_LVDS0_MUX, vp->id); -+ dip &= ~RK3568_DSP_IF_POL__RGB_LVDS_PIN_POL; -+ dip |= FIELD_PREP(RK3568_DSP_IF_POL__RGB_LVDS_PIN_POL, polflags); -+ break; -+ case ROCKCHIP_VOP2_EP_LVDS1: -+ die &= ~RK3568_SYS_DSP_INFACE_EN_LVDS1_MUX; -+ die |= RK3568_SYS_DSP_INFACE_EN_LVDS1 | -+ FIELD_PREP(RK3568_SYS_DSP_INFACE_EN_LVDS1_MUX, vp->id); -+ dip &= ~RK3568_DSP_IF_POL__RGB_LVDS_PIN_POL; -+ dip |= FIELD_PREP(RK3568_DSP_IF_POL__RGB_LVDS_PIN_POL, polflags); -+ break; -+ default: -+ drm_err(vop2->drm, "Invalid interface id %d on vp%d\n", id, vp->id); -+ return; -+ }; -+ -+ dip |= RK3568_DSP_IF_POL__CFG_DONE_IMD; -+ -+ vop2_writel(vop2, RK3568_DSP_IF_EN, die); -+ vop2_writel(vop2, RK3568_DSP_IF_POL, dip); -+} -+ -+static int us_to_vertical_line(struct drm_display_mode *mode, int us) -+{ -+ return us * mode->clock / mode->htotal / 1000; -+} -+ -+static void vop2_crtc_atomic_enable(struct drm_crtc *crtc, -+ struct drm_atomic_state *state) -+{ -+ struct vop2_video_port *vp = to_vop2_video_port(crtc); -+ struct vop2 *vop2 = vp->vop2; -+ const struct vop2_data *vop2_data = vop2->data; -+ const struct vop2_video_port_data *vp_data = &vop2_data->vp[vp->id]; -+ struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc); -+ struct rockchip_crtc_state *vcstate = to_rockchip_crtc_state(crtc->state); -+ struct drm_display_mode *mode = &crtc->state->adjusted_mode; -+ unsigned long clock = mode->crtc_clock * 1000; -+ u16 hsync_len = mode->crtc_hsync_end - mode->crtc_hsync_start; -+ u16 hdisplay = mode->crtc_hdisplay; -+ u16 htotal = mode->crtc_htotal; -+ u16 hact_st = mode->crtc_htotal - mode->crtc_hsync_start; -+ u16 hact_end = hact_st + hdisplay; -+ u16 vdisplay = mode->crtc_vdisplay; -+ u16 vtotal = mode->crtc_vtotal; -+ u16 vsync_len = mode->crtc_vsync_end - mode->crtc_vsync_start; -+ u16 vact_st = mode->crtc_vtotal - mode->crtc_vsync_start; -+ u16 vact_end = vact_st + vdisplay; -+ u8 out_mode; -+ u32 dsp_ctrl = 0; -+ int act_end; -+ u32 val, polflags; -+ int ret; -+ struct drm_encoder *encoder; -+ -+ drm_dbg(vop2->drm, "Update mode to %dx%d%s%d, type: %d for vp%d\n", -+ hdisplay, vdisplay, mode->flags & DRM_MODE_FLAG_INTERLACE ? "i" : "p", -+ drm_mode_vrefresh(mode), vcstate->output_type, vp->id); -+ -+ vop2_lock(vop2); -+ -+ ret = clk_prepare_enable(vp->dclk); -+ if (ret < 0) { -+ drm_err(vop2->drm, "failed to enable dclk for video port%d - %d\n", -+ vp->id, ret); -+ return; -+ } -+ -+ if (!vop2->enable_count) -+ vop2_enable(vop2); -+ -+ vop2->enable_count++; -+ -+ vop2_crtc_enable_irq(vp, VP_INT_POST_BUF_EMPTY); -+ -+ polflags = 0; -+ if (vcstate->bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE) -+ polflags |= POLFLAG_DCLK_INV; -+ if (mode->flags & DRM_MODE_FLAG_PHSYNC) -+ polflags |= BIT(HSYNC_POSITIVE); -+ if (mode->flags & DRM_MODE_FLAG_PVSYNC) -+ polflags |= BIT(VSYNC_POSITIVE); -+ -+ drm_for_each_encoder_mask(encoder, crtc->dev, crtc_state->encoder_mask) { -+ struct rockchip_encoder *rkencoder = to_rockchip_encoder(encoder); -+ -+ rk3568_set_intf_mux(vp, rkencoder->crtc_endpoint_id, polflags); -+ } -+ -+ if (vcstate->output_mode == ROCKCHIP_OUT_MODE_AAAA && -+ !(vp_data->feature & VOP_FEATURE_OUTPUT_10BIT)) -+ out_mode = ROCKCHIP_OUT_MODE_P888; -+ else -+ out_mode = vcstate->output_mode; -+ -+ dsp_ctrl |= FIELD_PREP(RK3568_VP_DSP_CTRL__OUT_MODE, out_mode); -+ -+ if (vop2_output_uv_swap(vcstate->bus_format, vcstate->output_mode)) -+ dsp_ctrl |= RK3568_VP_DSP_CTRL__DSP_RB_SWAP; -+ -+ if (is_yuv_output(vcstate->bus_format)) -+ dsp_ctrl |= RK3568_VP_DSP_CTRL__POST_DSP_OUT_R2Y; -+ -+ vop2_dither_setup(crtc, &dsp_ctrl); -+ -+ vop2_vp_write(vp, RK3568_VP_DSP_HTOTAL_HS_END, (htotal << 16) | hsync_len); -+ val = hact_st << 16; -+ val |= hact_end; -+ vop2_vp_write(vp, RK3568_VP_DSP_HACT_ST_END, val); -+ -+ val = vact_st << 16; -+ val |= vact_end; -+ vop2_vp_write(vp, RK3568_VP_DSP_VACT_ST_END, val); -+ -+ if (mode->flags & DRM_MODE_FLAG_INTERLACE) { -+ u16 vact_st_f1 = vtotal + vact_st + 1; -+ u16 vact_end_f1 = vact_st_f1 + vdisplay; -+ -+ val = vact_st_f1 << 16 | vact_end_f1; -+ vop2_vp_write(vp, RK3568_VP_DSP_VACT_ST_END_F1, val); -+ -+ val = vtotal << 16 | (vtotal + vsync_len); -+ vop2_vp_write(vp, RK3568_VP_DSP_VS_ST_END_F1, val); -+ dsp_ctrl |= RK3568_VP_DSP_CTRL__DSP_INTERLACE; -+ dsp_ctrl |= RK3568_VP_DSP_CTRL__DSP_FILED_POL; -+ dsp_ctrl |= RK3568_VP_DSP_CTRL__P2I_EN; -+ vtotal += vtotal + 1; -+ act_end = vact_end_f1; -+ } else { -+ act_end = vact_end; -+ } -+ -+ vop2_writel(vop2, RK3568_VP_LINE_FLAG(vp->id), -+ (act_end - us_to_vertical_line(mode, 0)) << 16 | act_end); -+ -+ vop2_vp_write(vp, RK3568_VP_DSP_VTOTAL_VS_END, vtotal << 16 | vsync_len); -+ -+ if (mode->flags & DRM_MODE_FLAG_DBLCLK) { -+ dsp_ctrl |= RK3568_VP_DSP_CTRL__CORE_DCLK_DIV; -+ clock *= 2; -+ } -+ -+ vop2_vp_write(vp, RK3568_VP_MIPI_CTRL, 0); -+ -+ clk_set_rate(vp->dclk, clock); -+ -+ vop2_post_config(crtc); -+ -+ vop2_cfg_done(vp); -+ -+ vop2_vp_write(vp, RK3568_VP_DSP_CTRL, dsp_ctrl); -+ -+ drm_crtc_vblank_on(crtc); -+ -+ vop2_unlock(vop2); -+} -+ -+static int vop2_crtc_atomic_check(struct drm_crtc *crtc, -+ struct drm_atomic_state *state) -+{ -+ struct vop2_video_port *vp = to_vop2_video_port(crtc); -+ struct drm_plane *plane; -+ int nplanes = 0; -+ struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc); -+ -+ drm_atomic_crtc_state_for_each_plane(plane, crtc_state) -+ nplanes++; -+ -+ if (nplanes > vp->nlayers) -+ return -EINVAL; -+ -+ return 0; -+} -+ -+static bool is_opaque(u16 alpha) -+{ -+ return (alpha >> 8) == 0xff; -+} -+ -+static void vop2_parse_alpha(struct vop2_alpha_config *alpha_config, -+ struct vop2_alpha *alpha) -+{ -+ int src_glb_alpha_en = is_opaque(alpha_config->src_glb_alpha_value) ? 0 : 1; -+ int dst_glb_alpha_en = is_opaque(alpha_config->dst_glb_alpha_value) ? 0 : 1; -+ int src_color_mode = alpha_config->src_premulti_en ? -+ ALPHA_SRC_PRE_MUL : ALPHA_SRC_NO_PRE_MUL; -+ int dst_color_mode = alpha_config->dst_premulti_en ? -+ ALPHA_SRC_PRE_MUL : ALPHA_SRC_NO_PRE_MUL; -+ -+ alpha->src_color_ctrl.val = 0; -+ alpha->dst_color_ctrl.val = 0; -+ alpha->src_alpha_ctrl.val = 0; -+ alpha->dst_alpha_ctrl.val = 0; -+ -+ if (!alpha_config->src_pixel_alpha_en) -+ alpha->src_color_ctrl.bits.blend_mode = ALPHA_GLOBAL; -+ else if (alpha_config->src_pixel_alpha_en && !src_glb_alpha_en) -+ alpha->src_color_ctrl.bits.blend_mode = ALPHA_PER_PIX; -+ else -+ alpha->src_color_ctrl.bits.blend_mode = ALPHA_PER_PIX_GLOBAL; -+ -+ alpha->src_color_ctrl.bits.alpha_en = 1; -+ -+ if (alpha->src_color_ctrl.bits.blend_mode == ALPHA_GLOBAL) { -+ alpha->src_color_ctrl.bits.color_mode = src_color_mode; -+ alpha->src_color_ctrl.bits.factor_mode = SRC_FAC_ALPHA_SRC_GLOBAL; -+ } else if (alpha->src_color_ctrl.bits.blend_mode == ALPHA_PER_PIX) { -+ alpha->src_color_ctrl.bits.color_mode = src_color_mode; -+ alpha->src_color_ctrl.bits.factor_mode = SRC_FAC_ALPHA_ONE; -+ } else { -+ alpha->src_color_ctrl.bits.color_mode = ALPHA_SRC_PRE_MUL; -+ alpha->src_color_ctrl.bits.factor_mode = SRC_FAC_ALPHA_SRC_GLOBAL; -+ } -+ alpha->src_color_ctrl.bits.glb_alpha = alpha_config->src_glb_alpha_value >> 8; -+ alpha->src_color_ctrl.bits.alpha_mode = ALPHA_STRAIGHT; -+ alpha->src_color_ctrl.bits.alpha_cal_mode = ALPHA_SATURATION; -+ -+ alpha->dst_color_ctrl.bits.alpha_mode = ALPHA_STRAIGHT; -+ alpha->dst_color_ctrl.bits.alpha_cal_mode = ALPHA_SATURATION; -+ alpha->dst_color_ctrl.bits.blend_mode = ALPHA_GLOBAL; -+ alpha->dst_color_ctrl.bits.glb_alpha = alpha_config->dst_glb_alpha_value >> 8; -+ alpha->dst_color_ctrl.bits.color_mode = dst_color_mode; -+ alpha->dst_color_ctrl.bits.factor_mode = ALPHA_SRC_INVERSE; -+ -+ alpha->src_alpha_ctrl.bits.alpha_mode = ALPHA_STRAIGHT; -+ alpha->src_alpha_ctrl.bits.blend_mode = alpha->src_color_ctrl.bits.blend_mode; -+ alpha->src_alpha_ctrl.bits.alpha_cal_mode = ALPHA_SATURATION; -+ alpha->src_alpha_ctrl.bits.factor_mode = ALPHA_ONE; -+ -+ alpha->dst_alpha_ctrl.bits.alpha_mode = ALPHA_STRAIGHT; -+ if (alpha_config->dst_pixel_alpha_en && !dst_glb_alpha_en) -+ alpha->dst_alpha_ctrl.bits.blend_mode = ALPHA_PER_PIX; -+ else -+ alpha->dst_alpha_ctrl.bits.blend_mode = ALPHA_PER_PIX_GLOBAL; -+ alpha->dst_alpha_ctrl.bits.alpha_cal_mode = ALPHA_NO_SATURATION; -+ alpha->dst_alpha_ctrl.bits.factor_mode = ALPHA_SRC_INVERSE; -+} -+ -+static int vop2_find_start_mixer_id_for_vp(struct vop2 *vop2, u8 port_id) -+{ -+ struct vop2_video_port *vp; -+ int used_layer = 0; -+ int i; -+ -+ for (i = 0; i < port_id; i++) { -+ vp = &vop2->vps[i]; -+ used_layer += hweight32(vp->win_mask); -+ } -+ -+ return used_layer; -+} -+ -+static void vop2_setup_cluster_alpha(struct vop2 *vop2, struct vop2_win *main_win) -+{ -+ u32 offset = (main_win->data->phys_id * 0x10); -+ struct vop2_alpha_config alpha_config; -+ struct vop2_alpha alpha; -+ struct drm_plane_state *bottom_win_pstate; -+ bool src_pixel_alpha_en = false; -+ u16 src_glb_alpha_val, dst_glb_alpha_val; -+ bool premulti_en = false; -+ bool swap = false; -+ -+ /* At one win mode, win0 is dst/bottom win, and win1 is a all zero src/top win */ -+ bottom_win_pstate = main_win->base.state; -+ src_glb_alpha_val = 0; -+ dst_glb_alpha_val = main_win->base.state->alpha; -+ -+ if (!bottom_win_pstate->fb) -+ return; -+ -+ alpha_config.src_premulti_en = premulti_en; -+ alpha_config.dst_premulti_en = false; -+ alpha_config.src_pixel_alpha_en = src_pixel_alpha_en; -+ alpha_config.dst_pixel_alpha_en = true; /* alpha value need transfer to next mix */ -+ alpha_config.src_glb_alpha_value = src_glb_alpha_val; -+ alpha_config.dst_glb_alpha_value = dst_glb_alpha_val; -+ vop2_parse_alpha(&alpha_config, &alpha); -+ -+ alpha.src_color_ctrl.bits.src_dst_swap = swap; -+ vop2_writel(vop2, RK3568_CLUSTER0_MIX_SRC_COLOR_CTRL + offset, -+ alpha.src_color_ctrl.val); -+ vop2_writel(vop2, RK3568_CLUSTER0_MIX_DST_COLOR_CTRL + offset, -+ alpha.dst_color_ctrl.val); -+ vop2_writel(vop2, RK3568_CLUSTER0_MIX_SRC_ALPHA_CTRL + offset, -+ alpha.src_alpha_ctrl.val); -+ vop2_writel(vop2, RK3568_CLUSTER0_MIX_DST_ALPHA_CTRL + offset, -+ alpha.dst_alpha_ctrl.val); -+} -+ -+static void vop2_setup_alpha(struct vop2_video_port *vp) -+{ -+ struct vop2 *vop2 = vp->vop2; -+ struct drm_framebuffer *fb; -+ struct vop2_alpha_config alpha_config; -+ struct vop2_alpha alpha; -+ struct drm_plane *plane; -+ int pixel_alpha_en; -+ int premulti_en, gpremulti_en = 0; -+ int mixer_id; -+ u32 offset; -+ bool bottom_layer_alpha_en = false; -+ u32 dst_global_alpha = DRM_BLEND_ALPHA_OPAQUE; -+ -+ mixer_id = vop2_find_start_mixer_id_for_vp(vop2, vp->id); -+ alpha_config.dst_pixel_alpha_en = true; /* alpha value need transfer to next mix */ -+ -+ drm_atomic_crtc_for_each_plane(plane, &vp->crtc) { -+ struct vop2_win *win = to_vop2_win(plane); -+ -+ if (plane->state->normalized_zpos == 0 && -+ !is_opaque(plane->state->alpha) && -+ !vop2_cluster_window(win)) { -+ /* -+ * If bottom layer have global alpha effect [except cluster layer, -+ * because cluster have deal with bottom layer global alpha value -+ * at cluster mix], bottom layer mix need deal with global alpha. -+ */ -+ bottom_layer_alpha_en = true; -+ dst_global_alpha = plane->state->alpha; -+ } -+ } -+ -+ drm_atomic_crtc_for_each_plane(plane, &vp->crtc) { -+ struct vop2_win *win = to_vop2_win(plane); -+ int zpos = plane->state->normalized_zpos; -+ -+ if (plane->state->pixel_blend_mode == DRM_MODE_BLEND_PREMULTI) -+ premulti_en = 1; -+ else -+ premulti_en = 0; -+ -+ plane = &win->base; -+ fb = plane->state->fb; -+ -+ pixel_alpha_en = fb->format->has_alpha; -+ -+ alpha_config.src_premulti_en = premulti_en; -+ -+ if (bottom_layer_alpha_en && zpos == 1) { -+ gpremulti_en = premulti_en; -+ /* Cd = Cs + (1 - As) * Cd * Agd */ -+ alpha_config.dst_premulti_en = false; -+ alpha_config.src_pixel_alpha_en = pixel_alpha_en; -+ alpha_config.src_glb_alpha_value = plane->state->alpha; -+ alpha_config.dst_glb_alpha_value = dst_global_alpha; -+ } else if (vop2_cluster_window(win)) { -+ /* Mix output data only have pixel alpha */ -+ alpha_config.dst_premulti_en = true; -+ alpha_config.src_pixel_alpha_en = true; -+ alpha_config.src_glb_alpha_value = DRM_BLEND_ALPHA_OPAQUE; -+ alpha_config.dst_glb_alpha_value = DRM_BLEND_ALPHA_OPAQUE; -+ } else { -+ /* Cd = Cs + (1 - As) * Cd */ -+ alpha_config.dst_premulti_en = true; -+ alpha_config.src_pixel_alpha_en = pixel_alpha_en; -+ alpha_config.src_glb_alpha_value = plane->state->alpha; -+ alpha_config.dst_glb_alpha_value = DRM_BLEND_ALPHA_OPAQUE; -+ } -+ -+ vop2_parse_alpha(&alpha_config, &alpha); -+ -+ offset = (mixer_id + zpos - 1) * 0x10; -+ vop2_writel(vop2, RK3568_MIX0_SRC_COLOR_CTRL + offset, -+ alpha.src_color_ctrl.val); -+ vop2_writel(vop2, RK3568_MIX0_DST_COLOR_CTRL + offset, -+ alpha.dst_color_ctrl.val); -+ vop2_writel(vop2, RK3568_MIX0_SRC_ALPHA_CTRL + offset, -+ alpha.src_alpha_ctrl.val); -+ vop2_writel(vop2, RK3568_MIX0_DST_ALPHA_CTRL + offset, -+ alpha.dst_alpha_ctrl.val); -+ } -+ -+ if (vp->id == 0) { -+ if (bottom_layer_alpha_en) { -+ /* Transfer pixel alpha to hdr mix */ -+ alpha_config.src_premulti_en = gpremulti_en; -+ alpha_config.dst_premulti_en = true; -+ alpha_config.src_pixel_alpha_en = true; -+ alpha_config.src_glb_alpha_value = DRM_BLEND_ALPHA_OPAQUE; -+ alpha_config.dst_glb_alpha_value = DRM_BLEND_ALPHA_OPAQUE; -+ vop2_parse_alpha(&alpha_config, &alpha); -+ -+ vop2_writel(vop2, RK3568_HDR0_SRC_COLOR_CTRL, -+ alpha.src_color_ctrl.val); -+ vop2_writel(vop2, RK3568_HDR0_DST_COLOR_CTRL, -+ alpha.dst_color_ctrl.val); -+ vop2_writel(vop2, RK3568_HDR0_SRC_ALPHA_CTRL, -+ alpha.src_alpha_ctrl.val); -+ vop2_writel(vop2, RK3568_HDR0_DST_ALPHA_CTRL, -+ alpha.dst_alpha_ctrl.val); -+ } else { -+ vop2_writel(vop2, RK3568_HDR0_SRC_COLOR_CTRL, 0); -+ } -+ } -+} -+ -+static void vop2_setup_layer_mixer(struct vop2_video_port *vp) -+{ -+ struct vop2 *vop2 = vp->vop2; -+ struct drm_plane *plane; -+ u32 layer_sel = 0; -+ u32 port_sel; -+ unsigned int nlayer, ofs; -+ struct drm_display_mode *adjusted_mode; -+ u16 hsync_len; -+ u16 hdisplay; -+ u32 bg_dly; -+ u32 pre_scan_dly; -+ int i; -+ struct vop2_video_port *vp0 = &vop2->vps[0]; -+ struct vop2_video_port *vp1 = &vop2->vps[1]; -+ struct vop2_video_port *vp2 = &vop2->vps[2]; -+ -+ adjusted_mode = &vp->crtc.state->adjusted_mode; -+ hsync_len = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start; -+ hdisplay = adjusted_mode->crtc_hdisplay; -+ -+ bg_dly = vp->data->pre_scan_max_dly[3]; -+ vop2_writel(vop2, RK3568_VP_BG_MIX_CTRL(vp->id), -+ FIELD_PREP(RK3568_VP_BG_MIX_CTRL__BG_DLY, bg_dly)); -+ -+ pre_scan_dly = ((bg_dly + (hdisplay >> 1) - 1) << 16) | hsync_len; -+ vop2_vp_write(vp, RK3568_VP_PRE_SCAN_HTIMING, pre_scan_dly); -+ -+ vop2_writel(vop2, RK3568_OVL_CTRL, 0); -+ port_sel = vop2_readl(vop2, RK3568_OVL_PORT_SEL); -+ port_sel &= RK3568_OVL_PORT_SEL__SEL_PORT; -+ -+ if (vp0->nlayers) -+ port_sel |= FIELD_PREP(RK3568_OVL_PORT_SET__PORT0_MUX, -+ vp0->nlayers - 1); -+ else -+ port_sel |= FIELD_PREP(RK3568_OVL_PORT_SET__PORT0_MUX, 8); -+ -+ if (vp1->nlayers) -+ port_sel |= FIELD_PREP(RK3568_OVL_PORT_SET__PORT1_MUX, -+ (vp0->nlayers + vp1->nlayers - 1)); -+ else -+ port_sel |= FIELD_PREP(RK3568_OVL_PORT_SET__PORT1_MUX, 8); -+ -+ if (vp2->nlayers) -+ port_sel |= FIELD_PREP(RK3568_OVL_PORT_SET__PORT2_MUX, -+ (vp2->nlayers + vp1->nlayers + vp0->nlayers - 1)); -+ else -+ port_sel |= FIELD_PREP(RK3568_OVL_PORT_SET__PORT1_MUX, 8); -+ -+ layer_sel = vop2_readl(vop2, RK3568_OVL_LAYER_SEL); -+ -+ ofs = 0; -+ for (i = 0; i < vp->id; i++) -+ ofs += vop2->vps[i].nlayers; -+ -+ nlayer = 0; -+ drm_atomic_crtc_for_each_plane(plane, &vp->crtc) { -+ struct vop2_win *win = to_vop2_win(plane); -+ -+ switch (win->data->phys_id) { -+ case ROCKCHIP_VOP2_CLUSTER0: -+ port_sel &= ~RK3568_OVL_PORT_SEL__CLUSTER0; -+ port_sel |= FIELD_PREP(RK3568_OVL_PORT_SEL__CLUSTER0, vp->id); -+ break; -+ case ROCKCHIP_VOP2_CLUSTER1: -+ port_sel &= ~RK3568_OVL_PORT_SEL__CLUSTER1; -+ port_sel |= FIELD_PREP(RK3568_OVL_PORT_SEL__CLUSTER1, vp->id); -+ break; -+ case ROCKCHIP_VOP2_ESMART0: -+ port_sel &= ~RK3568_OVL_PORT_SEL__ESMART0; -+ port_sel |= FIELD_PREP(RK3568_OVL_PORT_SEL__ESMART0, vp->id); -+ break; -+ case ROCKCHIP_VOP2_ESMART1: -+ port_sel &= ~RK3568_OVL_PORT_SEL__ESMART1; -+ port_sel |= FIELD_PREP(RK3568_OVL_PORT_SEL__ESMART1, vp->id); -+ break; -+ case ROCKCHIP_VOP2_SMART0: -+ port_sel &= ~RK3568_OVL_PORT_SEL__SMART0; -+ port_sel |= FIELD_PREP(RK3568_OVL_PORT_SEL__SMART0, vp->id); -+ break; -+ case ROCKCHIP_VOP2_SMART1: -+ port_sel &= ~RK3568_OVL_PORT_SEL__SMART1; -+ port_sel |= FIELD_PREP(RK3568_OVL_PORT_SEL__SMART1, vp->id); -+ break; -+ } -+ -+ layer_sel &= ~RK3568_OVL_LAYER_SEL__LAYER(plane->state->normalized_zpos + ofs, -+ 0x7); -+ layer_sel |= RK3568_OVL_LAYER_SEL__LAYER(plane->state->normalized_zpos + ofs, -+ win->data->layer_sel_id); -+ nlayer++; -+ } -+ -+ /* configure unused layers to 0x5 (reserved) */ -+ for (; nlayer < vp->nlayers; nlayer++) { -+ layer_sel &= ~RK3568_OVL_LAYER_SEL__LAYER(nlayer + ofs, 0x7); -+ layer_sel |= RK3568_OVL_LAYER_SEL__LAYER(nlayer + ofs, 5); -+ } -+ -+ vop2_writel(vop2, RK3568_OVL_LAYER_SEL, layer_sel); -+ vop2_writel(vop2, RK3568_OVL_PORT_SEL, port_sel); -+ vop2_writel(vop2, RK3568_OVL_CTRL, RK3568_OVL_CTRL__LAYERSEL_REGDONE_IMD); -+} -+ -+static void vop2_setup_dly_for_windows(struct vop2 *vop2) -+{ -+ struct vop2_win *win; -+ int i = 0; -+ u32 cdly = 0, sdly = 0; -+ -+ for (i = 0; i < vop2->data->win_size; i++) { -+ u32 dly; -+ -+ win = &vop2->win[i]; -+ dly = win->delay; -+ -+ switch (win->data->phys_id) { -+ case ROCKCHIP_VOP2_CLUSTER0: -+ cdly |= FIELD_PREP(RK3568_CLUSTER_DLY_NUM__CLUSTER0_0, dly); -+ cdly |= FIELD_PREP(RK3568_CLUSTER_DLY_NUM__CLUSTER0_1, dly); -+ break; -+ case ROCKCHIP_VOP2_CLUSTER1: -+ cdly |= FIELD_PREP(RK3568_CLUSTER_DLY_NUM__CLUSTER1_0, dly); -+ cdly |= FIELD_PREP(RK3568_CLUSTER_DLY_NUM__CLUSTER1_1, dly); -+ break; -+ case ROCKCHIP_VOP2_ESMART0: -+ sdly |= FIELD_PREP(RK3568_SMART_DLY_NUM__ESMART0, dly); -+ break; -+ case ROCKCHIP_VOP2_ESMART1: -+ sdly |= FIELD_PREP(RK3568_SMART_DLY_NUM__ESMART1, dly); -+ break; -+ case ROCKCHIP_VOP2_SMART0: -+ sdly |= FIELD_PREP(RK3568_SMART_DLY_NUM__SMART0, dly); -+ break; -+ case ROCKCHIP_VOP2_SMART1: -+ sdly |= FIELD_PREP(RK3568_SMART_DLY_NUM__SMART1, dly); -+ break; -+ } -+ } -+ -+ vop2_writel(vop2, RK3568_CLUSTER_DLY_NUM, cdly); -+ vop2_writel(vop2, RK3568_SMART_DLY_NUM, sdly); -+} -+ -+static void vop2_crtc_atomic_begin(struct drm_crtc *crtc, -+ struct drm_atomic_state *state) -+{ -+ struct vop2_video_port *vp = to_vop2_video_port(crtc); -+ struct vop2 *vop2 = vp->vop2; -+ struct drm_plane *plane; -+ -+ vp->win_mask = 0; -+ -+ drm_atomic_crtc_for_each_plane(plane, crtc) { -+ struct vop2_win *win = to_vop2_win(plane); -+ -+ win->delay = win->data->dly[VOP2_DLY_MODE_DEFAULT]; -+ -+ vp->win_mask |= BIT(win->data->phys_id); -+ -+ if (vop2_cluster_window(win)) -+ vop2_setup_cluster_alpha(vop2, win); -+ } -+ -+ if (!vp->win_mask) -+ return; -+ -+ vop2_setup_layer_mixer(vp); -+ vop2_setup_alpha(vp); -+ vop2_setup_dly_for_windows(vop2); -+} -+ -+static void vop2_crtc_atomic_flush(struct drm_crtc *crtc, -+ struct drm_atomic_state *state) -+{ -+ struct vop2_video_port *vp = to_vop2_video_port(crtc); -+ -+ vop2_post_config(crtc); -+ -+ vop2_cfg_done(vp); -+ -+ spin_lock_irq(&crtc->dev->event_lock); -+ -+ if (crtc->state->event) { -+ WARN_ON(drm_crtc_vblank_get(crtc)); -+ vp->event = crtc->state->event; -+ crtc->state->event = NULL; -+ } -+ -+ spin_unlock_irq(&crtc->dev->event_lock); -+} -+ -+static const struct drm_crtc_helper_funcs vop2_crtc_helper_funcs = { -+ .mode_fixup = vop2_crtc_mode_fixup, -+ .atomic_check = vop2_crtc_atomic_check, -+ .atomic_begin = vop2_crtc_atomic_begin, -+ .atomic_flush = vop2_crtc_atomic_flush, -+ .atomic_enable = vop2_crtc_atomic_enable, -+ .atomic_disable = vop2_crtc_atomic_disable, -+}; -+ -+static void vop2_crtc_reset(struct drm_crtc *crtc) -+{ -+ struct rockchip_crtc_state *vcstate = to_rockchip_crtc_state(crtc->state); -+ -+ if (crtc->state) { -+ __drm_atomic_helper_crtc_destroy_state(crtc->state); -+ kfree(vcstate); -+ } -+ -+ vcstate = kzalloc(sizeof(*vcstate), GFP_KERNEL); -+ if (!vcstate) -+ return; -+ -+ crtc->state = &vcstate->base; -+ crtc->state->crtc = crtc; -+} -+ -+static struct drm_crtc_state *vop2_crtc_duplicate_state(struct drm_crtc *crtc) -+{ -+ struct rockchip_crtc_state *vcstate, *old_vcstate; -+ -+ old_vcstate = to_rockchip_crtc_state(crtc->state); -+ -+ vcstate = kmemdup(old_vcstate, sizeof(*old_vcstate), GFP_KERNEL); -+ if (!vcstate) -+ return NULL; -+ -+ __drm_atomic_helper_crtc_duplicate_state(crtc, &vcstate->base); -+ -+ return &vcstate->base; -+} -+ -+static void vop2_crtc_destroy_state(struct drm_crtc *crtc, -+ struct drm_crtc_state *state) -+{ -+ struct rockchip_crtc_state *vcstate = to_rockchip_crtc_state(state); -+ -+ __drm_atomic_helper_crtc_destroy_state(&vcstate->base); -+ kfree(vcstate); -+} -+ -+static const struct drm_crtc_funcs vop2_crtc_funcs = { -+ .set_config = drm_atomic_helper_set_config, -+ .page_flip = drm_atomic_helper_page_flip, -+ .destroy = drm_crtc_cleanup, -+ .reset = vop2_crtc_reset, -+ .atomic_duplicate_state = vop2_crtc_duplicate_state, -+ .atomic_destroy_state = vop2_crtc_destroy_state, -+ .enable_vblank = vop2_crtc_enable_vblank, -+ .disable_vblank = vop2_crtc_disable_vblank, -+}; -+ -+static irqreturn_t vop2_isr(int irq, void *data) -+{ -+ struct vop2 *vop2 = data; -+ const struct vop2_data *vop2_data = vop2->data; -+ u32 axi_irqs[VOP2_SYS_AXI_BUS_NUM]; -+ int ret = IRQ_NONE; -+ int i; -+ -+ /* -+ * The irq is shared with the iommu. If the runtime-pm state of the -+ * vop2-device is disabled the irq has to be targeted at the iommu. -+ */ -+ if (!pm_runtime_get_if_in_use(vop2->dev)) -+ return IRQ_NONE; -+ -+ for (i = 0; i < vop2_data->nr_vps; i++) { -+ struct vop2_video_port *vp = &vop2->vps[i]; -+ struct drm_crtc *crtc = &vp->crtc; -+ u32 irqs; -+ -+ irqs = vop2_readl(vop2, RK3568_VP_INT_STATUS(vp->id)); -+ vop2_writel(vop2, RK3568_VP_INT_CLR(vp->id), irqs << 16 | irqs); -+ -+ if (irqs & VP_INT_DSP_HOLD_VALID) { -+ complete(&vp->dsp_hold_completion); -+ ret = IRQ_HANDLED; -+ } -+ -+ if (irqs & VP_INT_FS_FIELD) { -+ drm_crtc_handle_vblank(crtc); -+ spin_lock(&crtc->dev->event_lock); -+ if (vp->event) { -+ u32 val = vop2_readl(vop2, RK3568_REG_CFG_DONE); -+ -+ if (!(val & BIT(vp->id))) { -+ drm_crtc_send_vblank_event(crtc, vp->event); -+ vp->event = NULL; -+ drm_crtc_vblank_put(crtc); -+ } -+ } -+ spin_unlock(&crtc->dev->event_lock); -+ -+ ret = IRQ_HANDLED; -+ } -+ -+ if (irqs & VP_INT_POST_BUF_EMPTY) { -+ drm_err_ratelimited(vop2->drm, -+ "POST_BUF_EMPTY irq err at vp%d\n", -+ vp->id); -+ ret = IRQ_HANDLED; -+ } -+ } -+ -+ axi_irqs[0] = vop2_readl(vop2, RK3568_SYS0_INT_STATUS); -+ vop2_writel(vop2, RK3568_SYS0_INT_CLR, axi_irqs[0] << 16 | axi_irqs[0]); -+ axi_irqs[1] = vop2_readl(vop2, RK3568_SYS1_INT_STATUS); -+ vop2_writel(vop2, RK3568_SYS1_INT_CLR, axi_irqs[1] << 16 | axi_irqs[1]); -+ -+ for (i = 0; i < ARRAY_SIZE(axi_irqs); i++) { -+ if (axi_irqs[i] & VOP2_INT_BUS_ERRPR) { -+ drm_err_ratelimited(vop2->drm, "BUS_ERROR irq err\n"); -+ ret = IRQ_HANDLED; -+ } -+ } -+ -+ pm_runtime_put(vop2->dev); -+ -+ return ret; -+} -+ -+static int vop2_plane_init(struct vop2 *vop2, struct vop2_win *win, -+ unsigned long possible_crtcs) -+{ -+ const struct vop2_win_data *win_data = win->data; -+ unsigned int blend_caps = BIT(DRM_MODE_BLEND_PIXEL_NONE) | -+ BIT(DRM_MODE_BLEND_PREMULTI) | -+ BIT(DRM_MODE_BLEND_COVERAGE); -+ int ret; -+ -+ ret = drm_universal_plane_init(vop2->drm, &win->base, possible_crtcs, -+ &vop2_plane_funcs, win_data->formats, -+ win_data->nformats, -+ win_data->format_modifiers, -+ win->type, win_data->name); -+ if (ret) { -+ drm_err(vop2->drm, "failed to initialize plane %d\n", ret); -+ return ret; -+ } -+ -+ drm_plane_helper_add(&win->base, &vop2_plane_helper_funcs); -+ -+ if (win->data->supported_rotations) -+ drm_plane_create_rotation_property(&win->base, DRM_MODE_ROTATE_0, -+ DRM_MODE_ROTATE_0 | -+ win->data->supported_rotations); -+ drm_plane_create_alpha_property(&win->base); -+ drm_plane_create_blend_mode_property(&win->base, blend_caps); -+ drm_plane_create_zpos_property(&win->base, win->win_id, 0, -+ vop2->registered_num_wins - 1); -+ -+ return 0; -+} -+ -+static struct vop2_video_port *find_vp_without_primary(struct vop2 *vop2) -+{ -+ int i; -+ -+ for (i = 0; i < vop2->data->nr_vps; i++) { -+ struct vop2_video_port *vp = &vop2->vps[i]; -+ -+ if (!vp->crtc.port) -+ continue; -+ if (vp->primary_plane) -+ continue; -+ -+ return vp; -+ } -+ -+ return NULL; -+} -+ -+#define NR_LAYERS 6 -+ -+static int vop2_create_crtc(struct vop2 *vop2) -+{ -+ const struct vop2_data *vop2_data = vop2->data; -+ struct drm_device *drm = vop2->drm; -+ struct device *dev = vop2->dev; -+ struct drm_plane *plane; -+ struct device_node *port; -+ struct vop2_video_port *vp; -+ int i, nvp, nvps = 0; -+ int ret; -+ -+ for (i = 0; i < vop2_data->nr_vps; i++) { -+ const struct vop2_video_port_data *vp_data; -+ struct device_node *np; -+ char dclk_name[9]; -+ -+ vp_data = &vop2_data->vp[i]; -+ vp = &vop2->vps[i]; -+ vp->vop2 = vop2; -+ vp->id = vp_data->id; -+ vp->regs = vp_data->regs; -+ vp->data = vp_data; -+ -+ snprintf(dclk_name, sizeof(dclk_name), "dclk_vp%d", vp->id); -+ vp->dclk = devm_clk_get(vop2->dev, dclk_name); -+ if (IS_ERR(vp->dclk)) { -+ drm_err(vop2->drm, "failed to get %s\n", dclk_name); -+ return PTR_ERR(vp->dclk); -+ } -+ -+ np = of_graph_get_remote_node(dev->of_node, i, -1); -+ if (!np) { -+ drm_dbg(vop2->drm, "%s: No remote for vp%d\n", __func__, i); -+ continue; -+ } -+ of_node_put(np); -+ -+ port = of_graph_get_port_by_id(dev->of_node, i); -+ if (!port) { -+ drm_err(vop2->drm, "no port node found for video_port%d\n", i); -+ return -ENOENT; -+ } -+ -+ vp->crtc.port = port; -+ nvps++; -+ } -+ -+ nvp = 0; -+ for (i = 0; i < vop2->registered_num_wins; i++) { -+ struct vop2_win *win = &vop2->win[i]; -+ u32 possible_crtcs; -+ -+ if (vop2->data->soc_id == 3566) { -+ /* -+ * On RK3566 these windows don't have an independent -+ * framebuffer. They share the framebuffer with smart0, -+ * esmart0 and cluster0 respectively. -+ */ -+ switch (win->data->phys_id) { -+ case ROCKCHIP_VOP2_SMART1: -+ case ROCKCHIP_VOP2_ESMART1: -+ case ROCKCHIP_VOP2_CLUSTER1: -+ continue; -+ } -+ } -+ -+ if (win->type == DRM_PLANE_TYPE_PRIMARY) { -+ vp = find_vp_without_primary(vop2); -+ if (vp) { -+ possible_crtcs = BIT(nvp); -+ vp->primary_plane = win; -+ nvp++; -+ } else { -+ /* change the unused primary window to overlay window */ -+ win->type = DRM_PLANE_TYPE_OVERLAY; -+ } -+ } -+ -+ if (win->type == DRM_PLANE_TYPE_OVERLAY) -+ possible_crtcs = (1 << nvps) - 1; -+ -+ ret = vop2_plane_init(vop2, win, possible_crtcs); -+ if (ret) { -+ drm_err(vop2->drm, "failed to init plane %s: %d\n", -+ win->data->name, ret); -+ return ret; -+ } -+ } -+ -+ for (i = 0; i < vop2_data->nr_vps; i++) { -+ vp = &vop2->vps[i]; -+ -+ if (!vp->crtc.port) -+ continue; -+ -+ plane = &vp->primary_plane->base; -+ -+ ret = drm_crtc_init_with_planes(drm, &vp->crtc, plane, NULL, -+ &vop2_crtc_funcs, -+ "video_port%d", vp->id); -+ if (ret) { -+ drm_err(vop2->drm, "crtc init for video_port%d failed\n", i); -+ return ret; -+ } -+ -+ drm_crtc_helper_add(&vp->crtc, &vop2_crtc_helper_funcs); -+ -+ init_completion(&vp->dsp_hold_completion); -+ } -+ -+ /* -+ * On the VOP2 it's very hard to change the number of layers on a VP -+ * during runtime, so we distribute the layers equally over the used -+ * VPs -+ */ -+ for (i = 0; i < vop2->data->nr_vps; i++) { -+ struct vop2_video_port *vp = &vop2->vps[i]; -+ -+ if (vp->crtc.port) -+ vp->nlayers = NR_LAYERS / nvps; -+ } -+ -+ return 0; -+} -+ -+static void vop2_destroy_crtc(struct drm_crtc *crtc) -+{ -+ of_node_put(crtc->port); -+ -+ /* -+ * Destroy CRTC after vop2_plane_destroy() since vop2_disable_plane() -+ * references the CRTC. -+ */ -+ drm_crtc_cleanup(crtc); -+} -+ -+static struct reg_field vop2_cluster_regs[VOP2_WIN_MAX_REG] = { -+ [VOP2_WIN_ENABLE] = REG_FIELD(RK3568_CLUSTER_WIN_CTRL0, 0, 0), -+ [VOP2_WIN_FORMAT] = REG_FIELD(RK3568_CLUSTER_WIN_CTRL0, 1, 5), -+ [VOP2_WIN_RB_SWAP] = REG_FIELD(RK3568_CLUSTER_WIN_CTRL0, 14, 14), -+ [VOP2_WIN_DITHER_UP] = REG_FIELD(RK3568_CLUSTER_WIN_CTRL0, 18, 18), -+ [VOP2_WIN_ACT_INFO] = REG_FIELD(RK3568_CLUSTER_WIN_ACT_INFO, 0, 31), -+ [VOP2_WIN_DSP_INFO] = REG_FIELD(RK3568_CLUSTER_WIN_DSP_INFO, 0, 31), -+ [VOP2_WIN_DSP_ST] = REG_FIELD(RK3568_CLUSTER_WIN_DSP_ST, 0, 31), -+ [VOP2_WIN_YRGB_MST] = REG_FIELD(RK3568_CLUSTER_WIN_YRGB_MST, 0, 31), -+ [VOP2_WIN_UV_MST] = REG_FIELD(RK3568_CLUSTER_WIN_CBR_MST, 0, 31), -+ [VOP2_WIN_YUV_CLIP] = REG_FIELD(RK3568_CLUSTER_WIN_CTRL0, 19, 19), -+ [VOP2_WIN_YRGB_VIR] = REG_FIELD(RK3568_CLUSTER_WIN_VIR, 0, 15), -+ [VOP2_WIN_UV_VIR] = REG_FIELD(RK3568_CLUSTER_WIN_VIR, 16, 31), -+ [VOP2_WIN_Y2R_EN] = REG_FIELD(RK3568_CLUSTER_WIN_CTRL0, 8, 8), -+ [VOP2_WIN_R2Y_EN] = REG_FIELD(RK3568_CLUSTER_WIN_CTRL0, 9, 9), -+ [VOP2_WIN_CSC_MODE] = REG_FIELD(RK3568_CLUSTER_WIN_CTRL0, 10, 11), -+ -+ /* Scale */ -+ [VOP2_WIN_SCALE_YRGB_X] = REG_FIELD(RK3568_CLUSTER_WIN_SCL_FACTOR_YRGB, 0, 15), -+ [VOP2_WIN_SCALE_YRGB_Y] = REG_FIELD(RK3568_CLUSTER_WIN_SCL_FACTOR_YRGB, 16, 31), -+ [VOP2_WIN_YRGB_VER_SCL_MODE] = REG_FIELD(RK3568_CLUSTER_WIN_CTRL1, 14, 15), -+ [VOP2_WIN_YRGB_HOR_SCL_MODE] = REG_FIELD(RK3568_CLUSTER_WIN_CTRL1, 12, 13), -+ [VOP2_WIN_BIC_COE_SEL] = REG_FIELD(RK3568_CLUSTER_WIN_CTRL1, 2, 3), -+ [VOP2_WIN_VSD_YRGB_GT2] = REG_FIELD(RK3568_CLUSTER_WIN_CTRL1, 28, 28), -+ [VOP2_WIN_VSD_YRGB_GT4] = REG_FIELD(RK3568_CLUSTER_WIN_CTRL1, 29, 29), -+ -+ /* cluster regs */ -+ [VOP2_WIN_AFBC_ENABLE] = REG_FIELD(RK3568_CLUSTER_CTRL, 1, 1), -+ [VOP2_WIN_CLUSTER_ENABLE] = REG_FIELD(RK3568_CLUSTER_CTRL, 0, 0), -+ [VOP2_WIN_CLUSTER_LB_MODE] = REG_FIELD(RK3568_CLUSTER_CTRL, 4, 7), -+ -+ /* afbc regs */ -+ [VOP2_WIN_AFBC_FORMAT] = REG_FIELD(RK3568_CLUSTER_WIN_AFBCD_CTRL, 2, 6), -+ [VOP2_WIN_AFBC_RB_SWAP] = REG_FIELD(RK3568_CLUSTER_WIN_AFBCD_CTRL, 9, 9), -+ [VOP2_WIN_AFBC_UV_SWAP] = REG_FIELD(RK3568_CLUSTER_WIN_AFBCD_CTRL, 10, 10), -+ [VOP2_WIN_AFBC_AUTO_GATING_EN] = REG_FIELD(RK3568_CLUSTER_WIN_AFBCD_OUTPUT_CTRL, 4, 4), -+ [VOP2_WIN_AFBC_HALF_BLOCK_EN] = REG_FIELD(RK3568_CLUSTER_WIN_AFBCD_CTRL, 7, 7), -+ [VOP2_WIN_AFBC_BLOCK_SPLIT_EN] = REG_FIELD(RK3568_CLUSTER_WIN_AFBCD_CTRL, 8, 8), -+ [VOP2_WIN_AFBC_HDR_PTR] = REG_FIELD(RK3568_CLUSTER_WIN_AFBCD_HDR_PTR, 0, 31), -+ [VOP2_WIN_AFBC_PIC_SIZE] = REG_FIELD(RK3568_CLUSTER_WIN_AFBCD_PIC_SIZE, 0, 31), -+ [VOP2_WIN_AFBC_PIC_VIR_WIDTH] = REG_FIELD(RK3568_CLUSTER_WIN_AFBCD_VIR_WIDTH, 0, 15), -+ [VOP2_WIN_AFBC_TILE_NUM] = REG_FIELD(RK3568_CLUSTER_WIN_AFBCD_VIR_WIDTH, 16, 31), -+ [VOP2_WIN_AFBC_PIC_OFFSET] = REG_FIELD(RK3568_CLUSTER_WIN_AFBCD_PIC_OFFSET, 0, 31), -+ [VOP2_WIN_AFBC_DSP_OFFSET] = REG_FIELD(RK3568_CLUSTER_WIN_AFBCD_DSP_OFFSET, 0, 31), -+ [VOP2_WIN_AFBC_TRANSFORM_OFFSET] = REG_FIELD(RK3568_CLUSTER_WIN_AFBCD_TRANSFORM_OFFSET, 0, 31), -+ [VOP2_WIN_AFBC_ROTATE_90] = REG_FIELD(RK3568_CLUSTER_WIN_AFBCD_ROTATE_MODE, 0, 0), -+ [VOP2_WIN_AFBC_ROTATE_270] = REG_FIELD(RK3568_CLUSTER_WIN_AFBCD_ROTATE_MODE, 1, 1), -+ [VOP2_WIN_XMIRROR] = REG_FIELD(RK3568_CLUSTER_WIN_AFBCD_ROTATE_MODE, 2, 2), -+ [VOP2_WIN_YMIRROR] = REG_FIELD(RK3568_CLUSTER_WIN_AFBCD_ROTATE_MODE, 3, 3), -+ [VOP2_WIN_UV_SWAP] = { .reg = 0xffffffff }, -+ [VOP2_WIN_COLOR_KEY] = { .reg = 0xffffffff }, -+ [VOP2_WIN_COLOR_KEY_EN] = { .reg = 0xffffffff }, -+ [VOP2_WIN_SCALE_CBCR_X] = { .reg = 0xffffffff }, -+ [VOP2_WIN_SCALE_CBCR_Y] = { .reg = 0xffffffff }, -+ [VOP2_WIN_YRGB_HSCL_FILTER_MODE] = { .reg = 0xffffffff }, -+ [VOP2_WIN_YRGB_VSCL_FILTER_MODE] = { .reg = 0xffffffff }, -+ [VOP2_WIN_CBCR_VER_SCL_MODE] = { .reg = 0xffffffff }, -+ [VOP2_WIN_CBCR_HSCL_FILTER_MODE] = { .reg = 0xffffffff }, -+ [VOP2_WIN_CBCR_HOR_SCL_MODE] = { .reg = 0xffffffff }, -+ [VOP2_WIN_CBCR_VSCL_FILTER_MODE] = { .reg = 0xffffffff }, -+ [VOP2_WIN_VSD_CBCR_GT2] = { .reg = 0xffffffff }, -+ [VOP2_WIN_VSD_CBCR_GT4] = { .reg = 0xffffffff }, -+}; -+ -+static int vop2_cluster_init(struct vop2_win *win) -+{ -+ struct vop2 *vop2 = win->vop2; -+ struct reg_field *cluster_regs; -+ int ret, i; -+ -+ cluster_regs = kmemdup(vop2_cluster_regs, sizeof(vop2_cluster_regs), -+ GFP_KERNEL); -+ if (!cluster_regs) -+ return -ENOMEM; -+ -+ for (i = 0; i < ARRAY_SIZE(vop2_cluster_regs); i++) -+ if (cluster_regs[i].reg != 0xffffffff) -+ cluster_regs[i].reg += win->offset; -+ -+ ret = devm_regmap_field_bulk_alloc(vop2->dev, vop2->map, win->reg, -+ cluster_regs, -+ ARRAY_SIZE(vop2_cluster_regs)); -+ -+ kfree(cluster_regs); -+ -+ return ret; -+}; -+ -+static struct reg_field vop2_esmart_regs[VOP2_WIN_MAX_REG] = { -+ [VOP2_WIN_ENABLE] = REG_FIELD(RK3568_SMART_REGION0_CTRL, 0, 0), -+ [VOP2_WIN_FORMAT] = REG_FIELD(RK3568_SMART_REGION0_CTRL, 1, 5), -+ [VOP2_WIN_DITHER_UP] = REG_FIELD(RK3568_SMART_REGION0_CTRL, 12, 12), -+ [VOP2_WIN_RB_SWAP] = REG_FIELD(RK3568_SMART_REGION0_CTRL, 14, 14), -+ [VOP2_WIN_UV_SWAP] = REG_FIELD(RK3568_SMART_REGION0_CTRL, 16, 16), -+ [VOP2_WIN_ACT_INFO] = REG_FIELD(RK3568_SMART_REGION0_ACT_INFO, 0, 31), -+ [VOP2_WIN_DSP_INFO] = REG_FIELD(RK3568_SMART_REGION0_DSP_INFO, 0, 31), -+ [VOP2_WIN_DSP_ST] = REG_FIELD(RK3568_SMART_REGION0_DSP_ST, 0, 28), -+ [VOP2_WIN_YRGB_MST] = REG_FIELD(RK3568_SMART_REGION0_YRGB_MST, 0, 31), -+ [VOP2_WIN_UV_MST] = REG_FIELD(RK3568_SMART_REGION0_CBR_MST, 0, 31), -+ [VOP2_WIN_YUV_CLIP] = REG_FIELD(RK3568_SMART_REGION0_CTRL, 17, 17), -+ [VOP2_WIN_YRGB_VIR] = REG_FIELD(RK3568_SMART_REGION0_VIR, 0, 15), -+ [VOP2_WIN_UV_VIR] = REG_FIELD(RK3568_SMART_REGION0_VIR, 16, 31), -+ [VOP2_WIN_Y2R_EN] = REG_FIELD(RK3568_SMART_CTRL0, 0, 0), -+ [VOP2_WIN_R2Y_EN] = REG_FIELD(RK3568_SMART_CTRL0, 1, 1), -+ [VOP2_WIN_CSC_MODE] = REG_FIELD(RK3568_SMART_CTRL0, 2, 3), -+ [VOP2_WIN_YMIRROR] = REG_FIELD(RK3568_SMART_CTRL1, 31, 31), -+ [VOP2_WIN_COLOR_KEY] = REG_FIELD(RK3568_SMART_COLOR_KEY_CTRL, 0, 29), -+ [VOP2_WIN_COLOR_KEY_EN] = REG_FIELD(RK3568_SMART_COLOR_KEY_CTRL, 31, 31), -+ -+ /* Scale */ -+ [VOP2_WIN_SCALE_YRGB_X] = REG_FIELD(RK3568_SMART_REGION0_SCL_FACTOR_YRGB, 0, 15), -+ [VOP2_WIN_SCALE_YRGB_Y] = REG_FIELD(RK3568_SMART_REGION0_SCL_FACTOR_YRGB, 16, 31), -+ [VOP2_WIN_SCALE_CBCR_X] = REG_FIELD(RK3568_SMART_REGION0_SCL_FACTOR_CBR, 0, 15), -+ [VOP2_WIN_SCALE_CBCR_Y] = REG_FIELD(RK3568_SMART_REGION0_SCL_FACTOR_CBR, 16, 31), -+ [VOP2_WIN_YRGB_HOR_SCL_MODE] = REG_FIELD(RK3568_SMART_REGION0_SCL_CTRL, 0, 1), -+ [VOP2_WIN_YRGB_HSCL_FILTER_MODE] = REG_FIELD(RK3568_SMART_REGION0_SCL_CTRL, 2, 3), -+ [VOP2_WIN_YRGB_VER_SCL_MODE] = REG_FIELD(RK3568_SMART_REGION0_SCL_CTRL, 4, 5), -+ [VOP2_WIN_YRGB_VSCL_FILTER_MODE] = REG_FIELD(RK3568_SMART_REGION0_SCL_CTRL, 6, 7), -+ [VOP2_WIN_CBCR_HOR_SCL_MODE] = REG_FIELD(RK3568_SMART_REGION0_SCL_CTRL, 8, 9), -+ [VOP2_WIN_CBCR_HSCL_FILTER_MODE] = REG_FIELD(RK3568_SMART_REGION0_SCL_CTRL, 10, 11), -+ [VOP2_WIN_CBCR_VER_SCL_MODE] = REG_FIELD(RK3568_SMART_REGION0_SCL_CTRL, 12, 13), -+ [VOP2_WIN_CBCR_VSCL_FILTER_MODE] = REG_FIELD(RK3568_SMART_REGION0_SCL_CTRL, 14, 15), -+ [VOP2_WIN_BIC_COE_SEL] = REG_FIELD(RK3568_SMART_REGION0_SCL_CTRL, 16, 17), -+ [VOP2_WIN_VSD_YRGB_GT2] = REG_FIELD(RK3568_SMART_REGION0_CTRL, 8, 8), -+ [VOP2_WIN_VSD_YRGB_GT4] = REG_FIELD(RK3568_SMART_REGION0_CTRL, 9, 9), -+ [VOP2_WIN_VSD_CBCR_GT2] = REG_FIELD(RK3568_SMART_REGION0_CTRL, 10, 10), -+ [VOP2_WIN_VSD_CBCR_GT4] = REG_FIELD(RK3568_SMART_REGION0_CTRL, 11, 11), -+ [VOP2_WIN_XMIRROR] = { .reg = 0xffffffff }, -+ [VOP2_WIN_CLUSTER_ENABLE] = { .reg = 0xffffffff }, -+ [VOP2_WIN_AFBC_ENABLE] = { .reg = 0xffffffff }, -+ [VOP2_WIN_CLUSTER_LB_MODE] = { .reg = 0xffffffff }, -+ [VOP2_WIN_AFBC_FORMAT] = { .reg = 0xffffffff }, -+ [VOP2_WIN_AFBC_RB_SWAP] = { .reg = 0xffffffff }, -+ [VOP2_WIN_AFBC_UV_SWAP] = { .reg = 0xffffffff }, -+ [VOP2_WIN_AFBC_AUTO_GATING_EN] = { .reg = 0xffffffff }, -+ [VOP2_WIN_AFBC_BLOCK_SPLIT_EN] = { .reg = 0xffffffff }, -+ [VOP2_WIN_AFBC_PIC_VIR_WIDTH] = { .reg = 0xffffffff }, -+ [VOP2_WIN_AFBC_TILE_NUM] = { .reg = 0xffffffff }, -+ [VOP2_WIN_AFBC_PIC_OFFSET] = { .reg = 0xffffffff }, -+ [VOP2_WIN_AFBC_PIC_SIZE] = { .reg = 0xffffffff }, -+ [VOP2_WIN_AFBC_DSP_OFFSET] = { .reg = 0xffffffff }, -+ [VOP2_WIN_AFBC_TRANSFORM_OFFSET] = { .reg = 0xffffffff }, -+ [VOP2_WIN_AFBC_HDR_PTR] = { .reg = 0xffffffff }, -+ [VOP2_WIN_AFBC_HALF_BLOCK_EN] = { .reg = 0xffffffff }, -+ [VOP2_WIN_AFBC_ROTATE_270] = { .reg = 0xffffffff }, -+ [VOP2_WIN_AFBC_ROTATE_90] = { .reg = 0xffffffff }, -+}; -+ -+static int vop2_esmart_init(struct vop2_win *win) -+{ -+ struct vop2 *vop2 = win->vop2; -+ struct reg_field *esmart_regs; -+ int ret, i; -+ -+ esmart_regs = kmemdup(vop2_esmart_regs, sizeof(vop2_esmart_regs), -+ GFP_KERNEL); -+ if (!esmart_regs) -+ return -ENOMEM; -+ -+ for (i = 0; i < ARRAY_SIZE(vop2_esmart_regs); i++) -+ if (esmart_regs[i].reg != 0xffffffff) -+ esmart_regs[i].reg += win->offset; -+ -+ ret = devm_regmap_field_bulk_alloc(vop2->dev, vop2->map, win->reg, -+ esmart_regs, -+ ARRAY_SIZE(vop2_esmart_regs)); -+ -+ kfree(esmart_regs); -+ -+ return ret; -+}; -+ -+static int vop2_win_init(struct vop2 *vop2) -+{ -+ const struct vop2_data *vop2_data = vop2->data; -+ struct vop2_win *win; -+ int i, ret; -+ -+ for (i = 0; i < vop2_data->win_size; i++) { -+ const struct vop2_win_data *win_data = &vop2_data->win[i]; -+ -+ win = &vop2->win[i]; -+ win->data = win_data; -+ win->type = win_data->type; -+ win->offset = win_data->base; -+ win->win_id = i; -+ win->vop2 = vop2; -+ if (vop2_cluster_window(win)) -+ ret = vop2_cluster_init(win); -+ else -+ ret = vop2_esmart_init(win); -+ if (ret) -+ return ret; -+ } -+ -+ vop2->registered_num_wins = vop2_data->win_size; -+ -+ return 0; -+} -+ -+/* -+ * The window registers are only updated when config done is written. -+ * Until that they read back the old value. As we read-modify-write -+ * these registers mark them as non-volatile. This makes sure we read -+ * the new values from the regmap register cache. -+ */ -+static const struct regmap_range vop2_nonvolatile_range[] = { -+ regmap_reg_range(0x1000, 0x23ff), -+}; -+ -+static const struct regmap_access_table vop2_volatile_table = { -+ .no_ranges = vop2_nonvolatile_range, -+ .n_no_ranges = ARRAY_SIZE(vop2_nonvolatile_range), -+}; -+ -+static const struct regmap_config vop2_regmap_config = { -+ .reg_bits = 32, -+ .val_bits = 32, -+ .reg_stride = 4, -+ .max_register = 0x3000, -+ .name = "vop2", -+ .volatile_table = &vop2_volatile_table, -+ .cache_type = REGCACHE_RBTREE, -+}; -+ -+static int vop2_bind(struct device *dev, struct device *master, void *data) -+{ -+ struct platform_device *pdev = to_platform_device(dev); -+ const struct vop2_data *vop2_data; -+ struct drm_device *drm = data; -+ struct vop2 *vop2; -+ struct resource *res; -+ size_t alloc_size; -+ int ret; -+ -+ vop2_data = of_device_get_match_data(dev); -+ if (!vop2_data) -+ return -ENODEV; -+ -+ /* Allocate vop2 struct and its vop2_win array */ -+ alloc_size = sizeof(*vop2) + sizeof(*vop2->win) * vop2_data->win_size; -+ vop2 = devm_kzalloc(dev, alloc_size, GFP_KERNEL); -+ if (!vop2) -+ return -ENOMEM; -+ -+ vop2->dev = dev; -+ vop2->data = vop2_data; -+ vop2->drm = drm; -+ -+ dev_set_drvdata(dev, vop2); -+ -+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs"); -+ if (!res) { -+ drm_err(vop2->drm, "failed to get vop2 register byname\n"); -+ return -EINVAL; -+ } -+ -+ vop2->regs = devm_ioremap_resource(dev, res); -+ if (IS_ERR(vop2->regs)) -+ return PTR_ERR(vop2->regs); -+ vop2->len = resource_size(res); -+ -+ vop2->map = devm_regmap_init_mmio(dev, vop2->regs, &vop2_regmap_config); -+ -+ ret = vop2_win_init(vop2); -+ if (ret) -+ return ret; -+ -+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "gamma_lut"); -+ if (res) { -+ vop2->lut_regs = devm_ioremap_resource(dev, res); -+ if (IS_ERR(vop2->lut_regs)) -+ return PTR_ERR(vop2->lut_regs); -+ } -+ -+ vop2->grf = syscon_regmap_lookup_by_phandle(dev->of_node, "rockchip,grf"); -+ -+ vop2->hclk = devm_clk_get(vop2->dev, "hclk"); -+ if (IS_ERR(vop2->hclk)) { -+ drm_err(vop2->drm, "failed to get hclk source\n"); -+ return PTR_ERR(vop2->hclk); -+ } -+ -+ vop2->aclk = devm_clk_get(vop2->dev, "aclk"); -+ if (IS_ERR(vop2->aclk)) { -+ drm_err(vop2->drm, "failed to get aclk source\n"); -+ return PTR_ERR(vop2->aclk); -+ } -+ -+ vop2->irq = platform_get_irq(pdev, 0); -+ if (vop2->irq < 0) { -+ drm_err(vop2->drm, "cannot find irq for vop2\n"); -+ return vop2->irq; -+ } -+ -+ mutex_init(&vop2->vop2_lock); -+ -+ ret = devm_request_irq(dev, vop2->irq, vop2_isr, IRQF_SHARED, dev_name(dev), vop2); -+ if (ret) -+ return ret; -+ -+ ret = vop2_create_crtc(vop2); -+ if (ret) -+ return ret; -+ -+ rockchip_drm_dma_init_device(vop2->drm, vop2->dev); -+ -+ pm_runtime_enable(&pdev->dev); -+ -+ return 0; -+} -+ -+static void vop2_unbind(struct device *dev, struct device *master, void *data) -+{ -+ struct vop2 *vop2 = dev_get_drvdata(dev); -+ struct drm_device *drm = vop2->drm; -+ struct list_head *plane_list = &drm->mode_config.plane_list; -+ struct list_head *crtc_list = &drm->mode_config.crtc_list; -+ struct drm_crtc *crtc, *tmpc; -+ struct drm_plane *plane, *tmpp; -+ -+ pm_runtime_disable(dev); -+ -+ list_for_each_entry_safe(plane, tmpp, plane_list, head) -+ drm_plane_cleanup(plane); -+ -+ list_for_each_entry_safe(crtc, tmpc, crtc_list, head) -+ vop2_destroy_crtc(crtc); -+} -+ -+const struct component_ops vop2_component_ops = { -+ .bind = vop2_bind, -+ .unbind = vop2_unbind, -+}; -+EXPORT_SYMBOL_GPL(vop2_component_ops); ---- /dev/null -+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.h -@@ -0,0 +1,477 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+/* -+ * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd -+ * Author:Mark Yao -+ */ -+ -+#ifndef _ROCKCHIP_DRM_VOP2_H -+#define _ROCKCHIP_DRM_VOP2_H -+ -+#include "rockchip_drm_vop.h" -+ -+#include -+#include -+ -+#define VOP_FEATURE_OUTPUT_10BIT BIT(0) -+ -+#define WIN_FEATURE_AFBDC BIT(0) -+#define WIN_FEATURE_CLUSTER BIT(1) -+ -+/* -+ * the delay number of a window in different mode. -+ */ -+enum win_dly_mode { -+ VOP2_DLY_MODE_DEFAULT, /**< default mode */ -+ VOP2_DLY_MODE_HISO_S, /** HDR in SDR out mode, as a SDR window */ -+ VOP2_DLY_MODE_HIHO_H, /** HDR in HDR out mode, as a HDR window */ -+ VOP2_DLY_MODE_MAX, -+}; -+ -+struct vop_rect { -+ int width; -+ int height; -+}; -+ -+enum vop2_scale_up_mode { -+ VOP2_SCALE_UP_NRST_NBOR, -+ VOP2_SCALE_UP_BIL, -+ VOP2_SCALE_UP_BIC, -+}; -+ -+enum vop2_scale_down_mode { -+ VOP2_SCALE_DOWN_NRST_NBOR, -+ VOP2_SCALE_DOWN_BIL, -+ VOP2_SCALE_DOWN_AVG, -+}; -+ -+enum vop2_win_regs { -+ VOP2_WIN_ENABLE, -+ VOP2_WIN_FORMAT, -+ VOP2_WIN_CSC_MODE, -+ VOP2_WIN_XMIRROR, -+ VOP2_WIN_YMIRROR, -+ VOP2_WIN_RB_SWAP, -+ VOP2_WIN_UV_SWAP, -+ VOP2_WIN_ACT_INFO, -+ VOP2_WIN_DSP_INFO, -+ VOP2_WIN_DSP_ST, -+ VOP2_WIN_YRGB_MST, -+ VOP2_WIN_UV_MST, -+ VOP2_WIN_YRGB_VIR, -+ VOP2_WIN_UV_VIR, -+ VOP2_WIN_YUV_CLIP, -+ VOP2_WIN_Y2R_EN, -+ VOP2_WIN_R2Y_EN, -+ VOP2_WIN_COLOR_KEY, -+ VOP2_WIN_COLOR_KEY_EN, -+ VOP2_WIN_DITHER_UP, -+ -+ /* scale regs */ -+ VOP2_WIN_SCALE_YRGB_X, -+ VOP2_WIN_SCALE_YRGB_Y, -+ VOP2_WIN_SCALE_CBCR_X, -+ VOP2_WIN_SCALE_CBCR_Y, -+ VOP2_WIN_YRGB_HOR_SCL_MODE, -+ VOP2_WIN_YRGB_HSCL_FILTER_MODE, -+ VOP2_WIN_YRGB_VER_SCL_MODE, -+ VOP2_WIN_YRGB_VSCL_FILTER_MODE, -+ VOP2_WIN_CBCR_VER_SCL_MODE, -+ VOP2_WIN_CBCR_HSCL_FILTER_MODE, -+ VOP2_WIN_CBCR_HOR_SCL_MODE, -+ VOP2_WIN_CBCR_VSCL_FILTER_MODE, -+ VOP2_WIN_VSD_CBCR_GT2, -+ VOP2_WIN_VSD_CBCR_GT4, -+ VOP2_WIN_VSD_YRGB_GT2, -+ VOP2_WIN_VSD_YRGB_GT4, -+ VOP2_WIN_BIC_COE_SEL, -+ -+ /* cluster regs */ -+ VOP2_WIN_CLUSTER_ENABLE, -+ VOP2_WIN_AFBC_ENABLE, -+ VOP2_WIN_CLUSTER_LB_MODE, -+ -+ /* afbc regs */ -+ VOP2_WIN_AFBC_FORMAT, -+ VOP2_WIN_AFBC_RB_SWAP, -+ VOP2_WIN_AFBC_UV_SWAP, -+ VOP2_WIN_AFBC_AUTO_GATING_EN, -+ VOP2_WIN_AFBC_BLOCK_SPLIT_EN, -+ VOP2_WIN_AFBC_PIC_VIR_WIDTH, -+ VOP2_WIN_AFBC_TILE_NUM, -+ VOP2_WIN_AFBC_PIC_OFFSET, -+ VOP2_WIN_AFBC_PIC_SIZE, -+ VOP2_WIN_AFBC_DSP_OFFSET, -+ VOP2_WIN_AFBC_TRANSFORM_OFFSET, -+ VOP2_WIN_AFBC_HDR_PTR, -+ VOP2_WIN_AFBC_HALF_BLOCK_EN, -+ VOP2_WIN_AFBC_ROTATE_270, -+ VOP2_WIN_AFBC_ROTATE_90, -+ VOP2_WIN_MAX_REG, -+}; -+ -+struct vop2_win_data { -+ const char *name; -+ unsigned int phys_id; -+ -+ u32 base; -+ enum drm_plane_type type; -+ -+ u32 nformats; -+ const u32 *formats; -+ const uint64_t *format_modifiers; -+ const unsigned int supported_rotations; -+ -+ /** -+ * @layer_sel_id: defined by register OVERLAY_LAYER_SEL of VOP2 -+ */ -+ unsigned int layer_sel_id; -+ uint64_t feature; -+ -+ unsigned int max_upscale_factor; -+ unsigned int max_downscale_factor; -+ const u8 dly[VOP2_DLY_MODE_MAX]; -+}; -+ -+struct vop2_video_port_data { -+ unsigned int id; -+ u32 feature; -+ u16 gamma_lut_len; -+ u16 cubic_lut_len; -+ struct vop_rect max_output; -+ const u8 pre_scan_max_dly[4]; -+ const struct vop2_video_port_regs *regs; -+ unsigned int offset; -+}; -+ -+struct vop2_data { -+ u8 nr_vps; -+ const struct vop2_ctrl *ctrl; -+ const struct vop2_win_data *win; -+ const struct vop2_video_port_data *vp; -+ const struct vop_csc_table *csc_table; -+ struct vop_rect max_input; -+ struct vop_rect max_output; -+ -+ unsigned int win_size; -+ unsigned int soc_id; -+}; -+ -+/* interrupt define */ -+#define FS_NEW_INTR BIT(4) -+#define ADDR_SAME_INTR BIT(5) -+#define LINE_FLAG1_INTR BIT(6) -+#define WIN0_EMPTY_INTR BIT(7) -+#define WIN1_EMPTY_INTR BIT(8) -+#define WIN2_EMPTY_INTR BIT(9) -+#define WIN3_EMPTY_INTR BIT(10) -+#define HWC_EMPTY_INTR BIT(11) -+#define POST_BUF_EMPTY_INTR BIT(12) -+#define PWM_GEN_INTR BIT(13) -+#define DMA_FINISH_INTR BIT(14) -+#define FS_FIELD_INTR BIT(15) -+#define FE_INTR BIT(16) -+#define WB_UV_FIFO_FULL_INTR BIT(17) -+#define WB_YRGB_FIFO_FULL_INTR BIT(18) -+#define WB_COMPLETE_INTR BIT(19) -+ -+/* -+ * display output interface supported by rockchip lcdc -+ */ -+#define ROCKCHIP_OUT_MODE_P888 0 -+#define ROCKCHIP_OUT_MODE_BT1120 0 -+#define ROCKCHIP_OUT_MODE_P666 1 -+#define ROCKCHIP_OUT_MODE_P565 2 -+#define ROCKCHIP_OUT_MODE_BT656 5 -+#define ROCKCHIP_OUT_MODE_S888 8 -+#define ROCKCHIP_OUT_MODE_S888_DUMMY 12 -+#define ROCKCHIP_OUT_MODE_YUV420 14 -+/* for use special outface */ -+#define ROCKCHIP_OUT_MODE_AAAA 15 -+ -+enum vop_csc_format { -+ CSC_BT601L, -+ CSC_BT709L, -+ CSC_BT601F, -+ CSC_BT2020, -+}; -+ -+enum src_factor_mode { -+ SRC_FAC_ALPHA_ZERO, -+ SRC_FAC_ALPHA_ONE, -+ SRC_FAC_ALPHA_DST, -+ SRC_FAC_ALPHA_DST_INVERSE, -+ SRC_FAC_ALPHA_SRC, -+ SRC_FAC_ALPHA_SRC_GLOBAL, -+}; -+ -+enum dst_factor_mode { -+ DST_FAC_ALPHA_ZERO, -+ DST_FAC_ALPHA_ONE, -+ DST_FAC_ALPHA_SRC, -+ DST_FAC_ALPHA_SRC_INVERSE, -+ DST_FAC_ALPHA_DST, -+ DST_FAC_ALPHA_DST_GLOBAL, -+}; -+ -+#define RK3568_GRF_VO_CON1 0x0364 -+/* System registers definition */ -+#define RK3568_REG_CFG_DONE 0x000 -+#define RK3568_VERSION_INFO 0x004 -+#define RK3568_SYS_AUTO_GATING_CTRL 0x008 -+#define RK3568_SYS_AXI_LUT_CTRL 0x024 -+#define RK3568_DSP_IF_EN 0x028 -+#define RK3568_DSP_IF_CTRL 0x02c -+#define RK3568_DSP_IF_POL 0x030 -+#define RK3568_WB_CTRL 0x40 -+#define RK3568_WB_XSCAL_FACTOR 0x44 -+#define RK3568_WB_YRGB_MST 0x48 -+#define RK3568_WB_CBR_MST 0x4C -+#define RK3568_OTP_WIN_EN 0x050 -+#define RK3568_LUT_PORT_SEL 0x058 -+#define RK3568_SYS_STATUS0 0x060 -+#define RK3568_VP_LINE_FLAG(vp) (0x70 + (vp) * 0x4) -+#define RK3568_SYS0_INT_EN 0x80 -+#define RK3568_SYS0_INT_CLR 0x84 -+#define RK3568_SYS0_INT_STATUS 0x88 -+#define RK3568_SYS1_INT_EN 0x90 -+#define RK3568_SYS1_INT_CLR 0x94 -+#define RK3568_SYS1_INT_STATUS 0x98 -+#define RK3568_VP_INT_EN(vp) (0xA0 + (vp) * 0x10) -+#define RK3568_VP_INT_CLR(vp) (0xA4 + (vp) * 0x10) -+#define RK3568_VP_INT_STATUS(vp) (0xA8 + (vp) * 0x10) -+#define RK3568_VP_INT_RAW_STATUS(vp) (0xAC + (vp) * 0x10) -+ -+/* Video Port registers definition */ -+#define RK3568_VP_DSP_CTRL 0x00 -+#define RK3568_VP_MIPI_CTRL 0x04 -+#define RK3568_VP_COLOR_BAR_CTRL 0x08 -+#define RK3568_VP_3D_LUT_CTRL 0x10 -+#define RK3568_VP_3D_LUT_MST 0x20 -+#define RK3568_VP_DSP_BG 0x2C -+#define RK3568_VP_PRE_SCAN_HTIMING 0x30 -+#define RK3568_VP_POST_DSP_HACT_INFO 0x34 -+#define RK3568_VP_POST_DSP_VACT_INFO 0x38 -+#define RK3568_VP_POST_SCL_FACTOR_YRGB 0x3C -+#define RK3568_VP_POST_SCL_CTRL 0x40 -+#define RK3568_VP_POST_DSP_VACT_INFO_F1 0x44 -+#define RK3568_VP_DSP_HTOTAL_HS_END 0x48 -+#define RK3568_VP_DSP_HACT_ST_END 0x4C -+#define RK3568_VP_DSP_VTOTAL_VS_END 0x50 -+#define RK3568_VP_DSP_VACT_ST_END 0x54 -+#define RK3568_VP_DSP_VS_ST_END_F1 0x58 -+#define RK3568_VP_DSP_VACT_ST_END_F1 0x5C -+#define RK3568_VP_BCSH_CTRL 0x60 -+#define RK3568_VP_BCSH_BCS 0x64 -+#define RK3568_VP_BCSH_H 0x68 -+#define RK3568_VP_BCSH_COLOR_BAR 0x6C -+ -+/* Overlay registers definition */ -+#define RK3568_OVL_CTRL 0x600 -+#define RK3568_OVL_LAYER_SEL 0x604 -+#define RK3568_OVL_PORT_SEL 0x608 -+#define RK3568_CLUSTER0_MIX_SRC_COLOR_CTRL 0x610 -+#define RK3568_CLUSTER0_MIX_DST_COLOR_CTRL 0x614 -+#define RK3568_CLUSTER0_MIX_SRC_ALPHA_CTRL 0x618 -+#define RK3568_CLUSTER0_MIX_DST_ALPHA_CTRL 0x61C -+#define RK3568_MIX0_SRC_COLOR_CTRL 0x650 -+#define RK3568_MIX0_DST_COLOR_CTRL 0x654 -+#define RK3568_MIX0_SRC_ALPHA_CTRL 0x658 -+#define RK3568_MIX0_DST_ALPHA_CTRL 0x65C -+#define RK3568_HDR0_SRC_COLOR_CTRL 0x6C0 -+#define RK3568_HDR0_DST_COLOR_CTRL 0x6C4 -+#define RK3568_HDR0_SRC_ALPHA_CTRL 0x6C8 -+#define RK3568_HDR0_DST_ALPHA_CTRL 0x6CC -+#define RK3568_VP_BG_MIX_CTRL(vp) (0x6E0 + (vp) * 4) -+#define RK3568_CLUSTER_DLY_NUM 0x6F0 -+#define RK3568_SMART_DLY_NUM 0x6F8 -+ -+/* Cluster register definition, offset relative to window base */ -+#define RK3568_CLUSTER_WIN_CTRL0 0x00 -+#define RK3568_CLUSTER_WIN_CTRL1 0x04 -+#define RK3568_CLUSTER_WIN_YRGB_MST 0x10 -+#define RK3568_CLUSTER_WIN_CBR_MST 0x14 -+#define RK3568_CLUSTER_WIN_VIR 0x18 -+#define RK3568_CLUSTER_WIN_ACT_INFO 0x20 -+#define RK3568_CLUSTER_WIN_DSP_INFO 0x24 -+#define RK3568_CLUSTER_WIN_DSP_ST 0x28 -+#define RK3568_CLUSTER_WIN_SCL_FACTOR_YRGB 0x30 -+#define RK3568_CLUSTER_WIN_AFBCD_TRANSFORM_OFFSET 0x3C -+#define RK3568_CLUSTER_WIN_AFBCD_OUTPUT_CTRL 0x50 -+#define RK3568_CLUSTER_WIN_AFBCD_ROTATE_MODE 0x54 -+#define RK3568_CLUSTER_WIN_AFBCD_HDR_PTR 0x58 -+#define RK3568_CLUSTER_WIN_AFBCD_VIR_WIDTH 0x5C -+#define RK3568_CLUSTER_WIN_AFBCD_PIC_SIZE 0x60 -+#define RK3568_CLUSTER_WIN_AFBCD_PIC_OFFSET 0x64 -+#define RK3568_CLUSTER_WIN_AFBCD_DSP_OFFSET 0x68 -+#define RK3568_CLUSTER_WIN_AFBCD_CTRL 0x6C -+ -+#define RK3568_CLUSTER_CTRL 0x100 -+ -+/* (E)smart register definition, offset relative to window base */ -+#define RK3568_SMART_CTRL0 0x00 -+#define RK3568_SMART_CTRL1 0x04 -+#define RK3568_SMART_REGION0_CTRL 0x10 -+#define RK3568_SMART_REGION0_YRGB_MST 0x14 -+#define RK3568_SMART_REGION0_CBR_MST 0x18 -+#define RK3568_SMART_REGION0_VIR 0x1C -+#define RK3568_SMART_REGION0_ACT_INFO 0x20 -+#define RK3568_SMART_REGION0_DSP_INFO 0x24 -+#define RK3568_SMART_REGION0_DSP_ST 0x28 -+#define RK3568_SMART_REGION0_SCL_CTRL 0x30 -+#define RK3568_SMART_REGION0_SCL_FACTOR_YRGB 0x34 -+#define RK3568_SMART_REGION0_SCL_FACTOR_CBR 0x38 -+#define RK3568_SMART_REGION0_SCL_OFFSET 0x3C -+#define RK3568_SMART_REGION1_CTRL 0x40 -+#define RK3568_SMART_REGION1_YRGB_MST 0x44 -+#define RK3568_SMART_REGION1_CBR_MST 0x48 -+#define RK3568_SMART_REGION1_VIR 0x4C -+#define RK3568_SMART_REGION1_ACT_INFO 0x50 -+#define RK3568_SMART_REGION1_DSP_INFO 0x54 -+#define RK3568_SMART_REGION1_DSP_ST 0x58 -+#define RK3568_SMART_REGION1_SCL_CTRL 0x60 -+#define RK3568_SMART_REGION1_SCL_FACTOR_YRGB 0x64 -+#define RK3568_SMART_REGION1_SCL_FACTOR_CBR 0x68 -+#define RK3568_SMART_REGION1_SCL_OFFSET 0x6C -+#define RK3568_SMART_REGION2_CTRL 0x70 -+#define RK3568_SMART_REGION2_YRGB_MST 0x74 -+#define RK3568_SMART_REGION2_CBR_MST 0x78 -+#define RK3568_SMART_REGION2_VIR 0x7C -+#define RK3568_SMART_REGION2_ACT_INFO 0x80 -+#define RK3568_SMART_REGION2_DSP_INFO 0x84 -+#define RK3568_SMART_REGION2_DSP_ST 0x88 -+#define RK3568_SMART_REGION2_SCL_CTRL 0x90 -+#define RK3568_SMART_REGION2_SCL_FACTOR_YRGB 0x94 -+#define RK3568_SMART_REGION2_SCL_FACTOR_CBR 0x98 -+#define RK3568_SMART_REGION2_SCL_OFFSET 0x9C -+#define RK3568_SMART_REGION3_CTRL 0xA0 -+#define RK3568_SMART_REGION3_YRGB_MST 0xA4 -+#define RK3568_SMART_REGION3_CBR_MST 0xA8 -+#define RK3568_SMART_REGION3_VIR 0xAC -+#define RK3568_SMART_REGION3_ACT_INFO 0xB0 -+#define RK3568_SMART_REGION3_DSP_INFO 0xB4 -+#define RK3568_SMART_REGION3_DSP_ST 0xB8 -+#define RK3568_SMART_REGION3_SCL_CTRL 0xC0 -+#define RK3568_SMART_REGION3_SCL_FACTOR_YRGB 0xC4 -+#define RK3568_SMART_REGION3_SCL_FACTOR_CBR 0xC8 -+#define RK3568_SMART_REGION3_SCL_OFFSET 0xCC -+#define RK3568_SMART_COLOR_KEY_CTRL 0xD0 -+ -+/* HDR register definition */ -+#define RK3568_HDR_LUT_CTRL 0x2000 -+#define RK3568_HDR_LUT_MST 0x2004 -+#define RK3568_SDR2HDR_CTRL 0x2010 -+#define RK3568_HDR2SDR_CTRL 0x2020 -+#define RK3568_HDR2SDR_SRC_RANGE 0x2024 -+#define RK3568_HDR2SDR_NORMFACEETF 0x2028 -+#define RK3568_HDR2SDR_DST_RANGE 0x202C -+#define RK3568_HDR2SDR_NORMFACCGAMMA 0x2030 -+#define RK3568_HDR_EETF_OETF_Y0 0x203C -+#define RK3568_HDR_SAT_Y0 0x20C0 -+#define RK3568_HDR_EOTF_OETF_Y0 0x20F0 -+#define RK3568_HDR_OETF_DX_POW1 0x2200 -+#define RK3568_HDR_OETF_XN1 0x2300 -+ -+#define RK3568_REG_CFG_DONE__GLB_CFG_DONE_EN BIT(15) -+ -+#define RK3568_VP_DSP_CTRL__STANDBY BIT(31) -+#define RK3568_VP_DSP_CTRL__DITHER_DOWN_MODE BIT(20) -+#define RK3568_VP_DSP_CTRL__DITHER_DOWN_SEL GENMASK(19, 18) -+#define RK3568_VP_DSP_CTRL__DITHER_DOWN_EN BIT(17) -+#define RK3568_VP_DSP_CTRL__PRE_DITHER_DOWN_EN BIT(16) -+#define RK3568_VP_DSP_CTRL__POST_DSP_OUT_R2Y BIT(15) -+#define RK3568_VP_DSP_CTRL__DSP_RB_SWAP BIT(9) -+#define RK3568_VP_DSP_CTRL__DSP_INTERLACE BIT(7) -+#define RK3568_VP_DSP_CTRL__DSP_FILED_POL BIT(6) -+#define RK3568_VP_DSP_CTRL__P2I_EN BIT(5) -+#define RK3568_VP_DSP_CTRL__CORE_DCLK_DIV BIT(4) -+#define RK3568_VP_DSP_CTRL__OUT_MODE GENMASK(3, 0) -+ -+#define RK3568_VP_POST_SCL_CTRL__VSCALEDOWN BIT(1) -+#define RK3568_VP_POST_SCL_CTRL__HSCALEDOWN BIT(0) -+ -+#define RK3568_SYS_DSP_INFACE_EN_LVDS1_MUX GENMASK(26, 25) -+#define RK3568_SYS_DSP_INFACE_EN_LVDS1 BIT(24) -+#define RK3568_SYS_DSP_INFACE_EN_MIPI1_MUX GENMASK(22, 21) -+#define RK3568_SYS_DSP_INFACE_EN_MIPI1 BIT(20) -+#define RK3568_SYS_DSP_INFACE_EN_LVDS0_MUX GENMASK(19, 18) -+#define RK3568_SYS_DSP_INFACE_EN_MIPI0_MUX GENMASK(17, 16) -+#define RK3568_SYS_DSP_INFACE_EN_EDP_MUX GENMASK(15, 14) -+#define RK3568_SYS_DSP_INFACE_EN_HDMI_MUX GENMASK(11, 10) -+#define RK3568_SYS_DSP_INFACE_EN_RGB_MUX GENMASK(9, 8) -+#define RK3568_SYS_DSP_INFACE_EN_LVDS0 BIT(5) -+#define RK3568_SYS_DSP_INFACE_EN_MIPI0 BIT(4) -+#define RK3568_SYS_DSP_INFACE_EN_EDP BIT(3) -+#define RK3568_SYS_DSP_INFACE_EN_HDMI BIT(1) -+#define RK3568_SYS_DSP_INFACE_EN_RGB BIT(0) -+ -+#define RK3568_DSP_IF_POL__MIPI_PIN_POL GENMASK(19, 16) -+#define RK3568_DSP_IF_POL__EDP_PIN_POL GENMASK(15, 12) -+#define RK3568_DSP_IF_POL__HDMI_PIN_POL GENMASK(7, 4) -+#define RK3568_DSP_IF_POL__RGB_LVDS_PIN_POL GENMASK(3, 0) -+ -+#define RK3568_VP0_MIPI_CTRL__DCLK_DIV2_PHASE_LOCK BIT(5) -+#define RK3568_VP0_MIPI_CTRL__DCLK_DIV2 BIT(4) -+ -+#define RK3568_SYS_AUTO_GATING_CTRL__AUTO_GATING_EN BIT(31) -+ -+#define RK3568_DSP_IF_POL__CFG_DONE_IMD BIT(28) -+ -+#define VOP2_SYS_AXI_BUS_NUM 2 -+ -+#define VOP2_CLUSTER_YUV444_10 0x12 -+ -+#define VOP2_COLOR_KEY_MASK BIT(31) -+ -+#define RK3568_OVL_CTRL__LAYERSEL_REGDONE_IMD BIT(28) -+ -+#define RK3568_VP_BG_MIX_CTRL__BG_DLY GENMASK(31, 24) -+ -+#define RK3568_OVL_PORT_SEL__SEL_PORT GENMASK(31, 16) -+#define RK3568_OVL_PORT_SEL__SMART1 GENMASK(31, 30) -+#define RK3568_OVL_PORT_SEL__SMART0 GENMASK(29, 28) -+#define RK3568_OVL_PORT_SEL__ESMART1 GENMASK(27, 26) -+#define RK3568_OVL_PORT_SEL__ESMART0 GENMASK(25, 24) -+#define RK3568_OVL_PORT_SEL__CLUSTER1 GENMASK(19, 18) -+#define RK3568_OVL_PORT_SEL__CLUSTER0 GENMASK(17, 16) -+#define RK3568_OVL_PORT_SET__PORT2_MUX GENMASK(11, 8) -+#define RK3568_OVL_PORT_SET__PORT1_MUX GENMASK(7, 4) -+#define RK3568_OVL_PORT_SET__PORT0_MUX GENMASK(3, 0) -+#define RK3568_OVL_LAYER_SEL__LAYER(layer, x) ((x) << ((layer) * 4)) -+ -+#define RK3568_CLUSTER_DLY_NUM__CLUSTER1_1 GENMASK(31, 24) -+#define RK3568_CLUSTER_DLY_NUM__CLUSTER1_0 GENMASK(23, 16) -+#define RK3568_CLUSTER_DLY_NUM__CLUSTER0_1 GENMASK(15, 8) -+#define RK3568_CLUSTER_DLY_NUM__CLUSTER0_0 GENMASK(7, 0) -+ -+#define RK3568_SMART_DLY_NUM__SMART1 GENMASK(31, 24) -+#define RK3568_SMART_DLY_NUM__SMART0 GENMASK(23, 16) -+#define RK3568_SMART_DLY_NUM__ESMART1 GENMASK(15, 8) -+#define RK3568_SMART_DLY_NUM__ESMART0 GENMASK(7, 0) -+ -+#define VP_INT_DSP_HOLD_VALID BIT(6) -+#define VP_INT_FS_FIELD BIT(5) -+#define VP_INT_POST_BUF_EMPTY BIT(4) -+#define VP_INT_LINE_FLAG1 BIT(3) -+#define VP_INT_LINE_FLAG0 BIT(2) -+#define VOP2_INT_BUS_ERRPR BIT(1) -+#define VP_INT_FS BIT(0) -+ -+#define POLFLAG_DCLK_INV BIT(3) -+ -+enum vop2_layer_phy_id { -+ ROCKCHIP_VOP2_CLUSTER0 = 0, -+ ROCKCHIP_VOP2_CLUSTER1, -+ ROCKCHIP_VOP2_ESMART0, -+ ROCKCHIP_VOP2_ESMART1, -+ ROCKCHIP_VOP2_SMART0, -+ ROCKCHIP_VOP2_SMART1, -+ ROCKCHIP_VOP2_CLUSTER2, -+ ROCKCHIP_VOP2_CLUSTER3, -+ ROCKCHIP_VOP2_ESMART2, -+ ROCKCHIP_VOP2_ESMART3, -+ ROCKCHIP_VOP2_PHY_ID_INVALID = -1, -+}; -+ -+extern const struct component_ops vop2_component_ops; -+ -+#endif /* _ROCKCHIP_DRM_VOP2_H */ ---- /dev/null -+++ b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c -@@ -0,0 +1,281 @@ -+// SPDX-License-Identifier: GPL-2.0-only -+/* -+ * Copyright (C) Rockchip Electronics Co.Ltd -+ * Author: Andy Yan -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "rockchip_drm_vop2.h" -+ -+static const uint32_t formats_win_full_10bit[] = { -+ DRM_FORMAT_XRGB8888, -+ DRM_FORMAT_ARGB8888, -+ DRM_FORMAT_XBGR8888, -+ DRM_FORMAT_ABGR8888, -+ DRM_FORMAT_RGB888, -+ DRM_FORMAT_BGR888, -+ DRM_FORMAT_RGB565, -+ DRM_FORMAT_BGR565, -+ DRM_FORMAT_NV12, -+ DRM_FORMAT_NV16, -+ DRM_FORMAT_NV24, -+}; -+ -+static const uint32_t formats_win_full_10bit_yuyv[] = { -+ DRM_FORMAT_XRGB8888, -+ DRM_FORMAT_ARGB8888, -+ DRM_FORMAT_XBGR8888, -+ DRM_FORMAT_ABGR8888, -+ DRM_FORMAT_RGB888, -+ DRM_FORMAT_BGR888, -+ DRM_FORMAT_RGB565, -+ DRM_FORMAT_BGR565, -+ DRM_FORMAT_NV12, -+ DRM_FORMAT_NV16, -+ DRM_FORMAT_NV24, -+ DRM_FORMAT_YVYU, -+ DRM_FORMAT_VYUY, -+}; -+ -+static const uint32_t formats_win_lite[] = { -+ DRM_FORMAT_XRGB8888, -+ DRM_FORMAT_ARGB8888, -+ DRM_FORMAT_XBGR8888, -+ DRM_FORMAT_ABGR8888, -+ DRM_FORMAT_RGB888, -+ DRM_FORMAT_BGR888, -+ DRM_FORMAT_RGB565, -+ DRM_FORMAT_BGR565, -+}; -+ -+static const uint64_t format_modifiers[] = { -+ DRM_FORMAT_MOD_LINEAR, -+ DRM_FORMAT_MOD_INVALID, -+}; -+ -+static const uint64_t format_modifiers_afbc[] = { -+ DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16), -+ -+ DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 | -+ AFBC_FORMAT_MOD_SPARSE), -+ -+ DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 | -+ AFBC_FORMAT_MOD_YTR), -+ -+ DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 | -+ AFBC_FORMAT_MOD_CBR), -+ -+ DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 | -+ AFBC_FORMAT_MOD_YTR | -+ AFBC_FORMAT_MOD_SPARSE), -+ -+ DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 | -+ AFBC_FORMAT_MOD_CBR | -+ AFBC_FORMAT_MOD_SPARSE), -+ -+ DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 | -+ AFBC_FORMAT_MOD_YTR | -+ AFBC_FORMAT_MOD_CBR), -+ -+ DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 | -+ AFBC_FORMAT_MOD_YTR | -+ AFBC_FORMAT_MOD_CBR | -+ AFBC_FORMAT_MOD_SPARSE), -+ -+ /* SPLIT mandates SPARSE, RGB modes mandates YTR */ -+ DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 | -+ AFBC_FORMAT_MOD_YTR | -+ AFBC_FORMAT_MOD_SPARSE | -+ AFBC_FORMAT_MOD_SPLIT), -+ DRM_FORMAT_MOD_INVALID, -+}; -+ -+static const struct vop2_video_port_data rk3568_vop_video_ports[] = { -+ { -+ .id = 0, -+ .feature = VOP_FEATURE_OUTPUT_10BIT, -+ .gamma_lut_len = 1024, -+ .cubic_lut_len = 9 * 9 * 9, -+ .max_output = { 4096, 2304 }, -+ .pre_scan_max_dly = { 69, 53, 53, 42 }, -+ .offset = 0xc00, -+ }, { -+ .id = 1, -+ .gamma_lut_len = 1024, -+ .max_output = { 2048, 1536 }, -+ .pre_scan_max_dly = { 40, 40, 40, 40 }, -+ .offset = 0xd00, -+ }, { -+ .id = 2, -+ .gamma_lut_len = 1024, -+ .max_output = { 1920, 1080 }, -+ .pre_scan_max_dly = { 40, 40, 40, 40 }, -+ .offset = 0xe00, -+ }, -+}; -+ -+/* -+ * rk3568 vop with 2 cluster, 2 esmart win, 2 smart win. -+ * Every cluster can work as 4K win or split into two win. -+ * All win in cluster support AFBCD. -+ * -+ * Every esmart win and smart win support 4 Multi-region. -+ * -+ * Scale filter mode: -+ * -+ * * Cluster: bicubic for horizontal scale up, others use bilinear -+ * * ESmart: -+ * * nearest-neighbor/bilinear/bicubic for scale up -+ * * nearest-neighbor/bilinear/average for scale down -+ * -+ * -+ * @TODO describe the wind like cpu-map dt nodes; -+ */ -+static const struct vop2_win_data rk3568_vop_win_data[] = { -+ { -+ .name = "Smart0-win0", -+ .phys_id = ROCKCHIP_VOP2_SMART0, -+ .base = 0x1c00, -+ .formats = formats_win_lite, -+ .nformats = ARRAY_SIZE(formats_win_lite), -+ .format_modifiers = format_modifiers, -+ .layer_sel_id = 3, -+ .supported_rotations = DRM_MODE_REFLECT_Y, -+ .type = DRM_PLANE_TYPE_PRIMARY, -+ .max_upscale_factor = 8, -+ .max_downscale_factor = 8, -+ .dly = { 20, 47, 41 }, -+ }, { -+ .name = "Smart1-win0", -+ .phys_id = ROCKCHIP_VOP2_SMART1, -+ .formats = formats_win_lite, -+ .nformats = ARRAY_SIZE(formats_win_lite), -+ .format_modifiers = format_modifiers, -+ .base = 0x1e00, -+ .layer_sel_id = 7, -+ .supported_rotations = DRM_MODE_REFLECT_Y, -+ .type = DRM_PLANE_TYPE_PRIMARY, -+ .max_upscale_factor = 8, -+ .max_downscale_factor = 8, -+ .dly = { 20, 47, 41 }, -+ }, { -+ .name = "Esmart1-win0", -+ .phys_id = ROCKCHIP_VOP2_ESMART1, -+ .formats = formats_win_full_10bit_yuyv, -+ .nformats = ARRAY_SIZE(formats_win_full_10bit_yuyv), -+ .format_modifiers = format_modifiers, -+ .base = 0x1a00, -+ .layer_sel_id = 6, -+ .supported_rotations = DRM_MODE_REFLECT_Y, -+ .type = DRM_PLANE_TYPE_PRIMARY, -+ .max_upscale_factor = 8, -+ .max_downscale_factor = 8, -+ .dly = { 20, 47, 41 }, -+ }, { -+ .name = "Esmart0-win0", -+ .phys_id = ROCKCHIP_VOP2_ESMART0, -+ .formats = formats_win_full_10bit_yuyv, -+ .nformats = ARRAY_SIZE(formats_win_full_10bit_yuyv), -+ .format_modifiers = format_modifiers, -+ .base = 0x1800, -+ .layer_sel_id = 2, -+ .supported_rotations = DRM_MODE_REFLECT_Y, -+ .type = DRM_PLANE_TYPE_OVERLAY, -+ .max_upscale_factor = 8, -+ .max_downscale_factor = 8, -+ .dly = { 20, 47, 41 }, -+ }, { -+ .name = "Cluster0-win0", -+ .phys_id = ROCKCHIP_VOP2_CLUSTER0, -+ .base = 0x1000, -+ .formats = formats_win_full_10bit, -+ .nformats = ARRAY_SIZE(formats_win_full_10bit), -+ .format_modifiers = format_modifiers_afbc, -+ .layer_sel_id = 0, -+ .supported_rotations = DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_270 | -+ DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y, -+ .max_upscale_factor = 4, -+ .max_downscale_factor = 4, -+ .dly = { 0, 27, 21 }, -+ .type = DRM_PLANE_TYPE_OVERLAY, -+ .feature = WIN_FEATURE_AFBDC | WIN_FEATURE_CLUSTER, -+ }, { -+ .name = "Cluster1-win0", -+ .phys_id = ROCKCHIP_VOP2_CLUSTER1, -+ .base = 0x1200, -+ .formats = formats_win_full_10bit, -+ .nformats = ARRAY_SIZE(formats_win_full_10bit), -+ .format_modifiers = format_modifiers_afbc, -+ .layer_sel_id = 1, -+ .supported_rotations = DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_270 | -+ DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y, -+ .type = DRM_PLANE_TYPE_OVERLAY, -+ .max_upscale_factor = 4, -+ .max_downscale_factor = 4, -+ .dly = { 0, 27, 21 }, -+ .feature = WIN_FEATURE_AFBDC | WIN_FEATURE_CLUSTER, -+ }, -+}; -+ -+static const struct vop2_data rk3566_vop = { -+ .nr_vps = 3, -+ .max_input = { 4096, 2304 }, -+ .max_output = { 4096, 2304 }, -+ .vp = rk3568_vop_video_ports, -+ .win = rk3568_vop_win_data, -+ .win_size = ARRAY_SIZE(rk3568_vop_win_data), -+ .soc_id = 3566, -+}; -+ -+static const struct vop2_data rk3568_vop = { -+ .nr_vps = 3, -+ .max_input = { 4096, 2304 }, -+ .max_output = { 4096, 2304 }, -+ .vp = rk3568_vop_video_ports, -+ .win = rk3568_vop_win_data, -+ .win_size = ARRAY_SIZE(rk3568_vop_win_data), -+ .soc_id = 3568, -+}; -+ -+static const struct of_device_id vop2_dt_match[] = { -+ { -+ .compatible = "rockchip,rk3566-vop", -+ .data = &rk3566_vop, -+ }, { -+ .compatible = "rockchip,rk3568-vop", -+ .data = &rk3568_vop, -+ }, { -+ }, -+}; -+MODULE_DEVICE_TABLE(of, vop2_dt_match); -+ -+static int vop2_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ -+ return component_add(dev, &vop2_component_ops); -+} -+ -+static int vop2_remove(struct platform_device *pdev) -+{ -+ component_del(&pdev->dev, &vop2_component_ops); -+ -+ return 0; -+} -+ -+struct platform_driver vop2_platform_driver = { -+ .probe = vop2_probe, -+ .remove = vop2_remove, -+ .driver = { -+ .name = "rockchip-vop2", -+ .of_match_table = of_match_ptr(vop2_dt_match), -+ }, -+}; diff --git a/target/linux/rockchip/patches-5.18/247-dt-bindings-display-rockchip-Add-binding-for-VOP2.patch b/target/linux/rockchip/patches-5.18/247-dt-bindings-display-rockchip-Add-binding-for-VOP2.patch deleted file mode 100644 index 1f9a38fa2bb46a..00000000000000 --- a/target/linux/rockchip/patches-5.18/247-dt-bindings-display-rockchip-Add-binding-for-VOP2.patch +++ /dev/null @@ -1,159 +0,0 @@ -From c706114d54630045eb2ac12ff72744482b227058 Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Fri, 8 Apr 2022 13:22:37 +0200 -Subject: [PATCH 47/50] dt-bindings: display: rockchip: Add binding for VOP2 - -The VOP2 is found on newer Rockchip SoCs like the rk3568 or the rk3566. -The binding differs slightly from the existing VOP binding, so add a new -binding file for it. - -Signed-off-by: Sascha Hauer -Reviewed-by: Rob Herring ---- - .../display/rockchip/rockchip-vop2.yaml | 140 ++++++++++++++++++ - 1 file changed, 140 insertions(+) - create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml - ---- /dev/null -+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml -@@ -0,0 +1,140 @@ -+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause -+%YAML 1.2 -+--- -+$id: http://devicetree.org/schemas/display/rockchip/rockchip-vop2.yaml# -+$schema: http://devicetree.org/meta-schemas/core.yaml# -+ -+title: Rockchip SoC display controller (VOP2) -+ -+description: -+ VOP2 (Video Output Processor v2) is the display controller for the Rockchip -+ series of SoCs which transfers the image data from a video memory -+ buffer to an external LCD interface. -+ -+maintainers: -+ - Sandy Huang -+ - Heiko Stuebner -+ -+properties: -+ compatible: -+ enum: -+ - rockchip,rk3566-vop -+ - rockchip,rk3568-vop -+ -+ reg: -+ minItems: 1 -+ items: -+ - description: -+ Must contain one entry corresponding to the base address and length -+ of the register space. -+ - description: -+ Can optionally contain a second entry corresponding to -+ the CRTC gamma LUT address. -+ -+ interrupts: -+ maxItems: 1 -+ description: -+ The VOP interrupt is shared by several interrupt sources, such as -+ frame start (VSYNC), line flag and other status interrupts. -+ -+ clocks: -+ items: -+ - description: Clock for ddr buffer transfer. -+ - description: Clock for the ahb bus to R/W the phy regs. -+ - description: Pixel clock for video port 0. -+ - description: Pixel clock for video port 1. -+ - description: Pixel clock for video port 2. -+ -+ clock-names: -+ items: -+ - const: aclk -+ - const: hclk -+ - const: dclk_vp0 -+ - const: dclk_vp1 -+ - const: dclk_vp2 -+ -+ rockchip,grf: -+ $ref: /schemas/types.yaml#/definitions/phandle -+ description: -+ Phandle to GRF regs used for misc control -+ -+ ports: -+ $ref: /schemas/graph.yaml#/properties/ports -+ -+ properties: -+ port@0: -+ $ref: /schemas/graph.yaml#/properties/port -+ description: -+ Output endpoint of VP0 -+ -+ port@1: -+ $ref: /schemas/graph.yaml#/properties/port -+ description: -+ Output endpoint of VP1 -+ -+ port@2: -+ $ref: /schemas/graph.yaml#/properties/port -+ description: -+ Output endpoint of VP2 -+ -+ iommus: -+ maxItems: 1 -+ -+ power-domains: -+ maxItems: 1 -+ -+required: -+ - compatible -+ - reg -+ - interrupts -+ - clocks -+ - clock-names -+ - ports -+ -+additionalProperties: false -+ -+examples: -+ - | -+ #include -+ #include -+ #include -+ bus { -+ #address-cells = <2>; -+ #size-cells = <2>; -+ vop: vop@fe040000 { -+ compatible = "rockchip,rk3568-vop"; -+ reg = <0x0 0xfe040000 0x0 0x3000>, <0x0 0xfe044000 0x0 0x1000>; -+ interrupts = ; -+ clocks = <&cru ACLK_VOP>, -+ <&cru HCLK_VOP>, -+ <&cru DCLK_VOP0>, -+ <&cru DCLK_VOP1>, -+ <&cru DCLK_VOP2>; -+ clock-names = "aclk", -+ "hclk", -+ "dclk_vp0", -+ "dclk_vp1", -+ "dclk_vp2"; -+ power-domains = <&power RK3568_PD_VO>; -+ iommus = <&vop_mmu>; -+ vop_out: ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ vp0: port@0 { -+ reg = <0>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ vp1: port@1 { -+ reg = <1>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ vp2: port@2 { -+ reg = <2>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ }; -+ }; -+ }; diff --git a/target/linux/rockchip/patches-5.18/248-dt-bindings-display-rockchip-dw-hdmi-fix-ports-descr.patch b/target/linux/rockchip/patches-5.18/248-dt-bindings-display-rockchip-dw-hdmi-fix-ports-descr.patch deleted file mode 100644 index 4f31095741e443..00000000000000 --- a/target/linux/rockchip/patches-5.18/248-dt-bindings-display-rockchip-dw-hdmi-fix-ports-descr.patch +++ /dev/null @@ -1,66 +0,0 @@ -From 513cc8e325c2485e953965388b5c38a370190da2 Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Fri, 8 Apr 2022 13:22:38 +0200 -Subject: [PATCH 48/50] dt-bindings: display: rockchip: dw-hdmi: fix ports - description - -Current port description doesn't cover all possible cases. It currently -expects one single port with two endpoints. - -When the HDMI connector is described in the device tree there can be two -ports, first one going to the VOP and the second one going to the connector. - -Also on SoCs which only have a single VOP there will be only one -endpoint instead of two. - -This patch addresses both issues. With this there can either be a single -port ("port") , or two of them ("port@0", "port@1") when the connector -is also in the device tree. Also the first or only port can either have -one endpoint ("endpoint") for single VOP SoCs or two ("endpoint@0", -"endpoint@1") for dual VOP SoCs. - -Signed-off-by: Sascha Hauer -Reviewed-by: Rob Herring ---- - .../display/rockchip/rockchip,dw-hdmi.yaml | 24 +++++++------------ - 1 file changed, 9 insertions(+), 15 deletions(-) - ---- a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml -+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml -@@ -97,27 +97,21 @@ properties: - ports: - $ref: /schemas/graph.yaml#/properties/ports - -- properties: -- port: -- $ref: /schemas/graph.yaml#/$defs/port-base -- unevaluatedProperties: false -+ patternProperties: -+ "^port(@0)?$": -+ $ref: /schemas/graph.yaml#/properties/port - description: Input of the DWC HDMI TX -- - properties: -+ endpoint: -+ description: Connection to the VOP - endpoint@0: -- $ref: /schemas/graph.yaml#/properties/endpoint - description: Connection to the VOPB -- - endpoint@1: -- $ref: /schemas/graph.yaml#/properties/endpoint - description: Connection to the VOPL -- -- required: -- - endpoint@0 -- - endpoint@1 -- -- required: -- - port -+ properties: -+ port@1: -+ $ref: /schemas/graph.yaml#/properties/port -+ description: Output of the DWC HDMI TX - - rockchip,grf: - $ref: /schemas/types.yaml#/definitions/phandle diff --git a/target/linux/rockchip/patches-5.18/249-arm64-dts-rockchip-rk356x-Add-HDMI-audio-nodes.patch b/target/linux/rockchip/patches-5.18/249-arm64-dts-rockchip-rk356x-Add-HDMI-audio-nodes.patch deleted file mode 100644 index e976b511450395..00000000000000 --- a/target/linux/rockchip/patches-5.18/249-arm64-dts-rockchip-rk356x-Add-HDMI-audio-nodes.patch +++ /dev/null @@ -1,64 +0,0 @@ -From f63ef05247648703034ccbccf1fd7ad492fe2c35 Mon Sep 17 00:00:00 2001 -From: Nicolas Frattaroli -Date: Fri, 26 Nov 2021 13:27:17 +0100 -Subject: [PATCH 49/50] arm64: dts: rockchip: rk356x: Add HDMI audio nodes - -This adds the i2s0 node and an hdmi-sound sound device to the -rk356x device tree. On the rk356[68], the i2s0 controller is -connected to HDMI audio. - -Tested-by: Michael Riesch -Signed-off-by: Nicolas Frattaroli ---- - arch/arm64/boot/dts/rockchip/rk356x.dtsi | 33 ++++++++++++++++++++++++ - 1 file changed, 33 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi -@@ -183,6 +183,22 @@ - }; - }; - -+ hdmi_sound: hdmi-sound { -+ compatible = "simple-audio-card"; -+ simple-audio-card,name = "HDMI"; -+ simple-audio-card,format = "i2s"; -+ simple-audio-card,mclk-fs = <256>; -+ status = "disabled"; -+ -+ simple-audio-card,codec { -+ sound-dai = <&hdmi>; -+ }; -+ -+ simple-audio-card,cpu { -+ sound-dai = <&i2s0_8ch>; -+ }; -+ }; -+ - pmu { - compatible = "arm,cortex-a55-pmu"; - interrupts = , -@@ -952,6 +968,23 @@ - #sound-dai-cells = <0>; - status = "disabled"; - }; -+ -+ i2s0_8ch: i2s@fe400000 { -+ compatible = "rockchip,rk3568-i2s-tdm"; -+ reg = <0x0 0xfe400000 0x0 0x1000>; -+ interrupts = ; -+ assigned-clocks = <&cru CLK_I2S0_8CH_TX_SRC>, <&cru CLK_I2S0_8CH_RX_SRC>; -+ assigned-clock-rates = <1188000000>, <1188000000>; -+ clocks = <&cru MCLK_I2S0_8CH_TX>, <&cru MCLK_I2S0_8CH_RX>, <&cru HCLK_I2S0_8CH>; -+ clock-names = "mclk_tx", "mclk_rx", "hclk"; -+ dmas = <&dmac1 0>; -+ dma-names = "tx"; -+ resets = <&cru SRST_M_I2S0_8CH_TX>, <&cru SRST_M_I2S0_8CH_RX>; -+ reset-names = "tx-m", "rx-m"; -+ rockchip,grf = <&grf>; -+ #sound-dai-cells = <0>; -+ status = "disabled"; -+ }; - - i2s1_8ch: i2s@fe410000 { - compatible = "rockchip,rk3568-i2s-tdm"; diff --git a/target/linux/rockchip/patches-5.18/250-arm64-dts-rockchip-Enable-HDMI-audio-on-Quartz64-A.patch b/target/linux/rockchip/patches-5.18/250-arm64-dts-rockchip-Enable-HDMI-audio-on-Quartz64-A.patch deleted file mode 100644 index 12806078e24c7d..00000000000000 --- a/target/linux/rockchip/patches-5.18/250-arm64-dts-rockchip-Enable-HDMI-audio-on-Quartz64-A.patch +++ /dev/null @@ -1,37 +0,0 @@ -From 0e741e34d1f3fc9a01becaa0ed9e0961a262b046 Mon Sep 17 00:00:00 2001 -From: Nicolas Frattaroli -Date: Fri, 26 Nov 2021 13:27:18 +0100 -Subject: [PATCH 50/50] arm64: dts: rockchip: Enable HDMI audio on Quartz64 A - -This enables the i2s0 controller and the hdmi-sound node on -the PINE64 Quartz64 Model A single-board computer. - -Signed-off-by: Nicolas Frattaroli ---- - arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | 8 ++++++++ - 1 file changed, 8 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts -@@ -310,6 +310,10 @@ - }; - }; - -+&hdmi_sound { -+ status = "okay"; -+}; -+ - &i2c0 { - status = "okay"; - -@@ -540,6 +544,10 @@ - status = "okay"; - }; - -+&i2s0_8ch { -+ status = "okay"; -+}; -+ - &i2s1_8ch { - pinctrl-names = "default"; - pinctrl-0 = <&i2s1m0_sclktx diff --git a/target/linux/rockchip/patches-5.18/251-missing-rk3568-cru-bindings.patch b/target/linux/rockchip/patches-5.18/251-missing-rk3568-cru-bindings.patch deleted file mode 100644 index 923ea2fc3706fd..00000000000000 --- a/target/linux/rockchip/patches-5.18/251-missing-rk3568-cru-bindings.patch +++ /dev/null @@ -1,38 +0,0 @@ -From b21445db9818ccb9fa1c0ba81fd3705eb8d347e3 Mon Sep 17 00:00:00 2001 -From: Peter Geis -Date: Wed, 11 May 2022 11:01:12 -0400 -Subject: [PATCH] dt-binding: clock: Add missing rk3568 cru bindings - -The rk3568 cru requires a clock input and a phandle to the grf node. Add -these bindings to clear some dtbs_check warnings. - -Signed-off-by: Peter Geis -Reviewed-by: Krzysztof Kozlowski -Link: https://lore.kernel.org/r/20220511150117.113070-2-pgwipeout@gmail.com -Signed-off-by: Heiko Stuebner ---- - .../bindings/clock/rockchip,rk3568-cru.yaml | 13 +++++++++++++ - 1 file changed, 13 insertions(+) - ---- a/Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml -+++ b/Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml -@@ -34,6 +34,19 @@ properties: - "#reset-cells": - const: 1 - -+ clocks: -+ maxItems: 1 -+ -+ clock-names: -+ const: xin24m -+ -+ rockchip,grf: -+ $ref: /schemas/types.yaml#/definitions/phandle -+ description: -+ Phandle to the syscon managing the "general register files" (GRF), -+ if missing pll rates are not changeable, due to the missing pll -+ lock status. -+ - required: - - compatible - - reg diff --git a/target/linux/rockchip/patches-5.18/252-arm64-dts-rockchip-add-basic-dts-for-the-radxa-rock3-model-a.patch b/target/linux/rockchip/patches-5.18/252-arm64-dts-rockchip-add-basic-dts-for-the-radxa-rock3-model-a.patch deleted file mode 100644 index 1d4e8c4eb9c28a..00000000000000 --- a/target/linux/rockchip/patches-5.18/252-arm64-dts-rockchip-add-basic-dts-for-the-radxa-rock3-model-a.patch +++ /dev/null @@ -1,531 +0,0 @@ -From 22a442e6586c898a6da1fbc57fab1b31dfc3e4b5 Mon Sep 17 00:00:00 2001 -From: Michael Riesch -Date: Thu, 10 Mar 2022 22:03:51 +0100 -Subject: [PATCH] arm64: dts: rockchip: add basic dts for the radxa rock3 model - a - -Add basic device tree for the Radxa ROCK3 Model A board (with -the Rockchip RK3568 SoC) including Ethernet, USB2 and headphone -connector. - -Signed-off-by: Michael Riesch -Link: https://lore.kernel.org/r/20220310210352.451136-3-michael.riesch@wolfvision.net -Signed-off-by: Heiko Stuebner ---- - arch/arm64/boot/dts/rockchip/Makefile | 1 + - .../boot/dts/rockchip/rk3568-rock-3a.dts | 502 ++++++++++++++++++ - 2 files changed, 503 insertions(+) - create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts - ---- a/arch/arm64/boot/dts/rockchip/Makefile -+++ b/arch/arm64/boot/dts/rockchip/Makefile -@@ -62,3 +62,4 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pi - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-a.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb -+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb ---- /dev/null -+++ b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts -@@ -0,0 +1,502 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+ -+/dts-v1/; -+#include -+#include -+#include -+#include "rk3568.dtsi" -+ -+/ { -+ model = "Radxa ROCK3 Model A"; -+ compatible = "radxa,rock3a", "rockchip,rk3568"; -+ -+ aliases { -+ ethernet0 = &gmac1; -+ mmc0 = &sdmmc0; -+ mmc1 = &sdhci; -+ }; -+ -+ chosen: chosen { -+ stdout-path = "serial2:1500000n8"; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ led_user: led-0 { -+ gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; -+ function = LED_FUNCTION_HEARTBEAT; -+ color = ; -+ linux,default-trigger = "heartbeat"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&led_user_en>; -+ }; -+ }; -+ -+ rk809-sound { -+ compatible = "simple-audio-card"; -+ simple-audio-card,format = "i2s"; -+ simple-audio-card,name = "Analog RK809"; -+ simple-audio-card,mclk-fs = <256>; -+ -+ simple-audio-card,cpu { -+ sound-dai = <&i2s1_8ch>; -+ }; -+ -+ simple-audio-card,codec { -+ sound-dai = <&rk809>; -+ }; -+ }; -+ -+ vcc12v_dcin: vcc12v-dcin { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc12v_dcin"; -+ regulator-always-on; -+ regulator-boot-on; -+ }; -+ -+ vcc3v3_sys: vcc3v3-sys { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc3v3_sys"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ vin-supply = <&vcc12v_dcin>; -+ }; -+ -+ vcc5v0_sys: vcc5v0-sys { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc5v0_sys"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ vin-supply = <&vcc12v_dcin>; -+ }; -+ -+ vcc5v0_usb: vcc5v0-usb { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc5v0_usb"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ vin-supply = <&vcc12v_dcin>; -+ }; -+ -+ vcc5v0_usb_host: vcc5v0-usb-host { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&vcc5v0_usb_host_en>; -+ regulator-name = "vcc5v0_usb_host"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ vin-supply = <&vcc5v0_usb>; -+ }; -+}; -+ -+&cpu0 { -+ cpu-supply = <&vdd_cpu>; -+}; -+ -+&cpu1 { -+ cpu-supply = <&vdd_cpu>; -+}; -+ -+&cpu2 { -+ cpu-supply = <&vdd_cpu>; -+}; -+ -+&cpu3 { -+ cpu-supply = <&vdd_cpu>; -+}; -+ -+&gmac1 { -+ assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; -+ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>; -+ assigned-clock-rates = <0>, <125000000>; -+ clock_in_out = "output"; -+ phy-handle = <&rgmii_phy1>; -+ phy-mode = "rgmii-id"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&gmac1m1_miim -+ &gmac1m1_tx_bus2 -+ &gmac1m1_rx_bus2 -+ &gmac1m1_rgmii_clk -+ &gmac1m1_rgmii_bus>; -+ status = "okay"; -+}; -+ -+&gpu { -+ mali-supply = <&vdd_gpu>; -+ status = "okay"; -+}; -+ -+&i2c0 { -+ status = "okay"; -+ -+ vdd_cpu: regulator@1c { -+ compatible = "tcs,tcs4525"; -+ reg = <0x1c>; -+ fcs,suspend-voltage-selector = <1>; -+ regulator-name = "vdd_cpu"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <800000>; -+ regulator-max-microvolt = <1150000>; -+ regulator-ramp-delay = <2300>; -+ vin-supply = <&vcc5v0_sys>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ rk809: pmic@20 { -+ compatible = "rockchip,rk809"; -+ reg = <0x20>; -+ interrupt-parent = <&gpio0>; -+ interrupts = ; -+ assigned-clocks = <&cru I2S1_MCLKOUT_TX>; -+ assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; -+ #clock-cells = <1>; -+ clock-names = "mclk"; -+ clocks = <&cru I2S1_MCLKOUT_TX>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>; -+ rockchip,system-power-controller; -+ #sound-dai-cells = <0>; -+ vcc1-supply = <&vcc3v3_sys>; -+ vcc2-supply = <&vcc3v3_sys>; -+ vcc3-supply = <&vcc3v3_sys>; -+ vcc4-supply = <&vcc3v3_sys>; -+ vcc5-supply = <&vcc3v3_sys>; -+ vcc6-supply = <&vcc3v3_sys>; -+ vcc7-supply = <&vcc3v3_sys>; -+ vcc8-supply = <&vcc3v3_sys>; -+ vcc9-supply = <&vcc3v3_sys>; -+ wakeup-source; -+ -+ regulators { -+ vdd_logic: DCDC_REG1 { -+ regulator-name = "vdd_logic"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-init-microvolt = <900000>; -+ regulator-initial-mode = <0x2>; -+ regulator-min-microvolt = <500000>; -+ regulator-max-microvolt = <1350000>; -+ regulator-ramp-delay = <6001>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vdd_gpu: DCDC_REG2 { -+ regulator-name = "vdd_gpu"; -+ regulator-always-on; -+ regulator-init-microvolt = <900000>; -+ regulator-initial-mode = <0x2>; -+ regulator-min-microvolt = <500000>; -+ regulator-max-microvolt = <1350000>; -+ regulator-ramp-delay = <6001>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc_ddr: DCDC_REG3 { -+ regulator-name = "vcc_ddr"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-initial-mode = <0x2>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ vdd_npu: DCDC_REG4 { -+ regulator-name = "vdd_npu"; -+ regulator-init-microvolt = <900000>; -+ regulator-initial-mode = <0x2>; -+ regulator-min-microvolt = <500000>; -+ regulator-max-microvolt = <1350000>; -+ regulator-ramp-delay = <6001>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc_1v8: DCDC_REG5 { -+ regulator-name = "vcc_1v8"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vdda0v9_image: LDO_REG1 { -+ regulator-name = "vdda0v9_image"; -+ regulator-min-microvolt = <900000>; -+ regulator-max-microvolt = <900000>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vdda_0v9: LDO_REG2 { -+ regulator-name = "vdda_0v9"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <900000>; -+ regulator-max-microvolt = <900000>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vdda0v9_pmu: LDO_REG3 { -+ regulator-name = "vdda0v9_pmu"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <900000>; -+ regulator-max-microvolt = <900000>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <900000>; -+ }; -+ }; -+ -+ vccio_acodec: LDO_REG4 { -+ regulator-name = "vccio_acodec"; -+ regulator-always-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vccio_sd: LDO_REG5 { -+ regulator-name = "vccio_sd"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc3v3_pmu: LDO_REG6 { -+ regulator-name = "vcc3v3_pmu"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3300000>; -+ }; -+ }; -+ -+ vcca_1v8: LDO_REG7 { -+ regulator-name = "vcca_1v8"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcca1v8_pmu: LDO_REG8 { -+ regulator-name = "vcca1v8_pmu"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vcca1v8_image: LDO_REG9 { -+ regulator-name = "vcca1v8_image"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc_3v3: SWITCH_REG1 { -+ regulator-name = "vcc_3v3"; -+ regulator-always-on; -+ regulator-boot-on; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc3v3_sd: SWITCH_REG2 { -+ regulator-name = "vcc3v3_sd"; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ }; -+ -+ codec { -+ mic-in-differential; -+ }; -+ }; -+}; -+ -+&i2s1_8ch { -+ rockchip,trcm-sync-tx-only; -+ status = "okay"; -+}; -+ -+&mdio1 { -+ rgmii_phy1: ethernet-phy@0 { -+ compatible = "ethernet-phy-ieee802.3-c22"; -+ reg = <0x0>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <ð_phy_rst>; -+ reset-assert-us = <20000>; -+ reset-deassert-us = <100000>; -+ reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; -+ }; -+}; -+ -+&pinctrl { -+ ethernet { -+ eth_phy_rst: eth_phy_rst { -+ rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ leds { -+ led_user_en: led_user_en { -+ rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ pmic { -+ pmic_int: pmic_int { -+ rockchip,pins = -+ <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+ -+ usb { -+ vcc5v0_usb_host_en: vcc5v0_usb_host_en { -+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+}; -+ -+&pmu_io_domains { -+ pmuio1-supply = <&vcc3v3_pmu>; -+ pmuio2-supply = <&vcc3v3_pmu>; -+ vccio1-supply = <&vccio_acodec>; -+ vccio2-supply = <&vcc_1v8>; -+ vccio3-supply = <&vccio_sd>; -+ vccio4-supply = <&vcc_1v8>; -+ vccio5-supply = <&vcc_3v3>; -+ vccio6-supply = <&vcc_1v8>; -+ vccio7-supply = <&vcc_3v3>; -+ status = "okay"; -+}; -+ -+&saradc { -+ vref-supply = <&vcca_1v8>; -+ status = "okay"; -+}; -+ -+&sdhci { -+ bus-width = <8>; -+ max-frequency = <200000000>; -+ non-removable; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; -+ vmmc-supply = <&vcc_3v3>; -+ vqmmc-supply = <&vcc_1v8>; -+ status = "okay"; -+}; -+ -+&sdmmc0 { -+ bus-width = <4>; -+ cap-sd-highspeed; -+ cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; -+ disable-wp; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; -+ sd-uhs-sdr104; -+ vmmc-supply = <&vcc3v3_sd>; -+ vqmmc-supply = <&vccio_sd>; -+ status = "okay"; -+}; -+ -+&tsadc { -+ rockchip,hw-tshut-mode = <1>; -+ rockchip,hw-tshut-polarity = <0>; -+ status = "okay"; -+}; -+ -+&uart2 { -+ status = "okay"; -+}; -+ -+&usb_host0_ehci { -+ status = "okay"; -+}; -+ -+&usb_host0_ohci { -+ status = "okay"; -+}; -+ -+&usb_host1_ehci { -+ status = "okay"; -+}; -+ -+&usb_host1_ohci { -+ status = "okay"; -+}; -+ -+&usb2phy1 { -+ status = "okay"; -+}; -+ -+&usb2phy1_host { -+ phy-supply = <&vcc5v0_usb_host>; -+ status = "okay"; -+}; -+ -+&usb2phy1_otg { -+ phy-supply = <&vcc5v0_usb_host>; -+ status = "okay"; -+}; diff --git a/target/linux/rockchip/patches-5.18/253-arm64-dts-rockchip-add-usb3-support-to-the-radxa-rock3-model-a.patch b/target/linux/rockchip/patches-5.18/253-arm64-dts-rockchip-add-usb3-support-to-the-radxa-rock3-model-a.patch deleted file mode 100644 index c972cec2ce841d..00000000000000 --- a/target/linux/rockchip/patches-5.18/253-arm64-dts-rockchip-add-usb3-support-to-the-radxa-rock3-model-a.patch +++ /dev/null @@ -1,92 +0,0 @@ -From 254a1f6a29e7a273adb1a1d032305ec58ef83a69 Mon Sep 17 00:00:00 2001 -From: Michael Riesch -Date: Mon, 25 Apr 2022 15:35:01 +0200 -Subject: [PATCH] arm64: dts: rockchip: add usb3 support to the radxa rock3 - model a - -The Radxa ROCK3 Model A features one USB 3.0 host port and one USB 3.0 -OTG/DRD port. Enable them in the device tree. - -Signed-off-by: Michael Riesch -Link: https://lore.kernel.org/r/20220425133502.405512-2-michael.riesch@wolfvision.net -Signed-off-by: Heiko Stuebner ---- - .../boot/dts/rockchip/rk3568-rock-3a.dts | 46 +++++++++++++++++++ - 1 file changed, 46 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts -@@ -96,6 +96,26 @@ - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_usb>; - }; -+ -+ vcc5v0_usb_otg: vcc5v0-usb-otg-regulator { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&vcc5v0_usb_otg_en>; -+ regulator-name = "vcc5v0_usb_otg"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ vin-supply = <&vcc5v0_usb>; -+ }; -+}; -+ -+&combphy0 { -+ status = "okay"; -+}; -+ -+&combphy1 { -+ status = "okay"; - }; - - &cpu0 { -@@ -416,6 +436,9 @@ - vcc5v0_usb_host_en: vcc5v0_usb_host_en { - rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; - }; -+ vcc5v0_usb_otg_en: vcc5v0_usb_otg_en { -+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; - }; - }; - -@@ -479,6 +502,11 @@ - status = "okay"; - }; - -+&usb_host0_xhci { -+ extcon = <&usb2phy0>; -+ status = "okay"; -+}; -+ - &usb_host1_ehci { - status = "okay"; - }; -@@ -487,6 +515,24 @@ - status = "okay"; - }; - -+&usb_host1_xhci { -+ status = "okay"; -+}; -+ -+&usb2phy0 { -+ status = "okay"; -+}; -+ -+&usb2phy0_host { -+ phy-supply = <&vcc5v0_usb_host>; -+ status = "okay"; -+}; -+ -+&usb2phy0_otg { -+ vbus-supply = <&vcc5v0_usb_otg>; -+ status = "okay"; -+}; -+ - &usb2phy1 { - status = "okay"; - }; diff --git a/target/linux/rockchip/patches-5.18/254-arm64-dts-rockchip-enable-usb-hub-on-the-radxa-rock3-model-a.patch b/target/linux/rockchip/patches-5.18/254-arm64-dts-rockchip-enable-usb-hub-on-the-radxa-rock3-model-a.patch deleted file mode 100644 index 9cc5559d9e4264..00000000000000 --- a/target/linux/rockchip/patches-5.18/254-arm64-dts-rockchip-enable-usb-hub-on-the-radxa-rock3-model-a.patch +++ /dev/null @@ -1,46 +0,0 @@ -From 160f126b89e10bd58491e10067a44c7e3f85fa2c Mon Sep 17 00:00:00 2001 -From: Michael Riesch -Date: Mon, 25 Apr 2022 15:35:02 +0200 -Subject: [PATCH] arm64: dts: rockchip: enable usb hub on the radxa rock3 model - a - -One USB 2.0 host port on the Radxa ROCK3 Model A is connected to the -SoC via a hub. Introduce a voltage regulator to enable this USB hub. - -Signed-off-by: Michael Riesch -Link: https://lore.kernel.org/r/20220425133502.405512-3-michael.riesch@wolfvision.net -Signed-off-by: Heiko Stuebner ---- - arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts | 14 ++++++++++++++ - 1 file changed, 14 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts -@@ -97,6 +97,17 @@ - vin-supply = <&vcc5v0_usb>; - }; - -+ vcc5v0_usb_hub: vcc5v0-usb-hub-regulator { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&vcc5v0_usb_hub_en>; -+ regulator-name = "vcc5v0_usb_hub"; -+ regulator-always-on; -+ vin-supply = <&vcc5v0_usb>; -+ }; -+ - vcc5v0_usb_otg: vcc5v0-usb-otg-regulator { - compatible = "regulator-fixed"; - enable-active-high; -@@ -436,6 +447,9 @@ - vcc5v0_usb_host_en: vcc5v0_usb_host_en { - rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; - }; -+ vcc5v0_usb_hub_en: vcc5v0_usb_hub_en { -+ rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; - vcc5v0_usb_otg_en: vcc5v0_usb_otg_en { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; - }; diff --git a/target/linux/rockchip/patches-5.18/255-rorck-3a-add-pcie-hdmi.patch b/target/linux/rockchip/patches-5.18/255-rorck-3a-add-pcie-hdmi.patch deleted file mode 100644 index eefc8f6791b011..00000000000000 --- a/target/linux/rockchip/patches-5.18/255-rorck-3a-add-pcie-hdmi.patch +++ /dev/null @@ -1,211 +0,0 @@ ---- a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts -@@ -4,6 +4,7 @@ - #include - #include - #include -+#include - #include "rk3568.dtsi" - - / { -@@ -20,6 +21,24 @@ - stdout-path = "serial2:1500000n8"; - }; - -+ gmac1_clkin: external-gmac1-clock { -+ compatible = "fixed-clock"; -+ clock-frequency = <125000000>; -+ clock-output-names = "gmac1_clkin"; -+ #clock-cells = <0>; -+ }; -+ -+ hdmi-con { -+ compatible = "hdmi-connector"; -+ type = "a"; -+ -+ port { -+ hdmi_con_in: endpoint { -+ remote-endpoint = <&hdmi_out_con>; -+ }; -+ }; -+ }; -+ - leds { - compatible = "gpio-leds"; - -@@ -94,7 +113,8 @@ - regulator-name = "vcc5v0_usb_host"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; -- vin-supply = <&vcc5v0_usb>; -+ regulator-always-on; -+ regulator-boot-on; - }; - - vcc5v0_usb_hub: vcc5v0-usb-hub-regulator { -@@ -117,7 +137,41 @@ - regulator-name = "vcc5v0_usb_otg"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; -- vin-supply = <&vcc5v0_usb>; -+ regulator-always-on; -+ regulator-boot-on; -+ }; -+ -+ pcie30_avdd0v9: pcie30-avdd0v9 { -+ compatible = "regulator-fixed"; -+ regulator-name = "pcie30_avdd0v9"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <900000>; -+ regulator-max-microvolt = <900000>; -+ vin-supply = <&vcc3v3_sys>; -+ }; -+ -+ pcie30_avdd1v8: pcie30-avdd1v8 { -+ compatible = "regulator-fixed"; -+ regulator-name = "pcie30_avdd1v8"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ vin-supply = <&vcc3v3_sys>; -+ }; -+ -+ pcie30_3v3: gpio-regulator { -+ compatible = "regulator-gpio"; -+ regulator-name = "pcie30_3v3"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <100000>; -+ regulator-max-microvolt = <3300000>; -+ gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; -+ gpios-states = <0x1>; -+ states = <100000 0x0 -+ 3300000 0x1>; - }; - }; - -@@ -145,19 +199,33 @@ - cpu-supply = <&vdd_cpu>; - }; - -+&combphy2 { -+ status = "okay"; -+}; -+ - &gmac1 { -+ snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; -+ snps,reset-active-low; -+ /* Reset time is 20ms, 100ms for rtl8211f */ -+ snps,reset-delays-us = <0 20000 100000>; -+ - assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; -- assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>; -- assigned-clock-rates = <0>, <125000000>; -- clock_in_out = "output"; -+ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>; -+ clock_in_out = "input"; - phy-handle = <&rgmii_phy1>; -- phy-mode = "rgmii-id"; -+ phy-mode = "rgmii"; -+ - pinctrl-names = "default"; - pinctrl-0 = <&gmac1m1_miim - &gmac1m1_tx_bus2 - &gmac1m1_rx_bus2 - &gmac1m1_rgmii_clk -- &gmac1m1_rgmii_bus>; -+ &gmac1m1_rgmii_bus -+ &gmac1m1_clkinout>; -+ -+ tx_delay = <0x4f>; -+ rx_delay = <0x26>; -+ - status = "okay"; - }; - -@@ -166,6 +234,24 @@ - status = "okay"; - }; - -+&hdmi { -+ avdd-0v9-supply = <&vdda0v9_image>; -+ avdd-1v8-supply = <&vcca1v8_image>; -+ status = "okay"; -+}; -+ -+&hdmi_in { -+ hdmi_in_vp0: endpoint { -+ remote-endpoint = <&vp0_out_hdmi>; -+ }; -+}; -+ -+&hdmi_out { -+ hdmi_out_con: endpoint { -+ remote-endpoint = <&hdmi_con_in>; -+ }; -+}; -+ - &i2c0 { - status = "okay"; - -@@ -415,11 +501,6 @@ - rgmii_phy1: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x0>; -- pinctrl-names = "default"; -- pinctrl-0 = <ð_phy_rst>; -- reset-assert-us = <20000>; -- reset-deassert-us = <100000>; -- reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; - }; - }; - -@@ -498,6 +579,17 @@ - status = "okay"; - }; - -+&sfc { -+ status = "okay"; -+ flash@0 { -+ compatible = "jedec,spi-nor"; -+ reg = <0>; -+ spi-max-frequency = <108000000>; -+ spi-rx-bus-width = <2>; -+ spi-tx-bus-width = <2>; -+ }; -+}; -+ - &tsadc { - rockchip,hw-tshut-mode = <1>; - rockchip,hw-tshut-polarity = <0>; -@@ -560,3 +652,28 @@ - phy-supply = <&vcc5v0_usb_host>; - status = "okay"; - }; -+ -+&pcie2x1 { -+ reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>; -+ vpcie3v3-supply = <&pcie30_3v3>; -+ pinctrl-0 = <&pcie20m1_pins>; -+ bus-scan-delay-ms = <1000>; -+ status = "okay"; -+}; -+ -+&vop { -+ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; -+ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; -+ status = "okay"; -+}; -+ -+&vop_mmu { -+ status = "okay"; -+}; -+ -+&vp0 { -+ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { -+ reg = ; -+ remote-endpoint = <&hdmi_in_vp0>; -+ }; -+}; diff --git a/target/linux/rockchip/patches-5.18/256-rk356x-pcie3-support.patch b/target/linux/rockchip/patches-5.18/256-rk356x-pcie3-support.patch deleted file mode 100644 index f3fd44b0247ae4..00000000000000 --- a/target/linux/rockchip/patches-5.18/256-rk356x-pcie3-support.patch +++ /dev/null @@ -1,539 +0,0 @@ ---- /dev/null -+++ b/include/dt-bindings/phy/phy-rockchip-pcie3.h -@@ -0,0 +1,21 @@ -+/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ -+/* -+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd. -+ */ -+ -+#ifndef _DT_BINDINGS_PHY_ROCKCHIP_PCIE3 -+#define _DT_BINDINGS_PHY_ROCKCHIP_PCIE3 -+ -+/* -+ * pcie30_phy_mode[2:0] -+ * bit2: aggregation -+ * bit1: bifurcation for port 1 -+ * bit0: bifurcation for port 0 -+ */ -+#define PHY_MODE_PCIE_AGGREGATION 4 /* PCIe3x4 */ -+#define PHY_MODE_PCIE_NANBNB 0 /* P1:PCIe3x2 + P0:PCIe3x2 */ -+#define PHY_MODE_PCIE_NANBBI 1 /* P1:PCIe3x2 + P0:PCIe3x1*2 */ -+#define PHY_MODE_PCIE_NABINB 2 /* P1:PCIe3x1*2 + P0:PCIe3x2 */ -+#define PHY_MODE_PCIE_NABIBI 3 /* P1:PCIe3x1*2 + P0:PCIe3x1*2 */ -+ -+#endif /* _DT_BINDINGS_PHY_ROCKCHIP_PCIE3 */ ---- a/drivers/phy/rockchip/Kconfig -+++ b/drivers/phy/rockchip/Kconfig -@@ -83,6 +83,15 @@ config PHY_ROCKCHIP_PCIE - help - Enable this to support the Rockchip PCIe PHY. - -+config PHY_ROCKCHIP_SNPS_PCIE3 -+ tristate "Rockchip Snps PCIe3 PHY Driver" -+ depends on (ARCH_ROCKCHIP && OF) || COMPILE_TEST -+ depends on HAS_IOMEM -+ select GENERIC_PHY -+ select MFD_SYSCON -+ help -+ Enable this to support the Rockchip snps PCIe3 PHY. -+ - config PHY_ROCKCHIP_TYPEC - tristate "Rockchip TYPEC PHY Driver" - depends on OF && (ARCH_ROCKCHIP || COMPILE_TEST) ---- a/drivers/phy/rockchip/Makefile -+++ b/drivers/phy/rockchip/Makefile -@@ -8,5 +8,6 @@ obj-$(CONFIG_PHY_ROCKCHIP_INNO_HDMI) += - obj-$(CONFIG_PHY_ROCKCHIP_INNO_USB2) += phy-rockchip-inno-usb2.o - obj-$(CONFIG_PHY_ROCKCHIP_NANENG_COMBO_PHY) += phy-rockchip-naneng-combphy.o - obj-$(CONFIG_PHY_ROCKCHIP_PCIE) += phy-rockchip-pcie.o -+obj-$(CONFIG_PHY_ROCKCHIP_SNPS_PCIE3) += phy-rockchip-snps-pcie3.o - obj-$(CONFIG_PHY_ROCKCHIP_TYPEC) += phy-rockchip-typec.o - obj-$(CONFIG_PHY_ROCKCHIP_USB) += phy-rockchip-usb.o ---- /dev/null -+++ b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c -@@ -0,0 +1,278 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Rockchip PCIE3.0 phy driver -+ * -+ * Copyright (C) 2020 Rockchip Electronics Co., Ltd. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+/* Register for RK3568 */ -+#define GRF_PCIE30PHY_CON1 0x4 -+#define GRF_PCIE30PHY_CON6 0x18 -+#define GRF_PCIE30PHY_CON9 0x24 -+#define GRF_PCIE30PHY_STATUS0 0x80 -+#define SRAM_INIT_DONE(reg) (reg & BIT(14)) -+ -+/* Register for RK3588 */ -+#define PHP_GRF_PCIESEL_CON 0x100 -+#define RK3588_PCIE3PHY_GRF_CMN_CON0 0x0 -+#define RK3588_PCIE3PHY_GRF_PHY0_STATUS1 0x904 -+#define RK3588_PCIE3PHY_GRF_PHY1_STATUS1 0xa04 -+#define RK3588_SRAM_INIT_DONE(reg) (reg & BIT(0)) -+ -+struct rockchip_p3phy_ops; -+ -+struct rockchip_p3phy_priv { -+ const struct rockchip_p3phy_ops *ops; -+ void __iomem *mmio; -+ /* mode: RC, EP */ -+ int mode; -+ /* pcie30_phymode: Aggregation, Bifurcation */ -+ int pcie30_phymode; -+ struct regmap *phy_grf; -+ struct regmap *pipe_grf; -+ struct reset_control *p30phy; -+ struct phy *phy; -+ struct clk_bulk_data *clks; -+ int num_clks; -+ bool is_bifurcation; -+}; -+ -+struct rockchip_p3phy_ops { -+ int (*phy_init)(struct rockchip_p3phy_priv *priv); -+}; -+ -+static int rockchip_p3phy_set_mode(struct phy *phy, enum phy_mode mode, int submode) -+{ -+ struct rockchip_p3phy_priv *priv = phy_get_drvdata(phy); -+ -+ /* Actually We don't care EP/RC mode, but just record it */ -+ switch (submode) { -+ case PHY_MODE_PCIE_RC: -+ priv->mode = PHY_MODE_PCIE_RC; -+ break; -+ case PHY_MODE_PCIE_EP: -+ priv->mode = PHY_MODE_PCIE_EP; -+ break; -+ case PHY_MODE_PCIE_BIFURCATION: -+ priv->is_bifurcation = true; -+ break; -+ default: -+ dev_err(&phy->dev, "%s, invalid mode\n", __func__); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static int rockchip_p3phy_rk3568_init(struct rockchip_p3phy_priv *priv) -+{ -+ int ret; -+ u32 reg; -+ -+ /* Deassert PCIe PMA output clamp mode */ -+ regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON9, -+ BIT(15) | BIT(31)); -+ /* Set bifurcation if needed, and it doesn't care RC/EP */ -+ if (priv->is_bifurcation) { -+ regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON6, -+ 0x1 | (0xf << 16)); -+ regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON1, -+ BIT(15) | BIT(31)); -+ } -+ -+ reset_control_deassert(priv->p30phy); -+ -+ ret = regmap_read_poll_timeout(priv->phy_grf, -+ GRF_PCIE30PHY_STATUS0, -+ reg, SRAM_INIT_DONE(reg), -+ 0, 500); -+ if (ret) -+ dev_err(&priv->phy->dev, "%s: lock failed 0x%x, check input refclk and power supply\n", -+ __func__, reg); -+ return ret; -+} -+ -+static const struct rockchip_p3phy_ops rk3568_ops = { -+ .phy_init = rockchip_p3phy_rk3568_init, -+}; -+ -+static int rockchip_p3phy_rk3588_init(struct rockchip_p3phy_priv *priv) -+{ -+ int ret; -+ u32 reg; -+ -+ /* Deassert PCIe PMA output clamp mode */ -+ regmap_write(priv->phy_grf, RK3588_PCIE3PHY_GRF_CMN_CON0, -+ BIT(8) | BIT(24)); -+ -+ reset_control_deassert(priv->p30phy); -+ -+ ret = regmap_read_poll_timeout(priv->phy_grf, -+ RK3588_PCIE3PHY_GRF_PHY0_STATUS1, -+ reg, RK3588_SRAM_INIT_DONE(reg), -+ 0, 500); -+ ret |= regmap_read_poll_timeout(priv->phy_grf, -+ RK3588_PCIE3PHY_GRF_PHY1_STATUS1, -+ reg, RK3588_SRAM_INIT_DONE(reg), -+ 0, 500); -+ if (ret) -+ pr_err("%s: lock failed 0x%x, check input refclk and power supply\n", -+ __func__, reg); -+ return ret; -+} -+ -+static const struct rockchip_p3phy_ops rk3588_ops = { -+ .phy_init = rockchip_p3phy_rk3588_init, -+}; -+ -+static int rochchip_p3phy_init(struct phy *phy) -+{ -+ struct rockchip_p3phy_priv *priv = phy_get_drvdata(phy); -+ int ret; -+ -+ ret = clk_bulk_prepare_enable(priv->num_clks, priv->clks); -+ if (ret) { -+ pr_err("failed to enable PCIe bulk clks %d\n", ret); -+ return ret; -+ } -+ -+ reset_control_assert(priv->p30phy); -+ udelay(1); -+ -+ if (priv->ops->phy_init) { -+ ret = priv->ops->phy_init(priv); -+ if (ret) -+ clk_bulk_disable_unprepare(priv->num_clks, priv->clks); -+ } -+ -+ return ret; -+} -+ -+static int rochchip_p3phy_exit(struct phy *phy) -+{ -+ struct rockchip_p3phy_priv *priv = phy_get_drvdata(phy); -+ -+ clk_bulk_disable_unprepare(priv->num_clks, priv->clks); -+ reset_control_assert(priv->p30phy); -+ return 0; -+} -+ -+static const struct phy_ops rochchip_p3phy_ops = { -+ .init = rochchip_p3phy_init, -+ .exit = rochchip_p3phy_exit, -+ .set_mode = rockchip_p3phy_set_mode, -+ .owner = THIS_MODULE, -+}; -+ -+static int rockchip_p3phy_probe(struct platform_device *pdev) -+{ -+ struct phy_provider *phy_provider; -+ struct device *dev = &pdev->dev; -+ struct rockchip_p3phy_priv *priv; -+ struct device_node *np = dev->of_node; -+ struct resource *res; -+ int ret; -+ u32 val, reg; -+ -+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); -+ if (!priv) -+ return -ENOMEM; -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ priv->mmio = devm_ioremap_resource(dev, res); -+ if (IS_ERR(priv->mmio)) { -+ ret = PTR_ERR(priv->mmio); -+ return ret; -+ } -+ -+ priv->ops = of_device_get_match_data(&pdev->dev); -+ if (!priv->ops) { -+ dev_err(&pdev->dev, "no of match data provided\n"); -+ return -EINVAL; -+ } -+ -+ priv->phy_grf = syscon_regmap_lookup_by_phandle(np, "rockchip,phy-grf"); -+ if (IS_ERR(priv->phy_grf)) { -+ dev_err(dev, "failed to find rockchip,phy_grf regmap\n"); -+ return PTR_ERR(priv->phy_grf); -+ } -+ -+ priv->pipe_grf = syscon_regmap_lookup_by_phandle(dev->of_node, -+ "rockchip,pipe-grf"); -+ if (IS_ERR(priv->pipe_grf)) -+ dev_info(dev, "failed to find rockchip,pipe_grf regmap\n"); -+ -+ ret = device_property_read_u32(dev, "rockchip,pcie30-phymode", &val); -+ if (!ret) -+ priv->pcie30_phymode = val; -+ else -+ priv->pcie30_phymode = PHY_MODE_PCIE_AGGREGATION; -+ -+ /* Select correct pcie30_phymode */ -+ if (priv->pcie30_phymode > 4) -+ priv->pcie30_phymode = PHY_MODE_PCIE_AGGREGATION; -+ -+ regmap_write(priv->phy_grf, RK3588_PCIE3PHY_GRF_CMN_CON0, -+ (0x7<<16) | priv->pcie30_phymode); -+ -+ /* Set pcie1ln_sel in PHP_GRF_PCIESEL_CON */ -+ if (!IS_ERR(priv->pipe_grf)) { -+ reg = priv->pcie30_phymode & 3; -+ if (reg) -+ regmap_write(priv->pipe_grf, PHP_GRF_PCIESEL_CON, -+ (reg << 16) | reg); -+ } -+ -+ priv->phy = devm_phy_create(dev, NULL, &rochchip_p3phy_ops); -+ if (IS_ERR(priv->phy)) { -+ dev_err(dev, "failed to create combphy\n"); -+ return PTR_ERR(priv->phy); -+ } -+ -+ priv->p30phy = devm_reset_control_get_exclusive(dev, "phy"); -+ if (IS_ERR(priv->p30phy)) { -+ dev_warn(dev, "no phy reset control specified\n"); -+ priv->p30phy = NULL; -+ } -+ -+ priv->num_clks = devm_clk_bulk_get_all(dev, &priv->clks); -+ if (priv->num_clks < 1) -+ return -ENODEV; -+ -+ dev_set_drvdata(dev, priv); -+ phy_set_drvdata(priv->phy, priv); -+ phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); -+ return PTR_ERR_OR_ZERO(phy_provider); -+} -+ -+static const struct of_device_id rockchip_p3phy_of_match[] = { -+ { .compatible = "rockchip,rk3568-pcie3-phy", .data = &rk3568_ops }, -+ { .compatible = "rockchip,rk3588-pcie3-phy", .data = &rk3588_ops }, -+ { }, -+}; -+MODULE_DEVICE_TABLE(of, rockchip_p3phy_of_match); -+ -+static struct platform_driver rockchip_p3phy_driver = { -+ .probe = rockchip_p3phy_probe, -+ .driver = { -+ .name = "rockchip-snps-pcie3-phy", -+ .of_match_table = rockchip_p3phy_of_match, -+ }, -+}; -+module_platform_driver(rockchip_p3phy_driver); -+MODULE_DESCRIPTION("Rockchip Synopsys PCIe 3.0 PHY driver"); -+MODULE_LICENSE("GPL"); ---- /dev/null -+++ b/include/linux/phy/pcie.h -@@ -0,0 +1,12 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd. -+ */ -+#ifndef __PHY_PCIE_H -+#define __PHY_PCIE_H -+ -+#define PHY_MODE_PCIE_RC 20 -+#define PHY_MODE_PCIE_EP 21 -+#define PHY_MODE_PCIE_BIFURCATION 22 -+ -+#endif ---- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c -+++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c -@@ -20,6 +20,7 @@ - #include - #include - #include -+#include - - #include "pcie-designware.h" - -@@ -58,6 +59,8 @@ struct rockchip_pcie { - struct gpio_desc *rst_gpio; - struct regulator *vpcie3v3; - struct irq_domain *irq_domain; -+ bool bifurcation; -+ u32 lane_map[2]; - }; - - static int rockchip_pcie_readl_apb(struct rockchip_pcie *rockchip, -@@ -262,6 +265,12 @@ static int rockchip_pcie_phy_init(struct - return dev_err_probe(dev, PTR_ERR(rockchip->phy), - "missing PHY\n"); - -+ if (rockchip->bifurcation) { -+ ret = phy_set_mode_ext(rockchip->phy, PHY_MODE_PCIE, PHY_MODE_PCIE_BIFURCATION); -+ if (ret) -+ return ret; -+ } -+ - ret = phy_init(rockchip->phy); - if (ret < 0) - return ret; -@@ -288,8 +297,10 @@ static int rockchip_pcie_probe(struct pl - { - struct device *dev = &pdev->dev; - struct rockchip_pcie *rockchip; -+ unsigned int lanecnt = 0; - struct pcie_port *pp; - int ret; -+ int len; - - rockchip = devm_kzalloc(dev, sizeof(*rockchip), GFP_KERNEL); - if (!rockchip) -@@ -326,6 +337,17 @@ static int rockchip_pcie_probe(struct pl - } - } - -+ len = of_property_read_variable_u32_array(dev->of_node, "lane-map", rockchip->lane_map, -+ 2, ARRAY_SIZE(rockchip->lane_map)); -+ -+ for (int i = 0; i < len; i++) -+ if (rockchip->lane_map[i]) -+ lanecnt++; -+ -+ rockchip->bifurcation = ((lanecnt > 0) && (lanecnt != len)); -+ -+ dev_info(dev, "bifurcation: %s\n", rockchip->bifurcation ? "true" : "false"); -+ - ret = rockchip_pcie_phy_init(rockchip); - if (ret) - goto disable_regulator; ---- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi -@@ -42,6 +42,128 @@ - reg = <0x0 0xfe190200 0x0 0x20>; - }; - -+ pcie30_phy_grf: syscon@fdcb8000 { -+ compatible = "rockchip,rk3568-pcie3-phy-grf", "syscon"; -+ reg = <0x0 0xfdcb8000 0x0 0x10000>; -+ }; -+ -+ pcie30phy: phy@fe8c0000 { -+ compatible = "rockchip,rk3568-pcie3-phy"; -+ reg = <0x0 0xfe8c0000 0x0 0x20000>; -+ #phy-cells = <0>; -+ clocks = <&pmucru CLK_PCIE30PHY_REF_M>, <&pmucru CLK_PCIE30PHY_REF_N>, -+ <&cru PCLK_PCIE30PHY>; -+ clock-names = "refclk_m", "refclk_n", "pclk"; -+ resets = <&cru SRST_PCIE30PHY>; -+ reset-names = "phy"; -+ rockchip,phy-grf = <&pcie30_phy_grf>; -+ status = "disabled"; -+ }; -+ -+ pcie3x1: pcie@fe270000 { -+ compatible = "rockchip,rk3568-pcie"; -+ #address-cells = <3>; -+ #size-cells = <2>; -+ bus-range = <0x10 0x1f>; -+ clocks = <&cru ACLK_PCIE30X1_MST>, <&cru ACLK_PCIE30X1_SLV>, -+ <&cru ACLK_PCIE30X1_DBI>, <&cru PCLK_PCIE30X1>, -+ <&cru CLK_PCIE30X1_AUX_NDFT>; -+ clock-names = "aclk_mst", "aclk_slv", -+ "aclk_dbi", "pclk", "aux"; -+ device_type = "pci"; -+ interrupts = , -+ , -+ , -+ , -+ ; -+ interrupt-names = "sys", "pmc", "msg", "legacy", "err"; -+ #interrupt-cells = <1>; -+ interrupt-map-mask = <0 0 0 7>; -+ interrupt-map = <0 0 0 1 &pcie3x1_intc 0>, -+ <0 0 0 2 &pcie3x1_intc 1>, -+ <0 0 0 3 &pcie3x1_intc 2>, -+ <0 0 0 4 &pcie3x1_intc 3>; -+ linux,pci-domain = <1>; -+ num-ib-windows = <6>; -+ num-ob-windows = <2>; -+ max-link-speed = <3>; -+ msi-map = <0x1000 &gic 0x1000 0x1000>; -+ num-lanes = <1>; -+ phys = <&pcie30phy>; -+ phy-names = "pcie-phy"; -+ power-domains = <&power RK3568_PD_PIPE>; -+ reg = <0x3 0xc0400000 0x0 0x00400000>, -+ <0x0 0xfe270000 0x0 0x00010000>, -+ <0x3 0x40000000 0x0 0x01000000>; -+ ranges = <0x01000000 0x0 0x01000000 0x3 0x41000000 0x0 0x00100000>, -+ <0x02000000 0x0 0x02000000 0x3 0x41100000 0x0 0x3ef00000>; -+ reg-names = "dbi", "apb", "config"; -+ resets = <&cru SRST_PCIE30X1_POWERUP>; -+ reset-names = "pipe"; -+ /* bifurcation; lane1 when using 1+1 */ -+ status = "disabled"; -+ -+ pcie3x1_intc: legacy-interrupt-controller { -+ interrupt-controller; -+ #address-cells = <0>; -+ #interrupt-cells = <1>; -+ interrupt-parent = <&gic>; -+ interrupts = ; -+ }; -+ }; -+ -+ pcie3x2: pcie@fe280000 { -+ compatible = "rockchip,rk3568-pcie"; -+ #address-cells = <3>; -+ #size-cells = <2>; -+ bus-range = <0x20 0x2f>; -+ clocks = <&cru ACLK_PCIE30X2_MST>, <&cru ACLK_PCIE30X2_SLV>, -+ <&cru ACLK_PCIE30X2_DBI>, <&cru PCLK_PCIE30X2>, -+ <&cru CLK_PCIE30X2_AUX_NDFT>; -+ clock-names = "aclk_mst", "aclk_slv", -+ "aclk_dbi", "pclk", "aux"; -+ device_type = "pci"; -+ interrupts = , -+ , -+ , -+ , -+ ; -+ interrupt-names = "sys", "pmc", "msg", "legacy", "err"; -+ #interrupt-cells = <1>; -+ interrupt-map-mask = <0 0 0 7>; -+ interrupt-map = <0 0 0 1 &pcie3x2_intc 0>, -+ <0 0 0 2 &pcie3x2_intc 1>, -+ <0 0 0 3 &pcie3x2_intc 2>, -+ <0 0 0 4 &pcie3x2_intc 3>; -+ linux,pci-domain = <2>; -+ num-ib-windows = <6>; -+ num-ob-windows = <2>; -+ max-link-speed = <3>; -+ msi-map = <0x2000 &gic 0x2000 0x1000>; -+ num-lanes = <2>; -+ phys = <&pcie30phy>; -+ phy-names = "pcie-phy"; -+ power-domains = <&power RK3568_PD_PIPE>; -+ reg = <0x3 0xc0800000 0x0 0x00400000>, -+ <0x0 0xfe280000 0x0 0x00010000>, -+ <0x3 0x80000000 0x0 0x01000000>; -+ ranges = <0x01000000 0x0 0x01000000 0x3 0x81000000 0x0 0x00100000>, -+ <0x02000000 0x0 0x02000000 0x3 0x81100000 0x0 0x3ef00000>; -+ reg-names = "dbi", "apb", "config"; -+ resets = <&cru SRST_PCIE30X2_POWERUP>; -+ reset-names = "pipe"; -+ /* bifurcation; lane0 when using 1+1 */ -+ status = "disabled"; -+ -+ pcie3x2_intc: legacy-interrupt-controller { -+ interrupt-controller; -+ #address-cells = <0>; -+ #interrupt-cells = <1>; -+ interrupt-parent = <&gic>; -+ interrupts = ; -+ }; -+ }; -+ - gmac0: ethernet@fe2a0000 { - compatible = "rockchip,rk3568-gmac", "snps,dwmac-4.20a"; - reg = <0x0 0xfe2a0000 0x0 0x10000>; diff --git a/target/linux/rockchip/patches-5.18/257-add-PCIe-3-to-ROCK3A.patch b/target/linux/rockchip/patches-5.18/257-add-PCIe-3-to-ROCK3A.patch deleted file mode 100644 index b643980e855ef4..00000000000000 --- a/target/linux/rockchip/patches-5.18/257-add-PCIe-3-to-ROCK3A.patch +++ /dev/null @@ -1,22 +0,0 @@ ---- a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts -@@ -653,6 +653,19 @@ - status = "okay"; - }; - -+&pcie30phy { -+ status = "okay"; -+}; -+ -+&pcie3x2 { -+ reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; -+ vpcie3v3-supply = <&pcie30_3v3>; -+ //num-lanes = <2>; -+ pinctrl-0 = <&pcie30x2m1_pins>; -+ bus-scan-delay-ms = <1000>; -+ status = "okay"; -+}; -+ - &pcie2x1 { - reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&pcie30_3v3>; diff --git a/target/linux/rockchip/patches-5.18/258-add-driver-for-Motorcomm-YT85xx+PHYs.patch b/target/linux/rockchip/patches-5.18/258-add-driver-for-Motorcomm-YT85xx+PHYs.patch deleted file mode 100644 index 26227e020481cd..00000000000000 --- a/target/linux/rockchip/patches-5.18/258-add-driver-for-Motorcomm-YT85xx+PHYs.patch +++ /dev/null @@ -1,2243 +0,0 @@ ---- a/drivers/net/phy/motorcomm.c -+++ b/drivers/net/phy/motorcomm.c -@@ -1,137 +1,1540 @@ --// SPDX-License-Identifier: GPL-2.0+ - /* -+ * drivers/net/phy/motorcomm.c -+ * - * Driver for Motorcomm PHYs - * -- * Author: Peter Geis -+ * Author: Leilei Zhao -+ * -+ * Copyright (c) 2019 Motorcomm, Inc. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * Support : Motorcomm Phys: -+ * Giga phys: yt8511, yt8521 -+ * 100/10 Phys : yt8512, yt8512b, yt8510 -+ * Automotive 100Mb Phys : yt8010 -+ * Automotive 100/10 hyper range Phys: yt8510 - */ - - #include - #include - #include -+#include -+#include -+#include -+#include -+#ifndef LINUX_VERSION_CODE -+#include -+#else -+#define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c)) -+#endif -+/*for wol, 20210604*/ -+#include -+ -+#include "yt8614-phy.h" -+ -+/**** configuration section begin ***********/ -+ -+/* if system depends on ethernet packet to restore from sleep, please define this macro to 1 -+ * otherwise, define it to 0. -+ */ -+#define SYS_WAKEUP_BASED_ON_ETH_PKT 1 -+ -+/* to enable system WOL of phy, please define this macro to 1 -+ * otherwise, define it to 0. -+ */ -+#define YTPHY_ENABLE_WOL 0 -+ -+/* some GMAC need clock input from PHY, for eg., 125M, please enable this macro -+ * by degault, it is set to 0 -+ * NOTE: this macro will need macro SYS_WAKEUP_BASED_ON_ETH_PKT to set to 1 -+ */ -+#define GMAC_CLOCK_INPUT_NEEDED 1 - --#define PHY_ID_YT8511 0x0000010a - --#define YT8511_PAGE_SELECT 0x1e --#define YT8511_PAGE 0x1f --#define YT8511_EXT_CLK_GATE 0x0c --#define YT8511_EXT_DELAY_DRIVE 0x0d --#define YT8511_EXT_SLEEP_CTRL 0x27 -- --/* 2b00 25m from pll -- * 2b01 25m from xtl *default* -- * 2b10 62.m from pll -- * 2b11 125m from pll -- */ --#define YT8511_CLK_125M (BIT(2) | BIT(1)) --#define YT8511_PLLON_SLP BIT(14) -- --/* RX Delay enabled = 1.8ns 1000T, 8ns 10/100T */ --#define YT8511_DELAY_RX BIT(0) -- --/* TX Gig-E Delay is bits 7:4, default 0x5 -- * TX Fast-E Delay is bits 15:12, default 0xf -- * Delay = 150ps * N - 250ps -- * On = 2000ps, off = 50ps -- */ --#define YT8511_DELAY_GE_TX_EN (0xf << 4) --#define YT8511_DELAY_GE_TX_DIS (0x2 << 4) --#define YT8511_DELAY_FE_TX_EN (0xf << 12) --#define YT8511_DELAY_FE_TX_DIS (0x2 << 12) -+#define YT8521_PHY_MODE_FIBER 1 //fiber mode only -+#define YT8521_PHY_MODE_UTP 2 //utp mode only -+#define YT8521_PHY_MODE_POLL 3 //fiber and utp, poll mode - --static int yt8511_read_page(struct phy_device *phydev) -+/* please make choice according to system design -+ * for Fiber only system, please define YT8521_PHY_MODE_CURR 1 -+ * for UTP only system, please define YT8521_PHY_MODE_CURR 2 -+ * for combo system, please define YT8521_PHY_MODE_CURR 3 -+ */ -+#define YT8521_PHY_MODE_CURR 3 -+ -+/**** configuration section end ***********/ -+ -+ -+/* no need to change below */ -+ -+#if (YTPHY_ENABLE_WOL) -+#undef SYS_WAKEUP_BASED_ON_ETH_PKT -+#define SYS_WAKEUP_BASED_ON_ETH_PKT 1 -+#endif -+ -+/* workaround for 8521 fiber 100m mode */ -+static int link_mode_8521 = 0; //0: no link; 1: utp; 32: fiber. traced that 1000m fiber uses 32. -+static int link_mode_8614[4] = {0}; //0: no link; 1: utp; 32: fiber. traced that 1000m fiber uses 32. -+ -+/* for multiple port phy, base phy address */ -+static unsigned int yt_mport_base_phy_addr = 0xff; //0xff: invalid; for 8618 -+static unsigned int yt_mport_base_phy_addr_8614 = 0xff; //0xff: invalid; -+ -+int phy_yt8531_led_fixup(struct mii_bus *bus, int addr); -+int yt8511_config_out_125m(struct mii_bus *bus, int phy_id); -+ -+#if ( LINUX_VERSION_CODE > KERNEL_VERSION(5,0,0) ) -+int genphy_config_init(struct phy_device *phydev) - { -- return __phy_read(phydev, YT8511_PAGE_SELECT); --}; -+ int ret; -+ -+ printk (KERN_INFO "yzhang..read phyaddr=%d, phyid=%08x\n",phydev->mdio.addr, phydev->phy_id); - --static int yt8511_write_page(struct phy_device *phydev, int page) -+ if(phydev->phy_id == 0x4f51e91b) -+ { -+ printk (KERN_INFO "yzhang..get YT8511, abt to set 125m clk out, phyaddr=%d, phyid=%08x\n",phydev->mdio.addr, phydev->phy_id); -+ ret = yt8511_config_out_125m(phydev->mdio.bus, phydev->mdio.addr); -+ printk (KERN_INFO "yzhang..8511 set 125m clk out, reg=%#04x\n",phydev->mdio.bus->read(phydev->mdio.bus,phydev->mdio.addr,0x1f)/*double check as delay*/); -+ if (ret<0) -+ printk (KERN_INFO "yzhang..failed to set 125m clk out, ret=%d\n",ret); -+ -+ phy_yt8531_led_fixup(phydev->mdio.bus, phydev->mdio.addr); -+ } -+ return genphy_read_abilities(phydev); -+} -+#endif -+ -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) -+static int ytphy_config_init(struct phy_device *phydev) - { -- return __phy_write(phydev, YT8511_PAGE_SELECT, page); --}; -+ return 0; -+} -+#endif -+ -+static int ytphy_read_ext(struct phy_device *phydev, u32 regnum) -+{ -+ int ret; -+ int val; -+ -+ ret = phy_write(phydev, REG_DEBUG_ADDR_OFFSET, regnum); -+ if (ret < 0) -+ return ret; -+ -+ val = phy_read(phydev, REG_DEBUG_DATA); -+ -+ return val; -+} -+ -+static int ytphy_write_ext(struct phy_device *phydev, u32 regnum, u16 val) -+{ -+ int ret; -+ -+ ret = phy_write(phydev, REG_DEBUG_ADDR_OFFSET, regnum); -+ if (ret < 0) -+ return ret; -+ -+ ret = phy_write(phydev, REG_DEBUG_DATA, val); -+ -+ return ret; -+} -+ -+static int yt8010_config_aneg(struct phy_device *phydev) -+{ -+ phydev->speed = SPEED_100; -+ return 0; -+} -+ -+static int yt8512_clk_init(struct phy_device *phydev) -+{ -+ int ret; -+ int val; -+ -+ val = ytphy_read_ext(phydev, YT8512_EXTREG_AFE_PLL); -+ if (val < 0) -+ return val; -+ -+ val |= YT8512_CONFIG_PLL_REFCLK_SEL_EN; -+ -+ ret = ytphy_write_ext(phydev, YT8512_EXTREG_AFE_PLL, val); -+ if (ret < 0) -+ return ret; -+ -+ val = ytphy_read_ext(phydev, YT8512_EXTREG_EXTEND_COMBO); -+ if (val < 0) -+ return val; -+ -+ val |= YT8512_CONTROL1_RMII_EN; -+ -+ ret = ytphy_write_ext(phydev, YT8512_EXTREG_EXTEND_COMBO, val); -+ if (ret < 0) -+ return ret; -+ -+ val = phy_read(phydev, MII_BMCR); -+ if (val < 0) -+ return val; -+ -+ val |= YT_SOFTWARE_RESET; -+ ret = phy_write(phydev, MII_BMCR, val); -+ -+ return ret; -+} -+ -+static int yt8512_led_init(struct phy_device *phydev) -+{ -+ int ret; -+ int val; -+ int mask; -+ -+ val = ytphy_read_ext(phydev, YT8512_EXTREG_LED0); -+ if (val < 0) -+ return val; -+ -+ val |= YT8512_LED0_ACT_BLK_IND; -+ -+ mask = YT8512_LED0_DIS_LED_AN_TRY | YT8512_LED0_BT_BLK_EN | -+ YT8512_LED0_HT_BLK_EN | YT8512_LED0_COL_BLK_EN | -+ YT8512_LED0_BT_ON_EN; -+ val &= ~mask; -+ -+ ret = ytphy_write_ext(phydev, YT8512_EXTREG_LED0, val); -+ if (ret < 0) -+ return ret; -+ -+ val = ytphy_read_ext(phydev, YT8512_EXTREG_LED1); -+ if (val < 0) -+ return val; -+ -+ val |= YT8512_LED1_BT_ON_EN; -+ -+ mask = YT8512_LED1_TXACT_BLK_EN | YT8512_LED1_RXACT_BLK_EN; -+ val &= ~mask; -+ -+ ret = ytphy_write_ext(phydev, YT8512_LED1_BT_ON_EN, val); -+ -+ return ret; -+} -+ -+static int yt8512_config_init(struct phy_device *phydev) -+{ -+ int ret; -+ int val; -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) -+ ret = ytphy_config_init(phydev); -+#else -+ ret = genphy_config_init(phydev); -+#endif -+ if (ret < 0) -+ return ret; -+ -+ ret = yt8512_clk_init(phydev); -+ if (ret < 0) -+ return ret; -+ -+ ret = yt8512_led_init(phydev); -+ -+ /* disable auto sleep */ -+ val = ytphy_read_ext(phydev, YT8512_EXTREG_SLEEP_CONTROL1); -+ if (val < 0) -+ return val; -+ -+ val &= (~BIT(YT8512_EN_SLEEP_SW_BIT)); -+ -+ ret = ytphy_write_ext(phydev, YT8512_EXTREG_SLEEP_CONTROL1, val); -+ if (ret < 0) -+ return ret; -+ -+ return ret; -+} -+ -+static int yt8512_read_status(struct phy_device *phydev) -+{ -+ int ret; -+ int val; -+ int speed, speed_mode, duplex; -+ -+ ret = genphy_update_link(phydev); -+ if (ret) -+ return ret; -+ -+ val = phy_read(phydev, REG_PHY_SPEC_STATUS); -+ if (val < 0) -+ return val; -+ -+ duplex = (val & YT8512_DUPLEX) >> YT8512_DUPLEX_BIT; -+ speed_mode = (val & YT8512_SPEED_MODE) >> YT8512_SPEED_MODE_BIT; -+ switch (speed_mode) { -+ case 0: -+ speed = SPEED_10; -+ break; -+ case 1: -+ speed = SPEED_100; -+ break; -+ case 2: -+ case 3: -+ default: -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) -+ speed = -1; -+#else -+ speed = SPEED_UNKNOWN; -+#endif -+ break; -+ } -+ -+ phydev->speed = speed; -+ phydev->duplex = duplex; -+ -+ return 0; -+} -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) -+#else -+#if 0 -+int yt8521_soft_reset(struct phy_device *phydev) -+{ -+ int ret; -+ -+ ytphy_write_ext(phydev, 0xa000, 0); -+ ret = genphy_soft_reset(phydev); -+ if (ret < 0) -+ return ret; -+ -+ ytphy_write_ext(phydev, 0xa000, 2); -+ ret = genphy_soft_reset(phydev); -+ if (ret < 0) { -+ ytphy_write_ext(phydev, 0xa000, 0); -+ return ret; -+ } -+ -+ return 0; -+} -+#else -+/* qingsong feedback 2 genphy_soft_reset will cause problem. -+ * and this is the reduction version -+ */ -+int yt8521_soft_reset(struct phy_device *phydev) -+{ -+ int ret, val; -+ -+ val = ytphy_read_ext(phydev, 0xa001); -+ ytphy_write_ext(phydev, 0xa001, (val & ~0x8000)); -+ -+ ret = genphy_soft_reset(phydev); -+ if (ret < 0) -+ return ret; -+ -+ return 0; -+} -+#endif -+ -+#endif -+ -+#if GMAC_CLOCK_INPUT_NEEDED -+static int ytphy_mii_rd_ext(struct mii_bus *bus, int phy_id, u32 regnum) -+{ -+ int ret; -+ int val; -+ -+ ret = bus->write(bus, phy_id, REG_DEBUG_ADDR_OFFSET, regnum); -+ if (ret < 0) -+ return ret; -+ -+ val = bus->read(bus, phy_id, REG_DEBUG_DATA); -+ -+ return val; -+} -+ -+static int ytphy_mii_wr_ext(struct mii_bus *bus, int phy_id, u32 regnum, u16 val) -+{ -+ int ret; -+ -+ ret = bus->write(bus, phy_id, REG_DEBUG_ADDR_OFFSET, regnum); -+ if (ret < 0) -+ return ret; -+ -+ ret = bus->write(bus, phy_id, REG_DEBUG_DATA, val); -+ -+ return ret; -+} -+ -+int yt8511_config_dis_txdelay(struct mii_bus *bus, int phy_id) -+{ -+ int ret; -+ int val; -+ -+ /* disable auto sleep */ -+ val = ytphy_mii_rd_ext(bus, phy_id, 0x27); -+ if (val < 0) -+ return val; -+ -+ val &= (~BIT(15)); -+ -+ ret = ytphy_mii_wr_ext(bus, phy_id, 0x27, val); -+ if (ret < 0) -+ return ret; -+ -+ /* enable RXC clock when no wire plug */ -+ val = ytphy_mii_rd_ext(bus, phy_id, 0xc); -+ if (val < 0) -+ return val; -+ -+ /* ext reg 0xc b[7:4] -+ Tx Delay time = 150ps * N - 250ps -+ */ -+ val &= ~(0xf << 4); -+ ret = ytphy_mii_wr_ext(bus, phy_id, 0xc, val); -+ printk("yt8511_config_dis_txdelay..phy txdelay, val=%#08x\n",val); -+ -+ return ret; -+} -+ -+int phy_yt8531_led_fixup(struct mii_bus *bus, int addr) -+{ -+ printk("%s in\n", __func__); -+ -+ ytphy_mii_wr_ext(bus, addr, 0xa00d, 0x670); -+ ytphy_mii_wr_ext(bus, addr, 0xa00e, 0x2070); -+ ytphy_mii_wr_ext(bus, addr, 0xa00f, 0x7e); -+ -+ return 0; -+} -+ -+int yt8511_config_out_125m(struct mii_bus *bus, int addr) -+{ -+ int ret; -+ int val; -+ -+ mdelay(50); -+ ret = ytphy_mii_wr_ext(bus, addr, 0xa012, 0xd0); -+ -+ mdelay(100); -+ val = ytphy_mii_rd_ext(bus, addr, 0xa012); -+ -+ if(val != 0xd0) -+ { -+ printk("yt8511_config_out_125m error\n"); -+ return -1; -+ } -+ -+ /* disable auto sleep */ -+ val = ytphy_mii_rd_ext(bus, addr, 0x27); -+ if (val < 0) -+ return val; -+ -+ val &= (~BIT(15)); -+ -+ ret = ytphy_mii_wr_ext(bus, addr, 0x27, val); -+ if (ret < 0) -+ return ret; -+ -+ /* enable RXC clock when no wire plug */ -+ val = ytphy_mii_rd_ext(bus, addr, 0xc); -+ if (val < 0) -+ return val; -+ -+ /* ext reg 0xc.b[2:1] -+ 00-----25M from pll; -+ 01---- 25M from xtl;(default) -+ 10-----62.5M from pll; -+ 11----125M from pll(here set to this value) -+ */ -+ val |= (3 << 1); -+ ret = ytphy_mii_wr_ext(bus, addr, 0xc, val); -+ printk("yt8511_config_out_125m, phy clk out, val=%#08x\n",val); -+ -+#if 0 -+ /* for customer, please enable it based on demand. -+ * configure to master -+ */ -+ val = bus->read(bus, phy_id, 0x9/*master/slave config reg*/); -+ val |= (0x3<<11); //to be manual config and force to be master -+ ret = bus->write(bus, phy_id, 0x9, val); //take effect until phy soft reset -+ if (ret < 0) -+ return ret; -+ -+ printk("yt8511_config_out_125m, phy to be master, val=%#08x\n",val); -+#endif -+ -+ return ret; -+} -+ -+EXPORT_SYMBOL(yt8511_config_out_125m); - - static int yt8511_config_init(struct phy_device *phydev) - { -- int oldpage, ret = 0; -- unsigned int ge, fe; -+ int ret; -+ -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) -+ ret = ytphy_config_init(phydev); -+#else -+ ret = genphy_config_init(phydev); -+#endif -+ -+ return ret; -+} -+#endif /*GMAC_CLOCK_INPUT_NEEDED*/ -+ -+#if (YTPHY_ENABLE_WOL) -+static int ytphy_switch_reg_space(struct phy_device *phydev, int space) -+{ -+ int ret; -+ -+ if (space == YTPHY_REG_SPACE_UTP){ -+ ret = ytphy_write_ext(phydev, 0xa000, 0); -+ }else{ -+ ret = ytphy_write_ext(phydev, 0xa000, 2); -+ } -+ -+ return ret; -+} -+ -+static int ytphy_wol_en_cfg(struct phy_device *phydev, ytphy_wol_cfg_t wol_cfg) -+{ -+ int ret=0; -+ int val=0; -+ -+ val = ytphy_read_ext(phydev, YTPHY_WOL_CFG_REG); -+ if (val < 0) -+ return val; -+ -+ if(wol_cfg.enable) { -+ val |= YTPHY_WOL_CFG_EN; -+ -+ if(wol_cfg.type == YTPHY_WOL_TYPE_LEVEL) { -+ val &= ~YTPHY_WOL_CFG_TYPE; -+ val &= ~YTPHY_WOL_CFG_INTR_SEL; -+ } else if(wol_cfg.type == YTPHY_WOL_TYPE_PULSE) { -+ val |= YTPHY_WOL_CFG_TYPE; -+ val |= YTPHY_WOL_CFG_INTR_SEL; -+ -+ if(wol_cfg.width == YTPHY_WOL_WIDTH_84MS) { -+ val &= ~YTPHY_WOL_CFG_WIDTH1; -+ val &= ~YTPHY_WOL_CFG_WIDTH2; -+ } else if(wol_cfg.width == YTPHY_WOL_WIDTH_168MS) { -+ val |= YTPHY_WOL_CFG_WIDTH1; -+ val &= ~YTPHY_WOL_CFG_WIDTH2; -+ } else if(wol_cfg.width == YTPHY_WOL_WIDTH_336MS) { -+ val &= ~YTPHY_WOL_CFG_WIDTH1; -+ val |= YTPHY_WOL_CFG_WIDTH2; -+ } else if(wol_cfg.width == YTPHY_WOL_WIDTH_672MS) { -+ val |= YTPHY_WOL_CFG_WIDTH1; -+ val |= YTPHY_WOL_CFG_WIDTH2; -+ } -+ } -+ } else { -+ val &= ~YTPHY_WOL_CFG_EN; -+ val &= ~YTPHY_WOL_CFG_INTR_SEL; -+ } -+ -+ ret = ytphy_write_ext(phydev, YTPHY_WOL_CFG_REG, val); -+ if (ret < 0) -+ return ret; -+ -+ return 0; -+} -+ -+static void ytphy_get_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol) -+{ -+ int val = 0; -+ -+ wol->supported = WAKE_MAGIC; -+ wol->wolopts = 0; -+ -+ val = ytphy_read_ext(phydev, YTPHY_WOL_CFG_REG); -+ if (val < 0) -+ return; -+ -+ if (val & YTPHY_WOL_CFG_EN) -+ wol->wolopts |= WAKE_MAGIC; -+ -+ return; -+} -+ -+static int ytphy_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol) -+{ -+ int ret, pre_page, val; -+ ytphy_wol_cfg_t wol_cfg; -+ struct net_device *p_attached_dev = phydev->attached_dev; -+ -+ memset(&wol_cfg,0,sizeof(ytphy_wol_cfg_t)); -+ pre_page = ytphy_read_ext(phydev, 0xa000); -+ if (pre_page < 0) -+ return pre_page; -+ -+ /* Switch to phy UTP page */ -+ ret = ytphy_switch_reg_space(phydev, YTPHY_REG_SPACE_UTP); -+ if (ret < 0) -+ return ret; -+ -+ if (wol->wolopts & WAKE_MAGIC) { -+ -+ /* Enable the WOL interrupt */ -+ val = phy_read(phydev, YTPHY_UTP_INTR_REG); -+ val |= YTPHY_WOL_INTR; -+ ret = phy_write(phydev, YTPHY_UTP_INTR_REG, val); -+ if (ret < 0) -+ return ret; -+ -+ /* Set the WOL config */ -+ wol_cfg.enable = 1; //enable -+ wol_cfg.type= YTPHY_WOL_TYPE_PULSE; -+ wol_cfg.width= YTPHY_WOL_WIDTH_672MS; -+ ret = ytphy_wol_en_cfg(phydev, wol_cfg); -+ if (ret < 0) -+ return ret; -+ -+ /* Store the device address for the magic packet */ -+ ret = ytphy_write_ext(phydev, YTPHY_MAGIC_PACKET_MAC_ADDR2, -+ ((p_attached_dev->dev_addr[0] << 8) | -+ p_attached_dev->dev_addr[1])); -+ if (ret < 0) -+ return ret; -+ ret = ytphy_write_ext(phydev, YTPHY_MAGIC_PACKET_MAC_ADDR1, -+ ((p_attached_dev->dev_addr[2] << 8) | -+ p_attached_dev->dev_addr[3])); -+ if (ret < 0) -+ return ret; -+ ret = ytphy_write_ext(phydev, YTPHY_MAGIC_PACKET_MAC_ADDR0, -+ ((p_attached_dev->dev_addr[4] << 8) | -+ p_attached_dev->dev_addr[5])); -+ if (ret < 0) -+ return ret; -+ } else { -+ wol_cfg.enable = 0; //disable -+ wol_cfg.type= YTPHY_WOL_TYPE_MAX; -+ wol_cfg.width= YTPHY_WOL_WIDTH_MAX; -+ ret = ytphy_wol_en_cfg(phydev, wol_cfg); -+ if (ret < 0) -+ return ret; -+ } -+ -+ /* Recover to previous register space page */ -+ ret = ytphy_switch_reg_space(phydev, pre_page); -+ if (ret < 0) -+ return ret; -+ -+ return 0; -+} -+ -+#endif /*(YTPHY_ENABLE_WOL)*/ -+ -+static int yt8521_config_init(struct phy_device *phydev) -+{ -+ int ret; -+ int val; - -- oldpage = phy_select_page(phydev, YT8511_EXT_CLK_GATE); -- if (oldpage < 0) -- goto err_restore_page; -+ phydev->irq = PHY_POLL; - -- /* set rgmii delay mode */ -- switch (phydev->interface) { -- case PHY_INTERFACE_MODE_RGMII: -- ge = YT8511_DELAY_GE_TX_DIS; -- fe = YT8511_DELAY_FE_TX_DIS; -+ ytphy_write_ext(phydev, 0xa000, 0); -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) -+ ret = ytphy_config_init(phydev); -+#else -+ ret = genphy_config_init(phydev); -+#endif -+ if (ret < 0) -+ return ret; -+ -+ /* disable auto sleep */ -+ val = ytphy_read_ext(phydev, YT8521_EXTREG_SLEEP_CONTROL1); -+ if (val < 0) -+ return val; -+ -+ val &= (~BIT(YT8521_EN_SLEEP_SW_BIT)); -+ -+ ret = ytphy_write_ext(phydev, YT8521_EXTREG_SLEEP_CONTROL1, val); -+ if (ret < 0) -+ return ret; -+ -+ /* enable RXC clock when no wire plug */ -+ ret = ytphy_write_ext(phydev, 0xa000, 0); -+ if (ret < 0) -+ return ret; -+ -+ val = ytphy_read_ext(phydev, 0xc); -+ if (val < 0) -+ return val; -+ val &= ~(1 << 12); -+ ret = ytphy_write_ext(phydev, 0xc, val); -+ if (ret < 0) -+ return ret; -+ -+ printk (KERN_INFO "yt8521_config_init, 8521 init call out.\n"); -+ return ret; -+} -+ -+/* -+ * for fiber mode, there is no 10M speed mode and -+ * this function is for this purpose. -+ */ -+static int yt8521_adjust_status(struct phy_device *phydev, int val, int is_utp) -+{ -+ int speed_mode, duplex; -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) -+ int speed = -1; -+#else -+ int speed = SPEED_UNKNOWN; -+#endif -+ -+ duplex = (val & YT8512_DUPLEX) >> YT8521_DUPLEX_BIT; -+ speed_mode = (val & YT8521_SPEED_MODE) >> YT8521_SPEED_MODE_BIT; -+ switch (speed_mode) { -+ case 0: -+ if (is_utp) -+ speed = SPEED_10; - break; -- case PHY_INTERFACE_MODE_RGMII_RXID: -- ge = YT8511_DELAY_RX | YT8511_DELAY_GE_TX_DIS; -- fe = YT8511_DELAY_FE_TX_DIS; -+ case 1: -+ speed = SPEED_100; - break; -- case PHY_INTERFACE_MODE_RGMII_TXID: -- ge = YT8511_DELAY_GE_TX_EN; -- fe = YT8511_DELAY_FE_TX_EN; -+ case 2: -+ speed = SPEED_1000; - break; -- case PHY_INTERFACE_MODE_RGMII_ID: -- ge = YT8511_DELAY_RX | YT8511_DELAY_GE_TX_EN; -- fe = YT8511_DELAY_FE_TX_EN; -+ case 3: - break; -- default: /* do not support other modes */ -- ret = -EOPNOTSUPP; -- goto err_restore_page; -+ default: -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) -+ speed = -1; -+#else -+ speed = SPEED_UNKNOWN; -+#endif -+ break; -+ } -+ -+ phydev->speed = speed; -+ phydev->duplex = duplex; -+ //printk (KERN_INFO "yt8521_adjust_status call out,regval=0x%04x,mode=%s,speed=%dm...\n", val,is_utp?"utp":"fiber", phydev->speed); -+ -+ return 0; -+} -+ -+/* -+ * for fiber mode, when speed is 100M, there is no definition for autonegotiation, and -+ * this function handles this case and return 1 per linux kernel's polling. -+ */ -+int yt8521_aneg_done (struct phy_device *phydev) -+{ -+ -+ //printk("yt8521_aneg_done callin,speed=%dm,linkmoded=%d\n", phydev->speed,link_mode_8521); -+ -+ if((32 == link_mode_8521) && (SPEED_100 == phydev->speed)) -+ { -+ return 1/*link_mode_8521*/; -+ } -+ -+#if ( LINUX_VERSION_CODE > KERNEL_VERSION(3,11,0) ) -+ return genphy_aneg_done(phydev); -+#else -+ return 1; -+#endif -+} -+ -+static int yt8521_read_status(struct phy_device *phydev) -+{ -+ int ret; -+ volatile int val, yt8521_fiber_latch_val, yt8521_fiber_curr_val; -+ volatile int link; -+ int link_utp = 0, link_fiber = 0; -+ -+#if (YT8521_PHY_MODE_CURR != YT8521_PHY_MODE_FIBER) -+ /* reading UTP */ -+ ret = ytphy_write_ext(phydev, 0xa000, 0); -+ if (ret < 0) -+ return ret; -+ -+ val = phy_read(phydev, REG_PHY_SPEC_STATUS); -+ if (val < 0) -+ return val; -+ -+ link = val & (BIT(YT8521_LINK_STATUS_BIT)); -+ if (link) { -+ link_utp = 1; -+ link_mode_8521 = 1; -+ yt8521_adjust_status(phydev, val, 1); -+ } else { -+ link_utp = 0; -+ } -+#endif //(YT8521_PHY_MODE_CURR != YT8521_PHY_MODE_FIBER) -+ -+#if (YT8521_PHY_MODE_CURR != YT8521_PHY_MODE_UTP) -+ /* reading Fiber */ -+ ret = ytphy_write_ext(phydev, 0xa000, 2); -+ if (ret < 0) -+ return ret; -+ -+ val = phy_read(phydev, REG_PHY_SPEC_STATUS); -+ if (val < 0) -+ return val; -+ -+ //note: below debug information is used to check multiple PHy ports. -+ //printk (KERN_INFO "yt8521_read_status, fiber status=%04x,macbase=0x%08lx\n", val,(unsigned long)phydev->attached_dev); -+ -+ /* for fiber, from 1000m to 100m, there is not link down from 0x11, and check reg 1 to identify such case -+ * this is important for Linux kernel for that, missing linkdown event will cause problem. -+ */ -+ yt8521_fiber_latch_val = phy_read(phydev, MII_BMSR); -+ yt8521_fiber_curr_val = phy_read(phydev, MII_BMSR); -+ link = val & (BIT(YT8521_LINK_STATUS_BIT)); -+ if((link) && (yt8521_fiber_latch_val != yt8521_fiber_curr_val)) -+ { -+ link = 0; -+ printk (KERN_INFO "yt8521_read_status, fiber link down detect,latch=%04x,curr=%04x\n", yt8521_fiber_latch_val,yt8521_fiber_curr_val); -+ } -+ -+ if (link) { -+ link_fiber = 1; -+ yt8521_adjust_status(phydev, val, 0); -+ link_mode_8521 = 32; //fiber mode -+ -+ -+ } else { -+ link_fiber = 0; -+ } -+#endif //(YT8521_PHY_MODE_CURR != YT8521_PHY_MODE_UTP) -+ -+ if (link_utp || link_fiber) { -+ phydev->link = 1; -+ } else { -+ phydev->link = 0; -+ link_mode_8521 = 0; -+ } -+ -+#if (YT8521_PHY_MODE_CURR != YT8521_PHY_MODE_FIBER) -+ if (link_utp) { -+ ytphy_write_ext(phydev, 0xa000, 0); - } -+#endif - -- ret = __phy_modify(phydev, YT8511_PAGE, (YT8511_DELAY_RX | YT8511_DELAY_GE_TX_EN), ge); -+ //printk (KERN_INFO "yzhang..8521 read status call out,link=%d,linkmode=%d\n", phydev->link, link_mode_8521 ); -+ return 0; -+} -+ -+int yt8521_suspend(struct phy_device *phydev) -+{ -+#if !(SYS_WAKEUP_BASED_ON_ETH_PKT) -+ int value; -+ -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) -+ mutex_lock(&phydev->lock); -+#else -+ /* no need lock in 4.19 */ -+#endif -+ -+ ytphy_write_ext(phydev, 0xa000, 0); -+ value = phy_read(phydev, MII_BMCR); -+ phy_write(phydev, MII_BMCR, value | BMCR_PDOWN); -+ -+ ytphy_write_ext(phydev, 0xa000, 2); -+ value = phy_read(phydev, MII_BMCR); -+ phy_write(phydev, MII_BMCR, value | BMCR_PDOWN); -+ -+ ytphy_write_ext(phydev, 0xa000, 0); -+ -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) -+ mutex_unlock(&phydev->lock); -+#else -+ /* no need lock/unlock in 4.19 */ -+#endif -+#endif /*!(SYS_WAKEUP_BASED_ON_ETH_PKT)*/ -+ -+ return 0; -+} -+ -+int yt8521_resume(struct phy_device *phydev) -+{ -+#if !(SYS_WAKEUP_BASED_ON_ETH_PKT) -+ int value; -+ int ret; -+ -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) -+ mutex_lock(&phydev->lock); -+#else -+ /* no need lock/unlock in 4.19 */ -+#endif -+ -+ ytphy_write_ext(phydev, 0xa000, 0); -+ value = phy_read(phydev, MII_BMCR); -+ phy_write(phydev, MII_BMCR, value & ~BMCR_PDOWN); -+ -+ /* disable auto sleep */ -+ value = ytphy_read_ext(phydev, YT8521_EXTREG_SLEEP_CONTROL1); -+ if (value < 0) -+ return value; -+ -+ value &= (~BIT(YT8521_EN_SLEEP_SW_BIT)); -+ ret = ytphy_write_ext(phydev, YT8521_EXTREG_SLEEP_CONTROL1, value); - if (ret < 0) -- goto err_restore_page; -+ return ret; - -- /* set clock mode to 125mhz */ -- ret = __phy_modify(phydev, YT8511_PAGE, 0, YT8511_CLK_125M); -+ /* enable RXC clock when no wire plug */ -+ value = ytphy_read_ext(phydev, 0xc); -+ if (value < 0) -+ return value; -+ value &= ~(1 << 12); -+ ret = ytphy_write_ext(phydev, 0xc, value); - if (ret < 0) -- goto err_restore_page; -+ return ret; -+ -+ ytphy_write_ext(phydev, 0xa000, 2); -+ value = phy_read(phydev, MII_BMCR); -+ phy_write(phydev, MII_BMCR, value & ~BMCR_PDOWN); -+ -+#if (YT8521_PHY_MODE_CURR != YT8521_PHY_MODE_FIBER) -+ ytphy_write_ext(phydev, 0xa000, 0); -+#endif -+ -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) -+ mutex_unlock(&phydev->lock); -+#else -+ /* no need lock/unlock in 4.19 */ -+#endif -+#endif /*!(SYS_WAKEUP_BASED_ON_ETH_PKT)*/ -+ -+ return 0; -+} - -- /* fast ethernet delay is in a separate page */ -- ret = __phy_write(phydev, YT8511_PAGE_SELECT, YT8511_EXT_DELAY_DRIVE); -+ -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) -+#else -+int yt8618_soft_reset(struct phy_device *phydev) -+{ -+ int ret; -+ -+ ytphy_write_ext(phydev, 0xa000, 0); -+ ret = genphy_soft_reset(phydev); - if (ret < 0) -- goto err_restore_page; -+ return ret; - -- ret = __phy_modify(phydev, YT8511_PAGE, YT8511_DELAY_FE_TX_EN, fe); -+ return 0; -+} -+ -+int yt8614_soft_reset(struct phy_device *phydev) -+{ -+ int ret; -+ -+ /* utp */ -+ ytphy_write_ext(phydev, 0xa000, 0); -+ ret = genphy_soft_reset(phydev); - if (ret < 0) -- goto err_restore_page; -+ return ret; -+ -+ /* qsgmii */ -+ ytphy_write_ext(phydev, 0xa000, 2); -+ ret = genphy_soft_reset(phydev); -+ if (ret < 0) { -+ ytphy_write_ext(phydev, 0xa000, 0); //back to utp mode -+ return ret; -+ } -+ -+ /* sgmii */ -+ ytphy_write_ext(phydev, 0xa000, 3); -+ ret = genphy_soft_reset(phydev); -+ if (ret < 0) { -+ ytphy_write_ext(phydev, 0xa000, 0); //back to utp mode -+ return ret; -+ } - -- /* leave pll enabled in sleep */ -- ret = __phy_write(phydev, YT8511_PAGE_SELECT, YT8511_EXT_SLEEP_CTRL); -+ return 0; -+} -+ -+#endif -+ -+static int yt8618_config_init(struct phy_device *phydev) -+{ -+ int ret; -+ int val; -+ -+ phydev->irq = PHY_POLL; -+ -+ if(0xff == yt_mport_base_phy_addr) -+ /* by default, we think the first phy should be the base phy addr. for mul */ -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) -+ { -+ yt_mport_base_phy_addr = phydev->addr; -+ }else if (yt_mport_base_phy_addr > phydev->addr) { -+ printk (KERN_INFO "yzhang..8618 init, phy address mismatch, base=%d, cur=%d\n", yt_mport_base_phy_addr, phydev->addr); -+ } -+#else -+ { -+ yt_mport_base_phy_addr = phydev->mdio.addr; -+ }else if (yt_mport_base_phy_addr > phydev->mdio.addr) { -+ printk (KERN_INFO "yzhang..8618 init, phy address mismatch, base=%d, cur=%d\n", yt_mport_base_phy_addr, phydev->mdio.addr); -+ } -+#endif -+ -+ ytphy_write_ext(phydev, 0xa000, 0); -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) -+ ret = ytphy_config_init(phydev); -+#else -+ ret = genphy_config_init(phydev); -+#endif - if (ret < 0) -- goto err_restore_page; -+ return ret; - -- ret = __phy_modify(phydev, YT8511_PAGE, 0, YT8511_PLLON_SLP); -+ /* for utp to optimize signal */ -+ ret = ytphy_write_ext(phydev, 0x41, 0x33); -+ if (ret < 0) -+ return ret; -+ ret = ytphy_write_ext(phydev, 0x42, 0x66); - if (ret < 0) -- goto err_restore_page; -+ return ret; -+ ret = ytphy_write_ext(phydev, 0x43, 0xaa); -+ if (ret < 0) -+ return ret; -+ ret = ytphy_write_ext(phydev, 0x44, 0xd0d); -+ if (ret < 0) -+ return ret; -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) -+ if((phydev->addr > yt_mport_base_phy_addr) && ((2 == phydev->addr - yt_mport_base_phy_addr) || (5 == phydev->addr - yt_mport_base_phy_addr))) -+#else -+ if((phydev->mdio.addr > yt_mport_base_phy_addr) && ((2 == phydev->mdio.addr - yt_mport_base_phy_addr) || (5 == phydev->mdio.addr - yt_mport_base_phy_addr))) -+#endif -+ { -+ ret = ytphy_write_ext(phydev, 0x44, 0x2929); -+ if (ret < 0) -+ return ret; -+ } -+ -+ val = phy_read(phydev, MII_BMCR); -+ phy_write(phydev, MII_BMCR, val | BMCR_RESET); - --err_restore_page: -- return phy_restore_page(phydev, oldpage, ret); -+ printk (KERN_INFO "yt8618_config_init call out.\n"); -+ return ret; - } - --static struct phy_driver motorcomm_phy_drvs[] = { -+static int yt8614_config_init(struct phy_device *phydev) -+{ -+ int ret = 0; -+ -+ phydev->irq = PHY_POLL; -+ -+ if(0xff == yt_mport_base_phy_addr_8614) -+ /* by default, we think the first phy should be the base phy addr. for mul */ -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) - { -- PHY_ID_MATCH_EXACT(PHY_ID_YT8511), -+ yt_mport_base_phy_addr_8614 = (unsigned int)phydev->addr; -+ }else if (yt_mport_base_phy_addr_8614 > (unsigned int)phydev->addr) { -+ printk (KERN_INFO "yzhang..8618 init, phy address mismatch, base=%u, cur=%d\n", yt_mport_base_phy_addr_8614, phydev->addr); -+ } -+#else -+ { -+ yt_mport_base_phy_addr_8614 = (unsigned int)phydev->mdio.addr; -+ }else if (yt_mport_base_phy_addr_8614 > (unsigned int)phydev->mdio.addr) { -+ printk (KERN_INFO "yzhang..8618 init, phy address mismatch, base=%u, cur=%d\n", yt_mport_base_phy_addr_8614, phydev->mdio.addr); -+ } -+#endif -+ return ret; -+} -+ -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) -+#define yt8614_get_port_from_phydev(phydev) ((0xff == yt_mport_base_phy_addr_8614) && (yt_mport_base_phy_addr_8614 <= (phydev)->addr) ? 0 : (unsigned int)((phydev)->addr) - yt_mport_base_phy_addr_8614) -+#else -+#define yt8614_get_port_from_phydev(phydev) ((0xff == yt_mport_base_phy_addr_8614) && (yt_mport_base_phy_addr_8614 <= (phydev)->mdio.addr) ? 0 : (unsigned int)((phydev)->mdio.addr) - yt_mport_base_phy_addr_8614) -+#endif -+ -+int yt8618_aneg_done (struct phy_device *phydev) -+{ -+ -+ return genphy_aneg_done(phydev); -+} -+ -+int yt8614_aneg_done (struct phy_device *phydev) -+{ -+ int port = yt8614_get_port_from_phydev(phydev); -+ -+ /*it should be used for 8614 fiber*/ -+ if((32 == link_mode_8614[port]) && (SPEED_100 == phydev->speed)) -+ { -+ return 1; -+ } -+ -+ return genphy_aneg_done(phydev); -+} -+ -+static int yt8614_read_status(struct phy_device *phydev) -+{ -+ //int i; -+ int ret; -+ volatile int val, yt8614_fiber_latch_val, yt8614_fiber_curr_val; -+ volatile int link; -+ int link_utp = 0, link_fiber = 0; -+ int port = yt8614_get_port_from_phydev(phydev); -+ -+#if (YT8614_PHY_MODE_CURR != YT8521_PHY_MODE_FIBER) -+ /* switch to utp and reading regs */ -+ ret = ytphy_write_ext(phydev, 0xa000, 0); -+ if (ret < 0) -+ return ret; -+ -+ val = phy_read(phydev, REG_PHY_SPEC_STATUS); -+ if (val < 0) -+ return val; -+ -+ link = val & (BIT(YT8521_LINK_STATUS_BIT)); -+ if (link) { -+ link_utp = 1; -+ // here is same as 8521 and re-use the function; -+ yt8521_adjust_status(phydev, val, 1); -+ } else { -+ link_utp = 0; -+ } -+#endif //(YT8614_PHY_MODE_CURR != YT8521_PHY_MODE_FIBER) -+ -+#if (YT8614_PHY_MODE_CURR != YT8521_PHY_MODE_UTP) -+ /* reading Fiber/sgmii */ -+ ret = ytphy_write_ext(phydev, 0xa000, 3); -+ if (ret < 0) -+ return ret; -+ -+ val = phy_read(phydev, REG_PHY_SPEC_STATUS); -+ if (val < 0) -+ return val; -+ -+ //printk (KERN_INFO "yzhang..8614 read fiber status=%04x,macbase=0x%08lx\n", val,(unsigned long)phydev->attached_dev); -+ -+ /* for fiber, from 1000m to 100m, there is not link down from 0x11, and check reg 1 to identify such case */ -+ yt8614_fiber_latch_val = phy_read(phydev, MII_BMSR); -+ yt8614_fiber_curr_val = phy_read(phydev, MII_BMSR); -+ link = val & (BIT(YT8521_LINK_STATUS_BIT)); -+ if((link) && (yt8614_fiber_latch_val != yt8614_fiber_curr_val)) -+ { -+ link = 0; -+ printk (KERN_INFO "yt8614_read_status, fiber link down detect,latch=%04x,curr=%04x\n", yt8614_fiber_latch_val,yt8614_fiber_curr_val); -+ } -+ -+ if (link) { -+ link_fiber = 1; -+ yt8521_adjust_status(phydev, val, 0); -+ link_mode_8614[port] = 32; //fiber mode -+ -+ -+ } else { -+ link_fiber = 0; -+ } -+#endif //(YT8521_PHY_MODE_CURR != YT8521_PHY_MODE_UTP) -+ -+ if (link_utp || link_fiber) { -+ phydev->link = 1; -+ } else { -+ phydev->link = 0; -+ link_mode_8614[port] = 0; -+ } -+ -+#if (YT8614_PHY_MODE_CURR != YT8521_PHY_MODE_FIBER) -+ if (link_utp) { -+ ytphy_write_ext(phydev, 0xa000, 0); -+ } -+#endif -+ //printk (KERN_INFO "yt8614_read_status call out,link=%d,linkmode=%d\n", phydev->link, link_mode_8614[port] ); -+ -+ return 0; -+} -+ -+static int yt8618_read_status(struct phy_device *phydev) -+{ -+ int ret; -+ volatile int val; //maybe for 8614 yt8521_fiber_latch_val, yt8521_fiber_curr_val; -+ volatile int link; -+ int link_utp = 0, link_fiber = 0; -+ -+ /* switch to utp and reading regs */ -+ ret = ytphy_write_ext(phydev, 0xa000, 0); -+ if (ret < 0) -+ return ret; -+ -+ val = phy_read(phydev, REG_PHY_SPEC_STATUS); -+ if (val < 0) -+ return val; -+ -+ link = val & (BIT(YT8521_LINK_STATUS_BIT)); -+ if (link) { -+ link_utp = 1; -+ yt8521_adjust_status(phydev, val, 1); -+ } else { -+ link_utp = 0; -+ } -+ -+ if (link_utp || link_fiber) { -+ phydev->link = 1; -+ } else { -+ phydev->link = 0; -+ } -+ -+ return 0; -+} -+ -+int yt8618_suspend(struct phy_device *phydev) -+{ -+#if !(SYS_WAKEUP_BASED_ON_ETH_PKT) -+ int value; -+ -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) -+ mutex_lock(&phydev->lock); -+#else -+ /* no need lock in 4.19 */ -+#endif -+ -+ ytphy_write_ext(phydev, 0xa000, 0); -+ value = phy_read(phydev, MII_BMCR); -+ phy_write(phydev, MII_BMCR, value | BMCR_PDOWN); -+ -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) -+ mutex_unlock(&phydev->lock); -+#else -+ /* no need lock/unlock in 4.19 */ -+#endif -+#endif /*!(SYS_WAKEUP_BASED_ON_ETH_PKT)*/ -+ -+ return 0; -+} -+ -+int yt8618_resume(struct phy_device *phydev) -+{ -+#if !(SYS_WAKEUP_BASED_ON_ETH_PKT) -+ int value; -+ -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) -+ mutex_lock(&phydev->lock); -+#else -+ /* no need lock/unlock in 4.19 */ -+#endif -+ -+ ytphy_write_ext(phydev, 0xa000, 0); -+ value = phy_read(phydev, MII_BMCR); -+ phy_write(phydev, MII_BMCR, value & ~BMCR_PDOWN); -+ -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) -+ mutex_unlock(&phydev->lock); -+#else -+ /* no need lock/unlock in 4.19 */ -+#endif -+#endif /*!(SYS_WAKEUP_BASED_ON_ETH_PKT)*/ -+ -+ return 0; -+} -+ -+int yt8614_suspend(struct phy_device *phydev) -+{ -+#if !(SYS_WAKEUP_BASED_ON_ETH_PKT) -+ int value; -+ -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) -+ mutex_lock(&phydev->lock); -+#else -+ /* no need lock in 4.19 */ -+#endif -+ -+ ytphy_write_ext(phydev, 0xa000, 0); -+ value = phy_read(phydev, MII_BMCR); -+ phy_write(phydev, MII_BMCR, value | BMCR_PDOWN); -+ -+ ytphy_write_ext(phydev, 0xa000, 3); -+ value = phy_read(phydev, MII_BMCR); -+ phy_write(phydev, MII_BMCR, value | BMCR_PDOWN); -+ -+ ytphy_write_ext(phydev, 0xa000, 0); -+ -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) -+ mutex_unlock(&phydev->lock); -+#else -+ /* no need lock/unlock in 4.19 */ -+#endif -+#endif /*!(SYS_WAKEUP_BASED_ON_ETH_PKT)*/ -+ -+ return 0; -+} -+ -+int yt8614_resume(struct phy_device *phydev) -+{ -+#if !(SYS_WAKEUP_BASED_ON_ETH_PKT) -+ int value; -+ -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) -+ mutex_lock(&phydev->lock); -+#else -+ /* no need lock/unlock in 4.19 */ -+#endif -+ -+ ytphy_write_ext(phydev, 0xa000, 0); -+ value = phy_read(phydev, MII_BMCR); -+ phy_write(phydev, MII_BMCR, value & ~BMCR_PDOWN); -+ -+ ytphy_write_ext(phydev, 0xa000, 3); -+ value = phy_read(phydev, MII_BMCR); -+ phy_write(phydev, MII_BMCR, value & ~BMCR_PDOWN); -+ -+ ytphy_write_ext(phydev, 0xa000, 0); -+ -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) -+ mutex_unlock(&phydev->lock); -+#else -+ /* no need lock/unlock in 4.19 */ -+#endif -+#endif /*!(SYS_WAKEUP_BASED_ON_ETH_PKT)*/ -+ -+ return 0; -+} -+ -+ -+static struct phy_driver ytphy_drvs[] = { -+ { -+ .phy_id = PHY_ID_YT8010, -+ .name = "YT8010 Automotive Ethernet", -+ .phy_id_mask = MOTORCOMM_PHY_ID_MASK, -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(5,4,0) ) -+ .features = PHY_BASIC_FEATURES, -+ .flags = PHY_HAS_INTERRUPT, -+#endif -+ .config_aneg = yt8010_config_aneg, -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) -+ .config_init = ytphy_config_init, -+#else -+ .config_init = genphy_config_init, -+#endif -+ .read_status = genphy_read_status, -+ }, { -+ .phy_id = PHY_ID_YT8510, -+ .name = "YT8510 100/10Mb Ethernet", -+ .phy_id_mask = MOTORCOMM_PHY_ID_MASK, -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(5,4,0) ) -+ .features = PHY_BASIC_FEATURES, -+ .flags = PHY_HAS_INTERRUPT, -+#endif -+ .config_aneg = genphy_config_aneg, -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) -+ .config_init = ytphy_config_init, -+#else -+ .config_init = genphy_config_init, -+#endif -+ .read_status = genphy_read_status, -+ }, { -+ .phy_id = PHY_ID_YT8511, - .name = "YT8511 Gigabit Ethernet", -+ .phy_id_mask = MOTORCOMM_PHY_ID_MASK, -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(5,4,0) ) -+ .features = PHY_GBIT_FEATURES, -+ .flags = PHY_HAS_INTERRUPT, -+#endif -+ .config_aneg = genphy_config_aneg, -+#if GMAC_CLOCK_INPUT_NEEDED - .config_init = yt8511_config_init, -+#else -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) -+ .config_init = ytphy_config_init, -+#else -+ .config_init = genphy_config_init, -+#endif -+#endif -+ .read_status = genphy_read_status, - .suspend = genphy_suspend, - .resume = genphy_resume, -- .read_page = yt8511_read_page, -- .write_page = yt8511_write_page, -- }, -+ }, { -+ .phy_id = PHY_ID_YT8512, -+ .name = "YT8512 Ethernet", -+ .phy_id_mask = MOTORCOMM_PHY_ID_MASK, -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(5,4,0) ) -+ .features = PHY_BASIC_FEATURES, -+ .flags = PHY_HAS_INTERRUPT, -+#endif -+ .config_aneg = genphy_config_aneg, -+ .config_init = yt8512_config_init, -+ .read_status = yt8512_read_status, -+ .suspend = genphy_suspend, -+ .resume = genphy_resume, -+ }, { -+ .phy_id = PHY_ID_YT8512B, -+ .name = "YT8512B Ethernet", -+ .phy_id_mask = MOTORCOMM_PHY_ID_MASK, -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(5,4,0) ) -+ .features = PHY_BASIC_FEATURES, -+ .flags = PHY_HAS_INTERRUPT, -+#endif -+ .config_aneg = genphy_config_aneg, -+ .config_init = yt8512_config_init, -+ .read_status = yt8512_read_status, -+ .suspend = genphy_suspend, -+ .resume = genphy_resume, -+ }, { -+ .phy_id = PHY_ID_YT8521, -+ .name = "YT8521 Ethernet", -+ .phy_id_mask = MOTORCOMM_PHY_ID_MASK, -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(5,4,0) ) -+ .features = PHY_BASIC_FEATURES | PHY_GBIT_FEATURES, -+#endif -+ .flags = PHY_POLL, -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) -+#else -+ .soft_reset = yt8521_soft_reset, -+#endif -+ .config_aneg = genphy_config_aneg, -+#if ( LINUX_VERSION_CODE > KERNEL_VERSION(3,11,0) ) -+ .aneg_done = yt8521_aneg_done, -+#endif -+ .config_init = yt8521_config_init, -+ .read_status = yt8521_read_status, -+ .suspend = yt8521_suspend, -+ .resume = yt8521_resume, -+#if (YTPHY_ENABLE_WOL) -+ .get_wol = &ytphy_get_wol, -+ .set_wol = &ytphy_set_wol, -+#endif -+ },{ -+ /* same as 8521 */ -+ .phy_id = PHY_ID_YT8531S, -+ .name = "YT8531S Ethernet", -+ .phy_id_mask = MOTORCOMM_PHY_ID_MASK, -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(5,4,0) ) -+ .features = PHY_BASIC_FEATURES | PHY_GBIT_FEATURES, -+#endif -+ .flags = PHY_POLL, -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) -+#else -+ .soft_reset = yt8521_soft_reset, -+#endif -+ .config_aneg = genphy_config_aneg, -+#if ( LINUX_VERSION_CODE > KERNEL_VERSION(3,11,0) ) -+ .aneg_done = yt8521_aneg_done, -+#endif -+ .config_init = yt8521_config_init, -+ .read_status = yt8521_read_status, -+ .suspend = yt8521_suspend, -+ .resume = yt8521_resume, -+#if (YTPHY_ENABLE_WOL) -+ .get_wol = &ytphy_get_wol, -+ .set_wol = &ytphy_set_wol, -+#endif -+ }, { -+ /* same as 8511 */ -+ .phy_id = PHY_ID_YT8531, -+ .name = "YT8531 Gigabit Ethernet", -+ .phy_id_mask = MOTORCOMM_PHY_ID_MASK, -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(5,4,0) ) -+ .features = PHY_BASIC_FEATURES | PHY_GBIT_FEATURES, -+ .flags = PHY_HAS_INTERRUPT, -+#endif -+ .config_aneg = genphy_config_aneg, -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) -+ .config_init = ytphy_config_init, -+#else -+ .config_init = genphy_config_init, -+#endif -+ .read_status = genphy_read_status, -+ .suspend = genphy_suspend, -+ .resume = genphy_resume, -+#if (YTPHY_ENABLE_WOL) -+ .get_wol = &ytphy_get_wol, -+ .set_wol = &ytphy_set_wol, -+#endif -+ }, { -+ .phy_id = PHY_ID_YT8618, -+ .name = "YT8618 Ethernet", -+ .phy_id_mask = MOTORCOMM_MPHY_ID_MASK, -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(5,4,0) ) -+ .features = PHY_BASIC_FEATURES | PHY_GBIT_FEATURES, -+#endif -+ .flags = PHY_POLL, -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) -+#else -+ .soft_reset = yt8618_soft_reset, -+#endif -+ .config_aneg = genphy_config_aneg, -+#if ( LINUX_VERSION_CODE > KERNEL_VERSION(3,11,0) ) -+ .aneg_done = yt8618_aneg_done, -+#endif -+ .config_init = yt8618_config_init, -+ .read_status = yt8618_read_status, -+ .suspend = yt8618_suspend, -+ .resume = yt8618_resume, -+ }, { -+ .phy_id = PHY_ID_YT8614, -+ .name = "YT8614 Ethernet", -+ .phy_id_mask = MOTORCOMM_MPHY_ID_MASK_8614, -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(5,4,0) ) -+ .features = PHY_BASIC_FEATURES | PHY_GBIT_FEATURES, -+#endif -+ .flags = PHY_POLL, -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) -+#else -+ .soft_reset = yt8614_soft_reset, -+#endif -+ .config_aneg = genphy_config_aneg, -+#if ( LINUX_VERSION_CODE > KERNEL_VERSION(3,11,0) ) -+ .aneg_done = yt8614_aneg_done, -+#endif -+ .config_init = yt8614_config_init, -+ .read_status = yt8614_read_status, -+ .suspend = yt8614_suspend, -+ .resume = yt8614_resume, -+ }, - }; - --module_phy_driver(motorcomm_phy_drvs); -+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) -+static int ytphy_drivers_register(struct phy_driver* phy_drvs, int size) -+{ -+ int i, j; -+ int ret; -+ -+ for (i = 0; i < size; i++) { -+ ret = phy_driver_register(&phy_drvs[i]); -+ if (ret) -+ goto err; -+ } -+ -+ return 0; -+ -+err: -+ for (j = 0; j < i; j++) -+ phy_driver_unregister(&phy_drvs[j]); -+ -+ return ret; -+} -+ -+static void ytphy_drivers_unregister(struct phy_driver* phy_drvs, int size) -+{ -+ int i; -+ -+ for (i = 0; i < size; i++) { -+ phy_driver_unregister(&phy_drvs[i]); -+ } -+} -+ -+static int __init ytphy_init(void) -+{ -+ printk("motorcomm phy register\n"); -+ return ytphy_drivers_register(ytphy_drvs, ARRAY_SIZE(ytphy_drvs)); -+} -+ -+static void __exit ytphy_exit(void) -+{ -+ printk("motorcomm phy unregister\n"); -+ ytphy_drivers_unregister(ytphy_drvs, ARRAY_SIZE(ytphy_drvs)); -+} -+ -+module_init(ytphy_init); -+module_exit(ytphy_exit); -+#else -+/* for linux 4.x */ -+module_phy_driver(ytphy_drvs); -+#endif - - MODULE_DESCRIPTION("Motorcomm PHY driver"); --MODULE_AUTHOR("Peter Geis"); -+MODULE_AUTHOR("Leilei Zhao"); - MODULE_LICENSE("GPL"); - --static const struct mdio_device_id __maybe_unused motorcomm_tbl[] = { -- { PHY_ID_MATCH_EXACT(PHY_ID_YT8511) }, -- { /* sentinal */ } -+static struct mdio_device_id __maybe_unused motorcomm_tbl[] = { -+ { PHY_ID_YT8010, MOTORCOMM_PHY_ID_MASK }, -+ { PHY_ID_YT8510, MOTORCOMM_PHY_ID_MASK }, -+ { PHY_ID_YT8511, MOTORCOMM_PHY_ID_MASK }, -+ { PHY_ID_YT8512, MOTORCOMM_PHY_ID_MASK }, -+ { PHY_ID_YT8512B, MOTORCOMM_PHY_ID_MASK }, -+ { PHY_ID_YT8521, MOTORCOMM_PHY_ID_MASK }, -+ { PHY_ID_YT8531S, MOTORCOMM_PHY_ID_8531_MASK }, -+ { PHY_ID_YT8531, MOTORCOMM_PHY_ID_8531_MASK }, -+ { PHY_ID_YT8618, MOTORCOMM_MPHY_ID_MASK }, -+ { PHY_ID_YT8614, MOTORCOMM_MPHY_ID_MASK_8614 }, -+ { } - }; - - MODULE_DEVICE_TABLE(mdio, motorcomm_tbl); -+ -+ ---- /dev/null -+++ b/drivers/net/phy/yt8614-phy.h -@@ -0,0 +1,491 @@ -+#ifndef _PHY_H_ -+#define _PHY_H_ -+ -+ -+/* configuration for driver */ -+ -+#define YT8614_MAX_LPORT_ID 3 -+ -+#define YT8614_PHY_MODE_FIBER 1 //fiber mode only -+#define YT8614_PHY_MODE_UTP 2 //utp mode only -+#define YT8614_PHY_MODE_POLL 3 //fiber and utp, poll mode -+ -+/* please make choice according to system design -+ * for Fiber only system, please define YT8614_PHY_MODE_CURR 1 -+ * for UTP only system, please define YT8614_PHY_MODE_CURR 2 -+ * for combo system, please define YT8614_PHY_MODE_CURR 3 -+ */ -+#define YT8614_PHY_MODE_CURR 3 -+ -+ -+ -+/* pls dont modify below lines */ -+ -+#define PHY_ID_YT8614 0x4F51E899 //serdes -+#define MOTORCOMM_MPHY_ID_MASK_8614 0xffffffff -+ -+#ifndef BOOL -+#define BOOL unsigned int -+#endif -+ -+#ifndef FALSE -+#define FALSE 0 -+#endif -+ -+#ifndef TRUE -+#define TRUE 1 -+#endif -+ -+#ifndef SPEED_1000M -+#define SPEED_1000M 2 -+#endif -+#ifndef SPEED_100M -+#define SPEED_100M 1 -+#endif -+#ifndef SPEED_10M -+#define SPEED_10M 0 -+#endif -+ -+#ifndef SPEED_UNKNOWN -+#define SPEED_UNKNOWN 0xffff -+#endif -+ -+#ifndef DUPLEX_FULL -+#define DUPLEX_FULL 1 -+#endif -+#ifndef DUPLEX_HALF -+#define DUPLEX_HALF 0 -+#endif -+ -+#ifndef BIT -+#define BIT(n) (0x1<<(n)) -+#endif -+#ifndef s32 -+typedef int s32; -+typedef unsigned int u32; -+typedef unsigned short u16; -+typedef unsigned char u8; -+#endif -+ -+#ifndef REG_PHY_SPEC_STATUS -+#define REG_PHY_SPEC_STATUS 0x11 -+#define REG_DEBUG_ADDR_OFFSET 0x1e -+#define REG_DEBUG_DATA 0x1f -+#endif -+ -+/**********YT8614************************************************/ -+ -+#define YT8614_SMI_SEL_PHY 0x0 -+#define YT8614_SMI_SEL_SDS_QSGMII 0x02 -+#define YT8614_SMI_SEL_SDS_SGMII 0x03 -+ -+/* yt8614 register type */ -+#define YT8614_TYPE_COMMON 0x01 -+#define YT8614_TYPE_UTP_MII 0x02 -+#define YT8614_TYPE_UTP_EXT 0x03 -+#define YT8614_TYPE_LDS_MII 0x04 -+#define YT8614_TYPE_UTP_MMD 0x05 -+#define YT8614_TYPE_SDS_QSGMII_MII 0x06 -+#define YT8614_TYPE_SDS_SGMII_MII 0x07 -+#define YT8614_TYPE_SDS_QSGMII_EXT 0x08 -+#define YT8614_TYPE_SDS_SGMII_EXT 0x09 -+ -+/* YT8614 extended common register */ -+#define YT8614_REG_COM_SMI_MUX 0xA000 -+#define YT8614_REG_COM_SLED_CFG0 0xA001 -+#define YT8614_REG_COM_PHY_ID 0xA002 -+#define YT8614_REG_COM_CHIP_VER 0xA003 -+#define YT8614_REG_COM_SLED_CFG 0xA004 -+#define YT8614_REG_COM_MODE_CHG_RESET 0xA005 -+#define YT8614_REG_COM_SYNCE0_CFG 0xA006 -+#define YT8614_REG_COM_CHIP_MODE 0xA007 -+ -+#define YT8614_REG_COM_HIDE_SPEED 0xA009 -+ -+#define YT8614_REG_COM_SYNCE1_CFG 0xA00E -+ -+#define YT8614_REG_COM_HIDE_FIBER_MODE 0xA019 -+ -+ -+#define YT8614_REG_COM_HIDE_SEL1 0xA054 -+#define YT8614_REG_COM_HIDE_LED_CFG2 0xB8 -+#define YT8614_REG_COM_HIDE_LED_CFG3 0xB9 -+#define YT8614_REG_COM_HIDE_LED_CFG5 0xBB -+ -+#define YT8614_REG_COM_HIDE_LED_CFG4 0xBA //not used currently -+ -+#if 0 -+#define YT8614_REG_COM_HIDE_LED12_CFG 0xA060 //not used currently -+#define YT8614_REG_COM_HIDE_LED13_CFG 0xA061 -+#define YT8614_REG_COM_HIDE_LED14_CFG 0xA062 -+#define YT8614_REG_COM_HIDE_LED15_CFG 0xA063 -+#define YT8614_REG_COM_HIDE_LED16_CFG 0xA064 -+#define YT8614_REG_COM_HIDE_LED17_CFG 0xA065 -+#define YT8614_REG_COM_HIDE_LED18_CFG 0xA066 -+#define YT8614_REG_COM_HIDE_LED19_CFG 0xA067 -+#define YT8614_REG_COM_HIDE_LED20_CFG 0xA068 -+#define YT8614_REG_COM_HIDE_LED21_CFG 0xA069 -+#define YT8614_REG_COM_HIDE_LED22_CFG 0xA06A -+#define YT8614_REG_COM_HIDE_LED23_CFG 0xA06B -+#define YT8614_REG_COM_HIDE_LED24_CFG 0xA06C -+#define YT8614_REG_COM_HIDE_LED25_CFG 0xA06D -+#define YT8614_REG_COM_HIDE_LED26_CFG 0xA06E -+#define YT8614_REG_COM_HIDE_LED27_CFG 0xA06F -+#endif -+ -+#define YT8614_REG_COM_HIDE_LED28_CFG 0xA070 -+#define YT8614_REG_COM_HIDE_LED29_CFG 0xA071 -+#define YT8614_REG_COM_HIDE_LED30_CFG 0xA072 -+#define YT8614_REG_COM_HIDE_LED31_CFG 0xA073 -+#define YT8614_REG_COM_HIDE_LED32_CFG 0xA074 -+#define YT8614_REG_COM_HIDE_LED33_CFG 0xA075 -+#define YT8614_REG_COM_HIDE_LED34_CFG 0xA076 -+#define YT8614_REG_COM_HIDE_LED35_CFG 0xA077 -+ -+#define YT8614_REG_COM_PKG_CFG0 0xA0A0 -+#define YT8614_REG_COM_PKG_CFG1 0xA0A1 -+#define YT8614_REG_COM_PKG_CFG2 0xA0A2 -+#define YT8614_REG_COM_PKG_RX_VALID0 0xA0A3 -+#define YT8614_REG_COM_PKG_RX_VALID1 0xA0A4 -+#define YT8614_REG_COM_PKG_RX_OS0 0xA0A5 -+#define YT8614_REG_COM_PKG_RX_OS1 0xA0A6 -+#define YT8614_REG_COM_PKG_RX_US0 0xA0A7 -+#define YT8614_REG_COM_PKG_RX_US1 0xA0A8 -+#define YT8614_REG_COM_PKG_RX_ERR 0xA0A9 -+#define YT8614_REG_COM_PKG_RX_OS_BAD 0xA0AA -+#define YT8614_REG_COM_PKG_RX_FRAG 0xA0AB -+#define YT8614_REG_COM_PKG_RX_NOSFD 0xA0AC -+#define YT8614_REG_COM_PKG_TX_VALID0 0xA0AD -+#define YT8614_REG_COM_PKG_TX_VALID1 0xA0AE -+#define YT8614_REG_COM_PKG_TX_OS0 0xA0AF -+ -+#define YT8614_REG_COM_PKG_TX_OS1 0xA0B0 -+#define YT8614_REG_COM_PKG_TX_US0 0xA0B1 -+#define YT8614_REG_COM_PKG_TX_US1 0xA0B2 -+#define YT8614_REG_COM_PKG_TX_ERR 0xA0B3 -+#define YT8614_REG_COM_PKG_TX_OS_BAD 0xA0B4 -+#define YT8614_REG_COM_PKG_TX_FRAG 0xA0B5 -+#define YT8614_REG_COM_PKG_TX_NOSFD 0xA0B6 -+#define YT8614_REG_COM_PKG_CFG3 0xA0B7 -+#define YT8614_REG_COM_PKG_AZ_CFG 0xA0B8 -+#define YT8614_REG_COM_PKG_DA_SA_CFG3 0xA0B9 -+ -+#define YT8614_REG_COM_MANU_HW_RESET 0xA0C0 -+ -+/* YT8614 UTP MII register: same as generic phy register definitions */ -+#define REG_MII_BMCR 0x00 /* Basic mode control register */ -+#define REG_MII_BMSR 0x01 /* Basic mode status register */ -+#define REG_MII_PHYSID1 0x02 /* PHYS ID 1 */ -+#define REG_MII_PHYSID2 0x03 /* PHYS ID 2 */ -+#define REG_MII_ADVERTISE 0x04 /* Advertisement control reg */ -+#define REG_MII_LPA 0x05 /* Link partner ability reg */ -+#define REG_MII_EXPANSION 0x06 /* Expansion register */ -+#define REG_MII_NEXT_PAGE 0x07 /* Next page register */ -+#define REG_MII_LPR_NEXT_PAGE 0x08 /* LPR next page register */ -+#define REG_MII_CTRL1000 0x09 /* 1000BASE-T control */ -+#define REG_MII_STAT1000 0x0A /* 1000BASE-T status */ -+ -+#define REG_MII_MMD_CTRL 0x0D /* MMD access control register */ -+#define REG_MII_MMD_DATA 0x0E /* MMD access data register */ -+ -+#define REG_MII_ESTATUS 0x0F /* Extended Status */ -+#define REG_MII_SPEC_CTRL 0x10 /* PHY specific func control */ -+#define REG_MII_SPEC_STATUS 0x11 /* PHY specific status */ -+#define REG_MII_INT_MASK 0x12 /* Interrupt mask register */ -+#define REG_MII_INT_STATUS 0x13 /* Interrupt status register */ -+#define REG_MII_DOWNG_CTRL 0x14 /* Speed auto downgrade control*/ -+#define REG_MII_RERRCOUNTER 0x15 /* Receive error counter */ -+ -+#define REG_MII_EXT_ADDR 0x1E /* Extended reg's address */ -+#define REG_MII_EXT_DATA 0x1F /* Extended reg's date */ -+ -+#ifndef MII_BMSR -+#define MII_BMSR REG_MII_BMSR -+#endif -+ -+#ifndef YT8614_SPEED_MODE_BIT -+#define YT8614_SPEED_MODE 0xc000 -+#define YT8614_DUPLEX 0x2000 -+#define YT8614_SPEED_MODE_BIT 14 -+#define YT8614_DUPLEX_BIT 13 -+#define YT8614_LINK_STATUS_BIT 10 -+ -+#endif -+ -+#define YT8614_REG_COM_HIDE_SPEED_CMB_PRI 0x2000 -+ -+/* YT8614 UTP MMD register */ -+#define YT8614_REG_UTP_MMD_CTRL1 0x00 /* PCS control 1 register */ -+#define YT8614_REG_UTP_MMD_STATUS1 0x01 /* PCS status 1 register */ -+#define YT8614_REG_UTP_MMD_EEE_CTRL 0x14 /* EEE control and capability */ -+#define YT8614_REG_UTP_MMD_EEE_WK_ERR_CNT 0x16 /* EEE wake error counter */ -+#define YT8614_REG_UTP_MMD_EEE_LOCAL_ABI 0x3C /* local device EEE ability */ -+#define YT8614_REG_UTP_MMD_EEE_LP_ABI 0x3D /* link partner EEE ability */ -+#define YT8614_REG_UTP_MMD_EEE_AUTONEG_RES 0x8000 /* autoneg result of EEE */ -+ -+/* YT8614 UTP EXT register */ -+#define YT8614_REG_UTP_EXT_LPBK 0x0A -+#define YT8614_REG_UTP_EXT_SLEEP_CTRL1 0x27 -+#define YT8614_REG_UTP_EXT_DEBUG_MON1 0x5A -+#define YT8614_REG_UTP_EXT_DEBUG_MON2 0x5B -+#define YT8614_REG_UTP_EXT_DEBUG_MON3 0x5C -+#define YT8614_REG_UTP_EXT_DEBUG_MON4 0x5D -+ -+/* YT8614 SDS(1.25G/5G) MII register: same as YT8521S */ -+#define REG_SDS_BMCR 0x00 /* Basic mode control register */ -+#define REG_SDS_BMSR 0x01 /* Basic mode status register */ -+#define REG_SDS_PHYSID1 0x02 /* PHYS ID 1 */ -+#define REG_SDS_PHYSID2 0x03 /* PHYS ID 2 */ -+#define REG_SDS_ADVERTISE 0x04 /* Advertisement control reg */ -+#define REG_SDS_LPA 0x05 /* Link partner ability reg */ -+#define REG_SDS_EXPANSION 0x06 /* Expansion register */ -+#define REG_SDS_NEXT_PAGE 0x07 /* Next page register */ -+#define REG_SDS_LPR_NEXT_PAGE 0x08 /* LPR next page register */ -+ -+#define REG_SDS_ESTATUS 0x0F /* Extended Status */ -+#define REG_SDS_SPEC_STATUS 0x11 /* SDS specific status */ -+ -+#define REG_SDS_100FX_CFG 0x14 /* 100fx cfg */ -+#define REG_SDS_RERRCOUNTER 0x15 /* Receive error counter */ -+#define REG_SDS_LINT_FAIL_CNT 0x16 /* Lint fail counter mon */ -+ -+/* YT8614 SDS(5G) EXT register */ -+#define YT8614_REG_QSGMII_EXT_ANA_DIG_CFG 0x02 /* sds analog digital interface cfg */ -+#define YT8614_REG_QSGMII_EXT_PRBS_CFG1 0x05 /* sds prbs cfg1 */ -+#define YT8614_REG_QSGMII_EXT_PRBS_CFG2_1 0x06 /* sds prbs cfg2 */ -+#define YT8614_REG_QSGMII_EXT_PRBS_CFG2_2 0x07 /* sds prbs cfg2 */ -+#define YT8614_REG_QSGMII_EXT_PRBS_MON1 0x08 /* sds prbs mon1 */ -+#define YT8614_REG_QSGMII_EXT_PRBS_MON2 0x09 /* sds prbs mon2 */ -+#define YT8614_REG_QSGMII_EXT_PRBS_MON3 0x0A /* sds prbs mon3 */ -+#define YT8614_REG_QSGMII_EXT_PRBS_MON4 0x0B /* sds prbs mon4 */ -+#define YT8614_REG_QSGMII_EXT_PRBS_MON5 0x0C /* sds prbs mon5 */ -+#define YT8614_REG_QSGMII_EXT_ANA_CFG2 0xA1 /* Analog cfg2 */ -+ -+/* YT8614 SDS(1.25G) EXT register */ -+#define YT8614_REG_SGMII_EXT_PRBS_CFG1 0x05 /* sds prbs cfg1 */ -+#define YT8614_REG_SGMII_EXT_PRBS_CFG2 0x06 /* sds prbs cfg2 */ -+#define YT8614_REG_SGMII_EXT_PRBS_MON1 0x08 /* sds prbs mon1 */ -+#define YT8614_REG_SGMII_EXT_PRBS_MON2 0x09 /* sds prbs mon2 */ -+#define YT8614_REG_SGMII_EXT_PRBS_MON3 0x0A /* sds prbs mon3 */ -+#define YT8614_REG_SGMII_EXT_PRBS_MON4 0x0B /* sds prbs mon4 */ -+#define YT8614_REG_SGMII_EXT_PRBS_MON5 0x0C /* sds prbs mon5 */ -+#define YT8614_REG_SGMII_EXT_ANA_CFG2 0xA1 /* Analog cfg2 */ -+#define YT8614_REG_SGMII_EXT_HIDE_AUTO_SEN 0xA5 /* Fiber auto sensing */ -+ -+//////////////////////////////////////////////////////////////////// -+#define YT8614_MMD_DEV_ADDR1 0x1 -+#define YT8614_MMD_DEV_ADDR3 0x3 -+#define YT8614_MMD_DEV_ADDR7 0x7 -+#define YT8614_MMD_DEV_ADDR_NONE 0xFF -+ -+/**********YT8521S************************************************/ -+/* Basic mode control register(0x00) */ -+#define BMCR_RESV 0x003f /* Unused... */ -+#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */ -+#define BMCR_CTST 0x0080 /* Collision test */ -+#define BMCR_FULLDPLX 0x0100 /* Full duplex */ -+#define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */ -+#define BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */ -+#define BMCR_PDOWN 0x0800 /* Powerdown the DP83840 */ -+#define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */ -+#define BMCR_SPEED100 0x2000 /* Select 100Mbps */ -+#define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */ -+#define BMCR_RESET 0x8000 /* Reset the DP83840 */ -+ -+/* Basic mode status register(0x01) */ -+#define BMSR_ERCAP 0x0001 /* Ext-reg capability */ -+#define BMSR_JCD 0x0002 /* Jabber detected */ -+#define BMSR_LSTATUS 0x0004 /* Link status */ -+#define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */ -+#define BMSR_RFAULT 0x0010 /* Remote fault detected */ -+#define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */ -+#define BMSR_RESV 0x00c0 /* Unused... */ -+#define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */ -+#define BMSR_100HALF2 0x0200 /* Can do 100BASE-T2 HDX */ -+#define BMSR_100FULL2 0x0400 /* Can do 100BASE-T2 FDX */ -+#define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */ -+#define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */ -+#define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */ -+#define BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */ -+#define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */ -+ -+/* Advertisement control register(0x04) */ -+#define ADVERTISE_SLCT 0x001f /* Selector bits */ -+#define ADVERTISE_CSMA 0x0001 /* Only selector supported */ -+#define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */ -+#define ADVERTISE_1000XFULL 0x0020 /* Try for 1000BASE-X full-duplex */ -+#define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */ -+#define ADVERTISE_1000XHALF 0x0040 /* Try for 1000BASE-X half-duplex */ -+#define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */ -+#define ADVERTISE_1000XPAUSE 0x0080 /* Try for 1000BASE-X pause */ -+#define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */ -+#define ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */ -+#define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */ -+#define ADVERTISE_PAUSE_CAP 0x0400 /* Try for pause */ -+#define ADVERTISE_PAUSE_ASYM 0x0800 /* Try for asymetric pause */ -+#define ADVERTISE_RESV 0x1000 /* Unused... */ -+#define ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */ -+#define ADVERTISE_LPACK 0x4000 /* Ack link partners response */ -+#define ADVERTISE_NPAGE 0x8000 /* Next page bit */ -+ -+#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | ADVERTISE_CSMA) -+#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \ -+ ADVERTISE_100HALF | ADVERTISE_100FULL) -+ -+/* Link partner ability register(0x05) */ -+#define LPA_SLCT 0x001f /* Same as advertise selector */ -+#define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */ -+#define LPA_1000XFULL 0x0020 /* Can do 1000BASE-X full-duplex */ -+#define LPA_10FULL 0x0040 /* Can do 10mbps full-duplex */ -+#define LPA_1000XHALF 0x0040 /* Can do 1000BASE-X half-duplex */ -+#define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */ -+#define LPA_1000XPAUSE 0x0080 /* Can do 1000BASE-X pause */ -+#define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */ -+#define LPA_1000XPAUSE_ASYM 0x0100 /* Can do 1000BASE-X pause asym */ -+#define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */ -+#define LPA_PAUSE_CAP 0x0400 /* Can pause */ -+#define LPA_PAUSE_ASYM 0x0800 /* Can pause asymetrically */ -+#define LPA_RESV 0x1000 /* Unused... */ -+#define LPA_RFAULT 0x2000 /* Link partner faulted */ -+#define LPA_LPACK 0x4000 /* Link partner acked us */ -+#define LPA_NPAGE 0x8000 /* Next page bit */ -+ -+/* 1000BASE-T Control register(0x09) */ -+#define ADVERTISE_1000FULL 0x0200 /* Advertise 1000BASE-T full duplex */ -+#define ADVERTISE_1000HALF 0x0100 /* Advertise 1000BASE-T half duplex */ -+#define CTL1000_AS_MASTER 0x0800 -+#define CTL1000_ENABLE_MASTER 0x1000 -+ -+/* 1000BASE-T Status register(0x0A) */ -+#define LPA_1000LOCALRXOK 0x2000 /* Link partner local receiver status */ -+#define LPA_1000REMRXOK 0x1000 /* Link partner remote receiver status */ -+#define LPA_1000FULL 0x0800 /* Link partner 1000BASE-T full duplex */ -+#define LPA_1000HALF 0x0400 /* Link partner 1000BASE-T half duplex */ -+ -+/**********YT8614************************************************/ -+/* Basic mode control register(0x00) */ -+#define FIBER_BMCR_RESV 0x001f /* b[4:0] Unused... */ -+#define FIBER_BMCR_EN_UNIDIR 0x0020 /* b[5] Valid when bit 0.12 is zero and bit 0.8 is one */ -+#define FIBER_BMCR_SPEED1000 0x0040 /* b[6] MSB of Speed (1000) */ -+#define FIBER_BMCR_CTST 0x0080 /* b[7] Collision test */ -+#define FIBER_BMCR_DUPLEX_MODE 0x0100 /* b[8] Duplex mode */ -+#define FIBER_BMCR_ANRESTART 0x0200 /* b[9] Auto negotiation restart */ -+#define FIBER_BMCR_ISOLATE 0x0400 /* b[10] Isolate phy from RGMII/SGMII/FIBER */ -+#define FIBER_BMCR_PDOWN 0x0800 /* b[11] 1: Power down */ -+#define FIBER_BMCR_ANENABLE 0x1000 /* b[12] Enable auto negotiation */ -+#define FIBER_BMCR_SPEED100 0x2000 /* b[13] LSB of Speed (100) */ -+#define FIBER_BMCR_LOOPBACK 0x4000 /* b[14] Internal loopback control */ -+#define FIBER_BMCR_RESET 0x8000 /* b[15] PHY Software Reset(self-clear) */ -+ -+/* Sds specific status register(0x11) */ -+#define FIBER_SSR_ERCAP 0x0001 /* b[0] realtime syncstatus */ -+#define FIBER_SSR_XMIT 0x000E /* b[3:1] realtime transmit statemachine. -+ 001: Xmit Idle; -+ 010: Xmit Config; -+ 100: Xmit Data. */ -+#define FIBER_SSR_SER_MODE_CFG 0x0030 /* b[5:4] realtime serdes working mode. -+ 00: SG_MAC; -+ 01: SG_PHY; -+ 10: FIB_1000; -+ 11: FIB_100. */ -+#define FIBER_SSR_EN_FLOWCTRL_TX 0x0040 /* b[6] realtime en_flowctrl_tx */ -+#define FIBER_SSR_EN_FLOWCTRL_RX 0x0080 /* b[7] realtime en_flowctrl_rx */ -+#define FIBER_SSR_DUPLEX_ERROR 0x0100 /* b[8] realtime deplex error */ -+#define FIBER_SSR_RX_LPI_ACTIVE 0x0200 /* b[9] rx lpi is active */ -+#define FIBER_SSR_LSTATUS 0x0400 /* b[10] Link status real-time */ -+#define FIBER_SSR_PAUSE 0x1800 /* b[12:11] Pause to mac */ -+#define FIBER_SSR_DUPLEX 0x2000 /* b[13] This status bit is valid only when bit10 is 1. -+ 1: full duplex -+ 0: half duplex */ -+#define FIBER_SSR_SPEED_MODE 0xC000 /* b[15:14] These status bits are valid only when bit10 is 1. -+ 10---1000M -+ 01---100M */ -+ -+/* SLED cfg0 (ext 0xA001) */ -+#define FIBER_SLED_CFG0_EN_CTRL 0x00FF /* b[7:0] Control to enable the eight ports' SLED */ -+#define FIBER_SLED_CFG0_BIT_MASK 0x0700 /* b[10:8] 1: enable the pin output */ -+#define FIBER_SLED_CFG0_ACT_LOW 0x0800 /* b[11] control SLED's polarity. 1: active low; 0: active high */ -+#define FIBER_SLED_CFG0_MANU_ST 0x7000 /* b[14:12] SLEDs' manul status, corresponding to each port's 3 SLEDs */ -+#define FIBER_SLED_CFG0_MANU_EN 0x8000 /* b[15] to control serial LEDs status manually */ -+ -+/**********YT8614************************************************/ -+/* Fiber auto sensing(sgmii ext 0xA5) */ -+#define FIBER_AUTO_SEN_ENABLE 0x8000 /* b[15] Enable fiber auto sensing */ -+ -+/* Fiber force speed(common ext 0xA009) */ -+#define FIBER_FORCE_1000M 0x0001 /* b[0] 1:1000BX 0:100FX */ -+ -+#ifndef NULL -+#define NULL 0 -+#endif -+ -+/* errno */ -+enum ytphy_8614_errno_e -+{ -+ SYS_E_NONE, -+ SYS_E_PARAM, -+ SYS_E_MAX -+}; -+ -+/* errno */ -+enum ytphy_8614_combo_speed_e -+{ -+ YT8614_COMBO_FIBER_1000M, -+ YT8614_COMBO_FIBER_100M, -+ YT8614_COMBO_UTP_ONLY, -+ YT8614_COMBO_SPEED_MAX -+}; -+ -+/* definition for porting */ -+/* phy registers access */ -+typedef struct -+{ -+ u16 reg; /* the offset of the phy internal address */ -+ u16 val; /* the value of the register */ -+ u8 regType; /* register type */ -+} phy_data_s; -+ -+/* for porting use. -+ * pls over-write member function read/write for mdio access -+ */ -+typedef struct phy_info_str -+{ -+#if 0 -+ struct phy_device *phydev; -+ int mdio_base; -+#endif -+ unsigned int lport; -+ unsigned int bus_id; -+ unsigned int phy_addr; -+ -+ s32 (*read)(struct phy_info_str *info, phy_data_s *param); -+ s32 (*write)(struct phy_info_str *info, phy_data_s *param); -+}phy_info_s; -+ -+/* get phy access method */ -+s32 yt8614_read_reg(struct phy_info_str *info, phy_data_s *param); -+s32 yt8614_write_reg(struct phy_info_str *info, phy_data_s *param); -+s32 yt8614_phy_soft_reset(u32 lport); -+s32 yt8614_phy_init(u32 lport); -+s32 yt8614_fiber_enable(u32 lport, BOOL enable); -+s32 yt8614_utp_enable(u32 lport, BOOL enable); -+s32 yt8614_fiber_unidirection_set(u32 lport, int speed, BOOL enable); -+s32 yt8614_fiber_autosensing_set(u32 lport, BOOL enable); -+s32 yt8614_fiber_speed_set(u32 lport, int fiber_speed); -+s32 yt8614_qsgmii_autoneg_set(u32 lport, BOOL enable); -+s32 yt8614_sgmii_autoneg_set(u32 lport, BOOL enable); -+s32 yt8614_qsgmii_sgmii_link_status_get(u32 lport, BOOL *enable, BOOL if_qsgmii); -+int yt8614_combo_media_priority_set (u32 lport, int fiber); -+int yt8614_combo_media_priority_get (u32 lport, int *fiber); -+s32 yt8614_utp_autoneg_set(u32 lport, BOOL enable); -+s32 yt8614_utp_autoneg_get(u32 lport, BOOL *enable); -+s32 yt8614_utp_autoneg_ability_set(u32 lport, unsigned int cap_mask); -+s32 yt8614_utp_autoneg_ability_get(u32 lport, unsigned int *cap_mask); -+s32 yt8614_utp_force_duplex_set(u32 lport, BOOL full); -+s32 yt8614_utp_force_duplex_get(u32 lport, BOOL *full); -+s32 yt8614_utp_force_speed_set(u32 lport, unsigned int speed); -+s32 yt8614_utp_force_speed_get(u32 lport, unsigned int *speed); -+int yt8614_autoneg_done_get (u32 lport, int speed, int *aneg); -+int yt8614_media_status_get(u32 lport, int* speed, int* duplex, int* ret_link, int *media); -+ -+#endif ---- /dev/null -+++ b/include/linux/motorcomm_phy.h -@@ -0,0 +1,119 @@ -+/* -+ * include/linux/motorcomm_phy.h -+ * -+ * Motorcomm PHY IDs -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ */ -+ -+#ifndef _MOTORCOMM_PHY_H -+#define _MOTORCOMM_PHY_H -+ -+#define MOTORCOMM_PHY_ID_MASK 0x00000fff -+#define MOTORCOMM_PHY_ID_8531_MASK 0xffffffff -+#define MOTORCOMM_MPHY_ID_MASK 0x0000ffff -+ -+#define PHY_ID_YT8010 0x00000309 -+#define PHY_ID_YT8510 0x00000109 -+#define PHY_ID_YT8511 0x0000010a -+#define PHY_ID_YT8512 0x00000118 -+#define PHY_ID_YT8512B 0x00000128 -+#define PHY_ID_YT8521 0x0000011a -+#define PHY_ID_YT8531S 0x4f51e91a -+#define PHY_ID_YT8531 0x4f51e91b -+//#define PHY_ID_YT8614 0x0000e899 -+#define PHY_ID_YT8618 0x0000e889 -+ -+#define REG_PHY_SPEC_STATUS 0x11 -+#define REG_DEBUG_ADDR_OFFSET 0x1e -+#define REG_DEBUG_DATA 0x1f -+ -+#define YT8512_EXTREG_AFE_PLL 0x50 -+#define YT8512_EXTREG_EXTEND_COMBO 0x4000 -+#define YT8512_EXTREG_LED0 0x40c0 -+#define YT8512_EXTREG_LED1 0x40c3 -+ -+#define YT8512_EXTREG_SLEEP_CONTROL1 0x2027 -+ -+#define YT_SOFTWARE_RESET 0x8000 -+ -+#define YT8512_CONFIG_PLL_REFCLK_SEL_EN 0x0040 -+#define YT8512_CONTROL1_RMII_EN 0x0001 -+#define YT8512_LED0_ACT_BLK_IND 0x1000 -+#define YT8512_LED0_DIS_LED_AN_TRY 0x0001 -+#define YT8512_LED0_BT_BLK_EN 0x0002 -+#define YT8512_LED0_HT_BLK_EN 0x0004 -+#define YT8512_LED0_COL_BLK_EN 0x0008 -+#define YT8512_LED0_BT_ON_EN 0x0010 -+#define YT8512_LED1_BT_ON_EN 0x0010 -+#define YT8512_LED1_TXACT_BLK_EN 0x0100 -+#define YT8512_LED1_RXACT_BLK_EN 0x0200 -+#define YT8512_SPEED_MODE 0xc000 -+#define YT8512_DUPLEX 0x2000 -+ -+#define YT8512_SPEED_MODE_BIT 14 -+#define YT8512_DUPLEX_BIT 13 -+#define YT8512_EN_SLEEP_SW_BIT 15 -+ -+#define YT8521_EXTREG_SLEEP_CONTROL1 0x27 -+#define YT8521_EN_SLEEP_SW_BIT 15 -+ -+#define YT8521_SPEED_MODE 0xc000 -+#define YT8521_DUPLEX 0x2000 -+#define YT8521_SPEED_MODE_BIT 14 -+#define YT8521_DUPLEX_BIT 13 -+#define YT8521_LINK_STATUS_BIT 10 -+ -+/* based on yt8521 wol config register */ -+#define YTPHY_UTP_INTR_REG 0x12 -+/* WOL Event Interrupt Enable */ -+#define YTPHY_WOL_INTR BIT(6) -+ -+/* Magic Packet MAC address registers */ -+#define YTPHY_MAGIC_PACKET_MAC_ADDR2 0xa007 -+#define YTPHY_MAGIC_PACKET_MAC_ADDR1 0xa008 -+#define YTPHY_MAGIC_PACKET_MAC_ADDR0 0xa009 -+ -+#define YTPHY_WOL_CFG_REG 0xa00a -+#define YTPHY_WOL_CFG_TYPE BIT(0) /* WOL TYPE */ -+#define YTPHY_WOL_CFG_EN BIT(3) /* WOL Enable */ -+#define YTPHY_WOL_CFG_INTR_SEL BIT(6) /* WOL Event Interrupt Enable */ -+#define YTPHY_WOL_CFG_WIDTH1 BIT(1) /* WOL Pulse Width */ -+#define YTPHY_WOL_CFG_WIDTH2 BIT(2) -+ -+#define YTPHY_REG_SPACE_UTP 0 -+#define YTPHY_REG_SPACE_FIBER 2 -+ -+enum ytphy_wol_type_e -+{ -+ YTPHY_WOL_TYPE_LEVEL, -+ YTPHY_WOL_TYPE_PULSE, -+ YTPHY_WOL_TYPE_MAX -+}; -+typedef enum ytphy_wol_type_e ytphy_wol_type_t; -+ -+enum ytphy_wol_width_e -+{ -+ YTPHY_WOL_WIDTH_84MS, -+ YTPHY_WOL_WIDTH_168MS, -+ YTPHY_WOL_WIDTH_336MS, -+ YTPHY_WOL_WIDTH_672MS, -+ YTPHY_WOL_WIDTH_MAX -+}; -+typedef enum ytphy_wol_width_e ytphy_wol_width_t; -+ -+struct ytphy_wol_cfg_s -+{ -+ int enable; -+ int type; -+ int width; -+}; -+typedef struct ytphy_wol_cfg_s ytphy_wol_cfg_t; -+ -+#endif /* _MOTORCOMM_PHY_H */ -+ -+ diff --git a/target/linux/rockchip/patches-5.18/802-arm64-dts-rockchip-add-hardware-random-number-genera.patch b/target/linux/rockchip/patches-5.18/802-arm64-dts-rockchip-add-hardware-random-number-genera.patch deleted file mode 100644 index 266b8b28dec86e..00000000000000 --- a/target/linux/rockchip/patches-5.18/802-arm64-dts-rockchip-add-hardware-random-number-genera.patch +++ /dev/null @@ -1,50 +0,0 @@ -From e5b5361651940ff5c0c1784dfd0130abec7ab535 Mon Sep 17 00:00:00 2001 -From: wevsty -Date: Mon, 24 Aug 2020 02:27:11 +0800 -Subject: [PATCH] arm64: dts: rockchip: add hardware random number generator - for RK3328 and RK3399 - -Adding Hardware Random Number Generator Resources to the RK3328 and RK3399. - -Signed-off-by: wevsty ---- - ---- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -@@ -279,6 +279,17 @@ - status = "disabled"; - }; - -+ rng: rng@ff060000 { -+ compatible = "rockchip,cryptov1-rng"; -+ reg = <0x0 0xff060000 0x0 0x4000>; -+ -+ clocks = <&cru SCLK_CRYPTO>, <&cru HCLK_CRYPTO_SLV>; -+ clock-names = "clk_crypto", "hclk_crypto"; -+ assigned-clocks = <&cru SCLK_CRYPTO>, <&cru HCLK_CRYPTO_SLV>; -+ assigned-clock-rates = <150000000>, <100000000>; -+ status = "disabled"; -+ }; -+ - grf: syscon@ff100000 { - compatible = "rockchip,rk3328-grf", "syscon", "simple-mfd"; - reg = <0x0 0xff100000 0x0 0x1000>; ---- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -@@ -2017,6 +2017,16 @@ - }; - }; - -+ rng: rng@ff8b8000 { -+ compatible = "rockchip,cryptov1-rng"; -+ reg = <0x0 0xff8b8000 0x0 0x1000>; -+ clocks = <&cru SCLK_CRYPTO1>, <&cru HCLK_S_CRYPTO1>; -+ clock-names = "clk_crypto", "hclk_crypto"; -+ assigned-clocks = <&cru SCLK_CRYPTO1>, <&cru HCLK_S_CRYPTO1>; -+ assigned-clock-rates = <150000000>, <100000000>; -+ status = "okay"; -+ }; -+ - gpu: gpu@ff9a0000 { - compatible = "rockchip,rk3399-mali", "arm,mali-t860"; - reg = <0x0 0xff9a0000 0x0 0x10000>; diff --git a/target/linux/rockchip/patches-5.18/803-PM-devfreq-rockchip-add-devfreq-driver-for-rk3328-dmc.patch b/target/linux/rockchip/patches-5.18/803-PM-devfreq-rockchip-add-devfreq-driver-for-rk3328-dmc.patch deleted file mode 100644 index 643c994f2fa91f..00000000000000 --- a/target/linux/rockchip/patches-5.18/803-PM-devfreq-rockchip-add-devfreq-driver-for-rk3328-dmc.patch +++ /dev/null @@ -1,44 +0,0 @@ -From fcd9629c05f373771e85920e1c1d0ab252617878 Mon Sep 17 00:00:00 2001 -From: hmz007 -Date: Tue, 19 Nov 2019 13:53:25 +0800 -Subject: [PATCH] PM / devfreq: rockchip: add devfreq driver for rk3328 dmc - -Signed-off-by: hmz007 ---- - drivers/devfreq/Kconfig | 18 +- - drivers/devfreq/Makefile | 1 + - drivers/devfreq/rk3328_dmc.c | 846 +++++++++++++++++++++++++++++++++++ - 3 files changed, 862 insertions(+), 3 deletions(-) - create mode 100644 drivers/devfreq/rk3328_dmc.c - ---- a/drivers/devfreq/Kconfig -+++ b/drivers/devfreq/Kconfig -@@ -120,6 +120,18 @@ config ARM_TEGRA_DEVFREQ - It reads ACTMON counters of memory controllers and adjusts the - operating frequencies and voltages with OPP support. - -+config ARM_RK3328_DMC_DEVFREQ -+ tristate "ARM RK3328 DMC DEVFREQ Driver" -+ depends on ARCH_ROCKCHIP -+ select DEVFREQ_EVENT_ROCKCHIP_DFI -+ select DEVFREQ_GOV_SIMPLE_ONDEMAND -+ select PM_DEVFREQ_EVENT -+ select PM_OPP -+ help -+ This adds the DEVFREQ driver for the RK3328 DMC(Dynamic Memory Controller). -+ It sets the frequency for the memory controller and reads the usage counts -+ from hardware. -+ - config ARM_RK3399_DMC_DEVFREQ - tristate "ARM RK3399 DMC DEVFREQ Driver" - depends on (ARCH_ROCKCHIP && HAVE_ARM_SMCCC) || \ ---- a/drivers/devfreq/Makefile -+++ b/drivers/devfreq/Makefile -@@ -11,6 +11,7 @@ obj-$(CONFIG_DEVFREQ_GOV_PASSIVE) += gov - obj-$(CONFIG_ARM_EXYNOS_BUS_DEVFREQ) += exynos-bus.o - obj-$(CONFIG_ARM_IMX_BUS_DEVFREQ) += imx-bus.o - obj-$(CONFIG_ARM_IMX8M_DDRC_DEVFREQ) += imx8m-ddrc.o -+obj-$(CONFIG_ARM_RK3328_DMC_DEVFREQ) += rk3328_dmc.o - obj-$(CONFIG_ARM_RK3399_DMC_DEVFREQ) += rk3399_dmc.o - obj-$(CONFIG_ARM_SUN8I_A33_MBUS_DEVFREQ) += sun8i-a33-mbus.o - obj-$(CONFIG_ARM_TEGRA_DEVFREQ) += tegra30-devfreq.o diff --git a/target/linux/rockchip/patches-5.18/804-clk-rockchip-support-setting-ddr-clock-via-SIP-Version-2-.patch b/target/linux/rockchip/patches-5.18/804-clk-rockchip-support-setting-ddr-clock-via-SIP-Version-2-.patch deleted file mode 100644 index 0408a0a73ac8a5..00000000000000 --- a/target/linux/rockchip/patches-5.18/804-clk-rockchip-support-setting-ddr-clock-via-SIP-Version-2-.patch +++ /dev/null @@ -1,210 +0,0 @@ -From ce6d3614888e6358466f0e84e248177a6bca5258 Mon Sep 17 00:00:00 2001 -From: Tang Yun ping -Date: Thu, 4 May 2017 20:49:58 +0800 -Subject: [PATCH] clk: rockchip: support setting ddr clock via SIP Version 2 - APIs - -commit 764e893ee82321938fc6f4349e9e7caf06a04410 rockchip. - -Signed-off-by: Tang Yun ping -Signed-off-by: hmz007 ---- - drivers/clk/rockchip/clk-ddr.c | 130 ++++++++++++++++++++++++++++ - drivers/clk/rockchip/clk-rk3328.c | 7 +- - drivers/clk/rockchip/clk.h | 3 +- - include/soc/rockchip/rockchip_sip.h | 11 +++ - 4 files changed, 147 insertions(+), 4 deletions(-) - ---- a/drivers/clk/rockchip/clk-ddr.c -+++ b/drivers/clk/rockchip/clk-ddr.c -@@ -87,6 +87,133 @@ static const struct clk_ops rockchip_ddr - .get_parent = rockchip_ddrclk_get_parent, - }; - -+/* See v4.4/include/dt-bindings/display/rk_fb.h */ -+#define SCREEN_NULL 0 -+#define SCREEN_HDMI 6 -+ -+static inline int rk_drm_get_lcdc_type(void) -+{ -+ return SCREEN_NULL; -+} -+ -+struct share_params { -+ u32 hz; -+ u32 lcdc_type; -+ u32 vop; -+ u32 vop_dclk_mode; -+ u32 sr_idle_en; -+ u32 addr_mcu_el3; -+ /* -+ * 1: need to wait flag1 -+ * 0: never wait flag1 -+ */ -+ u32 wait_flag1; -+ /* -+ * 1: need to wait flag1 -+ * 0: never wait flag1 -+ */ -+ u32 wait_flag0; -+ u32 complt_hwirq; -+ /* if need, add parameter after */ -+}; -+ -+struct rockchip_ddrclk_data { -+ u32 inited_flag; -+ void __iomem *share_memory; -+}; -+ -+static struct rockchip_ddrclk_data ddr_data; -+ -+static void rockchip_ddrclk_data_init(void) -+{ -+ struct arm_smccc_res res; -+ -+ arm_smccc_smc(ROCKCHIP_SIP_SHARE_MEM, -+ 1, SHARE_PAGE_TYPE_DDR, 0, -+ 0, 0, 0, 0, &res); -+ -+ if (!res.a0) { -+ ddr_data.share_memory = (void __iomem *)ioremap(res.a1, 1<<12); -+ ddr_data.inited_flag = 1; -+ } -+} -+ -+static int rockchip_ddrclk_sip_set_rate_v2(struct clk_hw *hw, -+ unsigned long drate, -+ unsigned long prate) -+{ -+ struct share_params *p; -+ struct arm_smccc_res res; -+ -+ if (!ddr_data.inited_flag) -+ rockchip_ddrclk_data_init(); -+ -+ p = (struct share_params *)ddr_data.share_memory; -+ -+ p->hz = drate; -+ p->lcdc_type = rk_drm_get_lcdc_type(); -+ p->wait_flag1 = 1; -+ p->wait_flag0 = 1; -+ -+ arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, -+ SHARE_PAGE_TYPE_DDR, 0, -+ ROCKCHIP_SIP_CONFIG_DRAM_SET_RATE, -+ 0, 0, 0, 0, &res); -+ -+ if ((int)res.a1 == -6) { -+ pr_err("%s: timeout, drate = %lumhz\n", __func__, drate/1000000); -+ /* TODO: rockchip_dmcfreq_wait_complete(); */ -+ } -+ -+ return res.a0; -+} -+ -+static unsigned long rockchip_ddrclk_sip_recalc_rate_v2 -+ (struct clk_hw *hw, unsigned long parent_rate) -+{ -+ struct arm_smccc_res res; -+ -+ arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, -+ SHARE_PAGE_TYPE_DDR, 0, -+ ROCKCHIP_SIP_CONFIG_DRAM_GET_RATE, -+ 0, 0, 0, 0, &res); -+ if (!res.a0) -+ return res.a1; -+ else -+ return 0; -+} -+ -+static long rockchip_ddrclk_sip_round_rate_v2(struct clk_hw *hw, -+ unsigned long rate, -+ unsigned long *prate) -+{ -+ struct share_params *p; -+ struct arm_smccc_res res; -+ -+ if (!ddr_data.inited_flag) -+ rockchip_ddrclk_data_init(); -+ -+ p = (struct share_params *)ddr_data.share_memory; -+ -+ p->hz = rate; -+ -+ arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, -+ SHARE_PAGE_TYPE_DDR, 0, -+ ROCKCHIP_SIP_CONFIG_DRAM_ROUND_RATE, -+ 0, 0, 0, 0, &res); -+ if (!res.a0) -+ return res.a1; -+ else -+ return 0; -+} -+ -+static const struct clk_ops rockchip_ddrclk_sip_ops_v2 = { -+ .recalc_rate = rockchip_ddrclk_sip_recalc_rate_v2, -+ .set_rate = rockchip_ddrclk_sip_set_rate_v2, -+ .round_rate = rockchip_ddrclk_sip_round_rate_v2, -+ .get_parent = rockchip_ddrclk_get_parent, -+}; -+ - struct clk *rockchip_clk_register_ddrclk(const char *name, int flags, - const char *const *parent_names, - u8 num_parents, int mux_offset, -@@ -114,6 +241,9 @@ struct clk *rockchip_clk_register_ddrclk - case ROCKCHIP_DDRCLK_SIP: - init.ops = &rockchip_ddrclk_sip_ops; - break; -+ case ROCKCHIP_DDRCLK_SIP_V2: -+ init.ops = &rockchip_ddrclk_sip_ops_v2; -+ break; - default: - pr_err("%s: unsupported ddrclk type %d\n", __func__, ddr_flag); - kfree(ddrclk); ---- a/drivers/clk/rockchip/clk-rk3328.c -+++ b/drivers/clk/rockchip/clk-rk3328.c -@@ -315,9 +315,10 @@ static struct rockchip_clk_branch rk3328 - RK3328_CLKGATE_CON(14), 1, GFLAGS), - - /* PD_DDR */ -- COMPOSITE(0, "clk_ddr", mux_ddrphy_p, CLK_IGNORE_UNUSED, -- RK3328_CLKSEL_CON(3), 8, 2, MFLAGS, 0, 3, DFLAGS | CLK_DIVIDER_POWER_OF_TWO, -- RK3328_CLKGATE_CON(0), 4, GFLAGS), -+ COMPOSITE_DDRCLK(SCLK_DDRCLK, "sclk_ddrc", mux_ddrphy_p, 0, -+ RK3328_CLKSEL_CON(3), 8, 2, 0, 3, -+ ROCKCHIP_DDRCLK_SIP_V2), -+ - GATE(0, "clk_ddrmsch", "clk_ddr", CLK_IGNORE_UNUSED, - RK3328_CLKGATE_CON(18), 6, GFLAGS), - GATE(0, "clk_ddrupctl", "clk_ddr", CLK_IGNORE_UNUSED, ---- a/drivers/clk/rockchip/clk.h -+++ b/drivers/clk/rockchip/clk.h -@@ -399,7 +399,8 @@ struct clk *rockchip_clk_register_mmc(co - * DDRCLK flags, including method of setting the rate - * ROCKCHIP_DDRCLK_SIP: use SIP call to bl31 to change ddrclk rate. - */ --#define ROCKCHIP_DDRCLK_SIP BIT(0) -+#define ROCKCHIP_DDRCLK_SIP 0x01 -+#define ROCKCHIP_DDRCLK_SIP_V2 0x03 - - struct clk *rockchip_clk_register_ddrclk(const char *name, int flags, - const char *const *parent_names, ---- a/include/soc/rockchip/rockchip_sip.h -+++ b/include/soc/rockchip/rockchip_sip.h -@@ -16,5 +16,16 @@ - #define ROCKCHIP_SIP_CONFIG_DRAM_CLR_IRQ 0x06 - #define ROCKCHIP_SIP_CONFIG_DRAM_SET_PARAM 0x07 - #define ROCKCHIP_SIP_CONFIG_DRAM_SET_ODT_PD 0x08 -+#define ROCKCHIP_SIP_CONFIG_DRAM_GET_VERSION 0x08 -+ -+#define ROCKCHIP_SIP_SHARE_MEM 0x82000009 -+ -+/* Share mem page types */ -+typedef enum { -+ SHARE_PAGE_TYPE_INVALID = 0, -+ SHARE_PAGE_TYPE_UARTDBG, -+ SHARE_PAGE_TYPE_DDR, -+ SHARE_PAGE_TYPE_MAX, -+} share_page_type_t; - - #endif diff --git a/target/linux/rockchip/patches-5.18/805-PM-devfreq-rockchip-dfi-add-more-soc-support.patch b/target/linux/rockchip/patches-5.18/805-PM-devfreq-rockchip-dfi-add-more-soc-support.patch deleted file mode 100644 index 283e4abd2f8b5a..00000000000000 --- a/target/linux/rockchip/patches-5.18/805-PM-devfreq-rockchip-dfi-add-more-soc-support.patch +++ /dev/null @@ -1,662 +0,0 @@ -From 4db93c6dad0c71750b86163df2fdb21c35f00d9a Mon Sep 17 00:00:00 2001 -From: hmz007 -Date: Tue, 19 Nov 2019 12:49:48 +0800 -Subject: [PATCH] PM / devfreq: rockchip-dfi: add more soc support - -Signed-off-by: hmz007 ---- - drivers/devfreq/event/rockchip-dfi.c | 554 ++++++++++++++++++++++++--- - 1 file changed, 505 insertions(+), 49 deletions(-) - ---- a/drivers/devfreq/event/rockchip-dfi.c -+++ b/drivers/devfreq/event/rockchip-dfi.c -@@ -18,25 +18,66 @@ - #include - #include - --#include -- --#define RK3399_DMC_NUM_CH 2 -+#define PX30_PMUGRF_OS_REG2 0x208 - -+#define RK3128_GRF_SOC_CON0 0x140 -+#define RK3128_GRF_OS_REG1 0x1cc -+#define RK3128_GRF_DFI_WRNUM 0x220 -+#define RK3128_GRF_DFI_RDNUM 0x224 -+#define RK3128_GRF_DFI_TIMERVAL 0x22c -+#define RK3128_DDR_MONITOR_EN ((1 << (16 + 6)) + (1 << 6)) -+#define RK3128_DDR_MONITOR_DISB ((1 << (16 + 6)) + (0 << 6)) -+ -+#define RK3288_PMU_SYS_REG2 0x9c -+#define RK3288_GRF_SOC_CON4 0x254 -+#define RK3288_GRF_SOC_STATUS(n) (0x280 + (n) * 4) -+#define RK3288_DFI_EN (0x30003 << 14) -+#define RK3288_DFI_DIS (0x30000 << 14) -+#define RK3288_LPDDR_SEL (0x10001 << 13) -+#define RK3288_DDR3_SEL (0x10000 << 13) -+ -+#define RK3328_GRF_OS_REG2 0x5d0 -+ -+#define RK3368_GRF_DDRC0_CON0 0x600 -+#define RK3368_GRF_SOC_STATUS5 0x494 -+#define RK3368_GRF_SOC_STATUS6 0x498 -+#define RK3368_GRF_SOC_STATUS8 0x4a0 -+#define RK3368_GRF_SOC_STATUS9 0x4a4 -+#define RK3368_GRF_SOC_STATUS10 0x4a8 -+#define RK3368_DFI_EN (0x30003 << 5) -+#define RK3368_DFI_DIS (0x30000 << 5) -+ -+#define MAX_DMC_NUM_CH 2 -+#define READ_DRAMTYPE_INFO(n) (((n) >> 13) & 0x7) -+#define READ_CH_INFO(n) (((n) >> 28) & 0x3) - /* DDRMON_CTRL */ --#define DDRMON_CTRL 0x04 --#define CLR_DDRMON_CTRL (0x1f0000 << 0) --#define LPDDR4_EN (0x10001 << 4) --#define HARDWARE_EN (0x10001 << 3) --#define LPDDR3_EN (0x10001 << 2) --#define SOFTWARE_EN (0x10001 << 1) --#define SOFTWARE_DIS (0x10000 << 1) --#define TIME_CNT_EN (0x10001 << 0) -+#define DDRMON_CTRL 0x04 -+#define CLR_DDRMON_CTRL (0x3f0000 << 0) -+#define DDR4_EN (0x10001 << 5) -+#define LPDDR4_EN (0x10001 << 4) -+#define HARDWARE_EN (0x10001 << 3) -+#define LPDDR2_3_EN (0x10001 << 2) -+#define SOFTWARE_EN (0x10001 << 1) -+#define SOFTWARE_DIS (0x10000 << 1) -+#define TIME_CNT_EN (0x10001 << 0) - - #define DDRMON_CH0_COUNT_NUM 0x28 - #define DDRMON_CH0_DFI_ACCESS_NUM 0x2c - #define DDRMON_CH1_COUNT_NUM 0x3c - #define DDRMON_CH1_DFI_ACCESS_NUM 0x40 - -+/* pmu grf */ -+#define PMUGRF_OS_REG2 0x308 -+ -+enum { -+ DDR4 = 0, -+ DDR3 = 3, -+ LPDDR2 = 5, -+ LPDDR3 = 6, -+ LPDDR4 = 7, -+ UNUSED = 0xFF -+}; -+ - struct dmc_usage { - u32 access; - u32 total; -@@ -50,33 +91,261 @@ struct dmc_usage { - struct rockchip_dfi { - struct devfreq_event_dev *edev; - struct devfreq_event_desc *desc; -- struct dmc_usage ch_usage[RK3399_DMC_NUM_CH]; -+ struct dmc_usage ch_usage[MAX_DMC_NUM_CH]; - struct device *dev; - void __iomem *regs; - struct regmap *regmap_pmu; -+ struct regmap *regmap_grf; -+ struct regmap *regmap_pmugrf; - struct clk *clk; -+ u32 dram_type; -+ /* -+ * available mask, 1: available, 0: not available -+ * each bit represent a channel -+ */ -+ u32 ch_msk; -+}; -+ -+static void rk3128_dfi_start_hardware_counter(struct devfreq_event_dev *edev) -+{ -+ struct rockchip_dfi *info = devfreq_event_get_drvdata(edev); -+ -+ regmap_write(info->regmap_grf, -+ RK3128_GRF_SOC_CON0, -+ RK3128_DDR_MONITOR_EN); -+} -+ -+static void rk3128_dfi_stop_hardware_counter(struct devfreq_event_dev *edev) -+{ -+ struct rockchip_dfi *info = devfreq_event_get_drvdata(edev); -+ -+ regmap_write(info->regmap_grf, -+ RK3128_GRF_SOC_CON0, -+ RK3128_DDR_MONITOR_DISB); -+} -+ -+static int rk3128_dfi_disable(struct devfreq_event_dev *edev) -+{ -+ rk3128_dfi_stop_hardware_counter(edev); -+ -+ return 0; -+} -+ -+static int rk3128_dfi_enable(struct devfreq_event_dev *edev) -+{ -+ rk3128_dfi_start_hardware_counter(edev); -+ -+ return 0; -+} -+ -+static int rk3128_dfi_set_event(struct devfreq_event_dev *edev) -+{ -+ return 0; -+} -+ -+static int rk3128_dfi_get_event(struct devfreq_event_dev *edev, -+ struct devfreq_event_data *edata) -+{ -+ struct rockchip_dfi *info = devfreq_event_get_drvdata(edev); -+ unsigned long flags; -+ u32 dfi_wr, dfi_rd, dfi_timer; -+ -+ local_irq_save(flags); -+ -+ rk3128_dfi_stop_hardware_counter(edev); -+ -+ regmap_read(info->regmap_grf, RK3128_GRF_DFI_WRNUM, &dfi_wr); -+ regmap_read(info->regmap_grf, RK3128_GRF_DFI_RDNUM, &dfi_rd); -+ regmap_read(info->regmap_grf, RK3128_GRF_DFI_TIMERVAL, &dfi_timer); -+ -+ edata->load_count = (dfi_wr + dfi_rd) * 4; -+ edata->total_count = dfi_timer; -+ -+ rk3128_dfi_start_hardware_counter(edev); -+ -+ local_irq_restore(flags); -+ -+ return 0; -+} -+ -+static const struct devfreq_event_ops rk3128_dfi_ops = { -+ .disable = rk3128_dfi_disable, -+ .enable = rk3128_dfi_enable, -+ .get_event = rk3128_dfi_get_event, -+ .set_event = rk3128_dfi_set_event, -+}; -+ -+static void rk3288_dfi_start_hardware_counter(struct devfreq_event_dev *edev) -+{ -+ struct rockchip_dfi *info = devfreq_event_get_drvdata(edev); -+ -+ regmap_write(info->regmap_grf, RK3288_GRF_SOC_CON4, RK3288_DFI_EN); -+} -+ -+static void rk3288_dfi_stop_hardware_counter(struct devfreq_event_dev *edev) -+{ -+ struct rockchip_dfi *info = devfreq_event_get_drvdata(edev); -+ -+ regmap_write(info->regmap_grf, RK3288_GRF_SOC_CON4, RK3288_DFI_DIS); -+} -+ -+static int rk3288_dfi_disable(struct devfreq_event_dev *edev) -+{ -+ rk3288_dfi_stop_hardware_counter(edev); -+ -+ return 0; -+} -+ -+static int rk3288_dfi_enable(struct devfreq_event_dev *edev) -+{ -+ rk3288_dfi_start_hardware_counter(edev); -+ -+ return 0; -+} -+ -+static int rk3288_dfi_set_event(struct devfreq_event_dev *edev) -+{ -+ return 0; -+} -+ -+static int rk3288_dfi_get_busier_ch(struct devfreq_event_dev *edev) -+{ -+ struct rockchip_dfi *info = devfreq_event_get_drvdata(edev); -+ u32 tmp, max = 0; -+ u32 i, busier_ch = 0; -+ u32 rd_count, wr_count, total_count; -+ -+ rk3288_dfi_stop_hardware_counter(edev); -+ -+ /* Find out which channel is busier */ -+ for (i = 0; i < MAX_DMC_NUM_CH; i++) { -+ if (!(info->ch_msk & BIT(i))) -+ continue; -+ regmap_read(info->regmap_grf, -+ RK3288_GRF_SOC_STATUS(11 + i * 4), &wr_count); -+ regmap_read(info->regmap_grf, -+ RK3288_GRF_SOC_STATUS(12 + i * 4), &rd_count); -+ regmap_read(info->regmap_grf, -+ RK3288_GRF_SOC_STATUS(14 + i * 4), &total_count); -+ info->ch_usage[i].access = (wr_count + rd_count) * 4; -+ info->ch_usage[i].total = total_count; -+ tmp = info->ch_usage[i].access; -+ if (tmp > max) { -+ busier_ch = i; -+ max = tmp; -+ } -+ } -+ rk3288_dfi_start_hardware_counter(edev); -+ -+ return busier_ch; -+} -+ -+static int rk3288_dfi_get_event(struct devfreq_event_dev *edev, -+ struct devfreq_event_data *edata) -+{ -+ struct rockchip_dfi *info = devfreq_event_get_drvdata(edev); -+ int busier_ch; -+ unsigned long flags; -+ -+ local_irq_save(flags); -+ busier_ch = rk3288_dfi_get_busier_ch(edev); -+ local_irq_restore(flags); -+ -+ edata->load_count = info->ch_usage[busier_ch].access; -+ edata->total_count = info->ch_usage[busier_ch].total; -+ -+ return 0; -+} -+ -+static const struct devfreq_event_ops rk3288_dfi_ops = { -+ .disable = rk3288_dfi_disable, -+ .enable = rk3288_dfi_enable, -+ .get_event = rk3288_dfi_get_event, -+ .set_event = rk3288_dfi_set_event, -+}; -+ -+static void rk3368_dfi_start_hardware_counter(struct devfreq_event_dev *edev) -+{ -+ struct rockchip_dfi *info = devfreq_event_get_drvdata(edev); -+ -+ regmap_write(info->regmap_grf, RK3368_GRF_DDRC0_CON0, RK3368_DFI_EN); -+} -+ -+static void rk3368_dfi_stop_hardware_counter(struct devfreq_event_dev *edev) -+{ -+ struct rockchip_dfi *info = devfreq_event_get_drvdata(edev); -+ -+ regmap_write(info->regmap_grf, RK3368_GRF_DDRC0_CON0, RK3368_DFI_DIS); -+} -+ -+static int rk3368_dfi_disable(struct devfreq_event_dev *edev) -+{ -+ rk3368_dfi_stop_hardware_counter(edev); -+ -+ return 0; -+} -+ -+static int rk3368_dfi_enable(struct devfreq_event_dev *edev) -+{ -+ rk3368_dfi_start_hardware_counter(edev); -+ -+ return 0; -+} -+ -+static int rk3368_dfi_set_event(struct devfreq_event_dev *edev) -+{ -+ return 0; -+} -+ -+static int rk3368_dfi_get_event(struct devfreq_event_dev *edev, -+ struct devfreq_event_data *edata) -+{ -+ struct rockchip_dfi *info = devfreq_event_get_drvdata(edev); -+ unsigned long flags; -+ u32 dfi0_wr, dfi0_rd, dfi1_wr, dfi1_rd, dfi_timer; -+ -+ local_irq_save(flags); -+ -+ rk3368_dfi_stop_hardware_counter(edev); -+ -+ regmap_read(info->regmap_grf, RK3368_GRF_SOC_STATUS5, &dfi0_wr); -+ regmap_read(info->regmap_grf, RK3368_GRF_SOC_STATUS6, &dfi0_rd); -+ regmap_read(info->regmap_grf, RK3368_GRF_SOC_STATUS9, &dfi1_wr); -+ regmap_read(info->regmap_grf, RK3368_GRF_SOC_STATUS10, &dfi1_rd); -+ regmap_read(info->regmap_grf, RK3368_GRF_SOC_STATUS8, &dfi_timer); -+ -+ edata->load_count = (dfi0_wr + dfi0_rd + dfi1_wr + dfi1_rd) * 2; -+ edata->total_count = dfi_timer; -+ -+ rk3368_dfi_start_hardware_counter(edev); -+ -+ local_irq_restore(flags); -+ -+ return 0; -+} -+ -+static const struct devfreq_event_ops rk3368_dfi_ops = { -+ .disable = rk3368_dfi_disable, -+ .enable = rk3368_dfi_enable, -+ .get_event = rk3368_dfi_get_event, -+ .set_event = rk3368_dfi_set_event, - }; - - static void rockchip_dfi_start_hardware_counter(struct devfreq_event_dev *edev) - { - struct rockchip_dfi *info = devfreq_event_get_drvdata(edev); - void __iomem *dfi_regs = info->regs; -- u32 val; -- u32 ddr_type; -- -- /* get ddr type */ -- regmap_read(info->regmap_pmu, RK3399_PMUGRF_OS_REG2, &val); -- ddr_type = (val >> RK3399_PMUGRF_DDRTYPE_SHIFT) & -- RK3399_PMUGRF_DDRTYPE_MASK; - - /* clear DDRMON_CTRL setting */ - writel_relaxed(CLR_DDRMON_CTRL, dfi_regs + DDRMON_CTRL); - - /* set ddr type to dfi */ -- if (ddr_type == RK3399_PMUGRF_DDRTYPE_LPDDR3) -- writel_relaxed(LPDDR3_EN, dfi_regs + DDRMON_CTRL); -- else if (ddr_type == RK3399_PMUGRF_DDRTYPE_LPDDR4) -+ if (info->dram_type == LPDDR3 || info->dram_type == LPDDR2) -+ writel_relaxed(LPDDR2_3_EN, dfi_regs + DDRMON_CTRL); -+ else if (info->dram_type == LPDDR4) - writel_relaxed(LPDDR4_EN, dfi_regs + DDRMON_CTRL); -+ else if (info->dram_type == DDR4) -+ writel_relaxed(DDR4_EN, dfi_regs + DDRMON_CTRL); - - /* enable count, use software mode */ - writel_relaxed(SOFTWARE_EN, dfi_regs + DDRMON_CTRL); -@@ -100,12 +369,22 @@ static int rockchip_dfi_get_busier_ch(st - rockchip_dfi_stop_hardware_counter(edev); - - /* Find out which channel is busier */ -- for (i = 0; i < RK3399_DMC_NUM_CH; i++) { -- info->ch_usage[i].access = readl_relaxed(dfi_regs + -- DDRMON_CH0_DFI_ACCESS_NUM + i * 20) * 4; -+ for (i = 0; i < MAX_DMC_NUM_CH; i++) { -+ if (!(info->ch_msk & BIT(i))) -+ continue; -+ - info->ch_usage[i].total = readl_relaxed(dfi_regs + - DDRMON_CH0_COUNT_NUM + i * 20); -- tmp = info->ch_usage[i].access; -+ -+ /* LPDDR4 BL = 16,other DDR type BL = 8 */ -+ tmp = readl_relaxed(dfi_regs + -+ DDRMON_CH0_DFI_ACCESS_NUM + i * 20); -+ if (info->dram_type == LPDDR4) -+ tmp *= 8; -+ else -+ tmp *= 4; -+ info->ch_usage[i].access = tmp; -+ - if (tmp > max) { - busier_ch = i; - max = tmp; -@@ -121,7 +400,8 @@ static int rockchip_dfi_disable(struct d - struct rockchip_dfi *info = devfreq_event_get_drvdata(edev); - - rockchip_dfi_stop_hardware_counter(edev); -- clk_disable_unprepare(info->clk); -+ if (info->clk) -+ clk_disable_unprepare(info->clk); - - return 0; - } -@@ -131,10 +411,13 @@ static int rockchip_dfi_enable(struct de - struct rockchip_dfi *info = devfreq_event_get_drvdata(edev); - int ret; - -- ret = clk_prepare_enable(info->clk); -- if (ret) { -- dev_err(&edev->dev, "failed to enable dfi clk: %d\n", ret); -- return ret; -+ if (info->clk) { -+ ret = clk_prepare_enable(info->clk); -+ if (ret) { -+ dev_err(&edev->dev, "failed to enable dfi clk: %d\n", -+ ret); -+ return ret; -+ } - } - - rockchip_dfi_start_hardware_counter(edev); -@@ -151,8 +434,11 @@ static int rockchip_dfi_get_event(struct - { - struct rockchip_dfi *info = devfreq_event_get_drvdata(edev); - int busier_ch; -+ unsigned long flags; - -+ local_irq_save(flags); - busier_ch = rockchip_dfi_get_busier_ch(edev); -+ local_irq_restore(flags); - - edata->load_count = info->ch_usage[busier_ch].access; - edata->total_count = info->ch_usage[busier_ch].total; -@@ -167,22 +453,116 @@ static const struct devfreq_event_ops ro - .set_event = rockchip_dfi_set_event, - }; - --static const struct of_device_id rockchip_dfi_id_match[] = { -- { .compatible = "rockchip,rk3399-dfi" }, -- { }, --}; --MODULE_DEVICE_TABLE(of, rockchip_dfi_id_match); -+static __init int px30_dfi_init(struct platform_device *pdev, -+ struct rockchip_dfi *data, -+ struct devfreq_event_desc *desc) -+{ -+ struct device_node *np = pdev->dev.of_node, *node; -+ struct resource *res; -+ u32 val; - --static int rockchip_dfi_probe(struct platform_device *pdev) -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ data->regs = devm_ioremap_resource(&pdev->dev, res); -+ if (IS_ERR(data->regs)) -+ return PTR_ERR(data->regs); -+ -+ node = of_parse_phandle(np, "rockchip,pmugrf", 0); -+ if (node) { -+ data->regmap_pmugrf = syscon_node_to_regmap(node); -+ if (IS_ERR(data->regmap_pmugrf)) -+ return PTR_ERR(data->regmap_pmugrf); -+ } -+ -+ regmap_read(data->regmap_pmugrf, PX30_PMUGRF_OS_REG2, &val); -+ data->dram_type = READ_DRAMTYPE_INFO(val); -+ data->ch_msk = 1; -+ data->clk = NULL; -+ -+ desc->ops = &rockchip_dfi_ops; -+ -+ return 0; -+} -+ -+static __init int rk3128_dfi_init(struct platform_device *pdev, -+ struct rockchip_dfi *data, -+ struct devfreq_event_desc *desc) - { -- struct device *dev = &pdev->dev; -- struct rockchip_dfi *data; -- struct devfreq_event_desc *desc; - struct device_node *np = pdev->dev.of_node, *node; - -- data = devm_kzalloc(dev, sizeof(struct rockchip_dfi), GFP_KERNEL); -- if (!data) -- return -ENOMEM; -+ node = of_parse_phandle(np, "rockchip,grf", 0); -+ if (node) { -+ data->regmap_grf = syscon_node_to_regmap(node); -+ if (IS_ERR(data->regmap_grf)) -+ return PTR_ERR(data->regmap_grf); -+ } -+ -+ desc->ops = &rk3128_dfi_ops; -+ -+ return 0; -+} -+ -+static __init int rk3288_dfi_init(struct platform_device *pdev, -+ struct rockchip_dfi *data, -+ struct devfreq_event_desc *desc) -+{ -+ struct device_node *np = pdev->dev.of_node, *node; -+ u32 val; -+ -+ node = of_parse_phandle(np, "rockchip,pmu", 0); -+ if (node) { -+ data->regmap_pmu = syscon_node_to_regmap(node); -+ if (IS_ERR(data->regmap_pmu)) -+ return PTR_ERR(data->regmap_pmu); -+ } -+ -+ node = of_parse_phandle(np, "rockchip,grf", 0); -+ if (node) { -+ data->regmap_grf = syscon_node_to_regmap(node); -+ if (IS_ERR(data->regmap_grf)) -+ return PTR_ERR(data->regmap_grf); -+ } -+ -+ regmap_read(data->regmap_pmu, RK3288_PMU_SYS_REG2, &val); -+ data->dram_type = READ_DRAMTYPE_INFO(val); -+ data->ch_msk = READ_CH_INFO(val); -+ -+ if (data->dram_type == DDR3) -+ regmap_write(data->regmap_grf, RK3288_GRF_SOC_CON4, -+ RK3288_DDR3_SEL); -+ else -+ regmap_write(data->regmap_grf, RK3288_GRF_SOC_CON4, -+ RK3288_LPDDR_SEL); -+ -+ desc->ops = &rk3288_dfi_ops; -+ -+ return 0; -+} -+ -+static __init int rk3368_dfi_init(struct platform_device *pdev, -+ struct rockchip_dfi *data, -+ struct devfreq_event_desc *desc) -+{ -+ struct device *dev = &pdev->dev; -+ -+ if (!dev->parent || !dev->parent->of_node) -+ return -EINVAL; -+ -+ data->regmap_grf = syscon_node_to_regmap(dev->parent->of_node); -+ if (IS_ERR(data->regmap_grf)) -+ return PTR_ERR(data->regmap_grf); -+ -+ desc->ops = &rk3368_dfi_ops; -+ -+ return 0; -+} -+ -+static __init int rockchip_dfi_init(struct platform_device *pdev, -+ struct rockchip_dfi *data, -+ struct devfreq_event_desc *desc) -+{ -+ struct device *dev = &pdev->dev; -+ struct device_node *np = pdev->dev.of_node, *node; -+ u32 val; - - data->regs = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(data->regs)) -@@ -202,21 +582,97 @@ static int rockchip_dfi_probe(struct pla - if (IS_ERR(data->regmap_pmu)) - return PTR_ERR(data->regmap_pmu); - } -- data->dev = dev; -+ -+ regmap_read(data->regmap_pmu, PMUGRF_OS_REG2, &val); -+ data->dram_type = READ_DRAMTYPE_INFO(val); -+ data->ch_msk = READ_CH_INFO(val); -+ -+ desc->ops = &rockchip_dfi_ops; -+ -+ return 0; -+} -+ -+static __init int rk3328_dfi_init(struct platform_device *pdev, -+ struct rockchip_dfi *data, -+ struct devfreq_event_desc *desc) -+{ -+ struct device_node *np = pdev->dev.of_node, *node; -+ struct resource *res; -+ u32 val; -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ data->regs = devm_ioremap_resource(&pdev->dev, res); -+ if (IS_ERR(data->regs)) -+ return PTR_ERR(data->regs); -+ -+ node = of_parse_phandle(np, "rockchip,grf", 0); -+ if (node) { -+ data->regmap_grf = syscon_node_to_regmap(node); -+ if (IS_ERR(data->regmap_grf)) -+ return PTR_ERR(data->regmap_grf); -+ } -+ -+ regmap_read(data->regmap_grf, RK3328_GRF_OS_REG2, &val); -+ data->dram_type = READ_DRAMTYPE_INFO(val); -+ data->ch_msk = 1; -+ data->clk = NULL; -+ -+ desc->ops = &rockchip_dfi_ops; -+ -+ return 0; -+} -+ -+static const struct of_device_id rockchip_dfi_id_match[] = { -+ { .compatible = "rockchip,px30-dfi", .data = px30_dfi_init }, -+ { .compatible = "rockchip,rk1808-dfi", .data = px30_dfi_init }, -+ { .compatible = "rockchip,rk3128-dfi", .data = rk3128_dfi_init }, -+ { .compatible = "rockchip,rk3288-dfi", .data = rk3288_dfi_init }, -+ { .compatible = "rockchip,rk3328-dfi", .data = rk3328_dfi_init }, -+ { .compatible = "rockchip,rk3368-dfi", .data = rk3368_dfi_init }, -+ { .compatible = "rockchip,rk3399-dfi", .data = rockchip_dfi_init }, -+ { }, -+}; -+MODULE_DEVICE_TABLE(of, rockchip_dfi_id_match); -+ -+static int rockchip_dfi_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct rockchip_dfi *data; -+ struct devfreq_event_desc *desc; -+ struct device_node *np = pdev->dev.of_node; -+ const struct of_device_id *match; -+ int (*init)(struct platform_device *pdev, struct rockchip_dfi *data, -+ struct devfreq_event_desc *desc); -+ -+ data = devm_kzalloc(dev, sizeof(struct rockchip_dfi), GFP_KERNEL); -+ if (!data) -+ return -ENOMEM; - - desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL); - if (!desc) - return -ENOMEM; - -- desc->ops = &rockchip_dfi_ops; -+ match = of_match_node(rockchip_dfi_id_match, pdev->dev.of_node); -+ if (match) { -+ init = match->data; -+ if (init) { -+ if (init(pdev, data, desc)) -+ return -EINVAL; -+ } else { -+ return 0; -+ } -+ } else { -+ return 0; -+ } -+ - desc->driver_data = data; - desc->name = np->name; - data->desc = desc; -+ data->dev = dev; - -- data->edev = devm_devfreq_event_add_edev(&pdev->dev, desc); -+ data->edev = devm_devfreq_event_add_edev(dev, desc); - if (IS_ERR(data->edev)) { -- dev_err(&pdev->dev, -- "failed to add devfreq-event device\n"); -+ dev_err(dev, "failed to add devfreq-event device\n"); - return PTR_ERR(data->edev); - } - diff --git a/target/linux/rockchip/patches-5.18/806-arm64-dts-rockchip-rk3328-add-dfi-node.patch b/target/linux/rockchip/patches-5.18/806-arm64-dts-rockchip-rk3328-add-dfi-node.patch deleted file mode 100644 index 2ab20487a0fe98..00000000000000 --- a/target/linux/rockchip/patches-5.18/806-arm64-dts-rockchip-rk3328-add-dfi-node.patch +++ /dev/null @@ -1,27 +0,0 @@ -From f9ae6e992d3d9e80357fee7d65ba0fe2dd37ae1f Mon Sep 17 00:00:00 2001 -From: hmz007 -Date: Tue, 19 Nov 2019 14:21:51 +0800 -Subject: [PATCH] arm64: dts: rockchip: rk3328: add dfi node - -Signed-off-by: hmz007 -[adjusted commit title] -Signed-off-by: Tianling Shen ---- - arch/arm64/boot/dts/rockchip/rk3328.dtsi | 7 +++++++ - ---- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -@@ -1005,6 +1005,13 @@ - status = "disabled"; - }; - -+ dfi: dfi@ff790000 { -+ reg = <0x00 0xff790000 0x00 0x400>; -+ compatible = "rockchip,rk3328-dfi"; -+ rockchip,grf = <&grf>; -+ status = "disabled"; -+ }; -+ - gic: interrupt-controller@ff811000 { - compatible = "arm,gic-400"; - #interrupt-cells = <3>; diff --git a/target/linux/rockchip/patches-5.18/807-arm64-dts-nanopi-r2s-add-rk3328-dmc-relate-node.patch b/target/linux/rockchip/patches-5.18/807-arm64-dts-nanopi-r2s-add-rk3328-dmc-relate-node.patch deleted file mode 100644 index 2e36792accd22c..00000000000000 --- a/target/linux/rockchip/patches-5.18/807-arm64-dts-nanopi-r2s-add-rk3328-dmc-relate-node.patch +++ /dev/null @@ -1,126 +0,0 @@ -From f9ae6e992d3d9e80357fee7d65ba0fe2dd37ae1f Mon Sep 17 00:00:00 2001 -From: hmz007 -Date: Tue, 19 Nov 2019 14:21:51 +0800 -Subject: [PATCH] arm64: dts: nanopi-r2: add rk3328-dmc relate node - -Signed-off-by: hmz007 ---- - .../rockchip/rk3328-dram-default-timing.dtsi | 311 ++++++++++++++++++ - .../dts/rockchip/rk3328-nanopi-r2-common.dtsi | 85 ++++- - include/dt-bindings/clock/rockchip-ddr.h | 63 ++++ - include/dt-bindings/memory/rk3328-dram.h | 159 +++++++++ - 4 files changed, 617 insertions(+), 1 deletion(-) - create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-dram-default-timing.dtsi - create mode 100644 include/dt-bindings/clock/rockchip-ddr.h - create mode 100644 include/dt-bindings/memory/rk3328-dram.h - ---- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -@@ -7,6 +7,7 @@ - - #include - #include -+#include "rk3328-dram-nanopi2-timing.dtsi" - #include "rk3328.dtsi" - - / { -@@ -121,6 +122,72 @@ - regulator-boot-on; - vin-supply = <&vdd_5v>; - }; -+ -+ dmc: dmc { -+ compatible = "rockchip,rk3328-dmc"; -+ devfreq-events = <&dfi>; -+ center-supply = <&vdd_log>; -+ clocks = <&cru SCLK_DDRCLK>; -+ clock-names = "dmc_clk"; -+ operating-points-v2 = <&dmc_opp_table>; -+ ddr_timing = <&ddr_timing>; -+ upthreshold = <40>; -+ downdifferential = <20>; -+ auto-min-freq = <786000>; -+ auto-freq-en = <0>; -+ #cooling-cells = <2>; -+ status = "okay"; -+ -+ ddr_power_model: ddr_power_model { -+ compatible = "ddr_power_model"; -+ dynamic-power-coefficient = <120>; -+ static-power-coefficient = <200>; -+ ts = <32000 4700 (-80) 2>; -+ thermal-zone = "soc-thermal"; -+ }; -+ }; -+ -+ dmc_opp_table: dmc-opp-table { -+ compatible = "operating-points-v2"; -+ -+ rockchip,leakage-voltage-sel = < -+ 1 10 0 -+ 11 254 1 -+ >; -+ nvmem-cells = <&logic_leakage>; -+ nvmem-cell-names = "ddr_leakage"; -+ -+ opp-786000000 { -+ opp-hz = /bits/ 64 <786000000>; -+ opp-microvolt = <1075000>; -+ opp-microvolt-L0 = <1075000>; -+ opp-microvolt-L1 = <1050000>; -+ }; -+ opp-798000000 { -+ opp-hz = /bits/ 64 <798000000>; -+ opp-microvolt = <1075000>; -+ opp-microvolt-L0 = <1075000>; -+ opp-microvolt-L1 = <1050000>; -+ }; -+ opp-840000000 { -+ opp-hz = /bits/ 64 <840000000>; -+ opp-microvolt = <1075000>; -+ opp-microvolt-L0 = <1075000>; -+ opp-microvolt-L1 = <1050000>; -+ }; -+ opp-924000000 { -+ opp-hz = /bits/ 64 <924000000>; -+ opp-microvolt = <1100000>; -+ opp-microvolt-L0 = <1100000>; -+ opp-microvolt-L1 = <1075000>; -+ }; -+ opp-1056000000 { -+ opp-hz = /bits/ 64 <1056000000>; -+ opp-microvolt = <1175000>; -+ opp-microvolt-L0 = <1175000>; -+ opp-microvolt-L1 = <1150000>; -+ }; -+ }; - }; - - &cpu0 { -@@ -139,6 +206,10 @@ - cpu-supply = <&vdd_arm>; - }; - -+&dfi { -+ status = "okay"; -+}; -+ - &display_subsystem { - status = "disabled"; - }; -@@ -202,6 +273,7 @@ - regulator-name = "vdd_log"; - regulator-always-on; - regulator-boot-on; -+ regulator-init-microvolt = <1075000>; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-ramp-delay = <12500>; -@@ -216,6 +288,7 @@ - regulator-name = "vdd_arm"; - regulator-always-on; - regulator-boot-on; -+ regulator-init-microvolt = <1225000>; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-ramp-delay = <12500>; diff --git a/target/linux/rockchip/patches-5.18/808-drv-net-phy-add-JLSemi-jl2xxx-driver.patch b/target/linux/rockchip/patches-5.18/808-drv-net-phy-add-JLSemi-jl2xxx-driver.patch deleted file mode 100644 index e2fb70694228e1..00000000000000 --- a/target/linux/rockchip/patches-5.18/808-drv-net-phy-add-JLSemi-jl2xxx-driver.patch +++ /dev/null @@ -1,702 +0,0 @@ ---- a/drivers/net/phy/Kconfig -+++ b/drivers/net/phy/Kconfig -@@ -260,6 +260,11 @@ config INTEL_XWAY_PHY - PEF 7061, PEF 7071 and PEF 7072 or integrated into the Intel - SoCs xRX200, xRX300, xRX330, xRX350 and xRX550. - -+config JLSEMI_JL2XX1_PHY -+ tristate "JLSemi JL2XX1 PHYs" -+ help -+ Currently supports the JLSemi jl2xx1 PHYs. -+ - config LSI_ET1011C_PHY - tristate "LSI ET1011C PHY" - help ---- a/drivers/net/phy/Makefile -+++ b/drivers/net/phy/Makefile -@@ -72,6 +72,8 @@ obj-$(CONFIG_DP83TC811_PHY) += dp83tc811 - obj-$(CONFIG_FIXED_PHY) += fixed_phy.o - obj-$(CONFIG_ICPLUS_PHY) += icplus.o - obj-$(CONFIG_INTEL_XWAY_PHY) += intel-xway.o -+obj-$(CONFIG_JLSEMI_JL2XX1_PHY) += jl2xx1.o -+jl2xx1-objs := jl2xxx.o jl2xxx-core.o - obj-$(CONFIG_LSI_ET1011C_PHY) += et1011c.o - obj-$(CONFIG_LXT_PHY) += lxt.o - obj-$(CONFIG_MARVELL_10G_PHY) += marvell10g.o ---- /dev/null -+++ b/drivers/net/phy/jl2xxx-core.c -@@ -0,0 +1,438 @@ -+/* -+ * Copyright (C) 2021 JLSemi Corporation -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation version 2. -+ * -+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any -+ * kind, whether express or implied; without even the implied warranty -+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+#include "jl2xxx-core.h" -+#include -+#include -+#include -+#include -+ -+#define RGMII_CTRL_PAGE 171 -+#define RGMII_CTRL_REG 17 -+#define RGMII_TX_SW_RSTN BIT(14) -+#define RGMII_ERR_STAS BIT(3) -+#define RGMII_TX_CTR_EN BIT(1) -+ -+#define RGMII_STATUS_PAGE 166 -+#define RGMII_STATUS_REG 18 -+ -+#define BASIC_PAGE 0 -+#define BMCR_REG 0 -+#define SOFT_RESET BIT(15) -+#define SPEED_LSB BIT(13) -+#define AUTONEG_EN BIT(12) -+#define SPEED_MSB BIT(6) -+ -+#define DIG_PAGE 201 -+#define DIG_REG 17 -+#define CLK_10M_EN BIT(15) -+#define DAC_OUT_SEL_MSB BIT(1) -+#define DAC_OUT_SEL_LSB BIT(0) -+ -+/************************* Configuration section *************************/ -+ -+ -+/************************* JLSemi iteration code *************************/ -+ -+/* Patch for version: def2 */ -+uint32_t init_data[] = { -+ 0x1f00a0, 0x1903f3, 0x1f0012, 0x150100, 0x1f00ad, 0x100000, 0x11e0c6, 0x1f00a0, 0x1903fb, 0x1903fb, -+ 0x1903fb, 0x1903fb, 0x1903fb, 0x1903fb, 0x1903fb, 0x1903fb, 0x1f00ad, 0x110000, 0x120400, 0x130093, -+ 0x140000, 0x150193, 0x160000, 0x170213, 0x180000, 0x12040c, 0x130293, 0x140000, 0x150313, 0x160000, -+ 0x170393, 0x180000, 0x120418, 0x130413, 0x140000, 0x150493, 0x160000, 0x170513, 0x180000, 0x120424, -+ 0x130593, 0x140000, 0x150613, 0x160000, 0x170693, 0x180000, 0x120430, 0x130713, 0x140000, 0x150793, -+ 0x160000, 0x171137, 0x180000, 0x12043c, 0x13006f, 0x140060, 0x15a001, 0x160113, 0x17fd41, 0x18d026, -+ 0x120448, 0x13d406, 0x14d222, 0x1517b7, 0x160800, 0x17aa23, 0x189407, 0x120454, 0x130713, 0x1430f0, -+ 0x1567b7, 0x160800, 0x17a423, 0x1846e7, 0x120460, 0x13a703, 0x14a587, 0x156685, 0x168f55, 0x17ac23, -+ 0x18a4e7, 0x12046c, 0x1367b9, 0x145737, 0x150800, 0x168793, 0x17ef27, 0x182023, 0x120478, 0x1374f7, -+ 0x1407b7, 0x150800, 0x165bfc, 0x17d493, 0x180037, 0x120484, 0x13f493, 0x141f04, 0x15f793, 0x1607f7, -+ 0x178fc5, 0x18c03e, 0x120490, 0x134702, 0x140793, 0x150210, 0x160763, 0x1700f7, 0x180793, 0x12049c, -+ 0x130270, 0x140c63, 0x1530f7, 0x16a001, 0x1707b7, 0x180002, 0x1204a8, 0x138793, 0x146967, 0x15c83e, -+ 0x1617b7, 0x170002, 0x188793, 0x1204b4, 0x13e567, 0x14c43e, 0x1537b7, 0x160002, 0x178793, 0x186867, -+ 0x1204c0, 0x13c23e, 0x1447b7, 0x150002, 0x168793, 0x17e9a7, 0x1866b7, 0x1204cc, 0x130800, 0x14ca3e, -+ 0x15a783, 0x166d86, 0x1775c1, 0x188713, 0x1204d8, 0x130ff5, 0x148ff9, 0x156735, 0x160713, 0x178007, -+ 0x188fd9, 0x1204e4, 0x13ac23, 0x146cf6, 0x15a783, 0x1665c6, 0x175737, 0x180800, 0x1204f0, 0x136611, -+ 0x14f793, 0x15f0f7, 0x16e793, 0x170807, 0x18ae23, 0x1204fc, 0x1364f6, 0x142783, 0x155c47, 0x169bf5, -+ 0x172223, 0x185cf7, 0x120508, 0x13a703, 0x14f5c6, 0x158f51, 0x16ae23, 0x17f4e6, 0x180737, 0x120514, -+ 0x130809, 0x14433c, 0x158fd1, 0x16c33c, 0x170637, 0x180800, 0x120520, 0x134a74, 0x14679d, 0x158793, -+ 0x160e07, 0x179ae1, 0x18e693, 0x12052c, 0x130036, 0x14ca74, 0x154678, 0x1676e1, 0x178693, 0x185006, -+ 0x120538, 0x138ff9, 0x148fd5, 0x1507c2, 0x168f6d, 0x1783c1, 0x188fd9, 0x120544, 0x13c67c, 0x140713, -+ 0x151000, 0x160793, 0x170000, 0x189c23, 0x120550, 0x1324e7, 0x140713, 0x151010, 0x169123, 0x1726e7, -+ 0x18470d, 0x12055c, 0x13c63a, 0x144702, 0x158d23, 0x162407, 0x17a223, 0x182607, 0x120568, 0x130793, -+ 0x140270, 0x150413, 0x160000, 0x171463, 0x1800f7, 0x120574, 0x134789, 0x14c63e, 0x154709, 0x16cc3a, -+ 0x174702, 0x180793, 0x120580, 0x130270, 0x141463, 0x1500f7, 0x16478d, 0x17cc3e, 0x180513, 0x12058c, -+ 0x130000, 0x144792, 0x154581, 0x164485, 0x179782, 0x184018, 0x120598, 0x131775, 0x14e563, 0x1502e4, -+ 0x162703, 0x170a04, 0x181163, 0x1205a4, 0x130297, 0x144818, 0x150563, 0x160097, 0x1747a2, 0x18c804, -+ 0x1205b0, 0x139782, 0x1466b7, 0x150800, 0x16a703, 0x174c46, 0x189b71, 0x1205bc, 0x136713, 0x140027, -+ 0x15a223, 0x164ce6, 0x174783, 0x180fd4, 0x1205c8, 0x13c7b9, 0x142683, 0x151004, 0x164745, 0x179763, -+ 0x1820e6, 0x1205d4, 0x133737, 0x140822, 0x152683, 0x163007, 0x177645, 0x18167d, 0x1205e0, 0x138ef1, -+ 0x142023, 0x1530d7, 0x162683, 0x172807, 0x18e693, 0x1205ec, 0x131006, 0x142023, 0x1528d7, 0x162683, -+ 0x173807, 0x18e693, 0x1205f8, 0x131006, 0x142023, 0x1538d7, 0x162683, 0x174007, 0x18e693, 0x120604, -+ 0x131006, 0x142023, 0x1540d7, 0x162683, 0x174807, 0x18e693, 0x120610, 0x131006, 0x142023, 0x1548d7, -+ 0x1656b7, 0x170800, 0x18a703, 0x12061c, 0x133486, 0x14830d, 0x158b05, 0x16cf01, 0x17a703, 0x185c46, -+ 0x120628, 0x137671, 0x14167d, 0x158f71, 0x166611, 0x17a223, 0x185ce6, 0x120634, 0x138f51, 0x14a223, -+ 0x155ce6, 0x162703, 0x171084, 0x1846b2, 0x120640, 0x131c63, 0x1402d7, 0x153737, 0x160822, 0x172683, -+ 0x182807, 0x12064c, 0x13e693, 0x140016, 0x152023, 0x1628d7, 0x172683, 0x183807, 0x120658, 0x13e693, -+ 0x140016, 0x152023, 0x1638d7, 0x172683, 0x184007, 0x120664, 0x13e693, 0x140016, 0x152023, 0x1640d7, -+ 0x172683, 0x184807, 0x120670, 0x13e693, 0x140016, 0x152023, 0x1648d7, 0x172703, 0x181004, 0x12067c, -+ 0x1346b2, 0x149c63, 0x151ae6, 0x160737, 0x170800, 0x184b78, 0x120688, 0x130693, 0x140ff0, 0x15463d, -+ 0x168b1d, 0x17ce3a, 0x1852b7, 0x120694, 0x130800, 0x144701, 0x154389, 0x16408d, 0x174311, 0x180537, -+ 0x1206a0, 0x130820, 0x141593, 0x150077, 0x1695aa, 0x17418c, 0x184572, 0x1206ac, 0x1305c2, 0x1481c1, -+ 0x1581a9, 0x167763, 0x1700b5, 0x189533, 0x1206b8, 0x1300e4, 0x144513, 0x15fff5, 0x168e69, 0x170537, -+ 0x180800, 0x1206c4, 0x134568, 0x148121, 0x15893d, 0x167463, 0x1702b5, 0x18a583, 0x1206d0, 0x1306c2, -+ 0x140763, 0x151277, 0x160a63, 0x171217, 0x1805c2, 0x1206dc, 0x1381c1, 0x14818d, 0x150d63, 0x161097, -+ 0x178985, 0x180586, 0x1206e8, 0x1395b3, 0x1400b4, 0x15c593, 0x16fff5, 0x178eed, 0x180705, 0x1206f4, -+ 0x1315e3, 0x14fa67, 0x1535b7, 0x160822, 0x17a703, 0x183005, 0x120700, 0x13757d, 0x148a3d, 0x150513, -+ 0x160ff5, 0x178f69, 0x180622, 0x12070c, 0x138e59, 0x14a023, 0x1530c5, 0x168637, 0x170800, 0x185a38, -+ 0x120718, 0x1375c1, 0x14f693, 0x150ff6, 0x168593, 0x170ff5, 0x188f6d, 0x120724, 0x1306a2, 0x148ed9, -+ 0x15da34, 0x164682, 0x170713, 0x180210, 0x120730, 0x139163, 0x140ee6, 0x154711, 0x16e391, 0x17471d, -+ 0x182023, 0x12073c, 0x1310e4, 0x142683, 0x150a04, 0x16471d, 0x179e63, 0x1800e6, 0x120748, 0x136737, -+ 0x140800, 0x152703, 0x164cc7, 0x170693, 0x184000, 0x120754, 0x137713, 0x144807, 0x151463, 0x1600d7, -+ 0x172223, 0x180e04, 0x120760, 0x134018, 0x141163, 0x150497, 0x165703, 0x1700c4, 0x181793, 0x12076c, -+ 0x130117, 0x14db63, 0x150207, 0x168737, 0x170800, 0x184778, 0x120778, 0x137713, 0x140807, 0x15e705, -+ 0x160513, 0x170000, 0x184792, 0x120784, 0x134581, 0x149782, 0x1547a2, 0x164711, 0x17c818, 0x18c004, -+ 0x120790, 0x130d23, 0x140094, 0x150ca3, 0x160004, 0x179782, 0x1856b7, 0x12079c, 0x130800, 0x1442b8, -+ 0x159b71, 0x16c2b8, 0x170513, 0x180000, 0x1207a8, 0x1347d2, 0x149782, 0x154703, 0x162684, 0x1703e3, -+ 0x18de07, 0x1207b4, 0x13bbd9, 0x1407b7, 0x150002, 0x168793, 0x1765c7, 0x18c83e, 0x1207c0, 0x1327b7, -+ 0x140002, 0x158793, 0x16dae7, 0x17c43e, 0x1847b7, 0x1207cc, 0x130002, 0x148793, 0x151427, 0x16c23e, -+ 0x1757b7, 0x180002, 0x1207d8, 0x138793, 0x149867, 0x15b1fd, 0x162683, 0x171504, 0x184709, 0x1207e4, -+ 0x1399e3, 0x14e2e6, 0x1536b7, 0x160822, 0x17a703, 0x183006, 0x1207f0, 0x13663d, 0x148f51, 0x15a023, -+ 0x1630e6, 0x17bd39, 0x18c593, 0x1207fc, 0x130015, 0x14b5dd, 0x158991, 0x1635b3, 0x1700b0, 0x180589, -+ 0x120808, 0x13bdf9, 0x148991, 0x15b593, 0x160015, 0x17bfdd, 0x180737, 0x120814, 0x130800, 0x144f28, -+ 0x15cf89, 0x1647c2, 0x17893d, 0x189782, 0x120820, 0x1347e2, 0x140713, 0x151000, 0x162223, 0x1710e4, -+ 0x182423, 0x12082c, 0x1310f4, 0x14474d, 0x15b729, 0x168111, 0x17b7dd, 0x1814e3, 0x120838, 0x13f097, -+ 0x140737, 0x150800, 0x164770, 0x171713, 0x180106, 0x120844, 0x135d63, 0x140607, 0x1585b7, 0x160800, -+ 0x17a683, 0x180d05, 0x120850, 0x1372c5, 0x147313, 0x1500f6, 0x1612fd, 0x17a703, 0x180d45, 0x12085c, -+ 0x131513, 0x1400c3, 0x15f6b3, 0x160056, 0x178ec9, 0x18757d, 0x120868, 0x130393, 0x140ff5, 0x151293, -+ 0x160083, 0x17f6b3, 0x180076, 0x120874, 0x139b41, 0x148211, 0x15e2b3, 0x160056, 0x171093, 0x180043, -+ 0x120880, 0x137693, 0x140016, 0x156333, 0x160067, 0x170613, 0x187ff5, 0x12088c, 0x139713, 0x1400b6, -+ 0x157633, 0x1600c3, 0x178e59, 0x189513, 0x120898, 0x1300a6, 0x147613, 0x159ff6, 0x169713, 0x170096, -+ 0x188e49, 0x1208a4, 0x13f293, 0x14f0f2, 0x158e59, 0x16e2b3, 0x170012, 0x1806a2, 0x1208b0, 0x137613, -+ 0x14eff6, 0x158e55, 0x16a823, 0x170c55, 0x18aa23, 0x1208bc, 0x130cc5, 0x1480e3, 0x15e807, 0x1646b7, -+ 0x170822, 0x18a703, 0x1208c8, 0x13f006, 0x149b61, 0x156713, 0x160027, 0x17a023, 0x18f0e6, 0x1208d4, -+ 0x13b5ad, 0x140000, 0x150000, 0x160000, 0x170000, 0x180000, 0x110000, 0x120400, 0x104000, 0x1f0000, -+}; -+ -+int jl2xxx_pre_init(struct phy_device *phydev) -+{ -+ int i, j; -+ int regaddr, val; -+ int length = sizeof(init_data)/sizeof(init_data[0]); -+ -+ for (i = 0; i < length; i++) { -+ regaddr = ((init_data[i] >> 16) & 0xff); -+ val = (init_data[i] & 0xffff); -+ phy_write(phydev, regaddr, val); -+ if (regaddr == 0x18) { -+ phy_write(phydev, 0x10, 0x8006); -+ for (j = 0; j < 8; j++) { -+ if (phy_read(phydev, 0x10) == 0) { -+ break; -+ } -+ } -+ } -+ } -+ -+ return 0; -+} -+ -+int enable_wol(struct phy_device *phydev) -+{ -+ jlsemi_set_bits(phydev, WOL_CTL_PAGE, -+ WOL_CTL_REG, WOL_EN); -+ -+ jlsemi_clear_bits(phydev, WOL_CTL_STAS_PAGE, -+ WOL_CTL_STAS_REG, WOL_CTL_EN); -+ -+ return 0; -+} -+ -+int disable_wol(struct phy_device *phydev) -+{ -+ jlsemi_clear_bits(phydev, WOL_CTL_PAGE, -+ WOL_CTL_REG, WOL_EN); -+ -+ jlsemi_set_bits(phydev, BASIC_PAGE, BMCR_REG, SOFT_RESET); -+ /* wait soft reset complete*/ -+ msleep(20); -+ -+ return 0; -+} -+ -+int setup_wol_low_polarity(struct phy_device *phydev) -+{ -+ jlsemi_clear_bits(phydev, WOL_CTL_STAS_PAGE, -+ WOL_CTL_STAS_REG, WOL_POLARITY); -+ return 0; -+} -+ -+int setup_wol_high_polarity(struct phy_device *phydev) -+{ -+ jlsemi_set_bits(phydev, WOL_CTL_STAS_PAGE, -+ WOL_CTL_STAS_REG, WOL_POLARITY); -+ return 0; -+} -+ -+int clear_wol_event(struct phy_device *phydev) -+{ -+ jlsemi_set_bits(phydev, WOL_CTL_STAS_PAGE, -+ WOL_CTL_STAS_REG, WOL_EVENT); -+ -+ jlsemi_clear_bits(phydev, WOL_CTL_STAS_PAGE, -+ WOL_CTL_STAS_REG, WOL_EVENT); -+ return 0; -+} -+ -+int store_mac_addr(struct phy_device *phydev) -+{ -+ int err; -+ -+ jlsemi_write_page(phydev, WOL_CTL_STAS_PAGE); -+ -+ /* Store the device address for the magic packet */ -+ err = phy_write(phydev, WOL_MAC_ADDR2_REG, -+ ((phydev->attached_dev->dev_addr[0] << 8) | -+ phydev->attached_dev->dev_addr[1])); -+ if (err < 0) -+ return err; -+ err = phy_write(phydev, WOL_MAC_ADDR1_REG, -+ ((phydev->attached_dev->dev_addr[2] << 8) | -+ phydev->attached_dev->dev_addr[3])); -+ if (err < 0) -+ return err; -+ err = phy_write(phydev, WOL_MAC_ADDR0_REG, -+ ((phydev->attached_dev->dev_addr[4] << 8) | -+ phydev->attached_dev->dev_addr[5])); -+ if (err < 0) -+ return err; -+ -+ /* change page to 0 */ -+ jlsemi_write_page(phydev, BASIC_PAGE); -+ -+ return 0; -+} -+ -+int config_phy_info(struct phy_device *phydev, -+ struct jl2xx1_priv *jl2xx1) -+{ -+ int val, major, minor; -+ -+ val = phy_read(phydev, 29); -+ if (val < 0) -+ return val; -+ -+ major = (val >> 7) & 0x1f; -+ minor = (val >> 0) & 0x7f; -+ /* major enlarge 10 */ -+ jl2xx1->sw_info = major * 10 + minor; -+ -+ return 0; -+} -+ -+/********************** Convenience function for phy **********************/ -+ -+/** -+ * jlsemi_write_page() - write the page register -+ * @phydev: a pointer to a &struct phy_device -+ * @page: page values -+ */ -+int jlsemi_write_page(struct phy_device *phydev, int page) -+{ -+ return phy_write(phydev, MII_JLSEMI_PHY_PAGE, page); -+} -+ -+/** -+ * jlsemi_read_page() - write the page register -+ * @phydev: a pointer to a &struct phy_device -+ * -+ * Return: get page values at present -+ */ -+int jlsemi_read_page(struct phy_device *phydev) -+{ -+ return phy_read(phydev, MII_JLSEMI_PHY_PAGE); -+} -+ -+/** -+ * __jlsemi_save_page() - save the page value -+ *@phydev: a pointer to a &struct phy_device -+ * -+ * Return: save page value -+ */ -+static inline int __jlsemi_save_page(struct phy_device *phydev) -+{ -+ return jlsemi_read_page(phydev); -+} -+ -+/** -+ * __jlsemi_select_page() - restore the page register -+ * @phydev: a pointer to a &struct phy_device -+ * @page: the page -+ * -+ * Return: -+ * @oldpgae: this is last page value -+ * @ret: if page is change it will return new page value -+ */ -+static inline int __jlsemi_select_page(struct phy_device *phydev, int page) -+{ -+ int ret, oldpage; -+ -+ oldpage = ret = __jlsemi_save_page(phydev); -+ if (ret < 0) -+ return ret; -+ -+ if (oldpage != page) { -+ ret = jlsemi_write_page(phydev, page); -+ if (ret < 0) -+ return ret; -+ } -+ -+ return oldpage; -+} -+ -+/** -+ * __jlsemi_restore_page() - restore the page register -+ * @phydev: a pointer to a &struct phy_device -+ * @oldpage: the old page, return value from __jlsemi_save_page() or -+ * __jlsemi_select_page() -+ * @ret: operation's return code -+ * -+ * Returns: -+ * @oldpage if it was a negative value, otherwise -+ * @ret if it was a negative errno value, otherwise -+ * phy_write_page()'s negative value if it were in error, otherwise -+ * @ret -+ */ -+static inline int __jlsemi_restore_page(struct phy_device *phydev, -+ int oldpage, int ret) -+{ -+ int r; -+ -+ if (oldpage >= 0) { -+ r = jlsemi_write_page(phydev, oldpage); -+ -+ /* Propagate the operation return code if the page write -+ * was successful. -+ */ -+ if (ret >= 0 && r < 0) -+ ret = r; -+ } else { -+ /* Propagate the phy page selection error code */ -+ ret = oldpage; -+ } -+ -+ return ret; -+} -+ -+/** -+ * __jlsemi_modify_reg() - Convenience function for modifying a PHY register -+ * @phydev: a pointer to a &struct phy_device -+ * @regnum: register number -+ * @mask: bit mask of bits to clear -+ * @set: bit mask of bits to set -+ * -+ * Returns negative errno, 0 if there was no change, and 1 in case of change -+ */ -+static inline int __jlsemi_modify_reg(struct phy_device *phydev, -+ u32 regnum, u16 mask, u16 set) -+{ -+ int newval, ret; -+ -+ ret = phy_read(phydev, regnum); -+ if (ret < 0) -+ return ret; -+ -+ newval = (ret & ~mask) | set; -+ if (newval == ret) -+ return 0; -+ -+ ret = phy_write(phydev, regnum, newval); -+ -+ return ret < 0 ? ret : 1; -+} -+ -+/** -+ * jlsemi_modify_paged_reg() - Function for modifying a paged register -+ * @phydev: a pointer to a &struct phy_device -+ * @page: the page for the phy -+ * @regnum: register number -+ * @mask: bit mask of bits to clear -+ * @set: bit mask of bits to set -+ * -+ * Returns negative errno, 0 if there was no change, and 1 in case of change -+ */ -+int jlsemi_modify_paged_reg(struct phy_device *phydev, -+ int page, u32 regnum, -+ u16 mask, u16 set) -+{ -+ int ret = 0, oldpage; -+ -+ oldpage = __jlsemi_select_page(phydev, page); -+ if (oldpage >= 0) -+ ret = __jlsemi_modify_reg(phydev, regnum, mask, set); -+ -+ return __jlsemi_restore_page(phydev, oldpage, ret); -+} -+ -+/** -+ * jlsemi_set_bits() - Convenience function for setting bits in a PHY register -+ * @phydev: a pointer to a &struct phy_device -+ * @page: the page for the phy -+ * @regnum: register number to write -+ * @val: bits to set -+ */ -+int jlsemi_set_bits(struct phy_device *phydev, -+ int page, u32 regnum, u16 val) -+{ -+ return jlsemi_modify_paged_reg(phydev, page, regnum, 0, val); -+} -+ -+/** -+ * jlsemi_clear_bits - Convenience function for clearing bits in a PHY register -+ * @phydev: the phy_device struct -+ * @page: the page for the phy -+ * @regnum: register number to write -+ * @val: bits to clear -+ */ -+int jlsemi_clear_bits(struct phy_device *phydev, -+ int page, u32 regnum, u16 val) -+{ -+ return jlsemi_modify_paged_reg(phydev, page, regnum, val, 0); -+} -+ -+/** -+ * jlsemi_get_bit() - Convenience function for setting bits in a PHY register -+ * @phydev: a pointer to a &struct phy_device -+ * @page: the page for the phy -+ * @regnum: register number to write -+ * @val: bit to get -+ * -+ * Note: -+ * you only get one bit at meanwhile -+ * -+ */ -+int jlsemi_get_bit(struct phy_device *phydev, -+ int page, u32 regnum, u16 val) -+{ -+ int ret = 0, oldpage; -+ -+ oldpage = __jlsemi_select_page(phydev, page); -+ if (oldpage >= 0) -+ { -+ ret = phy_read(phydev, regnum); -+ if (ret < 0) -+ return ret; -+ ret = ((ret & val) == val) ? 1 : 0; -+ } -+ -+ return __jlsemi_restore_page(phydev, oldpage, ret); -+} ---- /dev/null -+++ b/drivers/net/phy/jl2xxx-core.h -@@ -0,0 +1,104 @@ -+/* -+ * Copyright (C) 2021 JLSemi Corporation -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation version 2. -+ * -+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any -+ * kind, whether express or implied; without even the implied warranty -+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+#ifndef _JLSEMI_CORE_H -+#define _JLSEMI_CORE_H -+ -+#include -+#include -+#include -+ -+#define JL2XX1_PHY_ID 0x937c4030 -+#define JLSEMI_PHY_ID_MASK 0xfffffff0 -+ -+#define JL2101_PHY_ID 0x937c4032 -+ -+#define MII_JLSEMI_PHY_PAGE 0x1f -+ -+#define WOL_CTL_PAGE 18 -+#define WOL_CTL_REG 21 -+#define WOL_CTL_STAS_PAGE 4608 -+#define WOL_CTL_STAS_REG 16 -+#define WOL_MAC_ADDR2_REG 17 -+#define WOL_MAC_ADDR1_REG 18 -+#define WOL_MAC_ADDR0_REG 19 -+#define WOL_EVENT BIT(1) -+#define WOL_POLARITY BIT(14) -+#define WOL_EN BIT(6) -+#define WOL_CTL_EN BIT(15) -+ -+ -+/************************* Configuration section *************************/ -+ -+#define JLSEMI_WOL_EN 0 -+ -+ -+/************************* JLSemi iteration code *************************/ -+struct jl2xx1_priv { -+ u16 sw_info; -+}; -+ -+int jl2xxx_pre_init(struct phy_device *phydev); -+ -+int config_phy_info(struct phy_device *phydev, -+ struct jl2xx1_priv *jl2xx1); -+ -+int check_rgmii(struct phy_device *phydev); -+ -+int dis_rgmii_tx_ctrl(struct phy_device *phydev); -+ -+int config_suspend(struct phy_device *phydev); -+ -+int config_resume(struct phy_device *phydev); -+ -+int enable_wol(struct phy_device *phydev); -+ -+int disable_wol(struct phy_device *phydev); -+ -+int setup_wol_low_polarity(struct phy_device *phydev); -+ -+int setup_wol_high_polarity(struct phy_device *phydev); -+ -+int clear_wol_event(struct phy_device *phydev); -+ -+int store_mac_addr(struct phy_device *phydev); -+ -+int software_version(struct phy_device *phydev); -+ -+ -+/********************** Convenience function for phy **********************/ -+ -+/* Notice: You should change page 0 when you When you call it after*/ -+int jlsemi_write_page(struct phy_device *phydev, int page); -+ -+int jlsemi_read_page(struct phy_device *phydev); -+ -+int jlsemi_modify_paged_reg(struct phy_device *phydev, -+ int page, u32 regnum, -+ u16 mask, u16 set); -+ -+int jlsemi_set_bits(struct phy_device *phydev, -+ int page, u32 regnum, u16 val); -+ -+int jlsemi_clear_bits(struct phy_device *phydev, -+ int page, u32 regnum, u16 val); -+ -+int jlsemi_get_bit(struct phy_device *phydev, -+ int page, u32 regnum, u16 val); -+ -+int jlsemi_drivers_register(struct phy_driver *phydrvs, int size); -+ -+void jlsemi_drivers_unregister(struct phy_driver *phydrvs, int size); -+ -+#endif /* _JLSEMI_CORE_H */ -+ ---- /dev/null -+++ b/drivers/net/phy/jl2xxx.c -@@ -0,0 +1,126 @@ -+/* -+ * drivers/net/phy/jlsemi.c -+ * -+ * Driver for JLSemi PHYs -+ * -+ * Author: Gangqiao Kuang -+ * -+ * Copyright (c) 2021 JingLue Semiconductor, Inc. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ */ -+#include "jl2xxx-core.h" -+#include -+#include -+#include -+ -+ -+MODULE_DESCRIPTION("JLSemi PHY driver"); -+MODULE_AUTHOR("Gangqiao Kuang"); -+MODULE_LICENSE("GPL"); -+ -+static int jlsemi_probe(struct phy_device *phydev) -+{ -+ int err; -+ -+ err = jl2xxx_pre_init(phydev); -+ -+ /* wait load complete*/ -+ msleep(20); -+ -+ return (err < 0) ? err : 0; -+} -+ -+#if JLSEMI_WOL_EN -+static void jlsemi_get_wol(struct phy_device *phydev, -+ struct ethtool_wolinfo *wol) -+{ -+ int wol_en; -+ -+ wol->supported = WAKE_MAGIC; -+ wol->wolopts = 0; -+ -+ wol_en = jlsemi_get_bit(phydev, WOL_CTL_PAGE, -+ WOL_CTL_REG, WOL_EN); -+ -+ if (wol_en) -+ wol->wolopts |= WAKE_MAGIC; -+} -+ -+static int jlsemi_set_wol(struct phy_device *phydev, -+ struct ethtool_wolinfo *wol) -+{ -+ int err; -+ -+ if (wol->wolopts & WAKE_MAGIC) { -+ err = enable_wol(phydev); -+ if (err < 0) -+ return err; -+ -+ err = clear_wol_event(phydev); -+ if (err < 0) -+ return err; -+ -+ err = setup_wol_high_polarity(phydev); -+ if (err < 0) -+ return err; -+ -+ err = store_mac_addr(phydev); -+ if (err < 0) -+ return err; -+ } else { -+ err = disable_wol(phydev); -+ if (err < 0) -+ return err; -+ -+ err = setup_wol_high_polarity(phydev); -+ if (err < 0) -+ return err; -+ -+ err = clear_wol_event(phydev); -+ if (err < 0) -+ return err; -+ } -+ -+ return 0; -+} -+#endif -+ -+static struct phy_driver jlsemi_driver[] = { -+ { -+ PHY_ID_MATCH_EXACT(JL2101_PHY_ID), -+ .name = "JL2101 Gigabit Ethernet", -+ /* PHY_BASIC_FEATURES */ -+ .features = PHY_GBIT_FEATURES, -+ .probe = jlsemi_probe, -+ #if JLSEMI_WOL_EN -+ .get_wol = jlsemi_get_wol, -+ .set_wol = jlsemi_set_wol, -+ #endif -+ }, -+ { -+ PHY_ID_MATCH_MODEL(JL2XX1_PHY_ID), -+ .name = "JL2xx1 Gigabit Ethernet", -+ /* PHY_BASIC_FEATURES */ -+ .features = PHY_GBIT_FEATURES, -+ .probe = jlsemi_probe, -+ #if JLSEMI_WOL_EN -+ .get_wol = jlsemi_get_wol, -+ .set_wol = jlsemi_set_wol, -+ #endif -+ }, -+}; -+ -+module_phy_driver(jlsemi_driver); -+ -+static struct mdio_device_id __maybe_unused jlsemi_tbl[] = { -+ { PHY_ID_MATCH_EXACT(JL2101_PHY_ID) }, -+ { PHY_ID_MATCH_MODEL(JL2XX1_PHY_ID) }, -+ { } -+}; -+ -+MODULE_DEVICE_TABLE(mdio, jlsemi_tbl); diff --git a/target/linux/rockchip/patches-5.18/900-arm-boot-add-dts-files.patch b/target/linux/rockchip/patches-5.18/900-arm-boot-add-dts-files.patch deleted file mode 100644 index eb2b744dca05b3..00000000000000 --- a/target/linux/rockchip/patches-5.18/900-arm-boot-add-dts-files.patch +++ /dev/null @@ -1,34 +0,0 @@ ---- a/arch/arm64/boot/dts/rockchip/Makefile -+++ b/arch/arm64/boot/dts/rockchip/Makefile -@@ -9,8 +9,12 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3318-a9 - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb -+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-doornet1.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-neo3.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb -+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c.dtb -+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb -+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus-lts.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock-pi-e.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-roc-cc.dtb -@@ -22,6 +26,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-or - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-px5-evb.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb.dtb -+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-doornet2.dtb -+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-doornet2-4gb.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-ficus.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-firefly.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-bob.dtb -@@ -40,6 +46,9 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-na - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4b.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-neo4.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-r4s.dtb -+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-r4se.dtb -+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-guangmiao-g4c.dtb -+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-orangepi.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-pinebook-pro.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb diff --git a/target/linux/rockchip/patches-5.18/901-rockchip-rk3399-overclock-to-2.2-1.8-GHz-for-NanoPi4.patch b/target/linux/rockchip/patches-5.18/901-rockchip-rk3399-overclock-to-2.2-1.8-GHz-for-NanoPi4.patch deleted file mode 100644 index 87176a05385886..00000000000000 --- a/target/linux/rockchip/patches-5.18/901-rockchip-rk3399-overclock-to-2.2-1.8-GHz-for-NanoPi4.patch +++ /dev/null @@ -1,21 +0,0 @@ ---- a/arch/arm64/boot/dts/rockchip/rk3399-doornet2.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399-doornet2.dtsi -@@ -3,6 +3,7 @@ - /dts-v1/; - #include - #include "rk3399.dtsi" -+#include "rk3399-nanopi4-opp.dtsi" - - / { - chosen { ---- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi -@@ -14,7 +14,7 @@ - /dts-v1/; - #include - #include "rk3399.dtsi" --#include "rk3399-opp.dtsi" -+#include "rk3399-nanopi4-opp.dtsi" - - / { - aliases { diff --git a/target/linux/rockchip/patches-5.18/902-arm64-dts-rockchip-add-more-cpu-operating-points-for.patch b/target/linux/rockchip/patches-5.18/902-arm64-dts-rockchip-add-more-cpu-operating-points-for.patch deleted file mode 100644 index d9145299e8769a..00000000000000 --- a/target/linux/rockchip/patches-5.18/902-arm64-dts-rockchip-add-more-cpu-operating-points-for.patch +++ /dev/null @@ -1,44 +0,0 @@ -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Leonidas P. Papadakos -Date: Fri, 1 Mar 2019 21:55:53 +0200 -Subject: [PATCH v2] arm64: dts: rockchip: add more cpu operating points for - RK3328 - -This allows for greater max frequency on rk3328 boards, -increasing performance. - -It has been included in Armbian (a linux distibution for ARM boards) -for a while now without any reported issues - -https://github.com/armbian/build/blob/master/patch/kernel/rockchip64-default/enable-1392mhz-opp.patch -https://github.com/armbian/build/blob/master/patch/kernel/rockchip64-default/enable-1512mhz-opp.patch - -Signed-off-by: Leonidas P. Papadakos ---- - arch/arm64/boot/dts/rockchip/rk3328.dtsi | 15 +++++++++++++++ - 1 files changed, 15 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -@@ -140,6 +140,21 @@ - opp-microvolt = <1300000>; - clock-latency-ns = <40000>; - }; -+ opp-1392000000 { -+ opp-hz = /bits/ 64 <1392000000>; -+ opp-microvolt = <1350000>; -+ clock-latency-ns = <40000>; -+ }; -+ opp-1512000000 { -+ opp-hz = /bits/ 64 <1512000000>; -+ opp-microvolt = <1400000>; -+ clock-latency-ns = <40000>; -+ }; -+ opp-1608000000 { -+ opp-hz = /bits/ 64 <1608000000>; -+ opp-microvolt = <1450000>; -+ clock-latency-ns = <40000>; -+ }; - }; - - analog_sound: analog-sound { diff --git a/target/linux/rockchip/patches-5.18/903-crypto-rockchip-permit-to-pass-self-tests.patch b/target/linux/rockchip/patches-5.18/903-crypto-rockchip-permit-to-pass-self-tests.patch deleted file mode 100644 index af346f09d6bed5..00000000000000 --- a/target/linux/rockchip/patches-5.18/903-crypto-rockchip-permit-to-pass-self-tests.patch +++ /dev/null @@ -1,2419 +0,0 @@ -From patchwork Wed Jul 6 09:03:40 2022 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: LABBE Corentin -X-Patchwork-Id: 12907886 -Return-Path: - -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on - aws-us-west-2-korg-lkml-1.web.codeaurora.org -Received: from bombadil.infradead.org (bombadil.infradead.org - [198.137.202.133]) - (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) - (No client certificate requested) - by smtp.lore.kernel.org (Postfix) with ESMTPS id 80701C43334 - for ; - Wed, 6 Jul 2022 10:21:13 +0000 (UTC) -DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; - d=lists.infradead.org; s=bombadil.20210309; h=Sender: - Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: - List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: - Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: - Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: - List-Owner; bh=w2ewNjuPH3tCNpBACI9xMFukG8dznlgGn9auxf/TbSQ=; b=NMnZMIilH6Rj6q - JBeFHcO/0vy9bRepjfvBprmkGHfP0tGg2cfWZeQccgiH3J4xRnkQ8JCi8RhG+amUdCBP677fEwXqL - XDvulNMteh+ACd3gAZ2pWy1qE0RBQIRDEIngwNqYTFB0IfP/7cMHrzRy4v5Ynx7nI/6rkfi7O2oWH - jUb0AaXqbIQFeD4t3sr8v5gFOHpbwbH2urceXPRviZtl67L3Ejc9yEpmZJBZc0u2/hI1MLLE5h8Ks - gnOq0NUJdvmH9pV3fxLEx5m5RPb5D6DaTAT05Sjbj3tICBtXcrvI0CfGiM6Py64YLwfHiJFFDbhp6 - ng01U9Kg047g0MgLntvw==; -Received: from localhost ([::1] helo=bombadil.infradead.org) - by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) - id 1o929R-008Ncf-Sj; Wed, 06 Jul 2022 10:20:58 +0000 -Received: from mail-wr1-x430.google.com ([2a00:1450:4864:20::430]) - by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) - id 1o90xZ-007bjU-2s - for linux-rockchip@lists.infradead.org; Wed, 06 Jul 2022 09:04:39 +0000 -Received: by mail-wr1-x430.google.com with SMTP id s1so21047035wra.9 - for ; - Wed, 06 Jul 2022 02:04:35 -0700 (PDT) -DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; - d=baylibre-com.20210112.gappssmtp.com; s=20210112; - h=from:to:cc:subject:date:message-id:in-reply-to:references - :mime-version:content-transfer-encoding; - bh=2nwWkT4441Zvq5igIAOKA8C0HAjPPXDmTRADPlAyhok=; - b=Pr3IXa8ExRhTFh+SPH7MrhQizXMmrRN4KOZzHqdYpWENJ96Ms04oBik0WfZbJ27egJ - ldxRn/lKH+72j5pIK0nS2nYnViD4t7mh4Zb1sOqM2u2kO5jOs6YQUThf4H4eI2Km2Ujk - DwddZ86xRnFapyFfMRqcT6ohi+6e0uc4u1C7mMTTJA/fIR7ogqFH26AfqYtb+NPy09S6 - Lqsl7Gej6g7TLBDiNG7TJFSX2PL0SMt1IdS4uGkcq1ucTSIZUoDqeFV0sk0icX109eD0 - +evOAKZrJ8Fcpr+vITTRyd9o5yoYy0tl+3ssElJnyQ3+12HdNMnyGRJT/M/jsAeeXFrC - 2s1g== -X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; - d=1e100.net; s=20210112; - h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to - :references:mime-version:content-transfer-encoding; - bh=2nwWkT4441Zvq5igIAOKA8C0HAjPPXDmTRADPlAyhok=; - b=jrNkcu/YHsMg9g+c9DCMe2rYgZEjs2Kcrlvvla7WjME4uPIc42dSmgAaooVKGqfrOx - bmRlEpMseKnH+swTfgQT96HD72A1+GlBNgvGzgobVh9dE6qywC2hXeayy+6lvNQ04QDb - htuh/1tFPquCnMZrB6XkrBLtIoqngGlPObKutvylCovAOjcMfdpNkAbu6WXUdrVezesX - ipOA7nPpe1xK3xuRRarLWUtH0krfxDUMC3Zzv/ci7c9hqGq+wEV9+gofJqJnTbwHiAUU - XxtjOgZTFFruqo2Xh/aH1pz/dpOBlM77c+p9+BTiVbNjFR0uxH26+0CI2qLyeCpccvyL - Z5bg== -X-Gm-Message-State: AJIora+k2/Y0J3c5bRbTc8eO22Wszf2dEyzrIIniVBJBPx3Z+auKYN3q - rdqODKFBStTNE4iGSGyh2gI2yw== -X-Google-Smtp-Source: - AGRyM1uEESfBM2/+cx8O6PDi67ahL3H9B52KIeo6hugjBlO2PZU9E0Dg3m/zc4Jx7ArSkzmwQCEl3w== -X-Received: by 2002:a5d:6d0c:0:b0:21b:ccda:fc67 with SMTP id - e12-20020a5d6d0c000000b0021bccdafc67mr37250833wrq.246.1657098274092; - Wed, 06 Jul 2022 02:04:34 -0700 (PDT) -Received: from localhost.localdomain - (laubervilliers-658-1-213-31.w90-63.abo.wanadoo.fr. [90.63.244.31]) - by smtp.googlemail.com with ESMTPSA id - v11-20020adfe28b000000b0021d6ef34b2asm5230223wri.51.2022.07.06.02.04.33 - (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Wed, 06 Jul 2022 02:04:33 -0700 (PDT) -From: Corentin Labbe -To: heiko@sntech.de, - herbert@gondor.apana.org.au, - krzysztof.kozlowski+dt@linaro.org, - mturquette@baylibre.com, - p.zabel@pengutronix.de, - robh+dt@kernel.org, - sboyd@kernel.org -Cc: linux-rockchip@lists.infradead.org, - devicetree@vger.kernel.org, - linux-arm-kernel@lists.infradead.org, - linux-clk@vger.kernel.org, - linux-crypto@vger.kernel.org, - linux-kernel@vger.kernel.org, - john@metanate.com, - didi.debian@cknow.org, - Corentin Labbe -Subject: [PATCH v8 01/33] crypto: rockchip: use dev_err for error message - about interrupt -Date: Wed, 6 Jul 2022 09:03:40 +0000 -Message-Id: <20220706090412.806101-2-clabbe@baylibre.com> -X-Mailer: git-send-email 2.25.1 -In-Reply-To: <20220706090412.806101-1-clabbe@baylibre.com> -References: <20220706090412.806101-1-clabbe@baylibre.com> -MIME-Version: 1.0 -X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 -X-CRM114-CacheID: sfid-20220706_020437_385385_DD262621 -X-CRM114-Status: GOOD ( 11.86 ) -X-BeenThere: linux-rockchip@lists.infradead.org -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: Upstream kernel work for Rockchip platforms - -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Sender: "Linux-rockchip" -Errors-To: - linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org - -Interrupt is mandatory so the message should be printed as error. - -Reviewed-by: John Keeping -Signed-off-by: Corentin Labbe ---- - drivers/crypto/rockchip/rk3288_crypto.c | 3 +-- - 1 file changed, 1 insertion(+), 2 deletions(-) - ---- a/drivers/crypto/rockchip/rk3288_crypto.c -+++ b/drivers/crypto/rockchip/rk3288_crypto.c -@@ -14,235 +14,162 @@ - #include - #include - #include -+#include - #include - #include - #include - --static int rk_crypto_enable_clk(struct rk_crypto_info *dev) -+static struct rockchip_ip rocklist = { -+ .dev_list = LIST_HEAD_INIT(rocklist.dev_list), -+ .lock = __SPIN_LOCK_UNLOCKED(rocklist.lock), -+}; -+ -+struct rk_crypto_info *get_rk_crypto(void) - { -- int err; -+ struct rk_crypto_info *first; - -- err = clk_prepare_enable(dev->sclk); -- if (err) { -- dev_err(dev->dev, "[%s:%d], Couldn't enable clock sclk\n", -- __func__, __LINE__); -- goto err_return; -- } -- err = clk_prepare_enable(dev->aclk); -- if (err) { -- dev_err(dev->dev, "[%s:%d], Couldn't enable clock aclk\n", -- __func__, __LINE__); -- goto err_aclk; -+ spin_lock(&rocklist.lock); -+ first = list_first_entry_or_null(&rocklist.dev_list, -+ struct rk_crypto_info, list); -+ list_rotate_left(&rocklist.dev_list); -+ spin_unlock(&rocklist.lock); -+ return first; -+} -+ -+static const struct rk_variant rk3288_variant = { -+ .num_clks = 4, -+ .rkclks = { -+ { "sclk", 150000000}, - } -- err = clk_prepare_enable(dev->hclk); -- if (err) { -- dev_err(dev->dev, "[%s:%d], Couldn't enable clock hclk\n", -- __func__, __LINE__); -- goto err_hclk; -- } -- err = clk_prepare_enable(dev->dmaclk); -- if (err) { -- dev_err(dev->dev, "[%s:%d], Couldn't enable clock dmaclk\n", -- __func__, __LINE__); -- goto err_dmaclk; -- } -- return err; --err_dmaclk: -- clk_disable_unprepare(dev->hclk); --err_hclk: -- clk_disable_unprepare(dev->aclk); --err_aclk: -- clk_disable_unprepare(dev->sclk); --err_return: -- return err; --} -+}; - --static void rk_crypto_disable_clk(struct rk_crypto_info *dev) --{ -- clk_disable_unprepare(dev->dmaclk); -- clk_disable_unprepare(dev->hclk); -- clk_disable_unprepare(dev->aclk); -- clk_disable_unprepare(dev->sclk); --} -- --static int check_alignment(struct scatterlist *sg_src, -- struct scatterlist *sg_dst, -- int align_mask) --{ -- int in, out, align; -- -- in = IS_ALIGNED((uint32_t)sg_src->offset, 4) && -- IS_ALIGNED((uint32_t)sg_src->length, align_mask); -- if (!sg_dst) -- return in; -- out = IS_ALIGNED((uint32_t)sg_dst->offset, 4) && -- IS_ALIGNED((uint32_t)sg_dst->length, align_mask); -- align = in && out; -- -- return (align && (sg_src->length == sg_dst->length)); --} -- --static int rk_load_data(struct rk_crypto_info *dev, -- struct scatterlist *sg_src, -- struct scatterlist *sg_dst) --{ -- unsigned int count; -- -- dev->aligned = dev->aligned ? -- check_alignment(sg_src, sg_dst, dev->align_size) : -- dev->aligned; -- if (dev->aligned) { -- count = min(dev->left_bytes, sg_src->length); -- dev->left_bytes -= count; -- -- if (!dma_map_sg(dev->dev, sg_src, 1, DMA_TO_DEVICE)) { -- dev_err(dev->dev, "[%s:%d] dma_map_sg(src) error\n", -- __func__, __LINE__); -- return -EINVAL; -- } -- dev->addr_in = sg_dma_address(sg_src); -+static const struct rk_variant rk3328_variant = { -+ .num_clks = 3, -+}; - -- if (sg_dst) { -- if (!dma_map_sg(dev->dev, sg_dst, 1, DMA_FROM_DEVICE)) { -- dev_err(dev->dev, -- "[%s:%d] dma_map_sg(dst) error\n", -- __func__, __LINE__); -- dma_unmap_sg(dev->dev, sg_src, 1, -- DMA_TO_DEVICE); -- return -EINVAL; -- } -- dev->addr_out = sg_dma_address(sg_dst); -- } -- } else { -- count = (dev->left_bytes > PAGE_SIZE) ? -- PAGE_SIZE : dev->left_bytes; -- -- if (!sg_pcopy_to_buffer(dev->first, dev->src_nents, -- dev->addr_vir, count, -- dev->total - dev->left_bytes)) { -- dev_err(dev->dev, "[%s:%d] pcopy err\n", -- __func__, __LINE__); -- return -EINVAL; -- } -- dev->left_bytes -= count; -- sg_init_one(&dev->sg_tmp, dev->addr_vir, count); -- if (!dma_map_sg(dev->dev, &dev->sg_tmp, 1, DMA_TO_DEVICE)) { -- dev_err(dev->dev, "[%s:%d] dma_map_sg(sg_tmp) error\n", -- __func__, __LINE__); -- return -ENOMEM; -- } -- dev->addr_in = sg_dma_address(&dev->sg_tmp); -+static const struct rk_variant rk3399_variant = { -+ .num_clks = 3, -+}; -+ -+static int rk_crypto_get_clks(struct rk_crypto_info *dev) -+{ -+ int i, j, err; -+ unsigned long cr; - -- if (sg_dst) { -- if (!dma_map_sg(dev->dev, &dev->sg_tmp, 1, -- DMA_FROM_DEVICE)) { -- dev_err(dev->dev, -- "[%s:%d] dma_map_sg(sg_tmp) error\n", -- __func__, __LINE__); -- dma_unmap_sg(dev->dev, &dev->sg_tmp, 1, -- DMA_TO_DEVICE); -- return -ENOMEM; -+ dev->num_clks = devm_clk_bulk_get_all(dev->dev, &dev->clks); -+ if (dev->num_clks < dev->variant->num_clks) { -+ dev_err(dev->dev, "Missing clocks, got %d instead of %d\n", -+ dev->num_clks, dev->variant->num_clks); -+ return -EINVAL; -+ } -+ -+ for (i = 0; i < dev->num_clks; i++) { -+ cr = clk_get_rate(dev->clks[i].clk); -+ for (j = 0; j < ARRAY_SIZE(dev->variant->rkclks); j++) { -+ if (dev->variant->rkclks[j].max == 0) -+ continue; -+ if (strcmp(dev->variant->rkclks[j].name, dev->clks[i].id)) -+ continue; -+ if (cr > dev->variant->rkclks[j].max) { -+ err = clk_set_rate(dev->clks[i].clk, -+ dev->variant->rkclks[j].max); -+ if (err) -+ dev_err(dev->dev, "Fail downclocking %s from %lu to %lu\n", -+ dev->variant->rkclks[j].name, cr, -+ dev->variant->rkclks[j].max); -+ else -+ dev_info(dev->dev, "Downclocking %s from %lu to %lu\n", -+ dev->variant->rkclks[j].name, cr, -+ dev->variant->rkclks[j].max); - } -- dev->addr_out = sg_dma_address(&dev->sg_tmp); - } - } -- dev->count = count; - return 0; - } - --static void rk_unload_data(struct rk_crypto_info *dev) -+static int rk_crypto_enable_clk(struct rk_crypto_info *dev) - { -- struct scatterlist *sg_in, *sg_out; -+ int err; - -- sg_in = dev->aligned ? dev->sg_src : &dev->sg_tmp; -- dma_unmap_sg(dev->dev, sg_in, 1, DMA_TO_DEVICE); -+ err = clk_bulk_prepare_enable(dev->num_clks, dev->clks); -+ if (err) -+ dev_err(dev->dev, "Could not enable clock clks\n"); - -- if (dev->sg_dst) { -- sg_out = dev->aligned ? dev->sg_dst : &dev->sg_tmp; -- dma_unmap_sg(dev->dev, sg_out, 1, DMA_FROM_DEVICE); -- } -+ return err; - } - --static irqreturn_t rk_crypto_irq_handle(int irq, void *dev_id) -+static void rk_crypto_disable_clk(struct rk_crypto_info *dev) - { -- struct rk_crypto_info *dev = platform_get_drvdata(dev_id); -- u32 interrupt_status; -+ clk_bulk_disable_unprepare(dev->num_clks, dev->clks); -+} - -- spin_lock(&dev->lock); -- interrupt_status = CRYPTO_READ(dev, RK_CRYPTO_INTSTS); -- CRYPTO_WRITE(dev, RK_CRYPTO_INTSTS, interrupt_status); -+/* -+ * Power management strategy: The device is suspended until a request -+ * is handled. For avoiding suspend/resume yoyo, the autosuspend is set to 2s. -+ */ -+static int rk_crypto_pm_suspend(struct device *dev) -+{ -+ struct rk_crypto_info *rkdev = dev_get_drvdata(dev); - -- if (interrupt_status & 0x0a) { -- dev_warn(dev->dev, "DMA Error\n"); -- dev->err = -EFAULT; -- } -- tasklet_schedule(&dev->done_task); -+ rk_crypto_disable_clk(rkdev); -+ reset_control_assert(rkdev->rst); - -- spin_unlock(&dev->lock); -- return IRQ_HANDLED; -+ return 0; - } - --static int rk_crypto_enqueue(struct rk_crypto_info *dev, -- struct crypto_async_request *async_req) -+static int rk_crypto_pm_resume(struct device *dev) - { -- unsigned long flags; -+ struct rk_crypto_info *rkdev = dev_get_drvdata(dev); - int ret; - -- spin_lock_irqsave(&dev->lock, flags); -- ret = crypto_enqueue_request(&dev->queue, async_req); -- if (dev->busy) { -- spin_unlock_irqrestore(&dev->lock, flags); -+ ret = rk_crypto_enable_clk(rkdev); -+ if (ret) - return ret; -- } -- dev->busy = true; -- spin_unlock_irqrestore(&dev->lock, flags); -- tasklet_schedule(&dev->queue_task); - -- return ret; --} -+ reset_control_deassert(rkdev->rst); -+ return 0; - --static void rk_crypto_queue_task_cb(unsigned long data) --{ -- struct rk_crypto_info *dev = (struct rk_crypto_info *)data; -- struct crypto_async_request *async_req, *backlog; -- unsigned long flags; -- int err = 0; -+} - -- dev->err = 0; -- spin_lock_irqsave(&dev->lock, flags); -- backlog = crypto_get_backlog(&dev->queue); -- async_req = crypto_dequeue_request(&dev->queue); -+static const struct dev_pm_ops rk_crypto_pm_ops = { -+ SET_RUNTIME_PM_OPS(rk_crypto_pm_suspend, rk_crypto_pm_resume, NULL) -+}; - -- if (!async_req) { -- dev->busy = false; -- spin_unlock_irqrestore(&dev->lock, flags); -- return; -- } -- spin_unlock_irqrestore(&dev->lock, flags); -+static int rk_crypto_pm_init(struct rk_crypto_info *rkdev) -+{ -+ int err; - -- if (backlog) { -- backlog->complete(backlog, -EINPROGRESS); -- backlog = NULL; -- } -+ pm_runtime_use_autosuspend(rkdev->dev); -+ pm_runtime_set_autosuspend_delay(rkdev->dev, 2000); - -- dev->async_req = async_req; -- err = dev->start(dev); -+ err = pm_runtime_set_suspended(rkdev->dev); - if (err) -- dev->complete(dev->async_req, err); -+ return err; -+ pm_runtime_enable(rkdev->dev); -+ return err; - } - --static void rk_crypto_done_task_cb(unsigned long data) -+static void rk_crypto_pm_exit(struct rk_crypto_info *rkdev) -+{ -+ pm_runtime_disable(rkdev->dev); -+} -+ -+static irqreturn_t rk_crypto_irq_handle(int irq, void *dev_id) - { -- struct rk_crypto_info *dev = (struct rk_crypto_info *)data; -+ struct rk_crypto_info *dev = platform_get_drvdata(dev_id); -+ u32 interrupt_status; -+ -+ interrupt_status = CRYPTO_READ(dev, RK_CRYPTO_INTSTS); -+ CRYPTO_WRITE(dev, RK_CRYPTO_INTSTS, interrupt_status); - -- if (dev->err) { -- dev->complete(dev->async_req, dev->err); -- return; -+ dev->status = 1; -+ if (interrupt_status & 0x0a) { -+ dev_warn(dev->dev, "DMA Error\n"); -+ dev->status = 0; - } -+ complete(&dev->complete); - -- dev->err = dev->update(dev); -- if (dev->err) -- dev->complete(dev->async_req, dev->err); -+ return IRQ_HANDLED; - } - - static struct rk_crypto_tmp *rk_cipher_algs[] = { -@@ -257,6 +184,62 @@ static struct rk_crypto_tmp *rk_cipher_a - &rk_ahash_md5, - }; - -+#ifdef CONFIG_CRYPTO_DEV_ROCKCHIP_DEBUG -+static int rk_crypto_debugfs_show(struct seq_file *seq, void *v) -+{ -+ struct rk_crypto_info *dd; -+ unsigned int i; -+ -+ spin_lock(&rocklist.lock); -+ list_for_each_entry(dd, &rocklist.dev_list, list) { -+ seq_printf(seq, "%s %s requests: %lu\n", -+ dev_driver_string(dd->dev), dev_name(dd->dev), -+ dd->nreq); -+ } -+ spin_unlock(&rocklist.lock); -+ -+ for (i = 0; i < ARRAY_SIZE(rk_cipher_algs); i++) { -+ if (!rk_cipher_algs[i]->dev) -+ continue; -+ switch (rk_cipher_algs[i]->type) { -+ case CRYPTO_ALG_TYPE_SKCIPHER: -+ seq_printf(seq, "%s %s reqs=%lu fallback=%lu\n", -+ rk_cipher_algs[i]->alg.skcipher.base.cra_driver_name, -+ rk_cipher_algs[i]->alg.skcipher.base.cra_name, -+ rk_cipher_algs[i]->stat_req, rk_cipher_algs[i]->stat_fb); -+ seq_printf(seq, "\tfallback due to length: %lu\n", -+ rk_cipher_algs[i]->stat_fb_len); -+ seq_printf(seq, "\tfallback due to alignment: %lu\n", -+ rk_cipher_algs[i]->stat_fb_align); -+ seq_printf(seq, "\tfallback due to SGs: %lu\n", -+ rk_cipher_algs[i]->stat_fb_sgdiff); -+ break; -+ case CRYPTO_ALG_TYPE_AHASH: -+ seq_printf(seq, "%s %s reqs=%lu fallback=%lu\n", -+ rk_cipher_algs[i]->alg.hash.halg.base.cra_driver_name, -+ rk_cipher_algs[i]->alg.hash.halg.base.cra_name, -+ rk_cipher_algs[i]->stat_req, rk_cipher_algs[i]->stat_fb); -+ break; -+ } -+ } -+ return 0; -+} -+ -+DEFINE_SHOW_ATTRIBUTE(rk_crypto_debugfs); -+#endif -+ -+static void register_debugfs(struct rk_crypto_info *crypto_info) -+{ -+#ifdef CONFIG_CRYPTO_DEV_ROCKCHIP_DEBUG -+ /* Ignore error of debugfs */ -+ rocklist.dbgfs_dir = debugfs_create_dir("rk3288_crypto", NULL); -+ rocklist.dbgfs_stats = debugfs_create_file("stats", 0444, -+ rocklist.dbgfs_dir, -+ &rocklist, -+ &rk_crypto_debugfs_fops); -+#endif -+} -+ - static int rk_crypto_register(struct rk_crypto_info *crypto_info) - { - unsigned int i, k; -@@ -264,12 +247,22 @@ static int rk_crypto_register(struct rk_ - - for (i = 0; i < ARRAY_SIZE(rk_cipher_algs); i++) { - rk_cipher_algs[i]->dev = crypto_info; -- if (rk_cipher_algs[i]->type == ALG_TYPE_CIPHER) -- err = crypto_register_skcipher( -- &rk_cipher_algs[i]->alg.skcipher); -- else -- err = crypto_register_ahash( -- &rk_cipher_algs[i]->alg.hash); -+ switch (rk_cipher_algs[i]->type) { -+ case CRYPTO_ALG_TYPE_SKCIPHER: -+ dev_info(crypto_info->dev, "Register %s as %s\n", -+ rk_cipher_algs[i]->alg.skcipher.base.cra_name, -+ rk_cipher_algs[i]->alg.skcipher.base.cra_driver_name); -+ err = crypto_register_skcipher(&rk_cipher_algs[i]->alg.skcipher); -+ break; -+ case CRYPTO_ALG_TYPE_AHASH: -+ dev_info(crypto_info->dev, "Register %s as %s\n", -+ rk_cipher_algs[i]->alg.hash.halg.base.cra_name, -+ rk_cipher_algs[i]->alg.hash.halg.base.cra_driver_name); -+ err = crypto_register_ahash(&rk_cipher_algs[i]->alg.hash); -+ break; -+ default: -+ dev_err(crypto_info->dev, "unknown algorithm\n"); -+ } - if (err) - goto err_cipher_algs; - } -@@ -277,7 +270,7 @@ static int rk_crypto_register(struct rk_ - - err_cipher_algs: - for (k = 0; k < i; k++) { -- if (rk_cipher_algs[i]->type == ALG_TYPE_CIPHER) -+ if (rk_cipher_algs[i]->type == CRYPTO_ALG_TYPE_SKCIPHER) - crypto_unregister_skcipher(&rk_cipher_algs[k]->alg.skcipher); - else - crypto_unregister_ahash(&rk_cipher_algs[i]->alg.hash); -@@ -290,22 +283,23 @@ static void rk_crypto_unregister(void) - unsigned int i; - - for (i = 0; i < ARRAY_SIZE(rk_cipher_algs); i++) { -- if (rk_cipher_algs[i]->type == ALG_TYPE_CIPHER) -+ if (rk_cipher_algs[i]->type == CRYPTO_ALG_TYPE_SKCIPHER) - crypto_unregister_skcipher(&rk_cipher_algs[i]->alg.skcipher); - else - crypto_unregister_ahash(&rk_cipher_algs[i]->alg.hash); - } - } - --static void rk_crypto_action(void *data) --{ -- struct rk_crypto_info *crypto_info = data; -- -- reset_control_assert(crypto_info->rst); --} -- - static const struct of_device_id crypto_of_id_table[] = { -- { .compatible = "rockchip,rk3288-crypto" }, -+ { .compatible = "rockchip,rk3288-crypto", -+ .data = &rk3288_variant, -+ }, -+ { .compatible = "rockchip,rk3328-crypto", -+ .data = &rk3328_variant, -+ }, -+ { .compatible = "rockchip,rk3399-crypto", -+ .data = &rk3399_variant, -+ }, - {} - }; - MODULE_DEVICE_TABLE(of, crypto_of_id_table); -@@ -313,7 +307,7 @@ MODULE_DEVICE_TABLE(of, crypto_of_id_tab - static int rk_crypto_probe(struct platform_device *pdev) - { - struct device *dev = &pdev->dev; -- struct rk_crypto_info *crypto_info; -+ struct rk_crypto_info *crypto_info, *first; - int err = 0; - - crypto_info = devm_kzalloc(&pdev->dev, -@@ -323,7 +317,16 @@ static int rk_crypto_probe(struct platfo - goto err_crypto; - } - -- crypto_info->rst = devm_reset_control_get(dev, "crypto-rst"); -+ crypto_info->dev = &pdev->dev; -+ platform_set_drvdata(pdev, crypto_info); -+ -+ crypto_info->variant = of_device_get_match_data(&pdev->dev); -+ if (!crypto_info->variant) { -+ dev_err(&pdev->dev, "Missing variant\n"); -+ return -EINVAL; -+ } -+ -+ crypto_info->rst = devm_reset_control_array_get_exclusive(dev); - if (IS_ERR(crypto_info->rst)) { - err = PTR_ERR(crypto_info->rst); - goto err_crypto; -@@ -333,46 +336,19 @@ static int rk_crypto_probe(struct platfo - usleep_range(10, 20); - reset_control_deassert(crypto_info->rst); - -- err = devm_add_action_or_reset(dev, rk_crypto_action, crypto_info); -- if (err) -- goto err_crypto; -- -- spin_lock_init(&crypto_info->lock); -- - crypto_info->reg = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(crypto_info->reg)) { - err = PTR_ERR(crypto_info->reg); - goto err_crypto; - } - -- crypto_info->aclk = devm_clk_get(&pdev->dev, "aclk"); -- if (IS_ERR(crypto_info->aclk)) { -- err = PTR_ERR(crypto_info->aclk); -- goto err_crypto; -- } -- -- crypto_info->hclk = devm_clk_get(&pdev->dev, "hclk"); -- if (IS_ERR(crypto_info->hclk)) { -- err = PTR_ERR(crypto_info->hclk); -- goto err_crypto; -- } -- -- crypto_info->sclk = devm_clk_get(&pdev->dev, "sclk"); -- if (IS_ERR(crypto_info->sclk)) { -- err = PTR_ERR(crypto_info->sclk); -- goto err_crypto; -- } -- -- crypto_info->dmaclk = devm_clk_get(&pdev->dev, "apb_pclk"); -- if (IS_ERR(crypto_info->dmaclk)) { -- err = PTR_ERR(crypto_info->dmaclk); -+ err = rk_crypto_get_clks(crypto_info); -+ if (err) - goto err_crypto; -- } - - crypto_info->irq = platform_get_irq(pdev, 0); - if (crypto_info->irq < 0) { -- dev_warn(crypto_info->dev, -- "control Interrupt is not available.\n"); -+ dev_err(&pdev->dev, "control Interrupt is not available.\n"); - err = crypto_info->irq; - goto err_crypto; - } -@@ -382,49 +358,64 @@ static int rk_crypto_probe(struct platfo - "rk-crypto", pdev); - - if (err) { -- dev_err(crypto_info->dev, "irq request failed.\n"); -+ dev_err(&pdev->dev, "irq request failed.\n"); - goto err_crypto; - } - -- crypto_info->dev = &pdev->dev; -- platform_set_drvdata(pdev, crypto_info); -+ crypto_info->engine = crypto_engine_alloc_init(&pdev->dev, true); -+ crypto_engine_start(crypto_info->engine); -+ init_completion(&crypto_info->complete); - -- tasklet_init(&crypto_info->queue_task, -- rk_crypto_queue_task_cb, (unsigned long)crypto_info); -- tasklet_init(&crypto_info->done_task, -- rk_crypto_done_task_cb, (unsigned long)crypto_info); -- crypto_init_queue(&crypto_info->queue, 50); -- -- crypto_info->enable_clk = rk_crypto_enable_clk; -- crypto_info->disable_clk = rk_crypto_disable_clk; -- crypto_info->load_data = rk_load_data; -- crypto_info->unload_data = rk_unload_data; -- crypto_info->enqueue = rk_crypto_enqueue; -- crypto_info->busy = false; -+ err = rk_crypto_pm_init(crypto_info); -+ if (err) -+ goto err_pm; - -- err = rk_crypto_register(crypto_info); -- if (err) { -- dev_err(dev, "err in register alg"); -- goto err_register_alg; -+ spin_lock(&rocklist.lock); -+ first = list_first_entry_or_null(&rocklist.dev_list, -+ struct rk_crypto_info, list); -+ list_add_tail(&crypto_info->list, &rocklist.dev_list); -+ spin_unlock(&rocklist.lock); -+ -+ if (!first) { -+ err = rk_crypto_register(crypto_info); -+ if (err) { -+ dev_err(dev, "Fail to register crypto algorithms"); -+ goto err_register_alg; -+ } -+ -+ register_debugfs(crypto_info); - } - -- dev_info(dev, "Crypto Accelerator successfully registered\n"); - return 0; - - err_register_alg: -- tasklet_kill(&crypto_info->queue_task); -- tasklet_kill(&crypto_info->done_task); -+ rk_crypto_pm_exit(crypto_info); -+err_pm: -+ crypto_engine_exit(crypto_info->engine); - err_crypto: -+ dev_err(dev, "Crypto Accelerator not successfully registered\n"); - return err; - } - - static int rk_crypto_remove(struct platform_device *pdev) - { - struct rk_crypto_info *crypto_tmp = platform_get_drvdata(pdev); -+ struct rk_crypto_info *first; - -- rk_crypto_unregister(); -- tasklet_kill(&crypto_tmp->done_task); -- tasklet_kill(&crypto_tmp->queue_task); -+ spin_lock_bh(&rocklist.lock); -+ list_del(&crypto_tmp->list); -+ first = list_first_entry_or_null(&rocklist.dev_list, -+ struct rk_crypto_info, list); -+ spin_unlock_bh(&rocklist.lock); -+ -+ if (!first) { -+#ifdef CONFIG_CRYPTO_DEV_ROCKCHIP_DEBUG -+ debugfs_remove_recursive(rocklist.dbgfs_dir); -+#endif -+ rk_crypto_unregister(); -+ } -+ rk_crypto_pm_exit(crypto_tmp); -+ crypto_engine_exit(crypto_tmp->engine); - return 0; - } - -@@ -433,6 +424,7 @@ static struct platform_driver crypto_dri - .remove = rk_crypto_remove, - .driver = { - .name = "rk3288-crypto", -+ .pm = &rk_crypto_pm_ops, - .of_match_table = crypto_of_id_table, - }, - }; ---- a/drivers/crypto/rockchip/rk3288_crypto.h -+++ b/drivers/crypto/rockchip/rk3288_crypto.h -@@ -5,9 +5,13 @@ - #include - #include - #include -+#include - #include -+#include - #include -+#include - #include -+#include - #include - #include - -@@ -184,85 +188,91 @@ - #define CRYPTO_WRITE(dev, offset, val) \ - writel_relaxed((val), ((dev)->reg + (offset))) - -+#define RK_MAX_CLKS 4 -+ -+/* -+ * struct rockchip_ip - struct for managing a list of RK crypto instance -+ * @dev_list: Used for doing a list of rk_crypto_info -+ * @lock: Control access to dev_list -+ * @dbgfs_dir: Debugfs dentry for statistic directory -+ * @dbgfs_stats: Debugfs dentry for statistic counters -+ */ -+struct rockchip_ip { -+ struct list_head dev_list; -+ spinlock_t lock; /* Control access to dev_list */ -+ struct dentry *dbgfs_dir; -+ struct dentry *dbgfs_stats; -+}; -+ -+struct rk_clks { -+ const char *name; -+ unsigned long max; -+}; -+ -+struct rk_variant { -+ int num_clks; -+ struct rk_clks rkclks[RK_MAX_CLKS]; -+}; -+ - struct rk_crypto_info { -+ struct list_head list; - struct device *dev; -- struct clk *aclk; -- struct clk *hclk; -- struct clk *sclk; -- struct clk *dmaclk; -+ struct clk_bulk_data *clks; -+ int num_clks; - struct reset_control *rst; - void __iomem *reg; - int irq; -- struct crypto_queue queue; -- struct tasklet_struct queue_task; -- struct tasklet_struct done_task; -- struct crypto_async_request *async_req; -- int err; -- /* device lock */ -- spinlock_t lock; -- -- /* the public variable */ -- struct scatterlist *sg_src; -- struct scatterlist *sg_dst; -- struct scatterlist sg_tmp; -- struct scatterlist *first; -- unsigned int left_bytes; -- void *addr_vir; -- int aligned; -- int align_size; -- size_t src_nents; -- size_t dst_nents; -- unsigned int total; -- unsigned int count; -- dma_addr_t addr_in; -- dma_addr_t addr_out; -- bool busy; -- int (*start)(struct rk_crypto_info *dev); -- int (*update)(struct rk_crypto_info *dev); -- void (*complete)(struct crypto_async_request *base, int err); -- int (*enable_clk)(struct rk_crypto_info *dev); -- void (*disable_clk)(struct rk_crypto_info *dev); -- int (*load_data)(struct rk_crypto_info *dev, -- struct scatterlist *sg_src, -- struct scatterlist *sg_dst); -- void (*unload_data)(struct rk_crypto_info *dev); -- int (*enqueue)(struct rk_crypto_info *dev, -- struct crypto_async_request *async_req); -+ const struct rk_variant *variant; -+ unsigned long nreq; -+ struct crypto_engine *engine; -+ struct completion complete; -+ int status; - }; - - /* the private variable of hash */ - struct rk_ahash_ctx { -- struct rk_crypto_info *dev; -+ struct crypto_engine_ctx enginectx; - /* for fallback */ - struct crypto_ahash *fallback_tfm; - }; - --/* the privete variable of hash for fallback */ -+/* the private variable of hash for fallback */ - struct rk_ahash_rctx { -+ struct rk_crypto_info *dev; - struct ahash_request fallback_req; - u32 mode; -+ int nrsg; - }; - - /* the private variable of cipher */ - struct rk_cipher_ctx { -- struct rk_crypto_info *dev; -+ struct crypto_engine_ctx enginectx; - unsigned int keylen; -- u32 mode; -+ u8 key[AES_MAX_KEY_SIZE]; - u8 iv[AES_BLOCK_SIZE]; -+ struct crypto_skcipher *fallback_tfm; - }; - --enum alg_type { -- ALG_TYPE_HASH, -- ALG_TYPE_CIPHER, -+struct rk_cipher_rctx { -+ struct rk_crypto_info *dev; -+ u8 backup_iv[AES_BLOCK_SIZE]; -+ u32 mode; -+ struct skcipher_request fallback_req; // keep at the end - }; - - struct rk_crypto_tmp { -- struct rk_crypto_info *dev; -+ u32 type; -+ struct rk_crypto_info *dev; - union { - struct skcipher_alg skcipher; - struct ahash_alg hash; - } alg; -- enum alg_type type; -+ unsigned long stat_req; -+ unsigned long stat_fb; -+ unsigned long stat_fb_len; -+ unsigned long stat_fb_sglen; -+ unsigned long stat_fb_align; -+ unsigned long stat_fb_sgdiff; - }; - - extern struct rk_crypto_tmp rk_ecb_aes_alg; -@@ -276,4 +286,5 @@ extern struct rk_crypto_tmp rk_ahash_sha - extern struct rk_crypto_tmp rk_ahash_sha256; - extern struct rk_crypto_tmp rk_ahash_md5; - -+struct rk_crypto_info *get_rk_crypto(void); - #endif ---- a/drivers/crypto/rockchip/rk3288_crypto_ahash.c -+++ b/drivers/crypto/rockchip/rk3288_crypto_ahash.c -@@ -9,6 +9,8 @@ - * Some ideas are from marvell/cesa.c and s5p-sss.c driver. - */ - #include -+#include -+#include - #include "rk3288_crypto.h" - - /* -@@ -16,6 +18,44 @@ - * so we put the fixed hash out when met zero message. - */ - -+static bool rk_ahash_need_fallback(struct ahash_request *req) -+{ -+ struct scatterlist *sg; -+ -+ sg = req->src; -+ while (sg) { -+ if (!IS_ALIGNED(sg->offset, sizeof(u32))) { -+ return true; -+ } -+ if (sg->length % 4) { -+ return true; -+ } -+ sg = sg_next(sg); -+ } -+ return false; -+} -+ -+static int rk_ahash_digest_fb(struct ahash_request *areq) -+{ -+ struct rk_ahash_rctx *rctx = ahash_request_ctx(areq); -+ struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq); -+ struct rk_ahash_ctx *tfmctx = crypto_ahash_ctx(tfm); -+ struct ahash_alg *alg = __crypto_ahash_alg(tfm->base.__crt_alg); -+ struct rk_crypto_tmp *algt = container_of(alg, struct rk_crypto_tmp, alg.hash); -+ -+ algt->stat_fb++; -+ -+ ahash_request_set_tfm(&rctx->fallback_req, tfmctx->fallback_tfm); -+ rctx->fallback_req.base.flags = areq->base.flags & -+ CRYPTO_TFM_REQ_MAY_SLEEP; -+ -+ rctx->fallback_req.nbytes = areq->nbytes; -+ rctx->fallback_req.src = areq->src; -+ rctx->fallback_req.result = areq->result; -+ -+ return crypto_ahash_digest(&rctx->fallback_req); -+} -+ - static int zero_message_process(struct ahash_request *req) - { - struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); -@@ -38,15 +78,9 @@ static int zero_message_process(struct a - return 0; - } - --static void rk_ahash_crypto_complete(struct crypto_async_request *base, int err) --{ -- if (base->complete) -- base->complete(base, err); --} -- --static void rk_ahash_reg_init(struct rk_crypto_info *dev) -+static void rk_ahash_reg_init(struct ahash_request *req, -+ struct rk_crypto_info *dev) - { -- struct ahash_request *req = ahash_request_cast(dev->async_req); - struct rk_ahash_rctx *rctx = ahash_request_ctx(req); - int reg_status; - -@@ -74,7 +108,7 @@ static void rk_ahash_reg_init(struct rk_ - RK_CRYPTO_BYTESWAP_BRFIFO | - RK_CRYPTO_BYTESWAP_BTFIFO); - -- CRYPTO_WRITE(dev, RK_CRYPTO_HASH_MSG_LEN, dev->total); -+ CRYPTO_WRITE(dev, RK_CRYPTO_HASH_MSG_LEN, req->nbytes); - } - - static int rk_ahash_init(struct ahash_request *req) -@@ -164,51 +198,80 @@ static int rk_ahash_export(struct ahash_ - - static int rk_ahash_digest(struct ahash_request *req) - { -- struct rk_ahash_ctx *tctx = crypto_tfm_ctx(req->base.tfm); -- struct rk_crypto_info *dev = tctx->dev; -+ struct rk_ahash_rctx *rctx = ahash_request_ctx(req); -+ struct rk_crypto_info *dev; -+ struct crypto_engine *engine; -+ -+ if (rk_ahash_need_fallback(req)) -+ return rk_ahash_digest_fb(req); - - if (!req->nbytes) - return zero_message_process(req); -- else -- return dev->enqueue(dev, &req->base); -+ -+ dev = get_rk_crypto(); -+ -+ rctx->dev = dev; -+ engine = dev->engine; -+ -+ return crypto_transfer_hash_request_to_engine(engine, req); - } - --static void crypto_ahash_dma_start(struct rk_crypto_info *dev) -+static void crypto_ahash_dma_start(struct rk_crypto_info *dev, struct scatterlist *sg) - { -- CRYPTO_WRITE(dev, RK_CRYPTO_HRDMAS, dev->addr_in); -- CRYPTO_WRITE(dev, RK_CRYPTO_HRDMAL, (dev->count + 3) / 4); -+ CRYPTO_WRITE(dev, RK_CRYPTO_HRDMAS, sg_dma_address(sg)); -+ CRYPTO_WRITE(dev, RK_CRYPTO_HRDMAL, sg_dma_len(sg) / 4); - CRYPTO_WRITE(dev, RK_CRYPTO_CTRL, RK_CRYPTO_HASH_START | - (RK_CRYPTO_HASH_START << 16)); - } - --static int rk_ahash_set_data_start(struct rk_crypto_info *dev) -+static int rk_hash_prepare(struct crypto_engine *engine, void *breq) -+{ -+ struct ahash_request *areq = container_of(breq, struct ahash_request, base); -+ struct rk_ahash_rctx *rctx = ahash_request_ctx(areq); -+ struct rk_crypto_info *rkc = rctx->dev; -+ int ret; -+ -+ ret = dma_map_sg(rkc->dev, areq->src, sg_nents(areq->src), DMA_TO_DEVICE); -+ if (ret <= 0) -+ return -EINVAL; -+ -+ rctx->nrsg = ret; -+ -+ return 0; -+} -+ -+static int rk_hash_unprepare(struct crypto_engine *engine, void *breq) -+{ -+ struct ahash_request *areq = container_of(breq, struct ahash_request, base); -+ struct rk_ahash_rctx *rctx = ahash_request_ctx(areq); -+ struct rk_crypto_info *rkc = rctx->dev; -+ -+ dma_unmap_sg(rkc->dev, areq->src, rctx->nrsg, DMA_TO_DEVICE); -+ return 0; -+} -+ -+static int rk_hash_run(struct crypto_engine *engine, void *breq) - { -- int err; -+ struct ahash_request *areq = container_of(breq, struct ahash_request, base); -+ struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq); -+ struct rk_ahash_rctx *rctx = ahash_request_ctx(areq); -+ struct ahash_alg *alg = __crypto_ahash_alg(tfm->base.__crt_alg); -+ struct rk_crypto_tmp *algt = container_of(alg, struct rk_crypto_tmp, alg.hash); -+ struct scatterlist *sg = areq->src; -+ struct rk_crypto_info *rkc = rctx->dev; -+ int err = 0; -+ int i; -+ u32 v; -+ -+ err = pm_runtime_resume_and_get(rkc->dev); -+ if (err) -+ return err; - -- err = dev->load_data(dev, dev->sg_src, NULL); -- if (!err) -- crypto_ahash_dma_start(dev); -- return err; --} -- --static int rk_ahash_start(struct rk_crypto_info *dev) --{ -- struct ahash_request *req = ahash_request_cast(dev->async_req); -- struct crypto_ahash *tfm; -- struct rk_ahash_rctx *rctx; -- -- dev->total = req->nbytes; -- dev->left_bytes = req->nbytes; -- dev->aligned = 0; -- dev->align_size = 4; -- dev->sg_dst = NULL; -- dev->sg_src = req->src; -- dev->first = req->src; -- dev->src_nents = sg_nents(req->src); -- rctx = ahash_request_ctx(req); - rctx->mode = 0; - -- tfm = crypto_ahash_reqtfm(req); -+ algt->stat_req++; -+ rkc->nreq++; -+ - switch (crypto_ahash_digestsize(tfm)) { - case SHA1_DIGEST_SIZE: - rctx->mode = RK_CRYPTO_HASH_SHA1; -@@ -220,100 +283,88 @@ static int rk_ahash_start(struct rk_cryp - rctx->mode = RK_CRYPTO_HASH_MD5; - break; - default: -- return -EINVAL; -+ err = -EINVAL; -+ goto theend; - } - -- rk_ahash_reg_init(dev); -- return rk_ahash_set_data_start(dev); --} -- --static int rk_ahash_crypto_rx(struct rk_crypto_info *dev) --{ -- int err = 0; -- struct ahash_request *req = ahash_request_cast(dev->async_req); -- struct crypto_ahash *tfm; -+ rk_ahash_reg_init(areq, rkc); - -- dev->unload_data(dev); -- if (dev->left_bytes) { -- if (dev->aligned) { -- if (sg_is_last(dev->sg_src)) { -- dev_warn(dev->dev, "[%s:%d], Lack of data\n", -- __func__, __LINE__); -- err = -ENOMEM; -- goto out_rx; -- } -- dev->sg_src = sg_next(dev->sg_src); -+ while (sg) { -+ reinit_completion(&rkc->complete); -+ rkc->status = 0; -+ crypto_ahash_dma_start(rkc, sg); -+ wait_for_completion_interruptible_timeout(&rkc->complete, -+ msecs_to_jiffies(2000)); -+ if (!rkc->status) { -+ dev_err(rkc->dev, "DMA timeout\n"); -+ err = -EFAULT; -+ goto theend; - } -- err = rk_ahash_set_data_start(dev); -- } else { -- /* -- * it will take some time to process date after last dma -- * transmission. -- * -- * waiting time is relative with the last date len, -- * so cannot set a fixed time here. -- * 10us makes system not call here frequently wasting -- * efficiency, and make it response quickly when dma -- * complete. -- */ -- while (!CRYPTO_READ(dev, RK_CRYPTO_HASH_STS)) -- udelay(10); -- -- tfm = crypto_ahash_reqtfm(req); -- memcpy_fromio(req->result, dev->reg + RK_CRYPTO_HASH_DOUT_0, -- crypto_ahash_digestsize(tfm)); -- dev->complete(dev->async_req, 0); -- tasklet_schedule(&dev->queue_task); -+ sg = sg_next(sg); -+ } -+ -+ /* -+ * it will take some time to process date after last dma -+ * transmission. -+ * -+ * waiting time is relative with the last date len, -+ * so cannot set a fixed time here. -+ * 10us makes system not call here frequently wasting -+ * efficiency, and make it response quickly when dma -+ * complete. -+ */ -+ readl_poll_timeout(rkc->reg + RK_CRYPTO_HASH_STS, v, v == 0, 10, 1000); -+ -+ for (i = 0; i < crypto_ahash_digestsize(tfm) / 4; i++) { -+ v = readl(rkc->reg + RK_CRYPTO_HASH_DOUT_0 + i * 4); -+ put_unaligned_le32(v, areq->result + i * 4); - } - --out_rx: -- return err; -+theend: -+ pm_runtime_put_autosuspend(rkc->dev); -+ -+ local_bh_disable(); -+ crypto_finalize_hash_request(engine, breq, err); -+ local_bh_enable(); -+ -+ return 0; - } - - static int rk_cra_hash_init(struct crypto_tfm *tfm) - { - struct rk_ahash_ctx *tctx = crypto_tfm_ctx(tfm); -- struct rk_crypto_tmp *algt; -- struct ahash_alg *alg = __crypto_ahash_alg(tfm->__crt_alg); -- - const char *alg_name = crypto_tfm_alg_name(tfm); -- -- algt = container_of(alg, struct rk_crypto_tmp, alg.hash); -- -- tctx->dev = algt->dev; -- tctx->dev->addr_vir = (void *)__get_free_page(GFP_KERNEL); -- if (!tctx->dev->addr_vir) { -- dev_err(tctx->dev->dev, "failed to kmalloc for addr_vir\n"); -- return -ENOMEM; -- } -- tctx->dev->start = rk_ahash_start; -- tctx->dev->update = rk_ahash_crypto_rx; -- tctx->dev->complete = rk_ahash_crypto_complete; -+ struct ahash_alg *alg = __crypto_ahash_alg(tfm->__crt_alg); -+ struct rk_crypto_tmp *algt = container_of(alg, struct rk_crypto_tmp, alg.hash); - - /* for fallback */ - tctx->fallback_tfm = crypto_alloc_ahash(alg_name, 0, -- CRYPTO_ALG_NEED_FALLBACK); -+ CRYPTO_ALG_NEED_FALLBACK); - if (IS_ERR(tctx->fallback_tfm)) { -- dev_err(tctx->dev->dev, "Could not load fallback driver.\n"); -+ dev_err(algt->dev->dev, "Could not load fallback driver.\n"); - return PTR_ERR(tctx->fallback_tfm); - } -+ - crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm), - sizeof(struct rk_ahash_rctx) + - crypto_ahash_reqsize(tctx->fallback_tfm)); - -- return tctx->dev->enable_clk(tctx->dev); -+ tctx->enginectx.op.do_one_request = rk_hash_run; -+ tctx->enginectx.op.prepare_request = rk_hash_prepare; -+ tctx->enginectx.op.unprepare_request = rk_hash_unprepare; -+ -+ return 0; - } - - static void rk_cra_hash_exit(struct crypto_tfm *tfm) - { - struct rk_ahash_ctx *tctx = crypto_tfm_ctx(tfm); - -- free_page((unsigned long)tctx->dev->addr_vir); -- return tctx->dev->disable_clk(tctx->dev); -+ crypto_free_ahash(tctx->fallback_tfm); - } - - struct rk_crypto_tmp rk_ahash_sha1 = { -- .type = ALG_TYPE_HASH, -+ .type = CRYPTO_ALG_TYPE_AHASH, - .alg.hash = { - .init = rk_ahash_init, - .update = rk_ahash_update, -@@ -337,13 +388,13 @@ struct rk_crypto_tmp rk_ahash_sha1 = { - .cra_init = rk_cra_hash_init, - .cra_exit = rk_cra_hash_exit, - .cra_module = THIS_MODULE, -- } -- } -+ } -+ } - } - }; - - struct rk_crypto_tmp rk_ahash_sha256 = { -- .type = ALG_TYPE_HASH, -+ .type = CRYPTO_ALG_TYPE_AHASH, - .alg.hash = { - .init = rk_ahash_init, - .update = rk_ahash_update, -@@ -367,13 +418,13 @@ struct rk_crypto_tmp rk_ahash_sha256 = { - .cra_init = rk_cra_hash_init, - .cra_exit = rk_cra_hash_exit, - .cra_module = THIS_MODULE, -- } -- } -+ } -+ } - } - }; - - struct rk_crypto_tmp rk_ahash_md5 = { -- .type = ALG_TYPE_HASH, -+ .type = CRYPTO_ALG_TYPE_AHASH, - .alg.hash = { - .init = rk_ahash_init, - .update = rk_ahash_update, -@@ -397,7 +448,7 @@ struct rk_crypto_tmp rk_ahash_md5 = { - .cra_init = rk_cra_hash_init, - .cra_exit = rk_cra_hash_exit, - .cra_module = THIS_MODULE, -- } - } -+ } - } - }; ---- a/drivers/crypto/rockchip/rk3288_crypto_skcipher.c -+++ b/drivers/crypto/rockchip/rk3288_crypto_skcipher.c -@@ -9,23 +9,94 @@ - * Some ideas are from marvell-cesa.c and s5p-sss.c driver. - */ - #include -+#include - #include "rk3288_crypto.h" - - #define RK_CRYPTO_DEC BIT(0) - --static void rk_crypto_complete(struct crypto_async_request *base, int err) -+static int rk_cipher_need_fallback(struct skcipher_request *req) - { -- if (base->complete) -- base->complete(base, err); -+ struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req); -+ struct skcipher_alg *alg = crypto_skcipher_alg(tfm); -+ struct rk_crypto_tmp *algt = container_of(alg, struct rk_crypto_tmp, alg.skcipher); -+ struct scatterlist *sgs, *sgd; -+ unsigned int stodo, dtodo, len; -+ unsigned int bs = crypto_skcipher_blocksize(tfm); -+ -+ if (!req->cryptlen) -+ return true; -+ -+ len = req->cryptlen; -+ sgs = req->src; -+ sgd = req->dst; -+ while (sgs && sgd) { -+ if (!IS_ALIGNED(sgs->offset, sizeof(u32))) { -+ algt->stat_fb_align++; -+ return true; -+ } -+ if (!IS_ALIGNED(sgd->offset, sizeof(u32))) { -+ algt->stat_fb_align++; -+ return true; -+ } -+ stodo = min(len, sgs->length); -+ if (stodo % bs) { -+ algt->stat_fb_len++; -+ return true; -+ } -+ dtodo = min(len, sgd->length); -+ if (dtodo % bs) { -+ algt->stat_fb_len++; -+ return true; -+ } -+ if (stodo != dtodo) { -+ algt->stat_fb_sgdiff++; -+ return true; -+ } -+ len -= stodo; -+ sgs = sg_next(sgs); -+ sgd = sg_next(sgd); -+ } -+ return false; - } - --static int rk_handle_req(struct rk_crypto_info *dev, -- struct skcipher_request *req) -+static int rk_cipher_fallback(struct skcipher_request *areq) - { -- if (!IS_ALIGNED(req->cryptlen, dev->align_size)) -- return -EINVAL; -+ struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq); -+ struct rk_cipher_ctx *op = crypto_skcipher_ctx(tfm); -+ struct rk_cipher_rctx *rctx = skcipher_request_ctx(areq); -+ struct skcipher_alg *alg = crypto_skcipher_alg(tfm); -+ struct rk_crypto_tmp *algt = container_of(alg, struct rk_crypto_tmp, alg.skcipher); -+ int err; -+ -+ algt->stat_fb++; -+ -+ skcipher_request_set_tfm(&rctx->fallback_req, op->fallback_tfm); -+ skcipher_request_set_callback(&rctx->fallback_req, areq->base.flags, -+ areq->base.complete, areq->base.data); -+ skcipher_request_set_crypt(&rctx->fallback_req, areq->src, areq->dst, -+ areq->cryptlen, areq->iv); -+ if (rctx->mode & RK_CRYPTO_DEC) -+ err = crypto_skcipher_decrypt(&rctx->fallback_req); - else -- return dev->enqueue(dev, &req->base); -+ err = crypto_skcipher_encrypt(&rctx->fallback_req); -+ return err; -+} -+ -+static int rk_cipher_handle_req(struct skcipher_request *req) -+{ -+ struct rk_cipher_rctx *rctx = skcipher_request_ctx(req); -+ struct rk_crypto_info *rkc; -+ struct crypto_engine *engine; -+ -+ if (rk_cipher_need_fallback(req)) -+ return rk_cipher_fallback(req); -+ -+ rkc = get_rk_crypto(); -+ -+ engine = rkc->engine; -+ rctx->dev = rkc; -+ -+ return crypto_transfer_skcipher_request_to_engine(engine, req); - } - - static int rk_aes_setkey(struct crypto_skcipher *cipher, -@@ -38,8 +109,9 @@ static int rk_aes_setkey(struct crypto_s - keylen != AES_KEYSIZE_256) - return -EINVAL; - ctx->keylen = keylen; -- memcpy_toio(ctx->dev->reg + RK_CRYPTO_AES_KEY_0, key, keylen); -- return 0; -+ memcpy(ctx->key, key, keylen); -+ -+ return crypto_skcipher_setkey(ctx->fallback_tfm, key, keylen); - } - - static int rk_des_setkey(struct crypto_skcipher *cipher, -@@ -53,8 +125,9 @@ static int rk_des_setkey(struct crypto_s - return err; - - ctx->keylen = keylen; -- memcpy_toio(ctx->dev->reg + RK_CRYPTO_TDES_KEY1_0, key, keylen); -- return 0; -+ memcpy(ctx->key, key, keylen); -+ -+ return crypto_skcipher_setkey(ctx->fallback_tfm, key, keylen); - } - - static int rk_tdes_setkey(struct crypto_skcipher *cipher, -@@ -68,161 +141,136 @@ static int rk_tdes_setkey(struct crypto_ - return err; - - ctx->keylen = keylen; -- memcpy_toio(ctx->dev->reg + RK_CRYPTO_TDES_KEY1_0, key, keylen); -- return 0; -+ memcpy(ctx->key, key, keylen); -+ -+ return crypto_skcipher_setkey(ctx->fallback_tfm, key, keylen); - } - - static int rk_aes_ecb_encrypt(struct skcipher_request *req) - { -- struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req); -- struct rk_cipher_ctx *ctx = crypto_skcipher_ctx(tfm); -- struct rk_crypto_info *dev = ctx->dev; -+ struct rk_cipher_rctx *rctx = skcipher_request_ctx(req); - -- ctx->mode = RK_CRYPTO_AES_ECB_MODE; -- return rk_handle_req(dev, req); -+ rctx->mode = RK_CRYPTO_AES_ECB_MODE; -+ return rk_cipher_handle_req(req); - } - - static int rk_aes_ecb_decrypt(struct skcipher_request *req) - { -- struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req); -- struct rk_cipher_ctx *ctx = crypto_skcipher_ctx(tfm); -- struct rk_crypto_info *dev = ctx->dev; -+ struct rk_cipher_rctx *rctx = skcipher_request_ctx(req); - -- ctx->mode = RK_CRYPTO_AES_ECB_MODE | RK_CRYPTO_DEC; -- return rk_handle_req(dev, req); -+ rctx->mode = RK_CRYPTO_AES_ECB_MODE | RK_CRYPTO_DEC; -+ return rk_cipher_handle_req(req); - } - - static int rk_aes_cbc_encrypt(struct skcipher_request *req) - { -- struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req); -- struct rk_cipher_ctx *ctx = crypto_skcipher_ctx(tfm); -- struct rk_crypto_info *dev = ctx->dev; -+ struct rk_cipher_rctx *rctx = skcipher_request_ctx(req); - -- ctx->mode = RK_CRYPTO_AES_CBC_MODE; -- return rk_handle_req(dev, req); -+ rctx->mode = RK_CRYPTO_AES_CBC_MODE; -+ return rk_cipher_handle_req(req); - } - - static int rk_aes_cbc_decrypt(struct skcipher_request *req) - { -- struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req); -- struct rk_cipher_ctx *ctx = crypto_skcipher_ctx(tfm); -- struct rk_crypto_info *dev = ctx->dev; -+ struct rk_cipher_rctx *rctx = skcipher_request_ctx(req); - -- ctx->mode = RK_CRYPTO_AES_CBC_MODE | RK_CRYPTO_DEC; -- return rk_handle_req(dev, req); -+ rctx->mode = RK_CRYPTO_AES_CBC_MODE | RK_CRYPTO_DEC; -+ return rk_cipher_handle_req(req); - } - - static int rk_des_ecb_encrypt(struct skcipher_request *req) - { -- struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req); -- struct rk_cipher_ctx *ctx = crypto_skcipher_ctx(tfm); -- struct rk_crypto_info *dev = ctx->dev; -+ struct rk_cipher_rctx *rctx = skcipher_request_ctx(req); - -- ctx->mode = 0; -- return rk_handle_req(dev, req); -+ rctx->mode = 0; -+ return rk_cipher_handle_req(req); - } - - static int rk_des_ecb_decrypt(struct skcipher_request *req) - { -- struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req); -- struct rk_cipher_ctx *ctx = crypto_skcipher_ctx(tfm); -- struct rk_crypto_info *dev = ctx->dev; -+ struct rk_cipher_rctx *rctx = skcipher_request_ctx(req); - -- ctx->mode = RK_CRYPTO_DEC; -- return rk_handle_req(dev, req); -+ rctx->mode = RK_CRYPTO_DEC; -+ return rk_cipher_handle_req(req); - } - - static int rk_des_cbc_encrypt(struct skcipher_request *req) - { -- struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req); -- struct rk_cipher_ctx *ctx = crypto_skcipher_ctx(tfm); -- struct rk_crypto_info *dev = ctx->dev; -+ struct rk_cipher_rctx *rctx = skcipher_request_ctx(req); - -- ctx->mode = RK_CRYPTO_TDES_CHAINMODE_CBC; -- return rk_handle_req(dev, req); -+ rctx->mode = RK_CRYPTO_TDES_CHAINMODE_CBC; -+ return rk_cipher_handle_req(req); - } - - static int rk_des_cbc_decrypt(struct skcipher_request *req) - { -- struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req); -- struct rk_cipher_ctx *ctx = crypto_skcipher_ctx(tfm); -- struct rk_crypto_info *dev = ctx->dev; -+ struct rk_cipher_rctx *rctx = skcipher_request_ctx(req); - -- ctx->mode = RK_CRYPTO_TDES_CHAINMODE_CBC | RK_CRYPTO_DEC; -- return rk_handle_req(dev, req); -+ rctx->mode = RK_CRYPTO_TDES_CHAINMODE_CBC | RK_CRYPTO_DEC; -+ return rk_cipher_handle_req(req); - } - - static int rk_des3_ede_ecb_encrypt(struct skcipher_request *req) - { -- struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req); -- struct rk_cipher_ctx *ctx = crypto_skcipher_ctx(tfm); -- struct rk_crypto_info *dev = ctx->dev; -+ struct rk_cipher_rctx *rctx = skcipher_request_ctx(req); - -- ctx->mode = RK_CRYPTO_TDES_SELECT; -- return rk_handle_req(dev, req); -+ rctx->mode = RK_CRYPTO_TDES_SELECT; -+ return rk_cipher_handle_req(req); - } - - static int rk_des3_ede_ecb_decrypt(struct skcipher_request *req) - { -- struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req); -- struct rk_cipher_ctx *ctx = crypto_skcipher_ctx(tfm); -- struct rk_crypto_info *dev = ctx->dev; -+ struct rk_cipher_rctx *rctx = skcipher_request_ctx(req); - -- ctx->mode = RK_CRYPTO_TDES_SELECT | RK_CRYPTO_DEC; -- return rk_handle_req(dev, req); -+ rctx->mode = RK_CRYPTO_TDES_SELECT | RK_CRYPTO_DEC; -+ return rk_cipher_handle_req(req); - } - - static int rk_des3_ede_cbc_encrypt(struct skcipher_request *req) - { -- struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req); -- struct rk_cipher_ctx *ctx = crypto_skcipher_ctx(tfm); -- struct rk_crypto_info *dev = ctx->dev; -+ struct rk_cipher_rctx *rctx = skcipher_request_ctx(req); - -- ctx->mode = RK_CRYPTO_TDES_SELECT | RK_CRYPTO_TDES_CHAINMODE_CBC; -- return rk_handle_req(dev, req); -+ rctx->mode = RK_CRYPTO_TDES_SELECT | RK_CRYPTO_TDES_CHAINMODE_CBC; -+ return rk_cipher_handle_req(req); - } - - static int rk_des3_ede_cbc_decrypt(struct skcipher_request *req) - { -- struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req); -- struct rk_cipher_ctx *ctx = crypto_skcipher_ctx(tfm); -- struct rk_crypto_info *dev = ctx->dev; -+ struct rk_cipher_rctx *rctx = skcipher_request_ctx(req); - -- ctx->mode = RK_CRYPTO_TDES_SELECT | RK_CRYPTO_TDES_CHAINMODE_CBC | -+ rctx->mode = RK_CRYPTO_TDES_SELECT | RK_CRYPTO_TDES_CHAINMODE_CBC | - RK_CRYPTO_DEC; -- return rk_handle_req(dev, req); -+ return rk_cipher_handle_req(req); - } - --static void rk_ablk_hw_init(struct rk_crypto_info *dev) -+static void rk_cipher_hw_init(struct rk_crypto_info *dev, struct skcipher_request *req) - { -- struct skcipher_request *req = -- skcipher_request_cast(dev->async_req); - struct crypto_skcipher *cipher = crypto_skcipher_reqtfm(req); - struct crypto_tfm *tfm = crypto_skcipher_tfm(cipher); -+ struct rk_cipher_rctx *rctx = skcipher_request_ctx(req); - struct rk_cipher_ctx *ctx = crypto_skcipher_ctx(cipher); -- u32 ivsize, block, conf_reg = 0; -+ u32 block, conf_reg = 0; - - block = crypto_tfm_alg_blocksize(tfm); -- ivsize = crypto_skcipher_ivsize(cipher); - - if (block == DES_BLOCK_SIZE) { -- ctx->mode |= RK_CRYPTO_TDES_FIFO_MODE | -+ rctx->mode |= RK_CRYPTO_TDES_FIFO_MODE | - RK_CRYPTO_TDES_BYTESWAP_KEY | - RK_CRYPTO_TDES_BYTESWAP_IV; -- CRYPTO_WRITE(dev, RK_CRYPTO_TDES_CTRL, ctx->mode); -- memcpy_toio(dev->reg + RK_CRYPTO_TDES_IV_0, req->iv, ivsize); -+ CRYPTO_WRITE(dev, RK_CRYPTO_TDES_CTRL, rctx->mode); -+ memcpy_toio(dev->reg + RK_CRYPTO_TDES_KEY1_0, ctx->key, ctx->keylen); - conf_reg = RK_CRYPTO_DESSEL; - } else { -- ctx->mode |= RK_CRYPTO_AES_FIFO_MODE | -+ rctx->mode |= RK_CRYPTO_AES_FIFO_MODE | - RK_CRYPTO_AES_KEY_CHANGE | - RK_CRYPTO_AES_BYTESWAP_KEY | - RK_CRYPTO_AES_BYTESWAP_IV; - if (ctx->keylen == AES_KEYSIZE_192) -- ctx->mode |= RK_CRYPTO_AES_192BIT_key; -+ rctx->mode |= RK_CRYPTO_AES_192BIT_key; - else if (ctx->keylen == AES_KEYSIZE_256) -- ctx->mode |= RK_CRYPTO_AES_256BIT_key; -- CRYPTO_WRITE(dev, RK_CRYPTO_AES_CTRL, ctx->mode); -- memcpy_toio(dev->reg + RK_CRYPTO_AES_IV_0, req->iv, ivsize); -+ rctx->mode |= RK_CRYPTO_AES_256BIT_key; -+ CRYPTO_WRITE(dev, RK_CRYPTO_AES_CTRL, rctx->mode); -+ memcpy_toio(dev->reg + RK_CRYPTO_AES_KEY_0, ctx->key, ctx->keylen); - } - conf_reg |= RK_CRYPTO_BYTESWAP_BTFIFO | - RK_CRYPTO_BYTESWAP_BRFIFO; -@@ -231,189 +279,196 @@ static void rk_ablk_hw_init(struct rk_cr - RK_CRYPTO_BCDMA_ERR_ENA | RK_CRYPTO_BCDMA_DONE_ENA); - } - --static void crypto_dma_start(struct rk_crypto_info *dev) --{ -- CRYPTO_WRITE(dev, RK_CRYPTO_BRDMAS, dev->addr_in); -- CRYPTO_WRITE(dev, RK_CRYPTO_BRDMAL, dev->count / 4); -- CRYPTO_WRITE(dev, RK_CRYPTO_BTDMAS, dev->addr_out); -+static void crypto_dma_start(struct rk_crypto_info *dev, -+ struct scatterlist *sgs, -+ struct scatterlist *sgd, unsigned int todo) -+{ -+ CRYPTO_WRITE(dev, RK_CRYPTO_BRDMAS, sg_dma_address(sgs)); -+ CRYPTO_WRITE(dev, RK_CRYPTO_BRDMAL, todo); -+ CRYPTO_WRITE(dev, RK_CRYPTO_BTDMAS, sg_dma_address(sgd)); - CRYPTO_WRITE(dev, RK_CRYPTO_CTRL, RK_CRYPTO_BLOCK_START | - _SBF(RK_CRYPTO_BLOCK_START, 16)); - } - --static int rk_set_data_start(struct rk_crypto_info *dev) -+static int rk_cipher_run(struct crypto_engine *engine, void *async_req) - { -- int err; -- struct skcipher_request *req = -- skcipher_request_cast(dev->async_req); -- struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req); -- struct rk_cipher_ctx *ctx = crypto_skcipher_ctx(tfm); -- u32 ivsize = crypto_skcipher_ivsize(tfm); -- u8 *src_last_blk = page_address(sg_page(dev->sg_src)) + -- dev->sg_src->offset + dev->sg_src->length - ivsize; -- -- /* Store the iv that need to be updated in chain mode. -- * And update the IV buffer to contain the next IV for decryption mode. -- */ -- if (ctx->mode & RK_CRYPTO_DEC) { -- memcpy(ctx->iv, src_last_blk, ivsize); -- sg_pcopy_to_buffer(dev->first, dev->src_nents, req->iv, -- ivsize, dev->total - ivsize); -- } -- -- err = dev->load_data(dev, dev->sg_src, dev->sg_dst); -- if (!err) -- crypto_dma_start(dev); -- return err; --} -- --static int rk_ablk_start(struct rk_crypto_info *dev) --{ -- struct skcipher_request *req = -- skcipher_request_cast(dev->async_req); -- unsigned long flags; -+ struct skcipher_request *areq = container_of(async_req, struct skcipher_request, base); -+ struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq); -+ struct rk_cipher_rctx *rctx = skcipher_request_ctx(areq); -+ struct scatterlist *sgs, *sgd; - int err = 0; -+ int ivsize = crypto_skcipher_ivsize(tfm); -+ int offset; -+ u8 iv[AES_BLOCK_SIZE]; -+ u8 biv[AES_BLOCK_SIZE]; -+ u8 *ivtouse = areq->iv; -+ unsigned int len = areq->cryptlen; -+ unsigned int todo; -+ struct skcipher_alg *alg = crypto_skcipher_alg(tfm); -+ struct rk_crypto_tmp *algt = container_of(alg, struct rk_crypto_tmp, alg.skcipher); -+ struct rk_crypto_info *rkc = rctx->dev; - -- dev->left_bytes = req->cryptlen; -- dev->total = req->cryptlen; -- dev->sg_src = req->src; -- dev->first = req->src; -- dev->src_nents = sg_nents(req->src); -- dev->sg_dst = req->dst; -- dev->dst_nents = sg_nents(req->dst); -- dev->aligned = 1; -- -- spin_lock_irqsave(&dev->lock, flags); -- rk_ablk_hw_init(dev); -- err = rk_set_data_start(dev); -- spin_unlock_irqrestore(&dev->lock, flags); -- return err; --} -+ err = pm_runtime_resume_and_get(rkc->dev); -+ if (err) -+ return err; - --static void rk_iv_copyback(struct rk_crypto_info *dev) --{ -- struct skcipher_request *req = -- skcipher_request_cast(dev->async_req); -- struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req); -- struct rk_cipher_ctx *ctx = crypto_skcipher_ctx(tfm); -- u32 ivsize = crypto_skcipher_ivsize(tfm); -+ algt->stat_req++; -+ rkc->nreq++; - -- /* Update the IV buffer to contain the next IV for encryption mode. */ -- if (!(ctx->mode & RK_CRYPTO_DEC)) { -- if (dev->aligned) { -- memcpy(req->iv, sg_virt(dev->sg_dst) + -- dev->sg_dst->length - ivsize, ivsize); -- } else { -- memcpy(req->iv, dev->addr_vir + -- dev->count - ivsize, ivsize); -+ ivsize = crypto_skcipher_ivsize(tfm); -+ if (areq->iv && crypto_skcipher_ivsize(tfm) > 0) { -+ if (rctx->mode & RK_CRYPTO_DEC) { -+ offset = areq->cryptlen - ivsize; -+ scatterwalk_map_and_copy(rctx->backup_iv, areq->src, -+ offset, ivsize, 0); - } - } --} - --static void rk_update_iv(struct rk_crypto_info *dev) --{ -- struct skcipher_request *req = -- skcipher_request_cast(dev->async_req); -- struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req); -- struct rk_cipher_ctx *ctx = crypto_skcipher_ctx(tfm); -- u32 ivsize = crypto_skcipher_ivsize(tfm); -- u8 *new_iv = NULL; -+ sgs = areq->src; -+ sgd = areq->dst; - -- if (ctx->mode & RK_CRYPTO_DEC) { -- new_iv = ctx->iv; -- } else { -- new_iv = page_address(sg_page(dev->sg_dst)) + -- dev->sg_dst->offset + dev->sg_dst->length - ivsize; -+ while (sgs && sgd && len) { -+ if (!sgs->length) { -+ sgs = sg_next(sgs); -+ sgd = sg_next(sgd); -+ continue; -+ } -+ if (rctx->mode & RK_CRYPTO_DEC) { -+ /* we backup last block of source to be used as IV at next step */ -+ offset = sgs->length - ivsize; -+ scatterwalk_map_and_copy(biv, sgs, offset, ivsize, 0); -+ } -+ if (sgs == sgd) { -+ err = dma_map_sg(rkc->dev, sgs, 1, DMA_BIDIRECTIONAL); -+ if (err <= 0) { -+ err = -EINVAL; -+ goto theend_iv; -+ } -+ } else { -+ err = dma_map_sg(rkc->dev, sgs, 1, DMA_TO_DEVICE); -+ if (err <= 0) { -+ err = -EINVAL; -+ goto theend_iv; -+ } -+ err = dma_map_sg(rkc->dev, sgd, 1, DMA_FROM_DEVICE); -+ if (err <= 0) { -+ err = -EINVAL; -+ goto theend_sgs; -+ } -+ } -+ err = 0; -+ rk_cipher_hw_init(rkc, areq); -+ if (ivsize) { -+ if (ivsize == DES_BLOCK_SIZE) -+ memcpy_toio(rkc->reg + RK_CRYPTO_TDES_IV_0, ivtouse, ivsize); -+ else -+ memcpy_toio(rkc->reg + RK_CRYPTO_AES_IV_0, ivtouse, ivsize); -+ } -+ reinit_completion(&rkc->complete); -+ rkc->status = 0; -+ -+ todo = min(sg_dma_len(sgs), len); -+ len -= todo; -+ crypto_dma_start(rkc, sgs, sgd, todo / 4); -+ wait_for_completion_interruptible_timeout(&rkc->complete, -+ msecs_to_jiffies(2000)); -+ if (!rkc->status) { -+ dev_err(rkc->dev, "DMA timeout\n"); -+ err = -EFAULT; -+ goto theend; -+ } -+ if (sgs == sgd) { -+ dma_unmap_sg(rkc->dev, sgs, 1, DMA_BIDIRECTIONAL); -+ } else { -+ dma_unmap_sg(rkc->dev, sgs, 1, DMA_TO_DEVICE); -+ dma_unmap_sg(rkc->dev, sgd, 1, DMA_FROM_DEVICE); -+ } -+ if (rctx->mode & RK_CRYPTO_DEC) { -+ memcpy(iv, biv, ivsize); -+ ivtouse = iv; -+ } else { -+ offset = sgd->length - ivsize; -+ scatterwalk_map_and_copy(iv, sgd, offset, ivsize, 0); -+ ivtouse = iv; -+ } -+ sgs = sg_next(sgs); -+ sgd = sg_next(sgd); - } - -- if (ivsize == DES_BLOCK_SIZE) -- memcpy_toio(dev->reg + RK_CRYPTO_TDES_IV_0, new_iv, ivsize); -- else if (ivsize == AES_BLOCK_SIZE) -- memcpy_toio(dev->reg + RK_CRYPTO_AES_IV_0, new_iv, ivsize); --} -+ if (areq->iv && ivsize > 0) { -+ offset = areq->cryptlen - ivsize; -+ if (rctx->mode & RK_CRYPTO_DEC) { -+ memcpy(areq->iv, rctx->backup_iv, ivsize); -+ memzero_explicit(rctx->backup_iv, ivsize); -+ } else { -+ scatterwalk_map_and_copy(areq->iv, areq->dst, offset, -+ ivsize, 0); -+ } -+ } - --/* return: -- * true some err was occurred -- * fault no err, continue -- */ --static int rk_ablk_rx(struct rk_crypto_info *dev) --{ -- int err = 0; -- struct skcipher_request *req = -- skcipher_request_cast(dev->async_req); -+theend: -+ pm_runtime_put_autosuspend(rkc->dev); - -- dev->unload_data(dev); -- if (!dev->aligned) { -- if (!sg_pcopy_from_buffer(req->dst, dev->dst_nents, -- dev->addr_vir, dev->count, -- dev->total - dev->left_bytes - -- dev->count)) { -- err = -EINVAL; -- goto out_rx; -- } -- } -- if (dev->left_bytes) { -- rk_update_iv(dev); -- if (dev->aligned) { -- if (sg_is_last(dev->sg_src)) { -- dev_err(dev->dev, "[%s:%d] Lack of data\n", -- __func__, __LINE__); -- err = -ENOMEM; -- goto out_rx; -- } -- dev->sg_src = sg_next(dev->sg_src); -- dev->sg_dst = sg_next(dev->sg_dst); -- } -- err = rk_set_data_start(dev); -+ local_bh_disable(); -+ crypto_finalize_skcipher_request(engine, areq, err); -+ local_bh_enable(); -+ return 0; -+ -+theend_sgs: -+ if (sgs == sgd) { -+ dma_unmap_sg(rkc->dev, sgs, 1, DMA_BIDIRECTIONAL); - } else { -- rk_iv_copyback(dev); -- /* here show the calculation is over without any err */ -- dev->complete(dev->async_req, 0); -- tasklet_schedule(&dev->queue_task); -+ dma_unmap_sg(rkc->dev, sgs, 1, DMA_TO_DEVICE); -+ dma_unmap_sg(rkc->dev, sgd, 1, DMA_FROM_DEVICE); - } --out_rx: -+theend_iv: - return err; - } - --static int rk_ablk_init_tfm(struct crypto_skcipher *tfm) -+static int rk_cipher_tfm_init(struct crypto_skcipher *tfm) - { - struct rk_cipher_ctx *ctx = crypto_skcipher_ctx(tfm); -+ const char *name = crypto_tfm_alg_name(&tfm->base); - struct skcipher_alg *alg = crypto_skcipher_alg(tfm); -- struct rk_crypto_tmp *algt; -+ struct rk_crypto_tmp *algt = container_of(alg, struct rk_crypto_tmp, alg.skcipher); - -- algt = container_of(alg, struct rk_crypto_tmp, alg.skcipher); -+ ctx->fallback_tfm = crypto_alloc_skcipher(name, 0, CRYPTO_ALG_NEED_FALLBACK); -+ if (IS_ERR(ctx->fallback_tfm)) { -+ dev_err(algt->dev->dev, "ERROR: Cannot allocate fallback for %s %ld\n", -+ name, PTR_ERR(ctx->fallback_tfm)); -+ return PTR_ERR(ctx->fallback_tfm); -+ } -+ -+ tfm->reqsize = sizeof(struct rk_cipher_rctx) + -+ crypto_skcipher_reqsize(ctx->fallback_tfm); - -- ctx->dev = algt->dev; -- ctx->dev->align_size = crypto_tfm_alg_alignmask(crypto_skcipher_tfm(tfm)) + 1; -- ctx->dev->start = rk_ablk_start; -- ctx->dev->update = rk_ablk_rx; -- ctx->dev->complete = rk_crypto_complete; -- ctx->dev->addr_vir = (char *)__get_free_page(GFP_KERNEL); -+ ctx->enginectx.op.do_one_request = rk_cipher_run; - -- return ctx->dev->addr_vir ? ctx->dev->enable_clk(ctx->dev) : -ENOMEM; -+ return 0; - } - --static void rk_ablk_exit_tfm(struct crypto_skcipher *tfm) -+static void rk_cipher_tfm_exit(struct crypto_skcipher *tfm) - { - struct rk_cipher_ctx *ctx = crypto_skcipher_ctx(tfm); - -- free_page((unsigned long)ctx->dev->addr_vir); -- ctx->dev->disable_clk(ctx->dev); -+ memzero_explicit(ctx->key, ctx->keylen); -+ crypto_free_skcipher(ctx->fallback_tfm); - } - - struct rk_crypto_tmp rk_ecb_aes_alg = { -- .type = ALG_TYPE_CIPHER, -+ .type = CRYPTO_ALG_TYPE_SKCIPHER, - .alg.skcipher = { - .base.cra_name = "ecb(aes)", - .base.cra_driver_name = "ecb-aes-rk", - .base.cra_priority = 300, -- .base.cra_flags = CRYPTO_ALG_ASYNC, -+ .base.cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK, - .base.cra_blocksize = AES_BLOCK_SIZE, - .base.cra_ctxsize = sizeof(struct rk_cipher_ctx), - .base.cra_alignmask = 0x0f, - .base.cra_module = THIS_MODULE, - -- .init = rk_ablk_init_tfm, -- .exit = rk_ablk_exit_tfm, -+ .init = rk_cipher_tfm_init, -+ .exit = rk_cipher_tfm_exit, - .min_keysize = AES_MIN_KEY_SIZE, - .max_keysize = AES_MAX_KEY_SIZE, - .setkey = rk_aes_setkey, -@@ -423,19 +478,19 @@ struct rk_crypto_tmp rk_ecb_aes_alg = { - }; - - struct rk_crypto_tmp rk_cbc_aes_alg = { -- .type = ALG_TYPE_CIPHER, -+ .type = CRYPTO_ALG_TYPE_SKCIPHER, - .alg.skcipher = { - .base.cra_name = "cbc(aes)", - .base.cra_driver_name = "cbc-aes-rk", - .base.cra_priority = 300, -- .base.cra_flags = CRYPTO_ALG_ASYNC, -+ .base.cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK, - .base.cra_blocksize = AES_BLOCK_SIZE, - .base.cra_ctxsize = sizeof(struct rk_cipher_ctx), - .base.cra_alignmask = 0x0f, - .base.cra_module = THIS_MODULE, - -- .init = rk_ablk_init_tfm, -- .exit = rk_ablk_exit_tfm, -+ .init = rk_cipher_tfm_init, -+ .exit = rk_cipher_tfm_exit, - .min_keysize = AES_MIN_KEY_SIZE, - .max_keysize = AES_MAX_KEY_SIZE, - .ivsize = AES_BLOCK_SIZE, -@@ -446,19 +501,19 @@ struct rk_crypto_tmp rk_cbc_aes_alg = { - }; - - struct rk_crypto_tmp rk_ecb_des_alg = { -- .type = ALG_TYPE_CIPHER, -+ .type = CRYPTO_ALG_TYPE_SKCIPHER, - .alg.skcipher = { - .base.cra_name = "ecb(des)", - .base.cra_driver_name = "ecb-des-rk", - .base.cra_priority = 300, -- .base.cra_flags = CRYPTO_ALG_ASYNC, -+ .base.cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK, - .base.cra_blocksize = DES_BLOCK_SIZE, - .base.cra_ctxsize = sizeof(struct rk_cipher_ctx), - .base.cra_alignmask = 0x07, - .base.cra_module = THIS_MODULE, - -- .init = rk_ablk_init_tfm, -- .exit = rk_ablk_exit_tfm, -+ .init = rk_cipher_tfm_init, -+ .exit = rk_cipher_tfm_exit, - .min_keysize = DES_KEY_SIZE, - .max_keysize = DES_KEY_SIZE, - .setkey = rk_des_setkey, -@@ -468,19 +523,19 @@ struct rk_crypto_tmp rk_ecb_des_alg = { - }; - - struct rk_crypto_tmp rk_cbc_des_alg = { -- .type = ALG_TYPE_CIPHER, -+ .type = CRYPTO_ALG_TYPE_SKCIPHER, - .alg.skcipher = { - .base.cra_name = "cbc(des)", - .base.cra_driver_name = "cbc-des-rk", - .base.cra_priority = 300, -- .base.cra_flags = CRYPTO_ALG_ASYNC, -+ .base.cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK, - .base.cra_blocksize = DES_BLOCK_SIZE, - .base.cra_ctxsize = sizeof(struct rk_cipher_ctx), - .base.cra_alignmask = 0x07, - .base.cra_module = THIS_MODULE, - -- .init = rk_ablk_init_tfm, -- .exit = rk_ablk_exit_tfm, -+ .init = rk_cipher_tfm_init, -+ .exit = rk_cipher_tfm_exit, - .min_keysize = DES_KEY_SIZE, - .max_keysize = DES_KEY_SIZE, - .ivsize = DES_BLOCK_SIZE, -@@ -491,19 +546,19 @@ struct rk_crypto_tmp rk_cbc_des_alg = { - }; - - struct rk_crypto_tmp rk_ecb_des3_ede_alg = { -- .type = ALG_TYPE_CIPHER, -+ .type = CRYPTO_ALG_TYPE_SKCIPHER, - .alg.skcipher = { - .base.cra_name = "ecb(des3_ede)", - .base.cra_driver_name = "ecb-des3-ede-rk", - .base.cra_priority = 300, -- .base.cra_flags = CRYPTO_ALG_ASYNC, -+ .base.cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK, - .base.cra_blocksize = DES_BLOCK_SIZE, - .base.cra_ctxsize = sizeof(struct rk_cipher_ctx), - .base.cra_alignmask = 0x07, - .base.cra_module = THIS_MODULE, - -- .init = rk_ablk_init_tfm, -- .exit = rk_ablk_exit_tfm, -+ .init = rk_cipher_tfm_init, -+ .exit = rk_cipher_tfm_exit, - .min_keysize = DES3_EDE_KEY_SIZE, - .max_keysize = DES3_EDE_KEY_SIZE, - .setkey = rk_tdes_setkey, -@@ -513,19 +568,19 @@ struct rk_crypto_tmp rk_ecb_des3_ede_alg - }; - - struct rk_crypto_tmp rk_cbc_des3_ede_alg = { -- .type = ALG_TYPE_CIPHER, -+ .type = CRYPTO_ALG_TYPE_SKCIPHER, - .alg.skcipher = { - .base.cra_name = "cbc(des3_ede)", - .base.cra_driver_name = "cbc-des3-ede-rk", - .base.cra_priority = 300, -- .base.cra_flags = CRYPTO_ALG_ASYNC, -+ .base.cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK, - .base.cra_blocksize = DES_BLOCK_SIZE, - .base.cra_ctxsize = sizeof(struct rk_cipher_ctx), - .base.cra_alignmask = 0x07, - .base.cra_module = THIS_MODULE, - -- .init = rk_ablk_init_tfm, -- .exit = rk_ablk_exit_tfm, -+ .init = rk_cipher_tfm_init, -+ .exit = rk_cipher_tfm_exit, - .min_keysize = DES3_EDE_KEY_SIZE, - .max_keysize = DES3_EDE_KEY_SIZE, - .ivsize = DES_BLOCK_SIZE, ---- a/drivers/crypto/Kconfig -+++ b/drivers/crypto/Kconfig -@@ -784,7 +784,12 @@ config CRYPTO_DEV_IMGTEC_HASH - config CRYPTO_DEV_ROCKCHIP - tristate "Rockchip's Cryptographic Engine driver" - depends on OF && ARCH_ROCKCHIP -+ depends on PM -+ select CRYPTO_ECB -+ select CRYPTO_CBC -+ select CRYPTO_DES - select CRYPTO_AES -+ select CRYPTO_ENGINE - select CRYPTO_LIB_DES - select CRYPTO_MD5 - select CRYPTO_SHA1 -@@ -796,6 +801,16 @@ config CRYPTO_DEV_ROCKCHIP - This driver interfaces with the hardware crypto accelerator. - Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode. - -+config CRYPTO_DEV_ROCKCHIP_DEBUG -+ bool "Enable Rockchip crypto stats" -+ depends on CRYPTO_DEV_ROCKCHIP -+ depends on DEBUG_FS -+ help -+ Say y to enable Rockchip crypto debug stats. -+ This will create /sys/kernel/debug/rk3288_crypto/stats for displaying -+ the number of requests per algorithm and other internal stats. -+ -+ - config CRYPTO_DEV_ZYNQMP_AES - tristate "Support for Xilinx ZynqMP AES hw accelerator" - depends on ZYNQMP_FIRMWARE || COMPILE_TEST ---- a/MAINTAINERS -+++ b/MAINTAINERS -@@ -16972,6 +16972,13 @@ F: Documentation/ABI/*/sysfs-driver-hid- - F: drivers/hid/hid-roccat* - F: include/linux/hid-roccat* - -+ROCKCHIP CRYPTO DRIVERS -+M: Corentin Labbe -+L: linux-crypto@vger.kernel.org -+S: Maintained -+F: Documentation/devicetree/bindings/crypto/rockchip,rk3288-crypto.yaml -+F: drivers/crypto/rockchip/ -+ - ROCKCHIP I2S TDM DRIVER - M: Nicolas Frattaroli - L: linux-rockchip@lists.infradead.org ---- /dev/null -+++ b/Documentation/devicetree/bindings/crypto/rockchip,rk3288-crypto.yaml -@@ -0,0 +1,133 @@ -+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -+%YAML 1.2 -+--- -+$id: http://devicetree.org/schemas/crypto/rockchip,rk3288-crypto.yaml# -+$schema: http://devicetree.org/meta-schemas/core.yaml# -+ -+title: Rockchip Electronics Security Accelerator -+ -+maintainers: -+ - Heiko Stuebner -+ -+properties: -+ compatible: -+ enum: -+ - rockchip,rk3288-crypto -+ - rockchip,rk3328-crypto -+ - rockchip,rk3399-crypto -+ -+ reg: -+ maxItems: 1 -+ -+ interrupts: -+ maxItems: 1 -+ -+ clocks: -+ minItems: 3 -+ maxItems: 4 -+ -+ clock-names: -+ minItems: 3 -+ maxItems: 4 -+ -+ resets: -+ minItems: 1 -+ maxItems: 3 -+ -+ reset-names: -+ minItems: 1 -+ maxItems: 3 -+ -+allOf: -+ - if: -+ properties: -+ compatible: -+ contains: -+ const: rockchip,rk3288-crypto -+ then: -+ properties: -+ clocks: -+ minItems: 4 -+ clock-names: -+ items: -+ - const: aclk -+ - const: hclk -+ - const: sclk -+ - const: apb_pclk -+ minItems: 4 -+ resets: -+ maxItems: 1 -+ reset-names: -+ items: -+ - const: crypto-rst -+ maxItems: 1 -+ - if: -+ properties: -+ compatible: -+ contains: -+ const: rockchip,rk3328-crypto -+ then: -+ properties: -+ clocks: -+ maxItems: 3 -+ clock-names: -+ items: -+ - const: hclk_master -+ - const: hclk_slave -+ - const: sclk -+ maxItems: 3 -+ resets: -+ maxItems: 1 -+ reset-names: -+ items: -+ - const: crypto-rst -+ maxItems: 1 -+ - if: -+ properties: -+ compatible: -+ contains: -+ const: rockchip,rk3399-crypto -+ then: -+ properties: -+ clocks: -+ maxItems: 3 -+ clock-names: -+ items: -+ - const: hclk_master -+ - const: hclk_slave -+ - const: sclk -+ maxItems: 3 -+ resets: -+ minItems: 3 -+ reset-names: -+ items: -+ - const: rst_master -+ - const: rst_slave -+ - const: crypto-rst -+ minItems: 3 -+ -+required: -+ - compatible -+ - reg -+ - interrupts -+ - clocks -+ - clock-names -+ - resets -+ - reset-names -+ -+additionalProperties: false -+ -+examples: -+ - | -+ #include -+ #include -+ crypto@ff8a0000 { -+ compatible = "rockchip,rk3288-crypto"; -+ reg = <0xff8a0000 0x4000>; -+ interrupts = ; -+ clocks = <&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>, -+ <&cru SCLK_CRYPTO>, <&cru ACLK_DMAC1>; -+ clock-names = "aclk", "hclk", "sclk", "apb_pclk"; -+ resets = <&cru SRST_CRYPTO>; -+ reset-names = "crypto-rst"; -+ }; ---- a/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt -+++ /dev/null -@@ -1,28 +0,0 @@ --Rockchip Electronics And Security Accelerator -- --Required properties: --- compatible: Should be "rockchip,rk3288-crypto" --- reg: Base physical address of the engine and length of memory mapped -- region --- interrupts: Interrupt number --- clocks: Reference to the clocks about crypto --- clock-names: "aclk" used to clock data -- "hclk" used to clock data -- "sclk" used to clock crypto accelerator -- "apb_pclk" used to clock dma --- resets: Must contain an entry for each entry in reset-names. -- See ../reset/reset.txt for details. --- reset-names: Must include the name "crypto-rst". -- --Examples: -- -- crypto: cypto-controller@ff8a0000 { -- compatible = "rockchip,rk3288-crypto"; -- reg = <0xff8a0000 0x4000>; -- interrupts = ; -- clocks = <&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>, -- <&cru SCLK_CRYPTO>, <&cru ACLK_DMAC1>; -- clock-names = "aclk", "hclk", "sclk", "apb_pclk"; -- resets = <&cru SRST_CRYPTO>; -- reset-names = "crypto-rst"; -- }; ---- a/include/dt-bindings/clock/rk3399-cru.h -+++ b/include/dt-bindings/clock/rk3399-cru.h -@@ -547,8 +547,8 @@ - #define SRST_H_PERILP0 171 - #define SRST_H_PERILP0_NOC 172 - #define SRST_ROM 173 --#define SRST_CRYPTO_S 174 --#define SRST_CRYPTO_M 175 -+#define SRST_CRYPTO0_S 174 -+#define SRST_CRYPTO0_M 175 - - /* cru_softrst_con11 */ - #define SRST_P_DCF 176 -@@ -556,7 +556,7 @@ - #define SRST_CM0S 178 - #define SRST_CM0S_DBG 179 - #define SRST_CM0S_PO 180 --#define SRST_CRYPTO 181 -+#define SRST_CRYPTO0 181 - #define SRST_P_PERILP1_SGRF 182 - #define SRST_P_PERILP1_GRF 183 - #define SRST_CRYPTO1_S 184 ---- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -@@ -1040,6 +1040,17 @@ - (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; - }; - -+ crypto: crypto@ff060000 { -+ compatible = "rockchip,rk3328-crypto"; -+ reg = <0x0 0xff060000 0x0 0x4000>; -+ interrupts = ; -+ clocks = <&cru HCLK_CRYPTO_MST>, <&cru HCLK_CRYPTO_SLV>, -+ <&cru SCLK_CRYPTO>; -+ clock-names = "hclk_master", "hclk_slave", "sclk"; -+ resets = <&cru SRST_CRYPTO>; -+ reset-names = "crypto-rst"; -+ }; -+ - pinctrl: pinctrl { - compatible = "rockchip,rk3328-pinctrl"; - rockchip,grf = <&grf>; ---- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -@@ -573,6 +573,26 @@ - status = "disabled"; - }; - -+ crypto0: crypto@ff8b0000 { -+ compatible = "rockchip,rk3399-crypto"; -+ reg = <0x0 0xff8b0000 0x0 0x4000>; -+ interrupts = ; -+ clocks = <&cru HCLK_M_CRYPTO0>, <&cru HCLK_S_CRYPTO0>, <&cru SCLK_CRYPTO0>; -+ clock-names = "hclk_master", "hclk_slave", "sclk"; -+ resets = <&cru SRST_CRYPTO0>, <&cru SRST_CRYPTO0_S>, <&cru SRST_CRYPTO0_M>; -+ reset-names = "rst_master", "rst_slave", "crypto-rst"; -+ }; -+ -+ crypto1: crypto@ff8b8000 { -+ compatible = "rockchip,rk3399-crypto"; -+ reg = <0x0 0xff8b8000 0x0 0x4000>; -+ interrupts = ; -+ clocks = <&cru HCLK_M_CRYPTO1>, <&cru HCLK_S_CRYPTO1>, <&cru SCLK_CRYPTO1>; -+ clock-names = "hclk_master", "hclk_slave", "sclk"; -+ resets = <&cru SRST_CRYPTO1>, <&cru SRST_CRYPTO1_S>, <&cru SRST_CRYPTO1_M>; -+ reset-names = "rst_master", "rst_slave", "crypto-rst"; -+ }; -+ - i2c1: i2c@ff110000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x0 0xff110000 0x0 0x1000>; diff --git a/target/linux/x86/64/config-5.18 b/target/linux/x86/64/config-5.18 deleted file mode 100644 index eea57c2fd4058c..00000000000000 --- a/target/linux/x86/64/config-5.18 +++ /dev/null @@ -1,541 +0,0 @@ -CONFIG_64BIT=y -CONFIG_ACPI=y -CONFIG_ACPI_AC=y -CONFIG_ACPI_BATTERY=y -# CONFIG_ACPI_BGRT is not set -CONFIG_ACPI_BUTTON=y -# CONFIG_ACPI_CMPC is not set -CONFIG_ACPI_CONTAINER=y -CONFIG_ACPI_CPPC_LIB=y -CONFIG_ACPI_CPU_FREQ_PSS=y -# CONFIG_ACPI_DEBUG is not set -# CONFIG_ACPI_DEBUGGER is not set -# CONFIG_ACPI_DOCK is not set -# CONFIG_ACPI_DPTF is not set -# CONFIG_ACPI_EC_DEBUGFS is not set -CONFIG_ACPI_FAN=y -# CONFIG_ACPI_FPDT is not set -CONFIG_ACPI_HOTPLUG_CPU=y -CONFIG_ACPI_HOTPLUG_IOAPIC=y -# CONFIG_ACPI_I2C_OPREGION is not set -CONFIG_ACPI_LEGACY_TABLES_LOOKUP=y -CONFIG_ACPI_LPIT=y -# CONFIG_ACPI_PCC is not set -# CONFIG_ACPI_PCI_SLOT is not set -# CONFIG_ACPI_PFRUT is not set -CONFIG_ACPI_PRMT=y -CONFIG_ACPI_PROCESSOR=y -# CONFIG_ACPI_PROCESSOR_AGGREGATOR is not set -CONFIG_ACPI_PROCESSOR_CSTATE=y -CONFIG_ACPI_PROCESSOR_IDLE=y -CONFIG_ACPI_REV_OVERRIDE_POSSIBLE=y -# CONFIG_ACPI_SBS is not set -CONFIG_ACPI_SPCR_TABLE=y -CONFIG_ACPI_SYSTEM_POWER_STATES_SUPPORT=y -# CONFIG_ACPI_TAD is not set -CONFIG_ACPI_THERMAL=y -CONFIG_ACPI_VIDEO=y -# CONFIG_ACPI_WMI is not set -# CONFIG_ACRN_GUEST is not set -CONFIG_AGP=y -# CONFIG_AGP_AMD64 is not set -CONFIG_AGP_INTEL=y -# CONFIG_AGP_SIS is not set -# CONFIG_AGP_VIA is not set -# CONFIG_AMD_HSMP is not set -# CONFIG_AMD_PMC is not set -# CONFIG_AMD_PTDMA is not set -# CONFIG_AMD_SFH_HID is not set -CONFIG_ARCH_CPUIDLE_HALTPOLL=y -CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_ARCH_MIGHT_HAVE_ACPI_PDC=y -CONFIG_ARCH_MMAP_RND_BITS=28 -CONFIG_ARCH_MMAP_RND_BITS_MAX=32 -CONFIG_ARCH_MMAP_RND_BITS_MIN=28 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS=8 -CONFIG_ARCH_NR_GPIO=1024 -CONFIG_ARCH_SPARSEMEM_DEFAULT=y -CONFIG_ARCH_WANTS_THP_SWAP=y -# CONFIG_ASUS_TF103C_DOCK is not set -CONFIG_AUDIT_ARCH=y -CONFIG_BACKLIGHT_CLASS_DEVICE=y -CONFIG_BALLOON_COMPACTION=y -# CONFIG_BARCO_P50_GPIO is not set -CONFIG_BLK_DEV_BSGLIB=y -CONFIG_BLK_DEV_BSG_COMMON=y -CONFIG_BLK_DEV_INTEGRITY=y -CONFIG_BLK_DEV_INTEGRITY_T10=y -CONFIG_BLK_DEV_NVME=y -CONFIG_BLK_DEV_SR=y -CONFIG_BLK_MQ_VIRTIO=y -CONFIG_BLK_PM=y -CONFIG_BLOCK_COMPAT=y -# CONFIG_BOOTPARAM_HOTPLUG_CPU0 is not set -CONFIG_BTT=y -CONFIG_CDROM=y -CONFIG_COMPAT=y -CONFIG_COMPAT_BINFMT_ELF=y -CONFIG_COMPAT_FOR_U64_ALIGNMENT=y -CONFIG_COMPAT_NETLINK_MESSAGES=y -CONFIG_CONNECTOR=y -CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y -CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y -# CONFIG_CPU_IDLE_GOV_HALTPOLL is not set -CONFIG_CPU_RMAP=y -CONFIG_CRC64=y -CONFIG_CRC64_ROCKSOFT=y -CONFIG_CRC_T10DIF=y -CONFIG_CRYPTO_AES_NI_INTEL=y -# CONFIG_CRYPTO_BLOWFISH_X86_64 is not set -# CONFIG_CRYPTO_CAMELLIA_AESNI_AVX2_X86_64 is not set -# CONFIG_CRYPTO_CAMELLIA_AESNI_AVX_X86_64 is not set -# CONFIG_CRYPTO_CAMELLIA_X86_64 is not set -# CONFIG_CRYPTO_CAST5_AVX_X86_64 is not set -# CONFIG_CRYPTO_CAST6_AVX_X86_64 is not set -CONFIG_CRYPTO_CRC64_ROCKSOFT=y -CONFIG_CRYPTO_CRCT10DIF=y -# CONFIG_CRYPTO_CRCT10DIF_PCLMUL is not set -CONFIG_CRYPTO_CRYPTD=y -# CONFIG_CRYPTO_DES3_EDE_X86_64 is not set -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_LIB_POLY1305_RSIZE=11 -CONFIG_CRYPTO_LRW=y -# CONFIG_CRYPTO_NHPOLY1305_AVX2 is not set -# CONFIG_CRYPTO_NHPOLY1305_SSE2 is not set -# CONFIG_CRYPTO_SERPENT_AVX2_X86_64 is not set -# CONFIG_CRYPTO_SERPENT_AVX_X86_64 is not set -# CONFIG_CRYPTO_SERPENT_SSE2_X86_64 is not set -# CONFIG_CRYPTO_SHA1_SSSE3 is not set -# CONFIG_CRYPTO_SHA512_SSSE3 is not set -CONFIG_CRYPTO_SIMD=y -# CONFIG_CRYPTO_SM3_AVX_X86_64 is not set -# CONFIG_CRYPTO_SM4_AESNI_AVX2_X86_64 is not set -# CONFIG_CRYPTO_SM4_AESNI_AVX_X86_64 is not set -# CONFIG_CRYPTO_TWOFISH_AVX_X86_64 is not set -# CONFIG_CRYPTO_TWOFISH_X86_64 is not set -# CONFIG_CRYPTO_TWOFISH_X86_64_3WAY is not set -CONFIG_CRYPTO_XTS=y -# CONFIG_DEBUG_HOTPLUG_CPU0 is not set -CONFIG_DMA_ACPI=y -CONFIG_DMA_OPS=y -CONFIG_DMA_SHARED_BUFFER=y -CONFIG_DRM=y -CONFIG_DRM_BOCHS=y -CONFIG_DRM_BRIDGE=y -CONFIG_DRM_BUDDY=y -CONFIG_DRM_DP_HELPER=y -CONFIG_DRM_FBDEV_EMULATION=y -CONFIG_DRM_FBDEV_OVERALLOC=100 -CONFIG_DRM_GEM_SHMEM_HELPER=y -# CONFIG_DRM_HYPERV is not set -CONFIG_DRM_I915=y -CONFIG_DRM_I915_CAPTURE_ERROR=y -CONFIG_DRM_I915_COMPRESS_ERROR=y -# CONFIG_DRM_I915_DEBUG is not set -# CONFIG_DRM_I915_DEBUG_GUC is not set -# CONFIG_DRM_I915_DEBUG_MMIO is not set -# CONFIG_DRM_I915_DEBUG_RUNTIME_PM is not set -# CONFIG_DRM_I915_DEBUG_VBLANK_EVADE is not set -CONFIG_DRM_I915_FENCE_TIMEOUT=10000 -CONFIG_DRM_I915_FORCE_PROBE="" -CONFIG_DRM_I915_GVT=y -CONFIG_DRM_I915_HEARTBEAT_INTERVAL=2500 -# CONFIG_DRM_I915_LOW_LEVEL_TRACEPOINTS is not set -CONFIG_DRM_I915_MAX_REQUEST_BUSYWAIT=8000 -CONFIG_DRM_I915_PREEMPT_TIMEOUT=640 -# CONFIG_DRM_I915_SELFTEST is not set -CONFIG_DRM_I915_STOP_TIMEOUT=100 -# CONFIG_DRM_I915_SW_FENCE_CHECK_DAG is not set -# CONFIG_DRM_I915_SW_FENCE_DEBUG_OBJECTS is not set -CONFIG_DRM_I915_TIMESLICE_DURATION=1 -CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND=250 -CONFIG_DRM_I915_USERPTR=y -# CONFIG_DRM_I915_WERROR is not set -CONFIG_DRM_KMS_HELPER=y -CONFIG_DRM_MIPI_DSI=y -CONFIG_DRM_NOMODESET=y -CONFIG_DRM_PANEL=y -CONFIG_DRM_PANEL_BRIDGE=y -CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y -# CONFIG_DRM_SIMPLEDRM is not set -# CONFIG_DRM_SSD130X is not set -CONFIG_DRM_TTM=y -CONFIG_DRM_TTM_HELPER=y -CONFIG_DRM_VIRTIO_GPU=y -CONFIG_DRM_VRAM_HELPER=y -CONFIG_EFI=y -CONFIG_EFIVAR_FS=m -# CONFIG_EFI_BOOTLOADER_CONTROL is not set -# CONFIG_EFI_CAPSULE_LOADER is not set -# CONFIG_EFI_CUSTOM_SSDT_OVERLAYS is not set -# CONFIG_EFI_DISABLE_PCI_DMA is not set -CONFIG_EFI_EARLYCON=y -CONFIG_EFI_ESRT=y -# CONFIG_EFI_FAKE_MEMMAP is not set -CONFIG_EFI_GENERIC_STUB_INITRD_CMDLINE_LOADER=y -# CONFIG_EFI_MIXED is not set -# CONFIG_EFI_PGT_DUMP is not set -# CONFIG_EFI_RCI2_TABLE is not set -CONFIG_EFI_RUNTIME_MAP=y -CONFIG_EFI_RUNTIME_WRAPPERS=y -CONFIG_EFI_STUB=y -# CONFIG_EFI_TEST is not set -# CONFIG_EFI_VARS is not set -CONFIG_FAILOVER=y -CONFIG_FB=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_IMAGEBLIT=y -CONFIG_FB_CMDLINE=y -CONFIG_FB_DEFERRED_IO=y -CONFIG_FB_EFI=y -CONFIG_FB_HYPERV=y -CONFIG_FB_MODE_HELPERS=y -CONFIG_FB_SIMPLE=y -CONFIG_FB_SYS_COPYAREA=y -CONFIG_FB_SYS_FILLRECT=y -CONFIG_FB_SYS_FOPS=y -CONFIG_FB_SYS_IMAGEBLIT=y -CONFIG_FB_TILEBLITTING=y -# CONFIG_FB_VESA is not set -CONFIG_FONT_8x16=y -CONFIG_FONT_8x8=y -CONFIG_FONT_SUPPORT=y -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y -CONFIG_FRAMEBUFFER_CONSOLE_LEGACY_ACCELERATION=y -# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set -CONFIG_FREEZER=y -CONFIG_FUSION_SAS=y -CONFIG_FW_CACHE=y -CONFIG_GART_IOMMU=y -CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y -CONFIG_GENERIC_CPU=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MIGRATION=y -CONFIG_GENERIC_PENDING_IRQ=y -CONFIG_GPIOLIB=y -CONFIG_GPIOLIB_IRQCHIP=y -CONFIG_GPIO_ACPI=y -# CONFIG_GPIO_CASCADE is not set -CONFIG_GPIO_CDEV=y -CONFIG_GPIO_ICH=y -CONFIG_GPIO_SCH=y -# CONFIG_GPIO_SIM is not set -# CONFIG_GPIO_VIRTIO is not set -CONFIG_GUEST_PERF_EVENTS=y -CONFIG_HALTPOLL_CPUIDLE=y -CONFIG_HARDLOCKUP_CHECK_TIMESTAMP=y -CONFIG_HDMI=y -CONFIG_HIBERNATE_CALLBACKS=y -CONFIG_HID_BATTERY_STRENGTH=y -CONFIG_HID_GENERIC=y -CONFIG_HID_HYPERV_MOUSE=y -CONFIG_HOTPLUG_CPU=y -CONFIG_HOTPLUG_PCI=y -CONFIG_HOTPLUG_PCI_ACPI=y -# CONFIG_HOTPLUG_PCI_ACPI_IBM is not set -# CONFIG_HOTPLUG_PCI_CPCI is not set -# CONFIG_HOTPLUG_PCI_PCIE is not set -# CONFIG_HOTPLUG_PCI_SHPC is not set -CONFIG_HOTPLUG_SMT=y -CONFIG_HPET=y -CONFIG_HPET_MMAP=y -# CONFIG_HP_ACCEL is not set -CONFIG_HVC_DRIVER=y -CONFIG_HVC_IRQ=y -CONFIG_HVC_XEN=y -CONFIG_HVC_XEN_FRONTEND=y -CONFIG_HWMON=y -CONFIG_HWMON_VID=y -CONFIG_HW_RANDOM_AMD=y -CONFIG_HW_RANDOM_INTEL=y -CONFIG_HW_RANDOM_VIRTIO=y -CONFIG_HYPERV=y -CONFIG_HYPERVISOR_GUEST=y -CONFIG_HYPERV_BALLOON=y -CONFIG_HYPERV_KEYBOARD=y -CONFIG_HYPERV_NET=y -CONFIG_HYPERV_STORAGE=y -# CONFIG_HYPERV_TESTING is not set -CONFIG_HYPERV_TIMER=y -CONFIG_HYPERV_UTILS=y -# CONFIG_HYPERV_VSOCKETS is not set -CONFIG_I2C=y -CONFIG_I2C_ALGOBIT=y -# CONFIG_I2C_AMD_MP2 is not set -CONFIG_I2C_BOARDINFO=y -# CONFIG_I2C_HID_ACPI is not set -# CONFIG_IA32_EMULATION is not set -CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 -# CONFIG_IMA_SECURE_AND_OR_TRUSTED_BOOT is not set -CONFIG_INPUT_XEN_KBDDEV_FRONTEND=y -CONFIG_INTEL_GTT=y -# CONFIG_INTEL_IDXD_COMPAT is not set -# CONFIG_INTEL_IPS is not set -# CONFIG_INTEL_MEI_HDCP is not set -# CONFIG_INTEL_MEI_PXP is not set -# CONFIG_INTEL_MENLOW is not set -CONFIG_INTEL_PCH_THERMAL=y -# CONFIG_INTEL_SAR_INT1092 is not set -# CONFIG_INTEL_SCU_PLATFORM is not set -CONFIG_INTEL_SOC_DTS_IOSF_CORE=y -CONFIG_INTEL_SOC_DTS_THERMAL=y -# CONFIG_INTEL_SPEED_SELECT_INTERFACE is not set -# CONFIG_INTEL_TURBO_MAX_3 is not set -# CONFIG_INTEL_UNCORE_FREQ_CONTROL is not set -CONFIG_INTERVAL_TREE=y -# CONFIG_IOMMU_DEBUG is not set -CONFIG_IOMMU_HELPER=y -CONFIG_IOSF_MBI=y -# CONFIG_IOSF_MBI_DEBUG is not set -# CONFIG_ISCSI_IBFT is not set -CONFIG_ISO9660_FS=y -CONFIG_KALLSYMS_ABSOLUTE_PERCPU=y -CONFIG_KCMP=y -CONFIG_KVM_GUEST=y -CONFIG_LEDS_GPIO=y -# CONFIG_LEGACY_VSYSCALL_EMULATE is not set -CONFIG_LEGACY_VSYSCALL_NONE=y -# CONFIG_LEGACY_VSYSCALL_XONLY is not set -CONFIG_LIBNVDIMM=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_LPC_ICH=y -CONFIG_LPC_SCH=y -CONFIG_MAILBOX=y -# CONFIG_MAXSMP is not set -CONFIG_MEMORY_BALLOON=y -CONFIG_MEMREGION=y -# CONFIG_MERAKI_MX100 is not set -CONFIG_MFD_CORE=y -# CONFIG_MFD_INTEL_LPSS_ACPI is not set -# CONFIG_MFD_INTEL_PMC_BXT is not set -# CONFIG_MFD_SIMPLE_MFD_I2C is not set -CONFIG_MMC=y -CONFIG_MMC_BLOCK=y -CONFIG_MMC_CQHCI=y -CONFIG_MMC_RICOH_MMC=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_ACPI=y -CONFIG_MMC_SDHCI_IO_ACCESSORS=y -CONFIG_MMC_SDHCI_PCI=y -# CONFIG_MMC_SDHCI_PLTFM is not set -# CONFIG_MMC_WBSD is not set -CONFIG_MMU_NOTIFIER=y -CONFIG_MODULES_USE_ELF_RELA=y -# CONFIG_MPSC is not set -CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_ND_CLAIM=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NET_FAILOVER=y -CONFIG_NET_FLOW_LIMIT=y -# CONFIG_NITRO_ENCLAVES is not set -CONFIG_NR_CPUS=512 -CONFIG_NR_CPUS_DEFAULT=64 -CONFIG_NR_CPUS_RANGE_BEGIN=2 -CONFIG_NR_CPUS_RANGE_END=512 -CONFIG_NVME_CORE=y -# CONFIG_NVME_HWMON is not set -CONFIG_NVME_MULTIPATH=y -# CONFIG_NVME_VERBOSE_ERRORS is not set -CONFIG_OUTPUT_FORMAT="elf64-x86-64" -CONFIG_PADATA=y -CONFIG_PAGE_REPORTING=y -# CONFIG_PAGE_TABLE_CHECK is not set -CONFIG_PAGE_TABLE_ISOLATION=y -CONFIG_PARAVIRT=y -CONFIG_PARAVIRT_CLOCK=y -# CONFIG_PARAVIRT_DEBUG is not set -CONFIG_PARAVIRT_SPINLOCKS=y -CONFIG_PARAVIRT_XXL=y -CONFIG_PATA_AMD=y -CONFIG_PATA_ATIIXP=y -CONFIG_PATA_MPIIX=y -CONFIG_PATA_OLDPIIX=y -CONFIG_PATA_PLATFORM=y -CONFIG_PATA_TIMINGS=y -CONFIG_PATA_VIA=y -CONFIG_PCC=y -# CONFIG_PCENGINES_APU2 is not set -CONFIG_PCIEAER=y -CONFIG_PCIEPORTBUS=y -CONFIG_PCIE_PME=y -CONFIG_PCI_HYPERV=y -CONFIG_PCI_HYPERV_INTERFACE=y -# CONFIG_PCI_MMCONFIG is not set -CONFIG_PCI_XEN=y -CONFIG_PGTABLE_LEVELS=4 -CONFIG_PHYSICAL_ALIGN=0x1000000 -CONFIG_PHYS_ADDR_T_64BIT=y -CONFIG_PINCTRL=y -# CONFIG_PINCTRL_ALDERLAKE is not set -# CONFIG_PINCTRL_BAYTRAIL is not set -# CONFIG_PINCTRL_BROXTON is not set -# CONFIG_PINCTRL_CANNONLAKE is not set -# CONFIG_PINCTRL_CHERRYVIEW is not set -# CONFIG_PINCTRL_DENVERTON is not set -# CONFIG_PINCTRL_ELKHARTLAKE is not set -# CONFIG_PINCTRL_EMMITSBURG is not set -# CONFIG_PINCTRL_GEMINILAKE is not set -# CONFIG_PINCTRL_JASPERLAKE is not set -# CONFIG_PINCTRL_LAKEFIELD is not set -# CONFIG_PINCTRL_LEWISBURG is not set -# CONFIG_PINCTRL_LYNXPOINT is not set -# CONFIG_PINCTRL_SUNRISEPOINT is not set -# CONFIG_PINCTRL_TIGERLAKE is not set -CONFIG_PM=y -# CONFIG_PMIC_OPREGION is not set -CONFIG_PM_CLK=y -CONFIG_PM_SLEEP=y -CONFIG_PM_SLEEP_SMP=y -CONFIG_PNP=y -CONFIG_PNPACPI=y -CONFIG_PNP_DEBUG_MESSAGES=y -CONFIG_PROC_EVENTS=y -CONFIG_PVH=y -CONFIG_QUEUED_RWLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y -CONFIG_RAS=y -CONFIG_RELAY=y -CONFIG_RELOCATABLE=y -CONFIG_RESET_ATTACK_MITIGATION=y -CONFIG_RFS_ACCEL=y -CONFIG_RPS=y -CONFIG_RTC_I2C_AND_SPI=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -# CONFIG_SAMSUNG_Q10 is not set -CONFIG_SATA_AHCI=y -# CONFIG_SCHED_CORE is not set -CONFIG_SCHED_MC=y -CONFIG_SCHED_MC_PRIO=y -CONFIG_SCHED_SMT=y -CONFIG_SCSI_SAS_ATTRS=y -CONFIG_SCSI_VIRTIO=y -# CONFIG_SENSORS_ASUS_EC is not set -CONFIG_SENSORS_CORETEMP=y -CONFIG_SENSORS_FAM15H_POWER=y -CONFIG_SENSORS_I5500=y -CONFIG_SENSORS_K10TEMP=y -CONFIG_SENSORS_K8TEMP=y -# CONFIG_SENSORS_SY7636A is not set -# CONFIG_SENSORS_TMP464 is not set -CONFIG_SENSORS_VIA_CPUTEMP=y -CONFIG_SERIAL_8250_PNP=y -CONFIG_SERIAL_MCTRL_GPIO=y -CONFIG_SMP=y -CONFIG_SOCK_RX_QUEUE_MAPPING=y -CONFIG_SPARSEMEM=y -CONFIG_SPARSEMEM_EXTREME=y -# CONFIG_SPARSEMEM_VMEMMAP is not set -CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y -CONFIG_STACK_VALIDATION=y -CONFIG_SWIOTLB=y -CONFIG_SWIOTLB_XEN=y -CONFIG_SYNC_FILE=y -# CONFIG_SYSTEM76_ACPI is not set -CONFIG_SYSVIPC_COMPAT=y -CONFIG_SYS_HYPERVISOR=y -CONFIG_THERMAL_GOV_USER_SPACE=y -CONFIG_THERMAL_HWMON=y -CONFIG_THERMAL_WRITABLE_TRIPS=y -# CONFIG_TOSHIBA_BT_RFKILL is not set -# CONFIG_UCLAMP_TASK is not set -CONFIG_UCS2_STRING=y -# CONFIG_UNWINDER_ORC is not set -CONFIG_USB_STORAGE=y -# CONFIG_USB_XEN_HCD is not set -CONFIG_VIRTIO=y -CONFIG_VIRTIO_BALLOON=y -CONFIG_VIRTIO_BLK=y -CONFIG_VIRTIO_CONSOLE=y -CONFIG_VIRTIO_DMA_SHARED_BUFFER=y -CONFIG_VIRTIO_MMIO=y -CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES=y -CONFIG_VIRTIO_NET=y -CONFIG_VIRTIO_PCI=y -CONFIG_VIRTIO_PCI_LEGACY=y -CONFIG_VIRTIO_PCI_LIB=y -CONFIG_VIRTIO_PCI_LIB_LEGACY=y -# CONFIG_VIRTIO_PMEM is not set -# CONFIG_VIRTIO_VSOCKETS is not set -CONFIG_VIRTIO_VSOCKETS_COMMON=y -CONFIG_VIRT_DRIVERS=y -CONFIG_VMAP_PFN=y -CONFIG_VMAP_STACK=y -# CONFIG_VMD is not set -CONFIG_VMGENID=y -CONFIG_VMWARE_BALLOON=y -CONFIG_VMWARE_PVSCSI=y -CONFIG_VMWARE_VMCI=y -CONFIG_VMWARE_VMCI_VSOCKETS=y -CONFIG_VMXNET3=y -CONFIG_VSOCKETS=y -CONFIG_VSOCKETS_LOOPBACK=y -CONFIG_VT_CONSOLE_SLEEP=y -CONFIG_WATCHDOG_CORE=y -# CONFIG_WIRELESS_HOTKEY is not set -# CONFIG_X86_5LEVEL is not set -CONFIG_X86_64=y -CONFIG_X86_64_SMP=y -CONFIG_X86_ACPI_CPUFREQ=y -# CONFIG_X86_ACPI_CPUFREQ_CPB is not set -CONFIG_X86_AMD_FREQ_SENSITIVITY=y -# CONFIG_X86_AMD_PLATFORM_DEVICE is not set -CONFIG_X86_AMD_PSTATE=y -CONFIG_X86_CPUID=y -CONFIG_X86_DIRECT_GBPAGES=y -CONFIG_X86_HV_CALLBACK_VECTOR=y -CONFIG_X86_INTEL_LPSS=y -# CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS is not set -CONFIG_X86_INTEL_PSTATE=y -CONFIG_X86_KERNEL_IBT=y -CONFIG_X86_MINIMUM_CPU_FAMILY=64 -# CONFIG_X86_PCC_CPUFREQ is not set -CONFIG_X86_PKG_TEMP_THERMAL=y -# CONFIG_X86_PMEM_LEGACY is not set -CONFIG_X86_PM_TIMER=y -# CONFIG_X86_POWERNOW_K8 is not set -CONFIG_X86_SGX=y -# CONFIG_X86_VSYSCALL_EMULATION is not set -CONFIG_X86_X2APIC=y -CONFIG_X86_X32_ABI=y -CONFIG_XARRAY_MULTI=y -CONFIG_XEN=y -CONFIG_XENFS=y -CONFIG_XEN_512GB=y -CONFIG_XEN_ACPI=y -CONFIG_XEN_ACPI_PROCESSOR=y -CONFIG_XEN_AUTO_XLATE=y -# CONFIG_XEN_BACKEND is not set -CONFIG_XEN_BALLOON=y -CONFIG_XEN_BLKDEV_FRONTEND=y -CONFIG_XEN_COMPAT_XENFS=y -CONFIG_XEN_DEBUG_FS=y -CONFIG_XEN_DEV_EVTCHN=y -CONFIG_XEN_DOM0=y -CONFIG_XEN_EFI=y -CONFIG_XEN_FBDEV_FRONTEND=y -CONFIG_XEN_GNTDEV=y -CONFIG_XEN_GRANT_DEV_ALLOC=y -CONFIG_XEN_HAVE_PVMMU=y -CONFIG_XEN_HAVE_VPMU=y -# CONFIG_XEN_MCE_LOG is not set -CONFIG_XEN_NETDEV_FRONTEND=y -CONFIG_XEN_PCIDEV_FRONTEND=y -CONFIG_XEN_PRIVCMD=y -CONFIG_XEN_PV=y -CONFIG_XEN_PVH=y -CONFIG_XEN_PVHVM=y -CONFIG_XEN_PVHVM_GUEST=y -CONFIG_XEN_PVHVM_SMP=y -CONFIG_XEN_PV_DOM0=y -CONFIG_XEN_PV_SMP=y -CONFIG_XEN_SAVE_RESTORE=y -CONFIG_XEN_SCSI_FRONTEND=y -CONFIG_XEN_SYMS=y -CONFIG_XEN_SYS_HYPERVISOR=y -CONFIG_XEN_WDT=y -CONFIG_XEN_XENBUS_FRONTEND=y -CONFIG_XPS=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_ZONE_DMA32=y diff --git a/target/linux/x86/config-5.18 b/target/linux/x86/config-5.18 deleted file mode 100644 index 46aaf8e70543d2..00000000000000 --- a/target/linux/x86/config-5.18 +++ /dev/null @@ -1,471 +0,0 @@ -# CONFIG_60XX_WDT is not set -CONFIG_64BIT=y -# CONFIG_ACPI is not set -# CONFIG_ACQUIRE_WDT is not set -# CONFIG_ADVANTECH_WDT is not set -CONFIG_AF_UNIX_OOB=y -# CONFIG_ALIM1535_WDT is not set -# CONFIG_AMD_HSMP is not set -CONFIG_AMD_NB=y -# CONFIG_AMD_PTDMA is not set -# CONFIG_AMD_SFH_HID is not set -CONFIG_ARCH_CLOCKSOURCE_INIT=y -CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y -CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_MAY_HAVE_PC_FDC=y -CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y -CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y -CONFIG_ARCH_MMAP_RND_BITS=28 -CONFIG_ARCH_MMAP_RND_BITS_MAX=32 -CONFIG_ARCH_MMAP_RND_BITS_MIN=28 -CONFIG_ARCH_NR_GPIO=1024 -CONFIG_ARCH_RANDOM=y -CONFIG_ARCH_SPARSEMEM_DEFAULT=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_STACKWALK=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y -CONFIG_ARCH_USES_PG_UNCACHED=y -CONFIG_ARCH_WANTS_DYNAMIC_TASK_STRUCT=y -CONFIG_ARCH_WANTS_NO_INSTR=y -CONFIG_ARCH_WANTS_THP_SWAP=y -CONFIG_ATA=y -CONFIG_ATA_GENERIC=y -CONFIG_ATA_PIIX=y -CONFIG_AUDIT_ARCH=y -CONFIG_BINARY_PRINTF=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_SD=y -CONFIG_BLK_MQ_PCI=y -CONFIG_BLOCK_LEGACY_AUTOLOAD=y -CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" -CONFIG_CLKBLD_I8253=y -CONFIG_CLKEVT_I8253=y -CONFIG_CLOCKSOURCE_VALIDATE_LAST_CYCLE=y -CONFIG_CLOCKSOURCE_WATCHDOG=y -CONFIG_CLOCKSOURCE_WATCHDOG_MAX_SKEW_US=100 -CONFIG_COMMON_CLK=y -CONFIG_COMPAT_32BIT_TIME=y -CONFIG_CONSOLE_TRANSLATIONS=y -# CONFIG_CPU5_WDT is not set -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -CONFIG_CPU_FREQ_GOV_ATTR_SET=y -CONFIG_CPU_FREQ_GOV_COMMON=y -# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_GOV_USERSPACE is not set -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_SUP_AMD=y -CONFIG_CPU_SUP_CENTAUR=y -CONFIG_CPU_SUP_HYGON=y -CONFIG_CPU_SUP_INTEL=y -CONFIG_CPU_SUP_ZHAOXIN=y -CONFIG_CRASH_CORE=y -CONFIG_CRC16=y -# CONFIG_CRC64_ROCKSOFT is not set -# CONFIG_CRYPTO_BLOWFISH_X86_64 is not set -# CONFIG_CRYPTO_CAMELLIA_AESNI_AVX2_X86_64 is not set -# CONFIG_CRYPTO_CAMELLIA_AESNI_AVX_X86_64 is not set -# CONFIG_CRYPTO_CAMELLIA_X86_64 is not set -# CONFIG_CRYPTO_CAST5_AVX_X86_64 is not set -# CONFIG_CRYPTO_CAST6_AVX_X86_64 is not set -CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_CRC32C=y -# CONFIG_CRYPTO_CRC32_PCLMUL is not set -# CONFIG_CRYPTO_DES3_EDE_X86_64 is not set -CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y -CONFIG_CRYPTO_LIB_POLY1305_RSIZE=11 -CONFIG_CRYPTO_LIB_SHA256=y -# CONFIG_CRYPTO_NHPOLY1305_AVX2 is not set -# CONFIG_CRYPTO_NHPOLY1305_SSE2 is not set -CONFIG_CRYPTO_RNG2=y -# CONFIG_CRYPTO_SERPENT_AVX2_X86_64 is not set -# CONFIG_CRYPTO_SERPENT_AVX_X86_64 is not set -# CONFIG_CRYPTO_SERPENT_SSE2_X86_64 is not set -# CONFIG_CRYPTO_SHA1_SSSE3 is not set -# CONFIG_CRYPTO_SHA512_SSSE3 is not set -# CONFIG_CRYPTO_SM3_AVX_X86_64 is not set -# CONFIG_CRYPTO_SM4_AESNI_AVX2_X86_64 is not set -# CONFIG_CRYPTO_SM4_AESNI_AVX_X86_64 is not set -# CONFIG_CRYPTO_TWOFISH_AVX_X86_64 is not set -# CONFIG_CRYPTO_TWOFISH_X86_64 is not set -# CONFIG_CRYPTO_TWOFISH_X86_64_3WAY is not set -# CONFIG_CX_ECAT is not set -CONFIG_DCACHE_WORD_ACCESS=y -# CONFIG_DEBUG_BOOT_PARAMS is not set -# CONFIG_DEBUG_ENTRY is not set -CONFIG_DEBUG_INFO=y -# CONFIG_DEBUG_INFO_NONE is not set -# CONFIG_DEBUG_KMAP_LOCAL_FORCE_MAP is not set -CONFIG_DEBUG_MEMORY_INIT=y -CONFIG_DEBUG_MISC=y -# CONFIG_DEBUG_NMI_SELFTEST is not set -# CONFIG_DEBUG_TLBFLUSH is not set -CONFIG_DECOMPRESS_BZIP2=y -CONFIG_DECOMPRESS_GZIP=y -# CONFIG_DEFAULT_FQ_CODEL is not set -CONFIG_DEFAULT_NET_SCH="pfifo_fast" -CONFIG_DEFAULT_PFIFO_FAST=y -CONFIG_DMADEVICES=y -CONFIG_DMA_SHARED_BUFFER=y -CONFIG_DMI=y -CONFIG_DMIID=y -CONFIG_DMI_SCAN_MACHINE_NON_EFI_FALLBACK=y -CONFIG_DMI_SYSFS=y -CONFIG_DNOTIFY=y -CONFIG_DRM=y -CONFIG_DRM_BRIDGE=y -CONFIG_DRM_NOMODESET=y -CONFIG_DRM_PANEL=y -CONFIG_DRM_PANEL_BRIDGE=y -CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y -# CONFIG_DRM_SIMPLEDRM is not set -# CONFIG_DRM_SSD130X is not set -CONFIG_DUMMY_CONSOLE=y -CONFIG_DYNAMIC_MEMORY_LAYOUT=y -CONFIG_DYNAMIC_SIGFRAME=y -CONFIG_EARLY_PRINTK=y -# CONFIG_EARLY_PRINTK_DBGP is not set -CONFIG_EDAC_ATOMIC_SCRUB=y -CONFIG_EDAC_SUPPORT=y -# CONFIG_EDD is not set -# CONFIG_EISA is not set -# CONFIG_EUROTECH_WDT is not set -CONFIG_EXCLUSIVE_SYSTEM_RAM=y -CONFIG_EXT4_FS=y -CONFIG_F2FS_FS=y -# CONFIG_F71808E_WDT is not set -CONFIG_FB_CMDLINE=y -CONFIG_FIRMWARE_MEMMAP=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_FRAME_POINTER=y -CONFIG_FS_IOMAP=y -CONFIG_FS_MBCACHE=y -# CONFIG_FUN_ETH is not set -CONFIG_FUSION=y -# CONFIG_FUSION_CTL is not set -# CONFIG_FUSION_LOGGING is not set -CONFIG_FUSION_MAX_SGE=128 -CONFIG_FUSION_SPI=y -CONFIG_FW_LOADER_PAGED_BUF=y -# CONFIG_GART_IOMMU is not set -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_CLOCKEVENTS_MIN_ADJUST=y -CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_GENERIC_CPU=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_CPU_VULNERABILITIES=y -CONFIG_GENERIC_EARLY_IOREMAP=y -CONFIG_GENERIC_ENTRY=y -CONFIG_GENERIC_GETTIMEOFDAY=y -CONFIG_GENERIC_IOMAP=y -CONFIG_GENERIC_IRQ_MATRIX_ALLOCATOR=y -CONFIG_GENERIC_IRQ_RESERVATION_MODE=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_ISA_DMA=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_MSI_IRQ_DOMAIN=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_GLOB=y -# CONFIG_HANGCHECK_TIMER is not set -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HARDLOCKUP_CHECK_TIMESTAMP=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HDMI=y -CONFIG_HID=y -CONFIG_HPET_EMULATE_RTC=y -CONFIG_HPET_TIMER=y -# CONFIG_HP_WATCHDOG is not set -CONFIG_HW_CONSOLE=y -CONFIG_HW_RANDOM=y -CONFIG_HW_RANDOM_VIA=y -# CONFIG_HYPERVISOR_GUEST is not set -CONFIG_HZ_PERIODIC=y -CONFIG_I2C=y -CONFIG_I2C_ALGOBIT=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I8253_LOCK=y -# CONFIG_IA32_EMULATION is not set -CONFIG_IA32_FEAT_CTL=y -# CONFIG_IB700_WDT is not set -# CONFIG_IBMASR is not set -# CONFIG_IBM_RTL is not set -# CONFIG_IE6XX_WDT is not set -CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 -CONFIG_INITRAMFS_SOURCE="" -CONFIG_INPUT=y -CONFIG_INPUT_KEYBOARD=y -CONFIG_INPUT_VIVALDIFMAP=y -CONFIG_INSTRUCTION_DECODER=y -# CONFIG_INTEL_HFI_THERMAL is not set -# CONFIG_INTEL_IDXD_COMPAT is not set -# CONFIG_INTEL_LDMA is not set -# CONFIG_INTEL_PCH_THERMAL is not set -# CONFIG_INTEL_POWERCLAMP is not set -# CONFIG_INTEL_SCU_PCI is not set -# CONFIG_INTEL_SPEED_SELECT_INTERFACE is not set -# CONFIG_INTEL_UNCORE_FREQ_CONTROL is not set -# CONFIG_INTEL_VSEC is not set -# CONFIG_IOSF_MBI is not set -CONFIG_IO_DELAY_0X80=y -# CONFIG_IO_DELAY_0XED is not set -# CONFIG_IO_DELAY_NONE is not set -# CONFIG_IO_DELAY_UDELAY is not set -CONFIG_IO_URING=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -CONFIG_ISA_DMA_API=y -# CONFIG_IT8712F_WDT is not set -# CONFIG_IT87_WDT is not set -# CONFIG_ITCO_WDT is not set -CONFIG_JBD2=y -CONFIG_KALLSYMS=y -CONFIG_KCMP=y -CONFIG_KEXEC=y -CONFIG_KEXEC_CORE=y -CONFIG_KEYBOARD_ATKBD=y -# CONFIG_LEDS_CLEVO_MAIL is not set -# CONFIG_LEGACY_VSYSCALL_EMULATE is not set -# CONFIG_LEGACY_VSYSCALL_NONE is not set -CONFIG_LEGACY_VSYSCALL_XONLY=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LTO_NONE=y -# CONFIG_MACHZ_WDT is not set -# CONFIG_MATOM is not set -# CONFIG_MCORE2 is not set -CONFIG_MEMFD_CREATE=y -# CONFIG_MFD_INTEL_LPSS_PCI is not set -# CONFIG_MFD_SIMPLE_MFD_I2C is not set -CONFIG_MICROCODE=y -CONFIG_MICROCODE_AMD=y -CONFIG_MICROCODE_INTEL=y -CONFIG_MICROCODE_OLD_INTERFACE=y -CONFIG_MIGRATION=y -# CONFIG_MK8 is not set -# CONFIG_MODIFY_LDT_SYSCALL is not set -CONFIG_MODULES_TREE_LOOKUP=y -CONFIG_MODULES_USE_ELF_RELA=y -# CONFIG_MPSC is not set -# CONFIG_MTD is not set -CONFIG_MTRR=y -# CONFIG_MTRR_SANITIZER is not set -CONFIG_NAMESPACES=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y -CONFIG_NEED_PER_CPU_KM=y -CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y -CONFIG_NEED_SG_DMA_LENGTH=y -# CONFIG_NET_NS is not set -CONFIG_NET_SOCK_MSG=y -CONFIG_NET_VENDOR_DAVICOM=y -CONFIG_NET_VENDOR_FUNGIBLE=y -CONFIG_NLS=y -CONFIG_NR_CPUS=1 -CONFIG_NR_CPUS_DEFAULT=1 -CONFIG_NR_CPUS_RANGE_BEGIN=1 -CONFIG_NR_CPUS_RANGE_END=1 -CONFIG_NVRAM=y -# CONFIG_OF is not set -CONFIG_OUTPUT_FORMAT="elf64-x86-64" -CONFIG_PAGE_POOL=y -# CONFIG_PAGE_POOL_STATS is not set -CONFIG_PAGE_SIZE_LESS_THAN_256KB=y -CONFIG_PAGE_SIZE_LESS_THAN_64KB=y -# CONFIG_PAGE_TABLE_CHECK is not set -CONFIG_PAGE_TABLE_ISOLATION=y -CONFIG_PAHOLE_VERSION=0 -CONFIG_PC104=y -# CONFIG_PC87413_WDT is not set -CONFIG_PCI=y -CONFIG_PCI_ATS=y -CONFIG_PCI_DIRECT=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_IOV=y -CONFIG_PCI_LABEL=y -CONFIG_PCI_LOCKLESS_CONFIG=y -CONFIG_PCI_MSI=y -CONFIG_PCI_MSI_IRQ_DOMAIN=y -CONFIG_PCSPKR_PLATFORM=y -# CONFIG_PECI is not set -CONFIG_PERF_EVENTS=y -# CONFIG_PERF_EVENTS_AMD_UNCORE is not set -CONFIG_PERF_EVENTS_INTEL_CSTATE=y -CONFIG_PERF_EVENTS_INTEL_RAPL=y -CONFIG_PERF_EVENTS_INTEL_UNCORE=y -CONFIG_PGTABLE_LEVELS=5 -CONFIG_PHYSICAL_ALIGN=0x200000 -CONFIG_PHYSICAL_START=0x1000000 -CONFIG_PHYS_ADDR_T_64BIT=y -# CONFIG_PHY_INTEL_LGM_EMMC is not set -CONFIG_PMC_ATOM=y -CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y -CONFIG_POWER_SUPPLY=y -CONFIG_PREEMPTION=y -CONFIG_PREEMPT_BUILD=y -CONFIG_PREEMPT_COUNT=y -CONFIG_PREEMPT_DYNAMIC=y -CONFIG_PREEMPT_RCU=y -# CONFIG_PROCESSOR_SELECT is not set -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_PROC_PID_ARCH_STATUS=y -# CONFIG_PROVIDE_OHCI1394_DMA_INIT is not set -CONFIG_PTP_1588_CLOCK_OPTIONAL=y -# CONFIG_PUNIT_ATOM_DEBUG is not set -CONFIG_RANDOMIZE_KSTACK_OFFSET=y -CONFIG_RATIONAL=y -CONFIG_RD_BZIP2=y -CONFIG_RD_GZIP=y -CONFIG_RETPOLINE=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_I2C_AND_SPI=y -CONFIG_RTC_MC146818_LIB=y -CONFIG_SATA_HOST=y -# CONFIG_SBC_EPX_C3_WATCHDOG is not set -# CONFIG_SC1200_WDT is not set -CONFIG_SCSI=y -CONFIG_SCSI_COMMON=y -CONFIG_SCSI_SPI_ATTRS=y -CONFIG_SERIAL_8250_PCI=y -# CONFIG_SERIAL_LANTIQ is not set -CONFIG_SERIO=y -CONFIG_SERIO_I8042=y -CONFIG_SERIO_LIBPS2=y -CONFIG_SERIO_SERPORT=y -CONFIG_SG_POOL=y -# CONFIG_SIEMENS_SIMATIC_IPC is not set -# CONFIG_SMSC37B787_WDT is not set -# CONFIG_SMSC_SCH311X_WDT is not set -CONFIG_SPARSEMEM=y -CONFIG_SPARSEMEM_EXTREME=y -CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y -CONFIG_SPARSE_IRQ=y -CONFIG_SRCU=y -CONFIG_STACK_VALIDATION=y -# CONFIG_STATIC_CALL_SELFTEST is not set -# CONFIG_STRICT_SIGALTSTACK_SIZE is not set -CONFIG_SWIOTLB=y -CONFIG_SYNC_FILE=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_SYSFB=y -# CONFIG_SYSFB_SIMPLEFB is not set -# CONFIG_TELCLOCK is not set -# CONFIG_TEST_CLOCKSOURCE_WATCHDOG is not set -# CONFIG_TEST_FPU is not set -CONFIG_THERMAL=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THREAD_INFO_IN_TASK=y -CONFIG_TICK_CPU_ACCOUNTING=y -# CONFIG_TQMX86_WDT is not set -CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y -CONFIG_UNINLINE_SPIN_UNLOCK=y -CONFIG_UNWINDER_FRAME_POINTER=y -# CONFIG_UNWINDER_GUESS is not set -# CONFIG_UNWINDER_ORC is not set -CONFIG_UP_LATE_INIT=y -CONFIG_USB=y -CONFIG_USB_COMMON=y -CONFIG_USB_EHCI_HCD=y -# CONFIG_USB_EHCI_HCD_PLATFORM is not set -CONFIG_USB_EHCI_PCI=y -CONFIG_USB_HID=y -CONFIG_USB_HIDDEV=y -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_OHCI_HCD_PCI=y -# CONFIG_USB_OHCI_HCD_PLATFORM is not set -CONFIG_USB_PCI=y -CONFIG_USB_SUPPORT=y -CONFIG_USB_UHCI_HCD=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_PCI=y -# CONFIG_USB_XHCI_PLATFORM is not set -# CONFIG_USER_NS is not set -CONFIG_USER_STACKTRACE_SUPPORT=y -CONFIG_VGA_CONSOLE=y -# CONFIG_VIA_WDT is not set -# CONFIG_VMD is not set -# CONFIG_VMWARE_VMCI is not set -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -CONFIG_VT_HW_CONSOLE_BINDING=y -# CONFIG_WAFER_WDT is not set -CONFIG_X86=y -CONFIG_X86_5LEVEL=y -CONFIG_X86_64=y -# CONFIG_X86_CHECK_BIOS_CORRUPTION is not set -CONFIG_X86_CMOV=y -CONFIG_X86_CMPXCHG64=y -# CONFIG_X86_CPA_STATISTICS is not set -# CONFIG_X86_CPUID is not set -# CONFIG_X86_CPU_RESCTRL is not set -CONFIG_X86_DEBUGCTLMSR=y -# CONFIG_X86_DEBUG_FPU is not set -# CONFIG_X86_DECODER_SELFTEST is not set -CONFIG_X86_DIRECT_GBPAGES=y -# CONFIG_X86_EXTENDED_PLATFORM is not set -CONFIG_X86_FEATURE_NAMES=y -CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS=y -# CONFIG_X86_INTEL_PSTATE is not set -# CONFIG_X86_INTEL_TSX_MODE_AUTO is not set -CONFIG_X86_INTEL_TSX_MODE_OFF=y -# CONFIG_X86_INTEL_TSX_MODE_ON is not set -CONFIG_X86_INTERNODE_CACHE_SHIFT=6 -CONFIG_X86_IOPL_IOPERM=y -CONFIG_X86_IO_APIC=y -# CONFIG_X86_KERNEL_IBT is not set -CONFIG_X86_L1_CACHE_SHIFT=6 -CONFIG_X86_LOCAL_APIC=y -CONFIG_X86_MCE=y -# CONFIG_X86_MCELOG_LEGACY is not set -CONFIG_X86_MCE_AMD=y -# CONFIG_X86_MCE_INJECT is not set -CONFIG_X86_MCE_INTEL=y -CONFIG_X86_MCE_THRESHOLD=y -CONFIG_X86_MINIMUM_CPU_FAMILY=64 -CONFIG_X86_MPPARSE=y -CONFIG_X86_MSR=y -# CONFIG_X86_P4_CLOCKMOD is not set -CONFIG_X86_PAT=y -CONFIG_X86_PLATFORM_DEVICES=y -# CONFIG_X86_PLATFORM_DRIVERS_DELL is not set -# CONFIG_X86_PMEM_LEGACY is not set -CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS=y -# CONFIG_X86_SGX is not set -CONFIG_X86_SMAP=y -CONFIG_X86_SUPPORTS_MEMORY_FAILURE=y -CONFIG_X86_THERMAL_VECTOR=y -CONFIG_X86_TSC=y -CONFIG_X86_UMIP=y -CONFIG_X86_VERBOSE_BOOTUP=y -CONFIG_X86_VMX_FEATURE_NAMES=y -CONFIG_X86_VSYSCALL_EMULATION=y -# CONFIG_X86_X32_ABI is not set -CONFIG_XZ_DEC_BCJ=y -CONFIG_XZ_DEC_X86=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZONE_DMA32=y diff --git a/target/linux/x86/patches-5.18/100-fix_cs5535_clockevt.patch b/target/linux/x86/patches-5.18/100-fix_cs5535_clockevt.patch deleted file mode 100644 index d4de2027bafe15..00000000000000 --- a/target/linux/x86/patches-5.18/100-fix_cs5535_clockevt.patch +++ /dev/null @@ -1,13 +0,0 @@ ---- a/drivers/clocksource/timer-cs5535.c -+++ b/drivers/clocksource/timer-cs5535.c -@@ -127,7 +127,9 @@ static irqreturn_t mfgpt_tick(int irq, v - cs5535_mfgpt_write(cs5535_event_clock, MFGPT_REG_SETUP, - MFGPT_SETUP_CNTEN | MFGPT_SETUP_CMP2); - -- cs5535_clockevent.event_handler(&cs5535_clockevent); -+ if (cs5535_clockevent.event_handler) -+ cs5535_clockevent.event_handler(&cs5535_clockevent); -+ - return IRQ_HANDLED; - } - diff --git a/target/linux/x86/patches-5.18/993-bnx2x_warpcore_8727_2_5g_sgmii_txfault.patch b/target/linux/x86/patches-5.18/993-bnx2x_warpcore_8727_2_5g_sgmii_txfault.patch deleted file mode 100644 index a41f45a525fe67..00000000000000 --- a/target/linux/x86/patches-5.18/993-bnx2x_warpcore_8727_2_5g_sgmii_txfault.patch +++ /dev/null @@ -1,216 +0,0 @@ ---- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h -+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h -@@ -1592,6 +1592,7 @@ struct bnx2x { - uint num_ethernet_queues; - uint num_cnic_queues; - int disable_tpa; -+ int mask_tx_fault; - - u32 rx_mode; - #define BNX2X_RX_MODE_NONE 0 ---- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c -+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c -@@ -151,6 +151,7 @@ typedef int (*read_sfp_module_eeprom_fun - - #define SFP_EEPROM_CON_TYPE_ADDR 0x2 - #define SFP_EEPROM_CON_TYPE_VAL_UNKNOWN 0x0 -+ #define SFP_EEPROM_CON_TYPE_VAL_SC 0x1 - #define SFP_EEPROM_CON_TYPE_VAL_LC 0x7 - #define SFP_EEPROM_CON_TYPE_VAL_COPPER 0x21 - #define SFP_EEPROM_CON_TYPE_VAL_RJ45 0x22 -@@ -4210,6 +4211,16 @@ static void bnx2x_warpcore_set_sgmii_spe - 0x1000); - DP(NETIF_MSG_LINK, "set SGMII AUTONEG\n"); - } else { -+ /* Note that 2.5G works only when used with 1G advertisment */ -+ if (fiber_mode && (phy->req_line_speed == SPEED_2500) && -+ (phy->speed_cap_mask & -+ (PORT_HW_CFG_SPEED_CAPABILITY_D0_1G | -+ PORT_HW_CFG_SPEED_CAPABILITY_D0_2_5G))) { -+ bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, -+ MDIO_WC_REG_SERDESDIGITAL_MISC1, -+ 0x6010); -+ } -+ - bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, - MDIO_WC_REG_COMBO_IEEE0_MIICTRL, &val16); - val16 &= 0xcebf; -@@ -4220,6 +4231,7 @@ static void bnx2x_warpcore_set_sgmii_spe - val16 |= 0x2000; - break; - case SPEED_1000: -+ case SPEED_2500: - val16 |= 0x0040; - break; - default: -@@ -8174,6 +8186,7 @@ static int bnx2x_get_edc_mode(struct bnx - break; - } - case SFP_EEPROM_CON_TYPE_VAL_UNKNOWN: -+ case SFP_EEPROM_CON_TYPE_VAL_SC: - case SFP_EEPROM_CON_TYPE_VAL_LC: - case SFP_EEPROM_CON_TYPE_VAL_RJ45: - check_limiting_mode = 1; -@@ -8184,7 +8197,8 @@ static int bnx2x_get_edc_mode(struct bnx - (val[SFP_EEPROM_1G_COMP_CODE_ADDR] != 0)) { - DP(NETIF_MSG_LINK, "1G SFP module detected\n"); - phy->media_type = ETH_PHY_SFP_1G_FIBER; -- if (phy->req_line_speed != SPEED_1000) { -+ if ((phy->req_line_speed != SPEED_1000) && -+ (phy->req_line_speed != SPEED_2500)) { - u8 gport = params->port; - phy->req_line_speed = SPEED_1000; - if (!CHIP_IS_E1x(bp)) { -@@ -8344,7 +8358,7 @@ static int bnx2x_wait_for_sfp_module_ini - * some phys type ( e.g. JDSU ) - */ - -- for (timeout = 0; timeout < 60; timeout++) { -+ for (timeout = 0; timeout < 1800; timeout++) { - if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT) - rc = bnx2x_warpcore_read_sfp_module_eeprom( - phy, params, I2C_DEV_ADDR_A0, 1, 1, &val, -@@ -9238,6 +9252,7 @@ static void bnx2x_8727_config_speed(stru - u16 tmp1, val; - /* Set option 1G speed */ - if ((phy->req_line_speed == SPEED_1000) || -+ (phy->req_line_speed == SPEED_2500) || - (phy->media_type == ETH_PHY_SFP_1G_FIBER)) { - DP(NETIF_MSG_LINK, "Setting 1G force\n"); - bnx2x_cl45_write(bp, phy, -@@ -9247,6 +9262,22 @@ static void bnx2x_8727_config_speed(stru - bnx2x_cl45_read(bp, phy, - MDIO_PMA_DEVAD, MDIO_PMA_REG_10G_CTRL2, &tmp1); - DP(NETIF_MSG_LINK, "1.7 = 0x%x\n", tmp1); -+ if ((phy->req_line_speed == SPEED_2500) && -+ (phy->speed_cap_mask & -+ (PORT_HW_CFG_SPEED_CAPABILITY_D0_1G | -+ PORT_HW_CFG_SPEED_CAPABILITY_D0_2_5G))) { -+ bnx2x_cl45_read_and_write(bp, phy, -+ MDIO_AN_DEVAD, -+ MDIO_AN_REG_8727_MISC_CTRL2, -+ ~(1<<5)); -+ bnx2x_cl45_write(bp, phy, -+ MDIO_AN_DEVAD, -+ MDIO_AN_REG_8727_MISC_CTRL1, 0x0010); -+ } else { -+ bnx2x_cl45_write(bp, phy, -+ MDIO_AN_DEVAD, -+ MDIO_AN_REG_8727_MISC_CTRL1, 0x001C); -+ } - /* Power down the XAUI until link is up in case of dual-media - * and 1G - */ -@@ -9268,7 +9299,7 @@ static void bnx2x_8727_config_speed(stru - - DP(NETIF_MSG_LINK, "Setting 1G clause37\n"); - bnx2x_cl45_write(bp, phy, -- MDIO_AN_DEVAD, MDIO_AN_REG_8727_MISC_CTRL, 0); -+ MDIO_AN_DEVAD, MDIO_AN_REG_8727_MISC_CTRL2, 0); - bnx2x_cl45_write(bp, phy, - MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1300); - } else { -@@ -9276,9 +9307,12 @@ static void bnx2x_8727_config_speed(stru - * registers although it is default - */ - bnx2x_cl45_write(bp, phy, -- MDIO_AN_DEVAD, MDIO_AN_REG_8727_MISC_CTRL, -+ MDIO_AN_DEVAD, MDIO_AN_REG_8727_MISC_CTRL2, - 0x0020); - bnx2x_cl45_write(bp, phy, -+ MDIO_AN_DEVAD, MDIO_AN_REG_8727_MISC_CTRL1, -+ 0x001C); -+ bnx2x_cl45_write(bp, phy, - MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x0100); - bnx2x_cl45_write(bp, phy, - MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, 0x2040); -@@ -9567,6 +9601,11 @@ static u8 bnx2x_8727_read_status(struct - vars->line_speed = SPEED_10000; - DP(NETIF_MSG_LINK, "port %x: External link up in 10G\n", - params->port); -+ } else if ((link_status & (1<<1)) && (!(link_status & (1<<14)))) { -+ link_up = 1; -+ vars->line_speed = SPEED_2500; -+ DP(NETIF_MSG_LINK, "port %x: External link up in 2.5G\n", -+ params->port); - } else if ((link_status & (1<<0)) && (!(link_status & (1<<13)))) { - link_up = 1; - vars->line_speed = SPEED_1000; -@@ -9598,7 +9637,8 @@ static u8 bnx2x_8727_read_status(struct - } - - if ((DUAL_MEDIA(params)) && -- (phy->req_line_speed == SPEED_1000)) { -+ ((phy->req_line_speed == SPEED_1000) || -+ (phy->req_line_speed == SPEED_2500))) { - bnx2x_cl45_read(bp, phy, - MDIO_PMA_DEVAD, - MDIO_PMA_REG_8727_PCS_GP, &val1); -@@ -11722,6 +11762,7 @@ static const struct bnx2x_phy phy_warpco - SUPPORTED_100baseT_Full | - SUPPORTED_1000baseT_Full | - SUPPORTED_1000baseKX_Full | -+ SUPPORTED_2500baseX_Full | - SUPPORTED_10000baseT_Full | - SUPPORTED_10000baseKR_Full | - SUPPORTED_20000baseKR2_Full | -@@ -11908,6 +11949,7 @@ static const struct bnx2x_phy phy_8727 = - .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, - .mdio_ctrl = 0, - .supported = (SUPPORTED_10000baseT_Full | -+ SUPPORTED_2500baseX_Full | - SUPPORTED_1000baseT_Full | - SUPPORTED_FIBRE | - SUPPORTED_Pause | -@@ -12255,6 +12297,7 @@ static int bnx2x_populate_int_phy(struct - break; - case PORT_HW_CFG_NET_SERDES_IF_SFI: - phy->supported &= (SUPPORTED_1000baseT_Full | -+ SUPPORTED_2500baseX_Full | - SUPPORTED_10000baseT_Full | - SUPPORTED_FIBRE | - SUPPORTED_Pause | -@@ -13939,7 +13982,8 @@ void bnx2x_period_func(struct link_param - & PORT_HW_CFG_NET_SERDES_IF_MASK) == - PORT_HW_CFG_NET_SERDES_IF_SFI) { - if (bnx2x_is_sfp_module_plugged(phy, params)) { -- bnx2x_sfp_tx_fault_detection(phy, params, vars); -+ if(!((params->port + 1) & bp->mask_tx_fault)) -+ bnx2x_sfp_tx_fault_detection(phy, params, vars); - } else if (vars->link_status & - LINK_STATUS_SFP_TX_FAULT) { - /* Clean trail, interrupt corrects the leds */ ---- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c -+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c -@@ -113,6 +113,10 @@ static int disable_tpa; - module_param(disable_tpa, int, 0444); - MODULE_PARM_DESC(disable_tpa, " Disable the TPA (LRO) feature"); - -+static int mask_tx_fault; -+module_param(mask_tx_fault, int, 0444); -+MODULE_PARM_DESC(mask_tx_fault, " Mask SFP TX fault detection"); -+ - static int int_mode; - module_param(int_mode, int, 0444); - MODULE_PARM_DESC(int_mode, " Force interrupt mode other than MSI-X " -@@ -12342,6 +12346,8 @@ static int bnx2x_init_bp(struct bnx2x *b - if (BP_NOMCP(bp) && (func == 0)) - dev_err(&bp->pdev->dev, "MCP disabled, must load devices in order!\n"); - -+ bp->mask_tx_fault = mask_tx_fault; -+ - bp->disable_tpa = disable_tpa; - bp->disable_tpa |= !!IS_MF_STORAGE_ONLY(bp); - /* Reduce memory usage in kdump environment by disabling TPA */ ---- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h -+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h -@@ -7169,7 +7169,8 @@ Theotherbitsarereservedandshouldbezero*/ - #define MDIO_PMA_REG_8727_PCS_GP 0xc842 - #define MDIO_PMA_REG_8727_OPT_CFG_REG 0xc8e4 - --#define MDIO_AN_REG_8727_MISC_CTRL 0x8309 -+#define MDIO_AN_REG_8727_MISC_CTRL1 0x8308 -+#define MDIO_AN_REG_8727_MISC_CTRL2 0x8309 - - #define MDIO_PMA_REG_8073_CHIP_REV 0xc801 - #define MDIO_PMA_REG_8073_SPEED_LINK_STATUS 0xc820