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Compiler Writer SDK

Prakash Raghavendra edited this page Aug 1, 2014 · 8 revisions

Compiler Writer SDK

Introduction:

This page gives relevant information about the Compiler Writer SDK, on how to use them, what is expected out of this and some of the current limitations. Using the information on this page, compiler writers can implement a compiler for languages of their choice (example, C++AMP, Python, OpenMP etc). They can, for example, write a new compiler for C++AMP by using this reference implementation.

Pieces of this SDK:

The first part of any compiler for any chosen language is to have a front-end, which parses the high level source and emits high-level IR. Some of the de-facto standard IRs are GIMPLE (GCC) and LLVMIR (LLVM compilers). The SDK given here works only with LLVM IR, since it has become very popular with compiler writers for accelerator devices. Though the SDK has a CLANG based front-end to generate LLVMIR from the high level source, it is expected that the compiler writer has some way of generating the LLVMIR to use the SDK given here.

This SDK has one HSAIL backend, LLVM-HSAIL code generator. This can be downloaded from https://github.com/HSAFoundation/LLVM-to-HSAIL-Test-Compiler. This is based on LLVM 3.2 compiler. AMD has provided the HSAIL target code generator along with a few changes in the LLVM core directories. This is built, tested on Linux (Ubuntu 3.14) with some of the test files given along with this drop. Note that this has basic skeletal code generator without any AMD specific optimizations. It is expected that user would write their own optimization necessary for better HSAIL code generator.

There is one "tests" directory which has some test cases (kernel source files). There is a script which uses the given CLANG based front-end (CLC2) and generates the LLVMIR. LLVM optimizer optimizes the IR (at O3). The HSAIL code generator generates the required BRIG/HSAIL files. The assembler/disassembler can be downloaded and built from HSAIL-tools on the GITHUB.