From 4ef0bb676cd4114ab21d21d03f31b4eb17d97a70 Mon Sep 17 00:00:00 2001 From: Darian <32921628+Dazza0@users.noreply.github.com> Date: Thu, 26 Oct 2023 05:45:03 +0800 Subject: [PATCH 1/3] vTaskListTasks prints core affinity mask (#850) This commit updates vTaskListTasks so that it prints uxCoreAffinityMask if core affinity is enabled in configuration. --- tasks.c | 25 ++++++++++++++++++------- 1 file changed, 18 insertions(+), 7 deletions(-) diff --git a/tasks.c b/tasks.c index d74a4ccac88..2e1cce402ed 100644 --- a/tasks.c +++ b/tasks.c @@ -7225,13 +7225,24 @@ static void prvResetNextTaskUnblockTime( void ) if( uxConsumedBufferLength < ( uxBufferLength - 1 ) ) { /* Write the rest of the string. */ - iSnprintfReturnValue = snprintf( pcWriteBuffer, - uxBufferLength - uxConsumedBufferLength, - "\t%c\t%u\t%u\t%u\r\n", - cStatus, - ( unsigned int ) pxTaskStatusArray[ x ].uxCurrentPriority, - ( unsigned int ) pxTaskStatusArray[ x ].usStackHighWaterMark, - ( unsigned int ) pxTaskStatusArray[ x ].xTaskNumber ); /*lint !e586 sprintf() allowed as this is compiled with many compilers and this is a utility function only - not part of the core kernel implementation. */ + #if ( ( configUSE_CORE_AFFINITY == 1 ) && ( configNUMBER_OF_CORES > 1 ) ) + iSnprintfReturnValue = snprintf( pcWriteBuffer, + uxBufferLength - uxConsumedBufferLength, + "\t%c\t%u\t%u\t%u\t0x%x\r\n", + cStatus, + ( unsigned int ) pxTaskStatusArray[ x ].uxCurrentPriority, + ( unsigned int ) pxTaskStatusArray[ x ].usStackHighWaterMark, + ( unsigned int ) pxTaskStatusArray[ x ].xTaskNumber, + ( unsigned int ) pxTaskStatusArray[ x ].uxCoreAffinityMask ); /*lint !e586 sprintf() allowed as this is compiled with many compilers and this is a utility function only - not part of the core kernel implementation. */ + #else /* ( ( configUSE_CORE_AFFINITY == 1 ) && ( configNUMBER_OF_CORES > 1 ) ) */ + iSnprintfReturnValue = snprintf( pcWriteBuffer, + uxBufferLength - uxConsumedBufferLength, + "\t%c\t%u\t%u\t%u\r\n", + cStatus, + ( unsigned int ) pxTaskStatusArray[ x ].uxCurrentPriority, + ( unsigned int ) pxTaskStatusArray[ x ].usStackHighWaterMark, + ( unsigned int ) pxTaskStatusArray[ x ].xTaskNumber ); /*lint !e586 sprintf() allowed as this is compiled with many compilers and this is a utility function only - not part of the core kernel implementation. */ + #endif /* ( ( configUSE_CORE_AFFINITY == 1 ) && ( configNUMBER_OF_CORES > 1 ) ) */ uxCharsWrittenBySnprintf = prvSnprintfReturnValueToCharsWritten( iSnprintfReturnValue, uxBufferLength - uxConsumedBufferLength ); uxConsumedBufferLength += uxCharsWrittenBySnprintf; From 5281427a9942bf12d35240d388fcfe60fa7dd682 Mon Sep 17 00:00:00 2001 From: Tony Josi Date: Thu, 26 Oct 2023 11:27:45 +0530 Subject: [PATCH 2/3] Add nightly coverity scan (#859) * coverity scan job * coverity scan badge in readme * Update cron schedule * revert adding badge * update description * updating review feedback --- .github/workflows/coverity_scan.yml | 46 +++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) create mode 100644 .github/workflows/coverity_scan.yml diff --git a/.github/workflows/coverity_scan.yml b/.github/workflows/coverity_scan.yml new file mode 100644 index 00000000000..6f492d7fd03 --- /dev/null +++ b/.github/workflows/coverity_scan.yml @@ -0,0 +1,46 @@ +name: FreeRTOS-Kernel Coverity Scan +on: + schedule: ## Scheduled to run at 1:15 AM UTC daily. + - cron: '15 1 * * *' + + +jobs: + + Coverity-Scan: + name: Coverity Scan + runs-on: ubuntu-latest + steps: + - name: Checkout the Repository + uses: actions/checkout@v3 + + - name: Install Build Essentials + shell: bash + run: | + sudo apt-get -y update + sudo apt-get -y install build-essential + + - name: Install Coverity Build + shell: bash + env: + COVERITY_TOKEN: ${{ secrets.COVERITY_SCAN_TOKEN }} + run: | + wget -nv -qO- https://scan.coverity.com/download/linux64 --post-data "token=${COVERITY_TOKEN}&project=FreeRTOS-Kernel" | tar -zx --one-top-level=cov_scan --strip-components 1 + echo "cov_scan_path=$(pwd)/cov_scan/bin" >> $GITHUB_ENV + + - name: Coverity Build & Upload for Scan + shell: bash + env: + COVERITY_TOKEN: ${{ secrets.COVERITY_SCAN_TOKEN }} + run: | + export PATH="$PATH:${{env.cov_scan_path}}" + cmake -S ./examples/cmake_example/ -B build + cd build + cov-build --dir cov-int make -j + tar czvf gcc_freertos_kerenl_sample_build.tgz cov-int + COV_SCAN_UPLOAD_STATUS=$(curl --form token=${COVERITY_TOKEN} \ + --form email=tonyjosi@amazon.com \ + --form file=@gcc_freertos_kerenl_sample_build.tgz \ + --form version="Mainline" \ + --form description="FreeRTOS Kernel Nightly Scan" \ + https://scan.coverity.com/builds?project=FreeRTOS-Kernel) + echo "${COV_SCAN_UPLOAD_STATUS}" | grep -q -e 'Build successfully submitted' || echo >&2 "Error submitting build for analysis: ${COV_SCAN_UPLOAD_STATUS}" From 37678b06568fda7aaff090b77e8e34d6ab29ede4 Mon Sep 17 00:00:00 2001 From: Joe Benczarski Date: Fri, 27 Oct 2023 14:57:52 -0400 Subject: [PATCH 3/3] Support configurable RISC-V chip extension (#773) * Support configurable RISC-V chip extension Added the FREERTOS_RISCV_EXTENSION option to allow the user to select which chip extension they want included. Removed the port for pulpino to instead use the new option. * Add port GCC_RISC_V_GENERIC and IAR_RISC_V_GENERIC * Add two rics-v generic ports to support FREERTOS_RISCV_EXTENSION config --------- Co-authored-by: Joe Benczarski Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com> Co-authored-by: Ching-Hsin Lee Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com> Co-authored-by: Soren Ptak --- CMakeLists.txt | 2 ++ portable/CMakeLists.txt | 24 +++++++++++++++++++++++ portable/GCC/RISC-V/chip_extensions.cmake | 19 ++++++++++++++++++ portable/IAR/RISC-V/chip_extensions.cmake | 16 +++++++++++++++ 4 files changed, 61 insertions(+) create mode 100644 portable/GCC/RISC-V/chip_extensions.cmake create mode 100644 portable/IAR/RISC-V/chip_extensions.cmake diff --git a/CMakeLists.txt b/CMakeLists.txt index 984e36ecd2c..d9ddb7ed787 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -106,6 +106,7 @@ if(NOT FREERTOS_PORT) " GCC_PPC440_XILINX - Compiler: GCC Target: Xilinx PPC440\n" " GCC_RISC_V - Compiler: GCC Target: RISC-V\n" " GCC_RISC_V_PULPINO_VEGA_RV32M1RM - Compiler: GCC Target: RISC-V Pulpino Vega RV32M1RM\n" + " GCC_RISC_V_GENERIC - Compiler: GCC Target: RISC-V with FREERTOS_RISCV_EXTENSION\n" " GCC_RL78 - Compiler: GCC Target: Renesas RL78\n" " GCC_RX100 - Compiler: GCC Target: Renesas RX100\n" " GCC_RX200 - Compiler: GCC Target: Renesas RX200\n" @@ -156,6 +157,7 @@ if(NOT FREERTOS_PORT) " IAR_MSP430 - Compiler: IAR Target: MSP430\n" " IAR_MSP430X - Compiler: IAR Target: MSP430X\n" " IAR_RISC_V - Compiler: IAR Target: RISC-V\n" + " IAR_RISC_V_GENERIC - Compiler: IAR Target: RISC-V with FREERTOS_RISCV_EXTENSION\n" " IAR_RL78 - Compiler: IAR Target: Renesas RL78\n" " IAR_RX100 - Compiler: IAR Target: Renesas RX100\n" " IAR_RX600 - Compiler: IAR Target: Renesas RX600\n" diff --git a/portable/CMakeLists.txt b/portable/CMakeLists.txt index 327e9236b5a..4d81ef6c00b 100644 --- a/portable/CMakeLists.txt +++ b/portable/CMakeLists.txt @@ -1,3 +1,11 @@ +if( FREERTOS_PORT STREQUAL "GCC_RISC_V_GENERIC" ) + include( GCC/RISC-V/chip_extensions.cmake ) +endif() + +if( FREERTOS_PORT STREQUAL "IAR_RISC_V_GENERIC" ) + include( IAR/RISC-V/chip_extensions.cmake ) +endif() + # FreeRTOS internal cmake file. Do not use it in user top-level project if (FREERTOS_PORT STREQUAL "A_CUSTOM_PORT") @@ -292,6 +300,10 @@ add_library(freertos_kernel_port STATIC GCC/RISC-V/port.c GCC/RISC-V/portASM.S> + $<$: + GCC/RISC-V/port.c + GCC/RISC-V/portASM.S> + # Renesas RL78 port for GCC $<$: GCC/RL78/port.c @@ -497,6 +509,10 @@ add_library(freertos_kernel_port STATIC IAR/RISC-V/port.c IAR/RISC-V/portASM.s> + $<$: + IAR/RISC-V/port.c + IAR/RISC-V/portASM.s> + # Renesas RL78 port for IAR EWRL78 $<$: IAR/RL78/port.c @@ -845,6 +861,10 @@ target_include_directories(freertos_kernel_port PUBLIC ${CMAKE_CURRENT_LIST_DIR}/GCC/RISC-V ${CMAKE_CURRENT_LIST_DIR}/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM> + $<$: + ${CMAKE_CURRENT_LIST_DIR}/GCC/RISC-V + ${CMAKE_CURRENT_LIST_DIR}/GCC/RISC-V/chip_specific_extensions/${FREERTOS_RISCV_EXTENSION}> + # Renesas RL78 port for GCC $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/RL78> @@ -942,6 +962,10 @@ target_include_directories(freertos_kernel_port PUBLIC ${CMAKE_CURRENT_LIST_DIR}/IAR/RISC-V ${CMAKE_CURRENT_LIST_DIR}/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions> + $<$: + ${CMAKE_CURRENT_LIST_DIR}/IAR/RISC-V + ${CMAKE_CURRENT_LIST_DIR}/IAR/RISC-V/chip_specific_extensions/${FREERTOS_RISCV_EXTENSION}> + # Renesas RL78 port for IAR EWRL78 $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/RL78> diff --git a/portable/GCC/RISC-V/chip_extensions.cmake b/portable/GCC/RISC-V/chip_extensions.cmake new file mode 100644 index 00000000000..c0d2c0d86b4 --- /dev/null +++ b/portable/GCC/RISC-V/chip_extensions.cmake @@ -0,0 +1,19 @@ +if( FREERTOS_PORT STREQUAL "GCC_RISC_V_GENERIC" ) + set( VALID_CHIP_EXTENSIONS + "Pulpino_Vega_RV32M1RM" + "RISCV_MTIME_CLINT_no_extensions" + "RISCV_no_extensions" + "RV32I_CLINT_no_extensions" ) + + if( ( NOT FREERTOS_RISCV_EXTENSION ) OR ( NOT ( ${FREERTOS_RISCV_EXTENSION} IN_LIST VALID_CHIP_EXTENSIONS ) ) ) + message(FATAL_ERROR + "FREERTOS_RISCV_EXTENSION \"${FREERTOS_RISCV_EXTENSION}\" is not set or unsupported.\n" + "Please specify it from top-level CMake file (example):\n" + " set(FREERTOS_RISCV_EXTENSION RISCV_MTIME_CLINT_no_extensions CACHE STRING \"\")\n" + " or from CMake command line option:\n" + " -DFREERTOS_RISCV_EXTENSION=RISCV_MTIME_CLINT_no_extensions\n" + "\n" + " Available extension options:\n" + " ${VALID_CHIP_EXTENSIONS} \n") + endif() +endif() diff --git a/portable/IAR/RISC-V/chip_extensions.cmake b/portable/IAR/RISC-V/chip_extensions.cmake new file mode 100644 index 00000000000..110ec4a2e25 --- /dev/null +++ b/portable/IAR/RISC-V/chip_extensions.cmake @@ -0,0 +1,16 @@ +if( FREERTOS_PORT STREQUAL "IAR_RISC_V_GENERIC" ) + set( VALID_CHIP_EXTENSIONS + "RV32I_CLINT_no_extensions" ) + + if( ( NOT FREERTOS_RISCV_EXTENSION ) OR ( NOT ( ${FREERTOS_RISCV_EXTENSION} IN_LIST VALID_CHIP_EXTENSIONS ) ) ) + message(FATAL_ERROR + "FREERTOS_RISCV_EXTENSION \"${FREERTOS_RISCV_EXTENSION}\" is not set or unsupported.\n" + "Please specify it from top-level CMake file (example):\n" + " set(FREERTOS_RISCV_EXTENSION RISCV_MTIME_CLINT_no_extensions CACHE STRING \"\")\n" + " or from CMake command line option:\n" + " -DFREERTOS_RISCV_EXTENSION=RISCV_MTIME_CLINT_no_extensions\n" + "\n" + " Available extension options:\n" + " ${VALID_CHIP_EXTENSIONS} \n") + endif() +endif()