diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index e3a622d1165..c2400a4f031 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -35,7 +35,7 @@ jobs: exit 1 fi formatting: - runs-on: ubuntu-latest + runs-on: ubuntu-20.04 steps: - uses: actions/checkout@v2 - name: Install Uncrustify diff --git a/.github/workflows/kernel-checks.yml b/.github/workflows/kernel-checks.yml index 7087bb8d7fc..889a53e6c22 100644 --- a/.github/workflows/kernel-checks.yml +++ b/.github/workflows/kernel-checks.yml @@ -5,7 +5,7 @@ on: [push, pull_request] jobs: kernel-checker: name: FreeRTOS Kernel Header Checks - runs-on: ubuntu-latest + runs-on: ubuntu-20.04 steps: # Install python 3 - name: Tool Setup diff --git a/.github/workflows/unit-tests.yml b/.github/workflows/unit-tests.yml index 0039e5b1d53..a714b757256 100644 --- a/.github/workflows/unit-tests.yml +++ b/.github/workflows/unit-tests.yml @@ -3,7 +3,7 @@ on: [push, pull_request] jobs: run: - runs-on: ubuntu-latest + runs-on: ubuntu-20.04 steps: - name: Checkout Parent Repository uses: actions/checkout@v2 diff --git a/CMakeLists.txt b/CMakeLists.txt index 5b048d224c5..205c19a4817 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -1,187 +1,225 @@ cmake_minimum_required(VERSION 3.15) -# User is responsible to set two mandatory options: -# FREERTOS_CONFIG_FILE_DIRECTORY -# FREERTOS_PORT +# User is responsible to one mandatory option: +# FREERTOS_PORT, if not specified and native port detected, uses the native compile. # +# User is responsible for one library target: +# freertos_config ,typcially an INTERFACE library +# +# DEPRECATED: FREERTOS_CONFIG_FILE_DIRECTORY - but still supported if no freertos_config defined for now. +# May be removed at some point in the future. # User can choose which heap implementation to use (either the implementations # included with FreeRTOS [1..5] or a custom implementation ) by providing the # option FREERTOS_HEAP. If the option is not set, the cmake will default to # using heap_4.c. -# Absolute path to FreeRTOS config file directory -set(FREERTOS_CONFIG_FILE_DIRECTORY "" CACHE STRING "Absolute path to the directory with FreeRTOSConfig.h") +# `freertos_config` target defines the path to FreeRTOSConfig.h and optionally other freertos based config files +if(NOT TARGET freertos_config ) + if (NOT DEFINED FREERTOS_CONFIG_FILE_DIRECTORY ) -if(NOT FREERTOS_CONFIG_FILE_DIRECTORY) - message(FATAL_ERROR " FreeRTOSConfig.h file directory not specified. Please specify absolute path to it from top-level CMake file:\n" - " set(FREERTOS_CONFIG_FILE_DIRECTORY CACHE STRING \"\")\n" - " or from CMake command line option:\n" - " -DFREERTOS_CONFIG_FILE_DIRECTORY='/absolute_path/to/FreeRTOSConfig.h/directory'") -elseif(NOT EXISTS ${FREERTOS_CONFIG_FILE_DIRECTORY}/FreeRTOSConfig.h) - message(FATAL_ERROR " FreeRTOSConfig.h file not found in the directory specified (${FREERTOS_CONFIG_FILE_DIRECTORY})\n" - " Please specify absolute path to it from top-level CMake file:\n" - " set(FREERTOS_CONFIG_FILE_DIRECTORY CACHE STRING \"\")\n" - " or from CMake command line option:\n" - " -DFREERTOS_CONFIG_FILE_DIRECTORY='/absolute_path/to/FreeRTOSConfig.h/directory'") + message(FATAL_ERROR " freertos_config target not specified. Please specify a cmake target that defines the include directory for FreeRTOSConfig.h:\n" + " add_library(freertos_config INTERFACE)\n" + " target_include_directories(freertos_config SYSTEM\n" + " INTERFACE\n" + " include) # The config file directory\n" + " target_compile_definitions(freertos_config\n" + " PUBLIC\n" + " projCOVERAGE_TEST=0)\n") + else() + message(WARNING " Using deprecated 'FREERTOS_CONFIG_FILE_DIRECTORY' - please update your project CMakeLists.txt file:\n" + " add_library(freertos_config INTERFACE)\n" + " target_include_directories(freertos_config SYSTEM\n" + " INTERFACE\n" + " include) # The config file directory\n" + " target_compile_definitions(freertos_config\n" + " PUBLIC\n" + " projCOVERAGE_TEST=0)\n") + endif() endif() # Heap number or absolute path to custom heap implementation provided by user set(FREERTOS_HEAP "4" CACHE STRING "FreeRTOS heap model number. 1 .. 5. Or absolute path to custom heap source file") # FreeRTOS port option -set(FREERTOS_PORT "" CACHE STRING "FreeRTOS port name") - if(NOT FREERTOS_PORT) - message(FATAL_ERROR " FREERTOS_PORT is not set. Please specify it from top-level CMake file (example):\n" + message(WARNING " FREERTOS_PORT is not set. Please specify it from top-level CMake file (example):\n" " set(FREERTOS_PORT GCC_ARM_CM4F CACHE STRING \"\")\n" " or from CMake command line option:\n" " -DFREERTOS_PORT=GCC_ARM_CM4F\n" " \n" " Available port options:\n" - " BCC_16BIT_DOS_FLSH186 - Compiller: BCC Target: 16 bit DOS Flsh186\n" - " BCC_16BIT_DOS_PC - Compiller: BCC Target: 16 bit DOS PC\n" - " CCS_ARM_CM3 - Compiller: CCS Target: ARM Cortex-M3\n" - " CCS_ARM_CM4F - Compiller: CCS Target: ARM Cortex-M4 with FPU\n" - " CCS_ARM_CR4 - Compiller: CCS Target: ARM Cortex-R4\n" - " CCS_MSP430X - Compiller: CCS Target: MSP430X\n" - " CODEWARRIOR_COLDFIRE_V1 - Compiller: CoreWarrior Target: ColdFire V1\n" - " CODEWARRIOR_COLDFIRE_V2 - Compiller: CoreWarrior Target: ColdFire V2\n" - " CODEWARRIOR_HCS12 - Compiller: CoreWarrior Target: HCS12\n" - " GCC_ARM_CA9 - Compiller: GCC Target: ARM Cortex-A9\n" - " GCC_ARM_CA53_64_BIT - Compiller: GCC Target: ARM Cortex-A53 64 bit\n" - " GCC_ARM_CA53_64_BIT_SRE - Compiller: GCC Target: ARM Cortex-A53 64 bit SRE\n" - " GCC_ARM_CM0 - Compiller: GCC Target: ARM Cortex-M0\n" - " GCC_ARM_CM3 - Compiller: GCC Target: ARM Cortex-M3\n" - " GCC_ARM_CM3_MPU - Compiller: GCC Target: ARM Cortex-M3 with MPU\n" - " GCC_ARM_CM4_MPU - Compiller: GCC Target: ARM Cortex-M4 with MPU\n" - " GCC_ARM_CM4F - Compiller: GCC Target: ARM Cortex-M4 with FPU\n" - " GCC_ARM_CM7 - Compiller: GCC Target: ARM Cortex-M7\n" - " GCC_ARM_CM23_NONSECURE - Compiller: GCC Target: ARM Cortex-M23 non-secure\n" - " GCC_ARM_CM23_SECURE - Compiller: GCC Target: ARM Cortex-M23 secure\n" - " GCC_ARM_CM23_NTZ_NONSECURE - Compiller: GCC Target: ARM Cortex-M23 non-trustzone non-secure\n" - " GCC_ARM_CM33_NONSECURE - Compiller: GCC Target: ARM Cortex-M33 non-secure\n" - " GCC_ARM_CM33_SECURE - Compiller: GCC Target: ARM Cortex-M33 secure\n" - " GCC_ARM_CM33_NTZ_NONSECURE - Compiller: GCC Target: ARM Cortex-M33 non-trustzone non-secure\n" - " GCC_ARM_CM33_TFM - Compiller: GCC Target: ARM Cortex-M33 non-secure for TF-M\n" - " GCC_ARM_CM55_NONSECURE - Compiller: GCC Target: ARM Cortex-M55 non-secure\n" - " GCC_ARM_CM55_SECURE - Compiller: GCC Target: ARM Cortex-M55 secure\n" - " GCC_ARM_CM55_NTZ_NONSECURE - Compiller: GCC Target: ARM Cortex-M55 non-trustzone non-secure\n" - " GCC_ARM_CM55_TFM - Compiller: GCC Target: ARM Cortex-M55 non-secure for TF-M\n" - " GCC_ARM_CM85_NONSECURE - Compiller: GCC Target: ARM Cortex-M85 non-secure\n" - " GCC_ARM_CM85_SECURE - Compiller: GCC Target: ARM Cortex-M85 secure\n" - " GCC_ARM_CM85_NTZ_NONSECURE - Compiller: GCC Target: ARM Cortex-M85 non-trustzone non-secure\n" - " GCC_ARM_CM85_TFM - Compiller: GCC Target: ARM Cortex-M85 non-secure for TF-M\n" - " GCC_ARM_CR5 - Compiller: GCC Target: ARM Cortex-R5\n" - " GCC_ARM_CRX_NOGIC - Compiller: GCC Target: ARM Cortex-Rx no GIC\n" - " GCC_ARM7_AT91FR40008 - Compiller: GCC Target: ARM7 Atmel AT91R40008\n" - " GCC_ARM7_AT91SAM7S - Compiller: GCC Target: ARM7 Atmel AT91SAM7S\n" - " GCC_ARM7_LPC2000 - Compiller: GCC Target: ARM7 LPC2000\n" - " GCC_ARM7_LPC23XX - Compiller: GCC Target: ARM7 LPC23xx\n" - " GCC_ATMEGA323 - Compiller: GCC Target: ATMega323\n" - " GCC_AVR32_UC3 - Compiller: GCC Target: AVR32 UC3\n" - " GCC_COLDFIRE_V2 - Compiller: GCC Target: ColdFire V2\n" - " GCC_CORTUS_APS3 - Compiller: GCC Target: CORTUS APS3\n" - " GCC_H8S2329 - Compiller: GCC Target: H8S2329\n" - " GCC_HCS12 - Compiller: GCC Target: HCS12\n" - " GCC_IA32_FLAT - Compiller: GCC Target: IA32 flat\n" - " GCC_MICROBLAZE - Compiller: GCC Target: MicroBlaze\n" - " GCC_MICROBLAZE_V8 - Compiller: GCC Target: MicroBlaze V8\n" - " GCC_MICROBLAZE_V9 - Compiller: GCC Target: MicroBlaze V9\n" - " GCC_MSP430F449 - Compiller: GCC Target: MSP430F449\n" - " GCC_NIOSII - Compiller: GCC Target: NiosII\n" - " GCC_PPC405_XILINX - Compiller: GCC Target: Xilinx PPC405\n" - " GCC_PPC440_XILINX - Compiller: GCC Target: Xilinx PPC440\n" - " GCC_RISC_V - Compiller: GCC Target: RISC-V\n" - " GCC_RISC_V_PULPINO_VEGA_RV32M1RM - Compiller: GCC Target: RISC-V Pulpino Vega RV32M1RM\n" - " GCC_RL78 - Compiller: GCC Target: Renesas RL78\n" - " GCC_RX100 - Compiller: GCC Target: Renesas RX100\n" - " GCC_RX200 - Compiller: GCC Target: Renesas RX200\n" - " GCC_RX600 - Compiller: GCC Target: Renesas RX600\n" - " GCC_RX600_V2 - Compiller: GCC Target: Renesas RX600 v2\n" - " GCC_RX700_V3_DPFPU - Compiller: GCC Target: Renesas RX700 v3 with DPFPU\n" - " GCC_STR75X - Compiller: GCC Target: STR75x\n" - " GCC_TRICORE_1782 - Compiller: GCC Target: TriCore 1782\n" - " GCC_ARC_EM_HS - Compiller: GCC Target: DesignWare ARC EM HS\n" - " GCC_ARC_V1 - Compiller: GCC Target: DesignWare ARC v1\n" - " GCC_ATMEGA - Compiller: GCC Target: ATmega\n" - " GCC_POSIX - Compiller: GCC Target: Posix\n" - " GCC_RP2040 - Compiller: GCC Target: RP2040 ARM Cortex-M0+\n" - " GCC_XTENSA_ESP32 - Compiller: GCC Target: Xtensa ESP32\n" - " GCC_AVRDX - Compiller: GCC Target: AVRDx\n" - " GCC_AVR_MEGA0 - Compiller: GCC Target: AVR Mega0\n" - " IAR_78K0K - Compiller: IAR Target: Renesas 78K0K\n" - " IAR_ARM_CA5_NOGIC - Compiller: IAR Target: ARM Cortex-A5 no GIC\n" - " IAR_ARM_CA9 - Compiller: IAR Target: ARM Cortex-A9\n" - " IAR_ARM_CM0 - Compiller: IAR Target: ARM Cortex-M0\n" - " IAR_ARM_CM3 - Compiller: IAR Target: ARM Cortex-M3\n" - " IAR_ARM_CM4F - Compiller: IAR Target: ARM Cortex-M4 with FPU\n" - " IAR_ARM_CM4F_MPU - Compiller: IAR Target: ARM Cortex-M4 with FPU and MPU\n" - " IAR_ARM_CM7 - Compiller: IAR Target: ARM Cortex-M7\n" - " IAR_ARM_CM23_NONSECURE - Compiller: IAR Target: ARM Cortex-M23 non-secure\n" - " IAR_ARM_CM23_SECURE - Compiller: IAR Target: ARM Cortex-M23 secure\n" - " IAR_ARM_CM23_NTZ_NONSECURE - Compiller: IAR Target: ARM Cortex-M23 non-trustzone non-secure\n" - " IAR_ARM_CM33_NONSECURE - Compiller: IAR Target: ARM Cortex-M33 non-secure\n" - " IAR_ARM_CM33_SECURE - Compiller: IAR Target: ARM Cortex-M33 secure\n" - " IAR_ARM_CM33_NTZ_NONSECURE - Compiller: IAR Target: ARM Cortex-M33 non-trustzone non-secure\n" - " IAR_ARM_CM55_NONSECURE - Compiller: IAR Target: ARM Cortex-M55 non-secure\n" - " IAR_ARM_CM55_SECURE - Compiller: IAR Target: ARM Cortex-M55 secure\n" - " IAR_ARM_CM55_NTZ_NONSECURE - Compiller: IAR Target: ARM Cortex-M55 non-trustzone non-secure\n" - " IAR_ARM_CM85_NONSECURE - Compiller: IAR Target: ARM Cortex-M85 non-secure\n" - " IAR_ARM_CM85_SECURE - Compiller: IAR Target: ARM Cortex-M85 secure\n" - " IAR_ARM_CM85_NTZ_NONSECURE - Compiller: IAR Target: ARM Cortex-M85 non-trustzone non-secure\n" - " IAR_ARM_CRX_NOGIC - Compiller: IAR Target: ARM Cortex-Rx no GIC\n" - " IAR_ATMEGA323 - Compiller: IAR Target: ATMega323\n" - " IAR_ATMEL_SAM7S64 - Compiller: IAR Target: Atmel SAM7S64\n" - " IAR_ATMEL_SAM9XE - Compiller: IAR Target: Atmel SAM9XE\n" - " IAR_AVR_AVRDX - Compiller: IAR Target: AVRDx\n" - " IAR_AVR_MEGA0 - Compiller: IAR Target: AVR Mega0\n" - " IAR_AVR32_UC3 - Compiller: IAR Target: AVR32 UC3\n" - " IAR_LPC2000 - Compiller: IAR Target: LPC2000\n" - " IAR_MSP430 - Compiller: IAR Target: MSP430\n" - " IAR_MSP430X - Compiller: IAR Target: MSP430X\n" - " IAR_RISC_V - Compiller: IAR Target: RISC-V\n" - " IAR_RL78 - Compiller: IAR Target: Renesas RL78\n" - " IAR_RX100 - Compiller: IAR Target: Renesas RX100\n" - " IAR_RX600 - Compiller: IAR Target: Renesas RX600\n" - " IAR_RX700_V3_DPFPU - Compiller: IAR Target: Renesas RX700 v3 with DPFPU\n" - " IAR_RX_V2 - Compiller: IAR Target: Renesas RX v2\n" - " IAR_STR71X - Compiller: IAR Target: STR71x\n" - " IAR_STR75X - Compiller: IAR Target: STR75x\n" - " IAR_STR91X - Compiller: IAR Target: STR91x\n" - " IAR_V850ES_FX3 - Compiller: IAR Target: Renesas V850ES/Fx3\n" - " IAR_V850ES_HX3 - Compiller: IAR Target: Renesas V850ES/Hx3\n" - " MIKROC_ARM_CM4F - Compiller: MikroC Target: ARM Cortex-M4 with FPU\n" - " MPLAB_PIC18F - Compiller: MPLAB Target: PIC18F\n" - " MPLAB_PIC24 - Compiller: MPLAB Target: PIC24\n" - " MPLAB_PIC32MEC14XX - Compiller: MPLAB Target: PIC32MEC14xx\n" - " MPLAB_PIC32MX - Compiller: MPLAB Target: PIC32MX\n" - " MPLAB_PIC32MZ - Compiller: MPLAB Target: PIC32MZ\n" - " MSVC_MINGW - Compiller: MSVC or MinGW Target: x86\n" - " OWATCOM_16BIT_DOS_FLSH186 - Compiller: Open Watcom Target: 16 bit DOS Flsh186\n" - " OWATCOM_16BIT_DOS_PC - Compiller: Open Watcom Target: 16 bit DOS PC\n" - " PARADIGM_TERN_EE_LARGE - Compiller: Paradigm Target: Tern EE large\n" - " PARADIGM_TERN_EE_SMALL - Compiller: Paradigm Target: Tern EE small\n" - " RENESAS_RX100 - Compiller: Renesas Target: RX100\n" - " RENESAS_RX200 - Compiller: Renesas Target: RX200\n" - " RENESAS_RX600 - Compiller: Renesas Target: RX600\n" - " RENESAS_RX600_V2 - Compiller: Renesas Target: RX600 v2\n" - " RENESAS_RX700_V3_DPFPU - Compiller: Renesas Target: RX700 v3 with DPFPU\n" - " RENESAS_SH2A_FPU - Compiller: Renesas Target: SH2A with FPU\n" - " ROWLEY_MSP430F449 - Compiller: Rowley Target: MSP430F449\n" - " RVDS_ARM_CA9 - Compiller: RVDS Target: ARM Cortex-A9\n" - " RVDS_ARM_CM0 - Compiller: RVDS Target: ARM Cortex-M0\n" - " RVDS_ARM_CM3 - Compiller: RVDS Target: ARM Cortex-M3\n" - " RVDS_ARM_CM4_MPU - Compiller: RVDS Target: ARM Cortex-M4 with MPU\n" - " RVDS_ARM_CM4F - Compiller: RVDS Target: ARM Cortex-M4 with FPU\n" - " RVDS_ARM_CM7 - Compiller: RVDS Target: ARM Cortex-M7\n" - " RVDS_ARM7_LPC21XX - Compiller: RVDS Target: ARM7 LPC21xx\n" - " SDCC_CYGNAL - Compiller: SDCC Target: Cygnal\n" - " SOFTUNE_MB91460 - Compiller: Softune Target: MB91460\n" - " SOFTUNE_MB96340 - Compiller: Softune Target: MB96340\n" - " TASKING_ARM_CM4F - Compiller: Tasking Target: ARM Cortex-M4 with FPU\n" - " CDK_THEAD_CK802 - Compiller: CDK Target: T-head CK802\n" - " XCC_XTENSA - Compiller: XCC Target: Xtensa\n" - " WIZC_PIC18 - Compiller: WizC Target: PIC18") + " A_CUSTOM_PORT - Compiler: User Defined Target: User Defined\n" + " BCC_16BIT_DOS_FLSH186 - Compiler: BCC Target: 16 bit DOS Flsh186\n" + " BCC_16BIT_DOS_PC - Compiler: BCC Target: 16 bit DOS PC\n" + " CCS_ARM_CM3 - Compiler: CCS Target: ARM Cortex-M3\n" + " CCS_ARM_CM4F - Compiler: CCS Target: ARM Cortex-M4 with FPU\n" + " CCS_ARM_CR4 - Compiler: CCS Target: ARM Cortex-R4\n" + " CCS_MSP430X - Compiler: CCS Target: MSP430X\n" + " CODEWARRIOR_COLDFIRE_V1 - Compiler: CoreWarrior Target: ColdFire V1\n" + " CODEWARRIOR_COLDFIRE_V2 - Compiler: CoreWarrior Target: ColdFire V2\n" + " CODEWARRIOR_HCS12 - Compiler: CoreWarrior Target: HCS12\n" + " GCC_ARM_CA9 - Compiler: GCC Target: ARM Cortex-A9\n" + " GCC_ARM_CA53_64_BIT - Compiler: GCC Target: ARM Cortex-A53 64 bit\n" + " GCC_ARM_CA53_64_BIT_SRE - Compiler: GCC Target: ARM Cortex-A53 64 bit SRE\n" + " GCC_ARM_CM0 - Compiler: GCC Target: ARM Cortex-M0\n" + " GCC_ARM_CM3 - Compiler: GCC Target: ARM Cortex-M3\n" + " GCC_ARM_CM3_MPU - Compiler: GCC Target: ARM Cortex-M3 with MPU\n" + " GCC_ARM_CM4_MPU - Compiler: GCC Target: ARM Cortex-M4 with MPU\n" + " GCC_ARM_CM4F - Compiler: GCC Target: ARM Cortex-M4 with FPU\n" + " GCC_ARM_CM7 - Compiler: GCC Target: ARM Cortex-M7\n" + " GCC_ARM_CM23_NONSECURE - Compiler: GCC Target: ARM Cortex-M23 non-secure\n" + " GCC_ARM_CM23_SECURE - Compiler: GCC Target: ARM Cortex-M23 secure\n" + " GCC_ARM_CM23_NTZ_NONSECURE - Compiler: GCC Target: ARM Cortex-M23 non-trustzone non-secure\n" + " GCC_ARM_CM33_NONSECURE - Compiler: GCC Target: ARM Cortex-M33 non-secure\n" + " GCC_ARM_CM33_SECURE - Compiler: GCC Target: ARM Cortex-M33 secure\n" + " GCC_ARM_CM33_NTZ_NONSECURE - Compiler: GCC Target: ARM Cortex-M33 non-trustzone non-secure\n" + " GCC_ARM_CM33_TFM - Compiler: GCC Target: ARM Cortex-M33 non-secure for TF-M\n" + " GCC_ARM_CM55_NONSECURE - Compiler: GCC Target: ARM Cortex-M55 non-secure\n" + " GCC_ARM_CM55_SECURE - Compiler: GCC Target: ARM Cortex-M55 secure\n" + " GCC_ARM_CM55_NTZ_NONSECURE - Compiler: GCC Target: ARM Cortex-M55 non-trustzone non-secure\n" + " GCC_ARM_CM55_TFM - Compiler: GCC Target: ARM Cortex-M55 non-secure for TF-M\n" + " GCC_ARM_CM85_NONSECURE - Compiler: GCC Target: ARM Cortex-M85 non-secure\n" + " GCC_ARM_CM85_SECURE - Compiler: GCC Target: ARM Cortex-M85 secure\n" + " GCC_ARM_CM85_NTZ_NONSECURE - Compiler: GCC Target: ARM Cortex-M85 non-trustzone non-secure\n" + " GCC_ARM_CM85_TFM - Compiler: GCC Target: ARM Cortex-M85 non-secure for TF-M\n" + " GCC_ARM_CR5 - Compiler: GCC Target: ARM Cortex-R5\n" + " GCC_ARM_CRX_NOGIC - Compiler: GCC Target: ARM Cortex-Rx no GIC\n" + " GCC_ARM7_AT91FR40008 - Compiler: GCC Target: ARM7 Atmel AT91R40008\n" + " GCC_ARM7_AT91SAM7S - Compiler: GCC Target: ARM7 Atmel AT91SAM7S\n" + " GCC_ARM7_LPC2000 - Compiler: GCC Target: ARM7 LPC2000\n" + " GCC_ARM7_LPC23XX - Compiler: GCC Target: ARM7 LPC23xx\n" + " GCC_ATMEGA323 - Compiler: GCC Target: ATMega323\n" + " GCC_AVR32_UC3 - Compiler: GCC Target: AVR32 UC3\n" + " GCC_COLDFIRE_V2 - Compiler: GCC Target: ColdFire V2\n" + " GCC_CORTUS_APS3 - Compiler: GCC Target: CORTUS APS3\n" + " GCC_H8S2329 - Compiler: GCC Target: H8S2329\n" + " GCC_HCS12 - Compiler: GCC Target: HCS12\n" + " GCC_IA32_FLAT - Compiler: GCC Target: IA32 flat\n" + " GCC_MICROBLAZE - Compiler: GCC Target: MicroBlaze\n" + " GCC_MICROBLAZE_V8 - Compiler: GCC Target: MicroBlaze V8\n" + " GCC_MICROBLAZE_V9 - Compiler: GCC Target: MicroBlaze V9\n" + " GCC_MSP430F449 - Compiler: GCC Target: MSP430F449\n" + " GCC_NIOSII - Compiler: GCC Target: NiosII\n" + " GCC_PPC405_XILINX - Compiler: GCC Target: Xilinx PPC405\n" + " GCC_PPC440_XILINX - Compiler: GCC Target: Xilinx PPC440\n" + " GCC_RISC_V - Compiler: GCC Target: RISC-V\n" + " GCC_RISC_V_PULPINO_VEGA_RV32M1RM - Compiler: GCC Target: RISC-V Pulpino Vega RV32M1RM\n" + " GCC_RL78 - Compiler: GCC Target: Renesas RL78\n" + " GCC_RX100 - Compiler: GCC Target: Renesas RX100\n" + " GCC_RX200 - Compiler: GCC Target: Renesas RX200\n" + " GCC_RX600 - Compiler: GCC Target: Renesas RX600\n" + " GCC_RX600_V2 - Compiler: GCC Target: Renesas RX600 v2\n" + " GCC_RX700_V3_DPFPU - Compiler: GCC Target: Renesas RX700 v3 with DPFPU\n" + " GCC_STR75X - Compiler: GCC Target: STR75x\n" + " GCC_TRICORE_1782 - Compiler: GCC Target: TriCore 1782\n" + " GCC_ARC_EM_HS - Compiler: GCC Target: DesignWare ARC EM HS\n" + " GCC_ARC_V1 - Compiler: GCC Target: DesignWare ARC v1\n" + " GCC_ATMEGA - Compiler: GCC Target: ATmega\n" + " GCC_POSIX - Compiler: GCC Target: Posix\n" + " GCC_RP2040 - Compiler: GCC Target: RP2040 ARM Cortex-M0+\n" + " GCC_XTENSA_ESP32 - Compiler: GCC Target: Xtensa ESP32\n" + " GCC_AVRDX - Compiler: GCC Target: AVRDx\n" + " GCC_AVR_MEGA0 - Compiler: GCC Target: AVR Mega0\n" + " IAR_78K0K - Compiler: IAR Target: Renesas 78K0K\n" + " IAR_ARM_CA5_NOGIC - Compiler: IAR Target: ARM Cortex-A5 no GIC\n" + " IAR_ARM_CA9 - Compiler: IAR Target: ARM Cortex-A9\n" + " IAR_ARM_CM0 - Compiler: IAR Target: ARM Cortex-M0\n" + " IAR_ARM_CM3 - Compiler: IAR Target: ARM Cortex-M3\n" + " IAR_ARM_CM4F - Compiler: IAR Target: ARM Cortex-M4 with FPU\n" + " IAR_ARM_CM4F_MPU - Compiler: IAR Target: ARM Cortex-M4 with FPU and MPU\n" + " IAR_ARM_CM7 - Compiler: IAR Target: ARM Cortex-M7\n" + " IAR_ARM_CM23_NONSECURE - Compiler: IAR Target: ARM Cortex-M23 non-secure\n" + " IAR_ARM_CM23_SECURE - Compiler: IAR Target: ARM Cortex-M23 secure\n" + " IAR_ARM_CM23_NTZ_NONSECURE - Compiler: IAR Target: ARM Cortex-M23 non-trustzone non-secure\n" + " IAR_ARM_CM33_NONSECURE - Compiler: IAR Target: ARM Cortex-M33 non-secure\n" + " IAR_ARM_CM33_SECURE - Compiler: IAR Target: ARM Cortex-M33 secure\n" + " IAR_ARM_CM33_NTZ_NONSECURE - Compiler: IAR Target: ARM Cortex-M33 non-trustzone non-secure\n" + " IAR_ARM_CM55_NONSECURE - Compiler: IAR Target: ARM Cortex-M55 non-secure\n" + " IAR_ARM_CM55_SECURE - Compiler: IAR Target: ARM Cortex-M55 secure\n" + " IAR_ARM_CM55_NTZ_NONSECURE - Compiler: IAR Target: ARM Cortex-M55 non-trustzone non-secure\n" + " IAR_ARM_CM85_NONSECURE - Compiler: IAR Target: ARM Cortex-M85 non-secure\n" + " IAR_ARM_CM85_SECURE - Compiler: IAR Target: ARM Cortex-M85 secure\n" + " IAR_ARM_CM85_NTZ_NONSECURE - Compiler: IAR Target: ARM Cortex-M85 non-trustzone non-secure\n" + " IAR_ARM_CRX_NOGIC - Compiler: IAR Target: ARM Cortex-Rx no GIC\n" + " IAR_ATMEGA323 - Compiler: IAR Target: ATMega323\n" + " IAR_ATMEL_SAM7S64 - Compiler: IAR Target: Atmel SAM7S64\n" + " IAR_ATMEL_SAM9XE - Compiler: IAR Target: Atmel SAM9XE\n" + " IAR_AVR_AVRDX - Compiler: IAR Target: AVRDx\n" + " IAR_AVR_MEGA0 - Compiler: IAR Target: AVR Mega0\n" + " IAR_AVR32_UC3 - Compiler: IAR Target: AVR32 UC3\n" + " IAR_LPC2000 - Compiler: IAR Target: LPC2000\n" + " IAR_MSP430 - Compiler: IAR Target: MSP430\n" + " IAR_MSP430X - Compiler: IAR Target: MSP430X\n" + " IAR_RISC_V - Compiler: IAR Target: RISC-V\n" + " IAR_RL78 - Compiler: IAR Target: Renesas RL78\n" + " IAR_RX100 - Compiler: IAR Target: Renesas RX100\n" + " IAR_RX600 - Compiler: IAR Target: Renesas RX600\n" + " IAR_RX700_V3_DPFPU - Compiler: IAR Target: Renesas RX700 v3 with DPFPU\n" + " IAR_RX_V2 - Compiler: IAR Target: Renesas RX v2\n" + " IAR_STR71X - Compiler: IAR Target: STR71x\n" + " IAR_STR75X - Compiler: IAR Target: STR75x\n" + " IAR_STR91X - Compiler: IAR Target: STR91x\n" + " IAR_V850ES_FX3 - Compiler: IAR Target: Renesas V850ES/Fx3\n" + " IAR_V850ES_HX3 - Compiler: IAR Target: Renesas V850ES/Hx3\n" + " MIKROC_ARM_CM4F - Compiler: MikroC Target: ARM Cortex-M4 with FPU\n" + " MPLAB_PIC18F - Compiler: MPLAB Target: PIC18F\n" + " MPLAB_PIC24 - Compiler: MPLAB Target: PIC24\n" + " MPLAB_PIC32MEC14XX - Compiler: MPLAB Target: PIC32MEC14xx\n" + " MPLAB_PIC32MX - Compiler: MPLAB Target: PIC32MX\n" + " MPLAB_PIC32MZ - Compiler: MPLAB Target: PIC32MZ\n" + " MSVC_MINGW - Compiler: MSVC or MinGW Target: x86\n" + " OWATCOM_16BIT_DOS_FLSH186 - Compiler: Open Watcom Target: 16 bit DOS Flsh186\n" + " OWATCOM_16BIT_DOS_PC - Compiler: Open Watcom Target: 16 bit DOS PC\n" + " PARADIGM_TERN_EE_LARGE - Compiler: Paradigm Target: Tern EE large\n" + " PARADIGM_TERN_EE_SMALL - Compiler: Paradigm Target: Tern EE small\n" + " RENESAS_RX100 - Compiler: Renesas Target: RX100\n" + " RENESAS_RX200 - Compiler: Renesas Target: RX200\n" + " RENESAS_RX600 - Compiler: Renesas Target: RX600\n" + " RENESAS_RX600_V2 - Compiler: Renesas Target: RX600 v2\n" + " RENESAS_RX700_V3_DPFPU - Compiler: Renesas Target: RX700 v3 with DPFPU\n" + " RENESAS_SH2A_FPU - Compiler: Renesas Target: SH2A with FPU\n" + " ROWLEY_MSP430F449 - Compiler: Rowley Target: MSP430F449\n" + " RVDS_ARM_CA9 - Compiler: RVDS Target: ARM Cortex-A9\n" + " RVDS_ARM_CM0 - Compiler: RVDS Target: ARM Cortex-M0\n" + " RVDS_ARM_CM3 - Compiler: RVDS Target: ARM Cortex-M3\n" + " RVDS_ARM_CM4_MPU - Compiler: RVDS Target: ARM Cortex-M4 with MPU\n" + " RVDS_ARM_CM4F - Compiler: RVDS Target: ARM Cortex-M4 with FPU\n" + " RVDS_ARM_CM7 - Compiler: RVDS Target: ARM Cortex-M7\n" + " RVDS_ARM7_LPC21XX - Compiler: RVDS Target: ARM7 LPC21xx\n" + " SDCC_CYGNAL - Compiler: SDCC Target: Cygnal\n" + " SOFTUNE_MB91460 - Compiler: Softune Target: MB91460\n" + " SOFTUNE_MB96340 - Compiler: Softune Target: MB96340\n" + " TASKING_ARM_CM4F - Compiler: Tasking Target: ARM Cortex-M4 with FPU\n" + " CDK_THEAD_CK802 - Compiler: CDK Target: T-head CK802\n" + " XCC_XTENSA - Compiler: XCC Target: Xtensa\n" + " WIZC_PIC18 - Compiler: WizC Target: PIC18") + # Native FREERTOS_PORT for Linux and Windows MINGW builds + if(UNIX) + message(STATUS " Auto-Detected Unix, setting FREERTOS_PORT=GCC_POSIX") + set(FREERTOS_PORT GCC_POSIX CACHE STRING "FreeRTOS port name") + elseif(MINGW) + message(STATUS " Auto-Detected MINGW, setting FREERTOS_PORT=MSVC_MINGW") + set(FREERTOS_PORT MSVC_MINGW CACHE STRING "FreeRTOS port name") + endif() +elseif((FREERTOS_PORT STREQUAL "A_CUSTOM_PORT") AND (NOT TARGET freertos_kernel_port) ) + message(FATAL_ERROR " FREERTOS_PORT is set to A_CUSTOM_PORT. Please specify the custom port target with all necessary files. For example:\n" + " Assuming a directory of:\n" + " FreeRTOSCustomPort/\n" + " CMakeLists.txt\n" + " port.c\n" + " portmacro.h\n" + " Where FreeRTOSCustomPort/CMakeLists.txt is a modified version of:\n" + " add_library(freertos_kernel_port STATIC)\n" + " target_sources(freertos_kernel_port\n" + " PRIVATE\n" + " port.c\n" + " portmacro.h)\n" + " target_include_directories(freertos_kernel_port\n" + " PUBLIC\n" + " .)\n" + " taget_link_libraries(freertos_kernel_port\n" + " PRIVATE\n" + " freertos_kernel)") endif() add_subdirectory(portable) @@ -202,7 +240,12 @@ add_library(freertos_kernel STATIC target_include_directories(freertos_kernel PUBLIC include - ${FREERTOS_CONFIG_FILE_DIRECTORY} + # Note: DEPRECATED but still supported, may be removed in a future release. + $<$>:${FREERTOS_CONFIG_FILE_DIRECTORY}> ) -target_link_libraries(freertos_kernel freertos_kernel_port) +target_link_libraries(freertos_kernel + PUBLIC + $<$:freertos_config> + freertos_kernel_port +) diff --git a/README.md b/README.md index 52d78dd7924..d147f884077 100644 --- a/README.md +++ b/README.md @@ -8,7 +8,53 @@ Additionally, for FreeRTOS kernel feature information refer to the [Developer Do ### Getting help If you have any questions or need assistance troubleshooting your FreeRTOS project, we have an active community that can help on the [FreeRTOS Community Support Forum](https://forums.freertos.org). -## Cloning this repository +## To consume FreeRTOS-Kernel + +### Consume with CMake +If using CMake, it is recommended to use this repository using FetchContent. +Add the following into your project's main or a subdirectory's `CMakeLists.txt`: + +- Define the source and version/tag you want to use: + +```cmake +FetchContent_Declare( freertos_kernel + GIT_REPOSITORY https://github.com/FreeRTOS/FreeRTOS-Kernel.git + GIT_TAG master #Note: Best practice to use specific git-hash or tagged version +) +``` + +- Add a freertos_config library (typically an INTERFACE library) The following assumes the directory structure: + - `include/FreeRTOSConfig.h` +```cmake +add_library(freertos_config INTERFACE) + +target_include_directories(freertos_config SYSTEM +INTERFACE + include +) + +target_compile_definitions(freertos_config + INTERFACE + projCOVERAGE_TEST=0 +) +``` + +- Configure the FreeRTOS-Kernel and make it available + - this particular example supports a native and cross-compiled build option. + +```cmake +set( FREERTOS_HEAP "4" CACHE STRING "" FORCE) +# Select the native compile PORT +set( FREERTOS_PORT "GCC_POSIX" CACHE STRING "" FORCE) +# Select the cross-compile PORT +if (CMAKE_CROSSCOMPILING) + set(FREERTOS_PORT "GCC_ARM_CA9" CACHE STRING "" FORCE) +endif() + +FetchContent_MakeAvailable(freertos_kernel) +``` + +### Consuming stand-alone - Cloning this repository To clone using HTTPS: ``` @@ -36,4 +82,3 @@ FreeRTOS files are formatted using the "uncrustify" tool. The configuration file ### Spelling *lexicon.txt* contains words that are not traditionally found in an English dictionary. It is used by the spellchecker to verify the various jargon, variable names, and other odd words used in the FreeRTOS code base. If your pull request fails to pass the spelling and you believe this is a mistake, then add the word to *lexicon.txt*. Note that only the FreeRTOS Kernel source files are checked for proper spelling, the portable section is ignored. - diff --git a/portable/CMakeLists.txt b/portable/CMakeLists.txt index ea54ec4231f..ae9de9cfe1b 100644 --- a/portable/CMakeLists.txt +++ b/portable/CMakeLists.txt @@ -1,5 +1,12 @@ # FreeRTOS internal cmake file. Do not use it in user top-level project +if (FREERTOS_PORT STREQUAL "A_CUSTOM_PORT") + message(STATUS "Using a custom FREERTOS_PORT.") + return() +endif() + +# FreeRTOS internal cmake file. Do not use it in user top-level project + add_library(freertos_kernel_port STATIC # 16-Bit DOS ports for BCC $<$: @@ -983,12 +990,17 @@ target_include_directories(freertos_kernel_port PUBLIC $<$:${CMAKE_CURRENT_LIST_DIR}/WizC/PIC18> ) +if(FREERTOS_PORT STREQUAL GCC_POSIX) + find_package(Threads REQUIRED) +endif() + target_link_libraries(freertos_kernel_port PUBLIC $<$:pico_base_headers> $<$:idf::esp32> PRIVATE freertos_kernel + $<$:Threads::Threads> "$<$:hardware_clocks;hardware_exception>" $<$:winmm> # Windows library which implements timers )