From fc46cb93903baf04a353d37c175b88caaf085e0d Mon Sep 17 00:00:00 2001 From: Ryan Houdek Date: Thu, 30 Sep 2021 17:56:36 -0700 Subject: [PATCH] Interpreter: Changes basic loadstores to sized accesses This makes debugging a bit more clear as to what is happening on crash --- .../Core/Interpreter/InterpreterOps.cpp | 51 ++++++++++++++++++- 1 file changed, 49 insertions(+), 2 deletions(-) diff --git a/External/FEXCore/Source/Interface/Core/Interpreter/InterpreterOps.cpp b/External/FEXCore/Source/Interface/Core/Interpreter/InterpreterOps.cpp index 6d47f1d3e0..05d1c6e966 100644 --- a/External/FEXCore/Source/Interface/Core/Interpreter/InterpreterOps.cpp +++ b/External/FEXCore/Source/Interface/Core/Interpreter/InterpreterOps.cpp @@ -1740,7 +1740,32 @@ void InterpreterOps::InterpretIR(FEXCore::Core::InternalThreadState *Thread, uin } } memset(GDP, 0, 16); - memcpy(GDP, Data, Op->Size); + switch (OpSize) { + case 1: { + const uint8_t *D = (const uint8_t*)Data; + GD = *D; + break; + } + case 2: { + const uint16_t *D = (const uint16_t*)Data; + GD = *D; + break; + } + case 4: { + const uint32_t *D = (const uint32_t*)Data; + GD = *D; + break; + } + case 8: { + const uint64_t *D = (const uint64_t*)Data; + GD = *D; + break; + } + + default: + memcpy(GDP, Data, Op->Size); + break; + } break; } case IR::OP_VLOADMEMELEMENT: { @@ -1767,7 +1792,29 @@ void InterpreterOps::InterpretIR(FEXCore::Core::InternalThreadState *Thread, uin case MEM_OFFSET_SXTW.Val: Data += (int32_t)Offset; break; } } - memcpy(Data, GetSrc(SSAData, Op->Value), Op->Size); + switch (OpSize) { + case 1: { + *reinterpret_cast(Data) = *GetSrc(SSAData, Op->Value); + break; + } + case 2: { + *reinterpret_cast(Data) = *GetSrc(SSAData, Op->Value); + break; + } + case 4: { + *reinterpret_cast(Data) = *GetSrc(SSAData, Op->Value); + break; + } + case 8: { + *reinterpret_cast(Data) = *GetSrc(SSAData, Op->Value); + break; + } + + default: + memcpy(Data, GetSrc(SSAData, Op->Value), Op->Size); + break; + } + break; } case IR::OP_VSTOREMEMELEMENT: {