From a3d1db78dc13ddbfe2b4cfbf7e3246fba8a45e1c Mon Sep 17 00:00:00 2001 From: Derek Bruening Date: Mon, 28 Jun 2021 12:28:53 -0400 Subject: [PATCH] i#4274 kernel pc: Record interrupted PC before drmemtrace kernel events For online traces, adds the interrupted PC to kernel event entries. For offline traces, updates the existing module offset stored inside kernel events (and previously used only for raw2trace) to become an absolute PC to help in core simulators and other trace consumers who want to know branch targets prior to kernel events. This is a version change for offline traces, and the version is updated, with a named constant for the old version. The raw offline's module offset is upgraded to become an index;offset pair, as that format is better suited for raw2trace and it avoids needing an extra entry nearly all of the time. The raw2trace postprocessing converts it to an absolute PC for the final trace. Since the 49 bits can take two raw entries, raw2trace is augmented to handle unreading such a double entry. Adds a new TRACE_MARKER_TYPE_RSEQ_ABORT marker to further identify an rseq abort, in order to roll back the committing store in raw2trace (previously it used the lack of interrupted-PC to identify an rseq abort). Adds support to the view tool for displaying the interrupted PC depending on the version. Updates the drcachesim documentation with the new output of the interrupted PC from the view tool. Fixes an issue in the reader where the first switch to a thread has the prior thread's identity in the two leading marker entries for version and filetype. Adds tests of the interrupted PC to the trace_invariants test for signals, as well as ensuring that raw2trace has rolled back an rseq abort final instruction so that the abort appears to occur at a legitimate place inside the region. Adds a test of the legacy version with just offsets by checking in raw files from a signal_invariants run, with fake libdrmemtrace.so and lidynamorio.so to keep the size down. Fixes #4274 --- api/docs/release.dox | 3 + clients/drcachesim/common/trace_entry.h | 47 ++++++- clients/drcachesim/drcachesim.dox.in | 99 ++++++------- clients/drcachesim/reader/file_reader.h | 5 +- clients/drcachesim/reader/reader.cpp | 12 +- .../drmemtrace.signal_invariants | Bin 0 -> 21800 bytes .../libdrmemtrace.so | Bin 0 -> 9120 bytes .../libdynamorio.so | Bin 0 -> 9120 bytes ...trace.signal_invariants.552306.6024.raw.gz | Bin 0 -> 51161 bytes ...trace.signal_invariants.552323.7114.raw.gz | Bin 0 -> 2861 bytes ...trace.signal_invariants.552324.5662.raw.gz | Bin 0 -> 2498 bytes .../raw/funclist.log | 0 .../raw/modules.log | Bin 0 -> 12709 bytes .../tests/offline-legacy-int-offs.templatex | 66 +++++++++ clients/drcachesim/tests/trace_invariants.cpp | 48 +++++-- clients/drcachesim/tests/trace_invariants.h | 2 + clients/drcachesim/tools/view.cpp | 22 ++- clients/drcachesim/tracer/instru.h | 2 +- clients/drcachesim/tracer/instru_offline.cpp | 4 +- clients/drcachesim/tracer/raw2trace.cpp | 26 +++- clients/drcachesim/tracer/raw2trace.h | 132 +++++++++++++----- clients/drcachesim/tracer/tracer.cpp | 45 ++++-- suite/tests/CMakeLists.txt | 16 +++ 23 files changed, 403 insertions(+), 126 deletions(-) create mode 100755 clients/drcachesim/tests/drmemtrace.legacy-int-offs.raw/drmemtrace.signal_invariants create mode 100755 clients/drcachesim/tests/drmemtrace.legacy-int-offs.raw/libdrmemtrace.so create mode 100755 clients/drcachesim/tests/drmemtrace.legacy-int-offs.raw/libdynamorio.so create mode 100644 clients/drcachesim/tests/drmemtrace.legacy-int-offs.raw/raw/drmemtrace.drmemtrace.signal_invariants.552306.6024.raw.gz create mode 100644 clients/drcachesim/tests/drmemtrace.legacy-int-offs.raw/raw/drmemtrace.drmemtrace.signal_invariants.552323.7114.raw.gz create mode 100644 clients/drcachesim/tests/drmemtrace.legacy-int-offs.raw/raw/drmemtrace.drmemtrace.signal_invariants.552324.5662.raw.gz create mode 100644 clients/drcachesim/tests/drmemtrace.legacy-int-offs.raw/raw/funclist.log create mode 100644 clients/drcachesim/tests/drmemtrace.legacy-int-offs.raw/raw/modules.log create mode 100644 clients/drcachesim/tests/offline-legacy-int-offs.templatex diff --git a/api/docs/release.dox b/api/docs/release.dox index f8c9224094e..9c2b98ab3f4 100644 --- a/api/docs/release.dox +++ b/api/docs/release.dox @@ -225,6 +225,9 @@ Further non-compatibility-affecting changes include: - Added the source context for restartable sequence aborts (#DR_XFER_RSEQ_ABORT) which was previously missing. - Added a #TRACE_MARKER_TYPE_VERSION entry to drmemtrace traces. + - Augmented drmemtrace #TRACE_MARKER_TYPE_KERNEL_EVENT entries with the absolute + PC of the interruption point, including for restartable sequence aborts, which + now also have an additional #TRACE_MARKER_TYPE_RSEQ_ABORT identifier. **************************************************
diff --git a/clients/drcachesim/common/trace_entry.h b/clients/drcachesim/common/trace_entry.h index db975cd3a60..4119f7cf850 100644 --- a/clients/drcachesim/common/trace_entry.h +++ b/clients/drcachesim/common/trace_entry.h @@ -59,7 +59,14 @@ typedef uintptr_t addr_t; /**< The type of a memory address. */ * #TRACE_MARKER_TYPE_VERSION. */ typedef enum { - TRACE_ENTRY_VERSION = 2 /**< The latest version of the trace format. */ + /** + * A prior version where #TRACE_MARKER_TYPE_KERNEL_EVENT provided the module + * offset (and nothing for restartable sequence aborts) rather than the absolute + * PC of the interruption point provided today. + */ + TRACE_ENTRY_VERSION_NO_KERNEL_PC = 2, + /** The latest version of the trace format. */ + TRACE_ENTRY_VERSION, } trace_version_t; /** The type of a trace entry in a #memref_t structure. */ @@ -208,10 +215,21 @@ typedef enum { * The subsequent instruction is the start of a handler for a kernel-initiated * event: a signal handler or restartable sequence abort handler on UNIX, or an * APC, exception, or callback dispatcher on Windows. - * The value holds the module offset of the interruption point PC, - * which is used in post-processing. The value is 0 for some types, namely - * Windows callbacks and Linux rseq aborts, but these can be assumed to target - * the start of a block and so there is no loss of accuracy when post-processing. + * The value of this marker contains the program counter at the kernel + * interruption point. If the interruption point is just after a branch, this + * value is the target of that branch. + * (For trace version #TRACE_ENTRY_VERSION_NO_KERNEL_PC or below, the value is + * the module offset rather than the absolute program counter.) + * The value is 0 for some types where this information is not available, namely + * Windows callbacks. + * A restartable sequence abort handler is further identified by a prior + * marker of type #TRACE_MARKER_TYPE_RSEQ_ABORT. + */ + /* Non-exported information since limited to raw offline traces: + * For raw offline traces, the value is in the form of the module index and offset + * (from the base, not the indexed segment) of type kernel_interrupted_raw_pc_t. + * For raw offline traces, a value of 0 can be assumed to target the start of a + * block and so there is no loss of accuracy when post-processing. */ TRACE_MARKER_TYPE_KERNEL_EVENT, /** @@ -301,6 +319,12 @@ typedef enum { */ TRACE_MARKER_TYPE_VERSION, + /** + * Serves to further identify #TRACE_MARKER_TYPE_KERNEL_EVENT as a + * restartable sequence abort handler. + */ + TRACE_MARKER_TYPE_RSEQ_ABORT, + // ... // These values are reserved for future built-in marker types. // ... @@ -420,7 +444,8 @@ typedef enum { #define OFFLINE_FILE_VERSION_NO_ELISION 2 #define OFFLINE_FILE_VERSION_OLDEST_SUPPORTED OFFLINE_FILE_VERSION_NO_ELISION #define OFFLINE_FILE_VERSION_ELIDE_UNMOD_BASE 3 -#define OFFLINE_FILE_VERSION OFFLINE_FILE_VERSION_ELIDE_UNMOD_BASE +#define OFFLINE_FILE_VERSION_KERNEL_INT_PC 4 +#define OFFLINE_FILE_VERSION OFFLINE_FILE_VERSION_KERNEL_INT_PC /** * Bitfields used to describe the high-level characteristics of both an @@ -513,6 +538,16 @@ struct _offline_entry_t { } END_PACKED_STRUCTURE; typedef struct _offline_entry_t offline_entry_t; +// This is the raw marker value for TRACE_MARKER_TYPE_KERNEL_*. +// It occupies 49 bits and so may require two raw entries. +typedef union { + struct { + uint64_t modoffs : PC_MODOFFS_BITS; + uint64_t modidx : PC_MODIDX_BITS; + } pc; + uint64_t combined_value; +} kernel_interrupted_raw_pc_t; + /** * The name of the file in -offline mode where module data is written. * Its creation can be customized using drmemtrace_custom_module_data() diff --git a/clients/drcachesim/drcachesim.dox.in b/clients/drcachesim/drcachesim.dox.in index f80e0583ffc..ef6dcb3408a 100644 --- a/clients/drcachesim/drcachesim.dox.in +++ b/clients/drcachesim/drcachesim.dox.in @@ -598,49 +598,48 @@ T342626 write 8 byte(s) @ 0x7f899f928e70 \endcode -Here is an example of a signal handler interrupting the regular flow: +Here is an example of a signal handler interrupting the regular flow, +with metadata showing that the signal was delivered just after a +non-taken conditional branch: \code -T342625 0x0000000000469957 49 8b 44 17 18 mov 0x18(%r15,%rdx), %rax -T342625 read 8 byte(s) @ 0x4e7848 -T342625 0x000000000046995c 48 85 c0 test %rax, %rax -T342625 0x000000000046995f 0f 84 a5 00 00 00 jz $0x0000000000469a0a -T342625 -T342625 -T342625 -T342625 0x000000000040257d 55 push %rbp -T342625 write 8 byte(s) @ 0x7ffe70dcda30 -T342625 0x000000000040257e 48 89 e5 mov %rsp, %rbp -T342625 0x0000000000402581 89 7d fc mov %edi, -0x04(%rbp) -T342625 write 4 byte(s) @ 0x7ffe70dcda2c -T342625 0x0000000000402584 48 89 75 f0 mov %rsi, -0x10(%rbp) -T342625 write 8 byte(s) @ 0x7ffe70dcda20 -T342625 0x0000000000402588 48 89 55 e8 mov %rdx, -0x18(%rbp) -T342625 write 8 byte(s) @ 0x7ffe70dcda18 -T342625 0x000000000040258c 83 7d fc 1a cmp -0x04(%rbp), $0x1a -T342625 read 4 byte(s) @ 0x7ffe70dcda2c -T342625 0x0000000000402590 75 0f jnz $0x00000000004025a1 -T342625 0x0000000000402592 8b 05 5c 0f 0e 00 mov 0x00000000004e34f4, %eax -T342625 read 4 byte(s) @ 0x4e34f4 -T342625 0x0000000000402598 83 c0 01 add $0x01, %eax -T342625 0x000000000040259b 89 05 53 0f 0e 00 mov %eax, 0x00000000004e34f4 -T342625 write 4 byte(s) @ 0x4e34f4 -T342625 0x00000000004025a1 90 nop -T342625 0x00000000004025a2 5d pop %rbp -T342625 read 8 byte(s) @ 0x7ffe70dcda30 -T342625 0x00000000004025a3 c3 ret -T342625 read 8 byte(s) @ 0x7ffe70dcda38 -T342625 0x0000000000407bb0 48 c7 c0 0f 00 00 00 mov $0x0000000f, %rax -T342625 0x0000000000407bb7 0f 05 syscall -T342625 -T342625 -T342625 -T342625 -T342625 -T342625 0x0000000000469965 49 8b 54 17 10 mov 0x10(%r15,%rdx), %rdx -T342625 read 8 byte(s) @ 0x4e7840 -T342625 0x000000000046996a 48 3b 15 9f fa 07 00 cmp %rdx, 0x00000000004e9410 -T342625 read 8 byte(s) @ 0x4e9410 +T585061 0x00007fdb4e95128f 41 f6 44 24 08 08 test 0x08(%r12), $0x08 +T585061 read 1 byte(s) @ 0x7ffd5af76b08 +T585061 0x00007fdb4e951295 0f 85 28 04 00 00 jnz $0x00007fdb4e9516c3 +T585061 +T585061 +T585061 +T585061 0x00007fdb4ace9dba 55 push %rbp +T585061 write 8 byte(s) @ 0x7ffd5af763d0 +T585061 0x00007fdb4ace9dbb 48 89 e5 mov %rsp, %rbp +T585061 0x00007fdb4ace9dbe 89 7d fc mov %edi, -0x04(%rbp) +T585061 write 4 byte(s) @ 0x7ffd5af763cc +T585061 0x00007fdb4ace9dc1 48 89 75 f0 mov %rsi, -0x10(%rbp) +T585061 write 8 byte(s) @ 0x7ffd5af763c0 +T585061 0x00007fdb4ace9dc5 48 89 55 e8 mov %rdx, -0x18(%rbp) +T585061 write 8 byte(s) @ 0x7ffd5af763b8 +T585061 0x00007fdb4ace9dc9 83 7d fc 1a cmp -0x04(%rbp), $0x1a +T585061 read 4 byte(s) @ 0x7ffd5af763cc +T585061 0x00007fdb4ace9dcd 75 0f jnz $0x00007fdb4ace9dde +T585061 0x00007fdb4ace9dcf 8b 05 7f 23 20 00 mov 0x00007fdb4aeec154, %eax +T585061 read 4 byte(s) @ 0x7fdb4aeec154 +T585061 0x00007fdb4ace9dd5 83 c0 01 add $0x01, %eax +T585061 0x00007fdb4ace9dd8 89 05 76 23 20 00 mov %eax, 0x00007fdb4aeec154 +T585061 write 4 byte(s) @ 0x7fdb4aeec154 +T585061 0x00007fdb4ace9dde 90 nop +T585061 0x00007fdb4ace9ddf 5d pop %rbp +T585061 read 8 byte(s) @ 0x7ffd5af763d0 +T585061 0x00007fdb4ace9de0 c3 ret +T585061 read 8 byte(s) @ 0x7ffd5af763d8 +T585061 0x00007fdb4e95c140 48 c7 c0 0f 00 00 00 mov $0x0000000f, %rax +T585061 0x00007fdb4e95c147 0f 05 syscall +T585061 +T585061 +T585061 +T585061 +T585061 +T585061 0x00007fdb4e95129b 48 8b 1d 8e 40 01 00 mov 0x00007fdb4e965330, %rbx +T585061 read 8 byte(s) @ 0x7fdb4e965330 \endcode \section sec_tool_func_view View Function Calls @@ -1050,13 +1049,6 @@ instruction information to go along with each load and store, while cache simulators can ignore these "no-fetch" entries and avoid incorrectly inflating instruction fetch statistics. -Offline traces guarantee that a branch target instruction entry in a -trace must immediately follow the branch instruction with no intervening -thread switch. This allows a core simulator to identify the target of a -branch by looking at the subsequent trace entry. However, this guarantee -does not hold when a kernel event such as a signal is delivered -immediately after a branch. - Traces include scheduling markers providing the timestamp and hardware thread identifier on each thread transition, allowing a simulator to more closely match the actual hardware if so desired. @@ -1064,6 +1056,14 @@ closely match the actual hardware if so desired. Traces also include markers indicating disruptions in user mode control flow such as signal handler entry and exit. +Offline traces guarantee that a branch target instruction entry in a +trace must immediately follow the branch instruction with no intervening +thread switch. This allows a core simulator to identify the target of a +branch by looking at the subsequent trace entry. This guarantee +does not hold when a kernel event such as a signal is delivered +immediately after a branch; however, each marker indicating such a kernel transfer +includes the interrupted PC, explicitly providing the branch target. + Filtered traces (filtered via -L0_filter) include the dynamic (pre-filtered) per-thread instruction count in a #TRACE_MARKER_TYPE_INSTRUCTION_COUNT marker at each thread buffer boundary and at thread exit. @@ -1248,6 +1248,9 @@ these areas of missing functionality: - Online traces may skip instructions immediately prior to non-load-or-store-related kernel transfer events (https://github.com/DynamoRIO/dynamorio/issues/3937). +- Online traces may include the committing store in the trace when a + restartable sequence abort happened prior to that store + (https://github.com/DynamoRIO/dynamorio/issues/4041). - Application phase marking is not yet implemented (https://github.com/DynamoRIO/dynamorio/issues/2478). diff --git a/clients/drcachesim/reader/file_reader.h b/clients/drcachesim/reader/file_reader.h index 6089b1cbc44..ab8a990906c 100644 --- a/clients/drcachesim/reader/file_reader.h +++ b/clients/drcachesim/reader/file_reader.h @@ -1,5 +1,5 @@ /* ********************************************************** - * Copyright (c) 2016-2020 Google, Inc. All rights reserved. + * Copyright (c) 2016-2021 Google, Inc. All rights reserved. * **********************************************************/ /* @@ -168,7 +168,8 @@ template class file_reader_t : public reader_t { return false; } // We can handle the older version 1 as well which simply omits the - // early marker with the arch tag. + // early marker with the arch tag, and version 2 which only differs wrt + // TRACE_MARKER_TYPE_KERNEL_EVENT.. if (header.addr > TRACE_ENTRY_VERSION) { ERRMSG( "Cannot handle version #%zu (expect version <= #%u) for input file " diff --git a/clients/drcachesim/reader/reader.cpp b/clients/drcachesim/reader/reader.cpp index 2f2506fc0c9..7978703d51a 100644 --- a/clients/drcachesim/reader/reader.cpp +++ b/clients/drcachesim/reader/reader.cpp @@ -204,9 +204,15 @@ reader_t::operator++() case TRACE_TYPE_MARKER: have_memref = true; cur_ref_.marker.type = (trace_type_t)input_entry_->type; - assert((cur_tid_ != 0 && cur_pid_ != 0) || - input_entry_->size == TRACE_MARKER_TYPE_VERSION || - input_entry_->size == TRACE_MARKER_TYPE_FILETYPE); + if (input_entry_->size == TRACE_MARKER_TYPE_VERSION || + input_entry_->size == TRACE_MARKER_TYPE_FILETYPE) { + // Do not carry over a prior thread on a thread switch to a + // first-time-seen new thread, whose tid entry is *after* these + // 2 markers. + cur_pid_ = 0; + cur_tid_ = 0; + } else + assert(cur_tid_ != 0 && cur_pid_ != 0); cur_ref_.marker.pid = cur_pid_; cur_ref_.marker.tid = cur_tid_; cur_ref_.marker.marker_type = (trace_marker_type_t)input_entry_->size; diff --git a/clients/drcachesim/tests/drmemtrace.legacy-int-offs.raw/drmemtrace.signal_invariants b/clients/drcachesim/tests/drmemtrace.legacy-int-offs.raw/drmemtrace.signal_invariants new file mode 100755 index 0000000000000000000000000000000000000000..4d372e5e9d34e08719a00192d353942309822a6a GIT binary patch literal 21800 zcmeHPeRx#Gxt~o~hfHz?Ay(l!d#T@p2=P=X?RfA4(ko?Ui* zdizJ)KNvW9=lz_Scix#ZbN0;Xbkts*W3e!ma@iLd$0iC&rDPPZR1%C;vc+s1{@U3z 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b/clients/drcachesim/tests/offline-legacy-int-offs.templatex @@ -0,0 +1,66 @@ +Basic counts tool results: +Total counts: + 109205 total \(fetched\) instructions + 6768 total unique \(fetched\) instructions + 93 total non-fetched instructions + 11 total prefetches + 23974 total data loads + 5544 total data stores + 0 total icache flushes + 0 total dcache flushes + 3 total threads + 136 total scheduling markers + 11 total transfer markers + 0 total function id markers + 0 total function return address markers + 0 total function argument markers + 0 total function return value markers + 9 total other markers +Thread 552306 counts: + 101049 \(fetched\) instructions + 6393 unique \(fetched\) instructions + 93 non-fetched instructions + 11 prefetches + 21712 data loads + 4442 data stores + 0 icache flushes + 0 dcache flushes + 110 scheduling markers + 11 transfer markers + 0 function id markers + 0 function return address markers + 0 function argument markers + 0 function return value markers + 3 other markers +Thread 552323 counts: + 4674 \(fetched\) instructions + 1028 unique \(fetched\) instructions + 0 non-fetched instructions + 0 prefetches + 1317 data loads + 651 data stores + 0 icache flushes + 0 dcache flushes + 14 scheduling markers + 0 transfer markers + 0 function id markers + 0 function return address markers + 0 function argument markers + 0 function return value markers + 3 other markers +Thread 552324 counts: + 3482 \(fetched\) instructions + 1008 unique \(fetched\) instructions + 0 non-fetched instructions + 0 prefetches + 945 data loads + 451 data stores + 0 icache flushes + 0 dcache flushes + 12 scheduling markers + 0 transfer markers + 0 function id markers + 0 function return address markers + 0 function argument markers + 0 function return value markers + 3 other markers diff --git a/clients/drcachesim/tests/trace_invariants.cpp b/clients/drcachesim/tests/trace_invariants.cpp index e1974624e00..d5e519319f8 100644 --- a/clients/drcachesim/tests/trace_invariants.cpp +++ b/clients/drcachesim/tests/trace_invariants.cpp @@ -84,6 +84,18 @@ trace_invariants_t::process_memref(const memref_t &memref) assert(memrefs_until_interrupt_[memref.data.tid] != 0); --memrefs_until_interrupt_[memref.data.tid]; } + if (memref.marker.type == TRACE_TYPE_MARKER && + prev_entry_[memref.data.tid].marker.type == TRACE_TYPE_MARKER && + prev_entry_[memref.data.tid].marker.marker_type == TRACE_MARKER_TYPE_RSEQ_ABORT) { + // The rseq marker must be immediately prior to the kernel event marker. + assert(memref.marker.marker_type == TRACE_MARKER_TYPE_KERNEL_EVENT); + } + if (memref.marker.type == TRACE_TYPE_MARKER && + memref.marker.marker_type == TRACE_MARKER_TYPE_RSEQ_ABORT) { + // Check that the rseq final instruction was not executed: that raw2trace + // rolled it back. + assert(memref.marker.marker_value != prev_instr_[memref.data.tid].instr.addr); + } // Check that the signal delivery marker is immediately followed by the // app's signal handler, which we have annotated with "prefetcht0 [1]". if (memref.data.type == TRACE_TYPE_PREFETCHT0 && memref.data.addr == 1) { @@ -189,23 +201,28 @@ trace_invariants_t::process_memref(const memref_t &memref) // Ensure signal handlers return to the interruption point. if (prev_xfer_marker_[memref.data.tid].marker.marker_type == TRACE_MARKER_TYPE_KERNEL_XFER) { - assert(memref.instr.addr == - pre_signal_instr_[memref.data.tid].top().instr.addr || - // Asynch will go to the subsequent instr. - memref.instr.addr == - pre_signal_instr_[memref.data.tid].top().instr.addr + - pre_signal_instr_[memref.data.tid].top().instr.size || + assert((memref.instr.addr == prev_xfer_int_pc_[memref.data.tid].top() && + (memref.instr.addr == + pre_signal_instr_[memref.data.tid].top().instr.addr || + // Asynch will go to the subsequent instr. + memref.instr.addr == + pre_signal_instr_[memref.data.tid].top().instr.addr + + pre_signal_instr_[memref.data.tid].top().instr.size || + // Too hard to figure out branch targets. We have the + // prev_xfer_int_pc_ though. + type_is_instr_branch( + pre_signal_instr_[memref.data.tid].top().instr.type) || + pre_signal_instr_[memref.data.tid].top().instr.type == + TRACE_TYPE_INSTR_SYSENTER)) || // Nested signal. XXX: This only works for our annotated test // signal_invariants. memref.instr.addr == app_handler_pc_ || // Marker for rseq abort handler. Not as unique as a prefetch, but // we need an instruction and not a data type. - memref.instr.type == TRACE_TYPE_INSTR_DIRECT_JUMP || - // Too hard to figure out branch targets. - type_is_instr_branch( - pre_signal_instr_[memref.data.tid].top().instr.type) || - pre_signal_instr_[memref.data.tid].top().instr.type == - TRACE_TYPE_INSTR_SYSENTER); + memref.instr.type == TRACE_TYPE_INSTR_DIRECT_JUMP); + // We assume paired signal entry-exit (so no longjmp and no rseq + // inside signal handlers). + prev_xfer_int_pc_[memref.data.tid].pop(); pre_signal_instr_[memref.data.tid].pop(); } #endif @@ -226,10 +243,13 @@ trace_invariants_t::process_memref(const memref_t &memref) memref.marker.marker_type == TRACE_MARKER_TYPE_KERNEL_XFER)) { if (knob_verbose_ >= 3) { std::cerr << "::" << memref.data.pid << ":" << memref.data.tid << ":: " - << "marker type " << memref.marker.marker_type << " value " - << memref.marker.marker_value << "\n"; + << "marker type " << memref.marker.marker_type << " value 0x" + << std::hex << memref.marker.marker_value << std::dec << "\n"; } #ifdef UNIX + if (memref.marker.marker_type == TRACE_MARKER_TYPE_KERNEL_EVENT) + prev_xfer_int_pc_[memref.data.tid].push(memref.marker.marker_value); + assert(memref.marker.marker_value != 0); if (memref.marker.marker_type == TRACE_MARKER_TYPE_KERNEL_EVENT && // Give up on back-to-back signals. prev_xfer_marker_[memref.data.tid].marker.marker_type != diff --git a/clients/drcachesim/tests/trace_invariants.h b/clients/drcachesim/tests/trace_invariants.h index 93b286860e0..fe562b45bee 100644 --- a/clients/drcachesim/tests/trace_invariants.h +++ b/clients/drcachesim/tests/trace_invariants.h @@ -59,6 +59,8 @@ class trace_invariants_t : public analysis_tool_t { std::unordered_map prev_instr_; std::unordered_map prev_xfer_marker_; #ifdef UNIX + // We only support sigreturn-using handlers so we have pairing: no longjmp. + std::unordered_map> prev_xfer_int_pc_; std::unordered_map prev_entry_; std::unordered_map prev_prev_entry_; std::unordered_map> pre_signal_instr_; diff --git a/clients/drcachesim/tools/view.cpp b/clients/drcachesim/tools/view.cpp index 83a1ac31a1b..a4ee80205b9 100644 --- a/clients/drcachesim/tools/view.cpp +++ b/clients/drcachesim/tools/view.cpp @@ -162,10 +162,28 @@ view_t::process_memref(const memref_t &memref) << memref.marker.marker_value << ">\n"; break; case TRACE_MARKER_TYPE_KERNEL_EVENT: - std::cerr << "\n"; + if (trace_version_ <= TRACE_ENTRY_VERSION_NO_KERNEL_PC) { + // Legacy traces just have the module offset. + std::cerr << "\n"; + } else { + std::cerr << "\n"; + } + break; + case TRACE_MARKER_TYPE_RSEQ_ABORT: + std::cerr << "\n"; break; case TRACE_MARKER_TYPE_KERNEL_XFER: - std::cerr << "\n"; + if (trace_version_ <= TRACE_ENTRY_VERSION_NO_KERNEL_PC) { + // Legacy traces just have the module offset. + std::cerr << "\n"; + } else { + std::cerr << "\n"; + } break; case TRACE_MARKER_TYPE_INSTRUCTION_COUNT: std::cerr << "version < OFFLINE_FILE_VERSION_KERNEL_INT_PC + ? TRACE_ENTRY_VERSION_NO_KERNEL_PC + : TRACE_ENTRY_VERSION; trace_entry_t entry; entry.type = TRACE_TYPE_HEADER; entry.size = 0; @@ -925,6 +927,7 @@ raw2trace_t::get_next_entry(void *tls) // be i/o bound (or ISA decode bound) and aren't worried about some extra copies // from the vector. auto tdata = reinterpret_cast(tls); + tdata->last_entry_is_split = false; if (!tdata->pre_read.empty()) { tdata->last_entry = tdata->pre_read[0]; tdata->pre_read.erase(tdata->pre_read.begin(), tdata->pre_read.begin() + 1); @@ -940,10 +943,31 @@ raw2trace_t::get_next_entry(void *tls) return &tdata->last_entry; } +const offline_entry_t * +raw2trace_t::get_next_entry_keep_prior(void *tls) +{ + auto tdata = reinterpret_cast(tls); + if (tdata->last_entry_is_split) { + // Cannot record two live split entries. + return nullptr; + } + VPRINT(4, "Remembering split entry for unreading both at once\n"); + tdata->last_split_first_entry = tdata->last_entry; + const offline_entry_t *next = get_next_entry(tls); + // Set this *after* calling get_next_entry as it clears the field. + tdata->last_entry_is_split = true; + return next; +} + void raw2trace_t::unread_last_entry(void *tls) { auto tdata = reinterpret_cast(tls); + if (tdata->last_entry_is_split) { + VPRINT(4, "Unreading both parts of split entry at once\n"); + tdata->pre_read.push_back(tdata->last_split_first_entry); + tdata->last_entry_is_split = false; + } tdata->pre_read.push_back(tdata->last_entry); } diff --git a/clients/drcachesim/tracer/raw2trace.h b/clients/drcachesim/tracer/raw2trace.h index 601abf322d8..9246829cb08 100644 --- a/clients/drcachesim/tracer/raw2trace.h +++ b/clients/drcachesim/tracer/raw2trace.h @@ -543,6 +543,13 @@ struct trace_header_t { * of the data, and #trace_converter_t will not attempt to dereference past the provided * pointer. * + *
  • const offline_entry_t *get_next_entry_keep_prior(void *tls) + * + * Records the currently stored last entry in order to remember two entries at once + * (for handling split two-entry markers) and then reads and returns a pointer to the + * next entry. A subsequent call to unread_last_entry() will put back both entries. + * Returns an emptry string on success or an error description on an error. + * *
  • void unread_last_entry(void *tls) * * Ensure that the next call to get_next_entry() re-reads the last value.
    • @@ -977,16 +984,17 @@ template class trace_converter_t { std::string process_memref(void *tls, trace_entry_t **buf_in, const instr_summary_t *instr, instr_summary_t::memref_summary_t memref, bool write, - std::unordered_map ®_vals, uint64_t cur_modoffs, - bool instrs_are_separate, OUT bool *reached_end_of_memrefs, - OUT bool *interrupted) + std::unordered_map ®_vals, uint64_t cur_pc, + uint64_t cur_offs, bool instrs_are_separate, + OUT bool *reached_end_of_memrefs, OUT bool *interrupted) { std::string error = append_memref(tls, buf_in, instr, memref, write, reg_vals, reached_end_of_memrefs); if (!error.empty()) return error; - error = handle_kernel_interrupt_and_markers( - tls, buf_in, cur_modoffs, instr->length(), instrs_are_separate, interrupted); + error = handle_kernel_interrupt_and_markers(tls, buf_in, cur_pc, cur_offs, + instr->length(), instrs_are_separate, + interrupted); return error; } @@ -1021,7 +1029,11 @@ template class trace_converter_t { TESTANY(OFFLINE_FILE_TYPE_FILTERED, impl()->get_file_type(tls)); bool is_instr_only_trace = TESTANY(OFFLINE_FILE_TYPE_INSTRUCTION_ONLY, impl()->get_file_type(tls)); - uint64_t cur_modoffs = in_entry->pc.modoffs; + uint64_t cur_pc = + reinterpret_cast(modvec_()[in_entry->pc.modidx].orig_seg_base) + + (in_entry->pc.modoffs - modvec_()[in_entry->pc.modidx].seg_offs); + // Legacy traces need the offset, not the pc. + uint64_t cur_offs = in_entry->pc.modoffs; std::unordered_map reg_vals; if (instr_count == 0) { // L0 filtering adds a PC entry with a count of 0 prior to each memref. @@ -1090,13 +1102,12 @@ template class trace_converter_t { // include a faulting instruction before its raised signal. bool interrupted = false; error = handle_kernel_interrupt_and_markers( - tls, &buf, cur_modoffs, instr->length(), instrs_are_separate, + tls, &buf, cur_pc, cur_offs, instr->length(), instrs_are_separate, &interrupted); if (!error.empty()) return error; if (interrupted) { - impl()->log(3, "Stopping bb at kernel interruption point +" PIFX "\n", - cur_modoffs); + impl()->log(3, "Stopping bb at kernel interruption point %p\n", cur_pc); } // We need to interleave instrs with memrefs. // There is no following memref for (instrs_are_separate && !skip_icache). @@ -1126,7 +1137,7 @@ template class trace_converter_t { // only the original app instr though. So we use the 0th // dest/src of the original scatter/gather instr for all. is_scatter ? instr->mem_dest_at(0) : instr->mem_src_at(0), - is_scatter, reg_vals, cur_modoffs, instrs_are_separate, + is_scatter, reg_vals, cur_pc, cur_offs, instrs_are_separate, &reached_end_of_memrefs, &interrupted); if (!error.empty()) return error; @@ -1137,7 +1148,7 @@ template class trace_converter_t { for (uint j = 0; j < instr->num_mem_srcs(); j++) { error = process_memref( tls, &buf, instr, instr->mem_src_at(j), false, reg_vals, - cur_modoffs, instrs_are_separate, nullptr, &interrupted); + cur_pc, cur_offs, instrs_are_separate, nullptr, &interrupted); if (!error.empty()) return error; if (interrupted) @@ -1148,7 +1159,7 @@ template class trace_converter_t { for (uint j = 0; !interrupted && j < instr->num_mem_dests(); j++) { error = process_memref( tls, &buf, instr, instr->mem_dest_at(j), true, reg_vals, - cur_modoffs, instrs_are_separate, nullptr, &interrupted); + cur_pc, cur_offs, instrs_are_separate, nullptr, &interrupted); if (!error.empty()) return error; if (interrupted) @@ -1156,7 +1167,8 @@ template class trace_converter_t { } } } - cur_modoffs += instr->length(); + cur_pc += instr->length(); + cur_offs += instr->length(); DR_CHECK((size_t)(buf - buf_start) < WRITE_BUFFER_SIZE, "Too many entries"); if (instr->is_cti()) { // In case this is the last branch prior to a thread switch, buffer it. We @@ -1181,14 +1193,15 @@ template class trace_converter_t { return ""; } - // Returns true if a kernel interrupt happened at cur_modoffs. + // Returns true if a kernel interrupt happened at cur_pc. // Outputs a kernel interrupt if this is the right location. // Outputs any other markers observed if !instrs_are_separate, since they // are part of this block and need to be inserted now. std::string handle_kernel_interrupt_and_markers(void *tls, INOUT trace_entry_t **buf_in, - uint64_t cur_modoffs, int instr_length, - bool instrs_are_separate, OUT bool *interrupted) + uint64_t cur_pc, uint64_t cur_offs, + int instr_length, bool instrs_are_separate, + OUT bool *interrupted) { // To avoid having to backtrack later, we read ahead to ensure we insert // an interrupt at the right place between memrefs or between instructions. @@ -1202,32 +1215,57 @@ template class trace_converter_t { append = false; if (in_entry->extended.type != OFFLINE_TYPE_EXTENDED || in_entry->extended.ext != OFFLINE_EXT_TYPE_MARKER) { - // Not a marker: just put it back below. - } else if (in_entry->extended.valueB == TRACE_MARKER_TYPE_KERNEL_EVENT) { + // Not a marker: just put it back. + impl()->unread_last_entry(tls); + continue; + } + // The kernel markers can take two entries, so we have to read both + // if present to get to the type. There is support for unreading + // both. + uintptr_t marker_val = 0; + std::string err = get_marker_value(tls, &in_entry, &marker_val); + if (!err.empty()) + return err; + if (in_entry->extended.valueB == TRACE_MARKER_TYPE_KERNEL_EVENT || + in_entry->extended.valueB == TRACE_MARKER_TYPE_RSEQ_ABORT) { // A signal/exception marker in the next entry could be at any point // among non-memref instrs, or it could be after this bb. - // We check the stored offset. - uint64_t int_modoffs = (uint64_t)in_entry->extended.valueA; - impl()->log(4, - "Checking whether reached signal/exception +" PIFX - " vs cur +" PIFX "\n", - int_modoffs, cur_modoffs); - if (int_modoffs == 0 || int_modoffs == cur_modoffs) { - impl()->log(4, "Signal/exception interrupted the bb @ +" PIFX "\n", - int_modoffs); + // We check the stored PC. + int version = impl()->get_version(tls); + bool at_interrupted_pc = false; + bool rseq_rollback = false; + if (version < OFFLINE_FILE_VERSION_KERNEL_INT_PC) { + // We have only the offs, so we can't handle differing modules for + // the source and target for legacy traces. + if (marker_val == cur_offs) + at_interrupted_pc = true; + } else { + if (marker_val == cur_pc) + at_interrupted_pc = true; + } + if (in_entry->extended.valueB == TRACE_MARKER_TYPE_RSEQ_ABORT || + (version < OFFLINE_FILE_VERSION_KERNEL_INT_PC && marker_val == 0)) { + // For the older version, we will not get here for Windows + // callbacks, the other event with a 0 modoffs, because they are + // always between bbs. (Unfortunately there's no simple way to + // assert or check that here or in the tracer.) + rseq_rollback = true; + } + impl()->log(4, "Checking whether reached signal/exception %p vs cur %p\n", + marker_val, cur_pc); + if (marker_val == 0 || at_interrupted_pc || rseq_rollback) { + impl()->log(4, "Signal/exception interrupted the bb @ %p\n", cur_pc); append = true; *interrupted = true; - if (int_modoffs == 0) { + if (rseq_rollback) { // This happens on rseq native aborts, where the trace instru // includes the rseq committing store before the native rseq // execution hits the native abort. Pretend the native abort // happened *before* the committing store by walking the store - // backward. We will not get here for Windows callbacks, the - // other event with a 0 modoffs, because they are always between - // bbs. (Unfortunately there's no simple way to assert or check - // that here or in the tracer.) + // backward. trace_type_t skipped_type; do { + impl()->log(4, "Rolling back entry for rseq abort\n"); --*buf_in; skipped_type = static_cast((*buf_in)->type); DR_ASSERT(*buf_in >= buf_start); @@ -1235,7 +1273,7 @@ template class trace_converter_t { skipped_type != TRACE_TYPE_INSTR_NO_FETCH); } } else { - // Put it back. We do not have a problem with other markers + // Put it back (below). We do not have a problem with other markers // following this, because we will have to hit the correct point // for this interrupt marker before we hit a memref entry, avoiding // the danger of wanting a memref entry, seeing a marker, continuing, @@ -1252,10 +1290,6 @@ template class trace_converter_t { append = !instrs_are_separate; } if (append) { - uintptr_t marker_val = 0; - std::string err = get_marker_value(tls, &in_entry, &marker_val); - if (!err.empty()) - return err; byte *buf = reinterpret_cast(*buf_in); buf += trace_metadata_writer_t::write_marker( buf, (trace_marker_type_t)in_entry->extended.valueB, marker_val); @@ -1285,7 +1319,8 @@ template class trace_converter_t { uintptr_t marker_val = static_cast((*entry)->extended.valueA); if ((*entry)->extended.valueB == TRACE_MARKER_TYPE_SPLIT_VALUE) { #ifdef X64 - const offline_entry_t *next = impl()->get_next_entry(tls); + // Keep the prior so we can unread both at once if we roll back. + const offline_entry_t *next = impl()->get_next_entry_keep_prior(tls); if (next == nullptr || next->extended.ext != OFFLINE_EXT_TYPE_MARKER) return "SPLIT_VALUE marker is not adjacent to 2nd entry"; marker_val = @@ -1295,6 +1330,21 @@ template class trace_converter_t { return "TRACE_MARKER_TYPE_SPLIT_VALUE unexpected for 32-bit"; #endif } + if ((*entry)->extended.valueB == TRACE_MARKER_TYPE_KERNEL_EVENT || + (*entry)->extended.valueB == TRACE_MARKER_TYPE_RSEQ_ABORT || + (*entry)->extended.valueB == TRACE_MARKER_TYPE_KERNEL_XFER) { + if (impl()->get_version(tls) >= OFFLINE_FILE_VERSION_KERNEL_INT_PC) { + // We convert the idx:offs to an absolute PC. + kernel_interrupted_raw_pc_t raw_pc; + raw_pc.combined_value = marker_val; + app_pc pc = modvec_()[raw_pc.pc.modidx].orig_seg_base + + (raw_pc.pc.modoffs - modvec_()[raw_pc.pc.modidx].seg_offs); + impl()->log(3, "Kernel marker: converting %p idx=%d with base=%p to %p\n", + marker_val, raw_pc.pc.modidx, + modvec_()[raw_pc.pc.modidx].orig_seg_base, pc); + marker_val = (uintptr_t)pc; + } // Else we've already marked as TRACE_ENTRY_VERSION_NO_KERNEL_PC. + } *value = marker_val; return ""; } @@ -1531,6 +1581,8 @@ class raw2trace_t : public trace_converter_t { // Overridable parts of the interface expected by trace_converter_t. virtual const offline_entry_t * get_next_entry(void *tls); + virtual const offline_entry_t * + get_next_entry_keep_prior(void *tls); virtual void unread_last_entry(void *tls); virtual std::string @@ -1563,6 +1615,7 @@ class raw2trace_t : public trace_converter_t { , version(0) , file_type(OFFLINE_FILE_TYPE_DEFAULT) , saw_header(false) + , last_entry_is_split(false) , prev_instr_was_rep_string(false) , last_decode_block_start(nullptr) , last_block_summary(nullptr) @@ -1586,6 +1639,9 @@ class raw2trace_t : public trace_converter_t { // Current trace conversion state. bool saw_header; offline_entry_t last_entry; + // For 2-entry markers we need a 2nd current-entry struct we can unread. + bool last_entry_is_split; + offline_entry_t last_split_first_entry; std::array out_buf; bool prev_instr_was_rep_string; app_pc last_decode_block_start; diff --git a/clients/drcachesim/tracer/tracer.cpp b/clients/drcachesim/tracer/tracer.cpp index 741c329a233..c3ffc553196 100644 --- a/clients/drcachesim/tracer/tracer.cpp +++ b/clients/drcachesim/tracer/tracer.cpp @@ -1379,19 +1379,46 @@ event_kernel_xfer(void *drcontext, const dr_kernel_xfer_info_t *info) default: DR_ASSERT(false && "unknown kernel xfer type"); return; } NOTIFY(2, "%s: type %d, sig %d\n", __FUNCTION__, info->type, info->sig); - /* TODO i3937: We need something similar to this for online too, to place signals - * inside instr bundles. + /* TODO i#3937: We need something similar to what raw2trace does with this info + * for online too, to place signals inside instr bundles. */ - if (op_offline.get_value() && info->source_mcontext != nullptr) { - /* Enable post-processing to figure out the ordering of this xfer vs - * non-memref instrs in the bb. - */ - uint64_t modoffs = reinterpret_cast(instru)->get_modoffs( - drcontext, info->source_mcontext->pc); - marker_val = static_cast(modoffs); + /* XXX i#4041: For rseq abort, offline post-processing rolls back the committing + * store so the abort happens at a reasonable point. We don't have a solution + * for online though. + */ + if (info->source_mcontext != nullptr) { + if (op_offline.get_value()) { + /* Enable post-processing to figure out the ordering of this xfer vs + * non-memref instrs in the bb. + * We'll turn this into an absolute PC in the final trace for offline traces + * to provide the interrupted PC, primarily for a kernel event arriving right + * after a branch to give a core simulator the branch target. + */ + uint modidx; + /* Just like PC entries, this is the offset from the base, not from + * the indexed segment. + */ + uint64_t modoffs = reinterpret_cast(instru)->get_modoffs( + drcontext, info->source_mcontext->pc, &modidx); + /* We save space by using the modidx,modoffs format instead of a raw PC. + * These 49 bits will always fit into the 48-bit value field unless the + * module index is very large, when it will take two entries, while using + * an absolute PC here might always take two entries for some modules. + */ + kernel_interrupted_raw_pc_t raw_pc = { 0 }; + raw_pc.pc.modidx = modidx; + raw_pc.pc.modoffs = modoffs; + marker_val = raw_pc.combined_value; + } else { + marker_val = reinterpret_cast(info->source_mcontext->pc); + } NOTIFY(3, "%s: source pc " PFX " => modoffs " PIFX "\n", __FUNCTION__, info->source_mcontext->pc, marker_val); } + if (info->type == DR_XFER_RSEQ_ABORT) { + BUF_PTR(data->seg_base) += instru->append_marker( + BUF_PTR(data->seg_base), TRACE_MARKER_TYPE_RSEQ_ABORT, marker_val); + } BUF_PTR(data->seg_base) += instru->append_marker(BUF_PTR(data->seg_base), marker_type, marker_val); if (file_ops_func.handoff_buf == NULL) diff --git a/suite/tests/CMakeLists.txt b/suite/tests/CMakeLists.txt index f9b55c6b970..5d3a652e0da 100644 --- a/suite/tests/CMakeLists.txt +++ b/suite/tests/CMakeLists.txt @@ -3788,6 +3788,22 @@ if (BUILD_CLIENTS) OFF) set(tool.drcacheoff.altbindir_basedir "${PROJECT_SOURCE_DIR}/clients/drcachesim/tests") + + # Test the legacy trace versions OFFLINE_FILE_VERSION_KERNEL_INT_PC-1 and + # TRACE_ENTRY_VERSION_NO_KERNEL_PC. This requires a checked-in trace and thus + # -alt_module_dir; it has gzipped .raw files; hence here next to the altbindir test. + set(srcdir + ${PROJECT_SOURCE_DIR}/clients/drcachesim/tests/drmemtrace.legacy-int-offs.raw) + set(locdir ${PROJECT_BINARY_DIR}/drmemtrace.legacy-int-offs) + file(REMOVE_RECURSE ${locdir}) + file(MAKE_DIRECTORY ${locdir}) + file(COPY ${srcdir}/raw DESTINATION ${locdir}/) + torunonly_api(tool.drcacheoff.legacy-int-offs "${drcachesim_path}" + "offline-legacy-int-offs.c" "" + "-indir;${locdir};-simulator_type;basic_counts;-alt_module_dir;${srcdir};-module_file;${locdir}/raw/modules.log" + OFF) + set(tool.drcacheoff.legacy-int-offs_basedir + "${PROJECT_SOURCE_DIR}/clients/drcachesim/tests") endif () ###########################################################################