add3bits.sv.bak

module add3bits (A, B, Overflow);
	input [8:0] A, B;
	//input clk, Reset;
	//output [9:0] S;
	output Overflow;
	wire [9:0]C, S;

	//assign S[9] = C[8];
	assign Overflow = C[8];

	adder a1 (A[0],B[0],0,C[0],S[0]);
	adder a2 (A[1],B[1],C[0],C[1],S[1]);
	adder a3 (A[2],B[2],C[1],C[2],S[2]);

endmodule

module adder (A, B, CI, CO, S);
	input A,B,CI;
	output S,CO;

	assign CO = ( A & B ) |  ( CI & ( A | B ) );
	assign S = (A^B)^CI;
endmodule