[PROVER] Trace layout

[AntoineFONDEUR]

The first step to setup the prover is to create a layout for the trace that we will then use to apply the polynomial constraints.
The layout is detailed in this implementation of a cairo prover which I suggest we could retro-engineer : https://github.com/maxgillett/giza/blob/master/runner/src/trace.rs#L101 .
For each step it looks like so (as mentioned here: https://github.com/maxgillett/giza/blob/master/core/src/lib.rs#L22) :

A (flags)	B (res)	C (mem_p)	D (mem_a)	E (mem_v)	F (offsets)	G (derived)
Decoded instruction flags (16)	Res value	Temporary memory pointers (ap, fp)	Memory addresses (pc, dst_addr, op0_addr, op1_addr)	Memory values (inst, dst, op0, op1)	(off_dst, off_op0, off_op1)	(t0, t1, mul)

I propose for it to be put next to the relocation tables in the prover tab.