By Viktoria Biliouri
Implementation of a VGA (Video Graphics Array ) driver, for FPGA SPARTAN 3 console, on ISE Design Suite (Verilog).
The following verilog files, compose the full process for the implementation of a VGA driver.
The vga_controler.v module is the top module and the Testbench.v the tesbench file.
vga_controler.ucf is the constraints file.
vga_controler.bit is the bitfile that can be used for testing on Fpga Spartan 3 console.
The full process of the project is described analytically in Report.pdf