diff --git a/targets/TARGET_STM/TARGET_STM32G0/objects.h b/targets/TARGET_STM/TARGET_STM32G0/objects.h index afeaf5d8028..3f9ecf736ca 100644 --- a/targets/TARGET_STM/TARGET_STM32G0/objects.h +++ b/targets/TARGET_STM/TARGET_STM32G0/objects.h @@ -28,6 +28,8 @@ extern "C" { #endif +#define RTC_WKUP_IRQn RTC_TAMP_IRQn + struct gpio_irq_s { IRQn_Type irq_n; uint32_t irq_index; diff --git a/targets/TARGET_STM/TARGET_STM32G0/serial_device.c b/targets/TARGET_STM/TARGET_STM32G0/serial_device.c index 9ca9cf620c8..07f47048f20 100644 --- a/targets/TARGET_STM/TARGET_STM32G0/serial_device.c +++ b/targets/TARGET_STM/TARGET_STM32G0/serial_device.c @@ -129,24 +129,32 @@ void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) #if defined(USART3_BASE) if (obj_s->uart == UART_3) { +#if defined(LPUART1_BASE) irq_n = USART3_4_LPUART1_IRQn; +#else + irq_n = USART3_4_IRQn; +#endif vector = (uint32_t)&uart3_irq; } #endif #if defined(USART4_BASE) if (obj_s->uart == UART_4) { +#if defined(LPUART1_BASE) irq_n = USART3_4_LPUART1_IRQn; +#else + irq_n = USART3_4_IRQn; +#endif vector = (uint32_t)&uart4_irq; } #endif #if defined(LPUART1_BASE) if (obj_s->uart == LPUART_1) { -#if defined(STM32G031xx) - irq_n = LPUART1_IRQn; -#else +#if defined(USART3_BASE) irq_n = USART3_4_LPUART1_IRQn; +#else + irq_n = LPUART1_IRQn; #endif vector = (uint32_t)&lpuart1_irq; } @@ -326,21 +334,29 @@ static IRQn_Type serial_get_irq_n(UARTName uart_name) #endif #if defined(USART3_BASE) case UART_3: +#if defined(LPUART1_BASE) irq_n = USART3_4_LPUART1_IRQn; +#else + irq_n = USART3_4_IRQn; +#endif break; #endif #if defined(USART4_BASE) case UART_4: +#if defined(LPUART1_BASE) irq_n = USART3_4_LPUART1_IRQn; +#else + irq_n = USART3_4_IRQn; +#endif break; #endif #if defined(LPUART1_BASE) case LPUART_1: -#if defined(STM32G031xx) - irq_n = LPUART1_IRQn; -#else +#if defined(USART3_BASE) irq_n = USART3_4_LPUART1_IRQn; +#else + irq_n = LPUART1_IRQn; #endif break; #endif diff --git a/targets/TARGET_STM/TARGET_STM32G0/us_ticker_data.h b/targets/TARGET_STM/TARGET_STM32G0/us_ticker_data.h index 8a3b534a9b8..089e240da83 100644 --- a/targets/TARGET_STM/TARGET_STM32G0/us_ticker_data.h +++ b/targets/TARGET_STM/TARGET_STM32G0/us_ticker_data.h @@ -2,11 +2,11 @@ * SPDX-License-Identifier: BSD-3-Clause ****************************************************************************** * - * Copyright (c) 2017 STMicroelectronics. + * Copyright (c) 2017 STMicroelectronics. * All rights reserved. * * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the + * the "License"; You may not use this file except in compliance with the * License. You may obtain a copy of the License at: * opensource.org/licenses/BSD-3-Clause * @@ -16,13 +16,15 @@ #define __US_TICKER_DATA_H #ifdef __cplusplus - extern "C" { +extern "C" { #endif #include "stm32g0xx.h" #include "stm32g0xx_ll_tim.h" #include "cmsis_nvic.h" - + +#if defined TIM2_BASE + #define TIM_MST TIM2 #define TIM_MST_IRQ TIM2_IRQn #define TIM_MST_RCC __TIM2_CLK_ENABLE() @@ -33,12 +35,24 @@ #define TIM_MST_BIT_WIDTH 32 // 16 or 32 -#define TIM_MST_PCLK 1 // Select the peripheral clock number (1 or 2) +#else // TIM2_BASE + +#define TIM_MST TIM3 +#define TIM_MST_IRQ TIM3_IRQn +#define TIM_MST_RCC __TIM3_CLK_ENABLE() +#define TIM_MST_DBGMCU_FREEZE __HAL_DBGMCU_FREEZE_TIM3() + +#define TIM_MST_RESET_ON __TIM3_FORCE_RESET() +#define TIM_MST_RESET_OFF __TIM3_RELEASE_RESET() +#define TIM_MST_BIT_WIDTH 16 // 16 or 32 + +#endif // TIM2_BASE + +#define TIM_MST_PCLK 1 // Select the peripheral clock number (1 or 2) #ifdef __cplusplus } #endif #endif // __US_TICKER_DATA_H - diff --git a/targets/targets.json b/targets/targets.json index a43c7afc9e9..cabc9e114d4 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -2456,6 +2456,26 @@ ], "device_name": "STM32G031K8Tx" }, + "MCU_STM32G070xx": { + "inherits": [ + "MCU_STM32G0" + ], + "public": false, + "extra_labels_add": [ + "STM32G070xx" + ], + "macros_add": [ + "STM32G070xx" + ], + "macros_remove": [ + "EXTRA_IDLE_STACK_REQUIRED", + "MBED_TICKLESS" + ], + "overrides": { + "lpticker_delay_ticks": 1, + "lpticker_lptim": "0" + } + }, "MCU_STM32G071xx": { "inherits": [ "MCU_STM32G0"